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Solucin 1:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity led is
port ( clk: in std_logic;
blink: buffer std_logic);
end led;
Solucin 2:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity contador_3 is
port( clk: in std_logic;
q: buffer std_logic_vector(2 downto 0));
end contador_3;
--abcdefgp
with segmentos select display <= "00000011" when "0000",
"10011111" when "0001",
"00100101" when "0010",
"00001101" when "0011",
"10011001" when "0100",
"01001001" when "0101",
"11000001" when "0110",
"00011111" when "0111",
"00000001" when "1000",
"00011001" when "1001",
"11111111" when others;
process(clk)
begin
if rising_edge(clk) then
segundos <= segundos + 1;
if segundos = 48000000 then
segundos <= (others=>'0');
unid_seg <= unid_seg + 1;
if unid_seg = 9 then
unid_seg <= "0000";
dec_seg <= dec_seg + 1;
if dec_seg = 5 then
dec_seg <= "0000";
unid_min <= unid_min + 1;
if unid_min = 9 then
unid_min <= "0000";
dec_min <= dec_min + 1;
if dec_min = 5 then
dec_min <= "0000";
end if;
end if;
end if;
end if;
end if;
end if;
end process;
end solucion;