Issue 2.

ING. RUBEN GINO MARTINEZ VARELA

Principios SDH
EMAIL: RMARTINEZ@TELECOMPERU.COM
 Objetivos

 Entender la estructura de trama

SDH

 Entender la multiplexacion de
las redes SDH

 Conocer las caracteristicas,

aplicaciones y ventajas de
equipamiento basado en redes
SDH
 Contenido del curso

Parte 1 Revision SDH

i. Necesidad de SDH
ii. Desventajas de PDH Parte 2 Estructura de Trama & Metodos de Multip
iii. Ventajas del SDH
iv. Desventajas del SDH
Parte 3 Cabecera & Puntero
 Referencia

 SDH Principle Manual

 ITU-T G.701, G.702, G.707
 Porque Emerge SDH

---- Synchronous Digital Hierarchy

---- Define la estructura de trama,
Que es
metodos de multiplexacion, velocidades
SDH?
digitales jerarquizadas y patrones de
codigos de linea

---- Necesidad de un sistema que procese

Porque grandes cantidades de informacion.
emerge SDH? ---- Nuevo estandar que permite mezclar
equipos de diferentes proveedores.

BACK
 Desventajas de PDH

Plesiochronous
Digital Hierarchy
1. Interfaces
Interfaces Electricas
--- Mantiene estandares regionales. 3 velocidades
digitales PDH: Europea (2.048 Mb/s), Japonesa, Norte
America (1.544 Mb/s).
Interfaces Opticas
--- no tiene estandares para estas interfaces. Cada
fabricante usa su propio codigo de linea, no se pueden
interconectar equipos de diferentes fabricantes.
 Desventajas de PDH

2. Metodo de Multiplexacion
Multiplexacion Asincrona para PDH
La ubicacion de bajas velocidades dentro de las
velocidades altas no son faciles de identificar.
Ademas el proceso de extraccion e insercion de
bajas velocidades es mas complejo, es decir para
sacar 2Mbps de 140 Mbps tenemos que pasar por 3
estados.
Esto incrementa costos, consumo de energia y
disminuye la confiabilidad de la red.
 Desventaja de PDH

140 Mb/s 140 Mb/s

34 Mb/s 34 Mb/s

8 Mb/s 8 Mb/s
de-multiplexer multiplexer

de-multiplexer multiplexer

de-multiplexer multiplexer

2 Mb/s

Nivel por nivel

No es conveniente para alto volumen de transmision
 Desventaja de PDH

3. Funcion OAM
--- Debil funcionabilidad en Operacion, Administracion
& Mantenimiento.
--- tiene pocos bytes de cabecera usados para OAM, lo
cual es una desventaja para el manejo de capas,
monitoreo de performance, servicios en tiempo real y
control de ancho de banda y alarmas de la red de tx.

4. No tiene una interfaz de gestion de red

standar
--- cada fabricante tiene su propio TMN, asi para
integrar las redes muchas veces se tiene varios TMN.
Telecommunications Management
Network
 Ventajas de SDH

1. Interfaces
Electricas
--- Puede ser conectada a todas las senales
PDH existentes
Opticas
--- puede ser conectada a diferentes
proveedores de equipos.

BACK
 Ventajas de SDH
2. Metodo de Multiplexacion
Synchronous Transport Module, level 1

--- la velocidad basica es STM-1, otras

velocidades son multiplos de esta.
--- Las senales PDH y las senales bajas SDH
se insertan/extraen de las senales SDH.

STM-1
622 Mbit/s 622 Mbit/s
De-multiplexing

Multiplexing

STM-1

STM-1
STM-4
STM-1

2 Mbit/s Low rate SDH High rate SDH

 Ventajas de SDH

De Baja velocidad SDH a alta velocidad SDH

STM-64
×4 10 Gb/s

STM-1 ×4 STM-4 ×4 STM-16

155 Mb/s 622 Mb/s
2.5 Gb/s

WDM 10 Gb/s
 Ventajas de SDH

Metodo: byte interleaved multiplexing

One Byte from

STM-1 STM-1 A
A

STM-1 B A D C B A D C B A …
B 4:1
STM-4

STM-1
C

STM-1
D
 Ventajas de SDH

Concepto General

P STM-1
D Packing PKG Alignment
H
PKG PKG
a b
 Ventaja de SDH

3. Funcion OAM
--- Suficientes bytes de informacion en la
cabecera para monitoreo, control,
supervision y mantenimiento de la red.
--- Para esta funcion se usa cerca del 5% de
bytes.
 Ventajas de SDH

4. Compatibilidad
PDH, SDH,
ATM, FDDI
Signals
packing

package STM-N SDH STM-N package

network
transmit receive Processing
Processing
unpacking

PDH, SDH,
ATM, FDDI
Signals
BACK
 Desvantajas de SDH

1. Bajas velocidades.
Signal Digital Bit Rate Channels
E0 64 kbit/s One 64 kbit/s
Non-Synchronous,
E1 2.048 Mbit/s 32 E0
PDH Hierarchy
E2 8.448 Mbit/s 128 E0
E3 34.368 Mbit/s 16 E1
E4 139.264 Mbit/s 64 E1

Bit Rate Abbreviated SDH SDH Capacity

155.52 Mbit/s 155 Mbit/s STM-1 63 E1, 3 E3 or 1 E4

622.08 Mbit/s 622 Mbit/s STM-4 252 E1, 12 E3 or 4 E4

2488.32Mbit/s 2.5 Gbit/s STM-16 1008 E1, 48 E3 or 16 E4

9953.28Mbit/s 10 Gbit/s STM-64 4032 E1, 192 E3, 64 E4

SDH Hierarchy BACK
 Desventajas de SDH

2. Mecanismo de justificacion del

puntero es complejo.

3. La funcionalidad del sistema se da en buen

porcentaje por el software lo cual lo hace
vulnerable a virus o malas practicas.
 Contenido del curso

Parte 1 revision de SDH

Parte 2 estructura de trama y metodo de multiplexa

i. Estructura de trama de STM-N

ii. Funcion de cada parte Parte 3 Cabecera & Puntero
iii. Multiplexacion de tributarios SDH
 Parte 2 Estructura de Trama SDH

ITU-T G.707:
Frame = 125 us
1. STM-1 es el formato basico
de transmision.
2. Una trama dura 125
microsegundos (8000
1
frames/s
2
3. Estructura de bloque
rectangular de 9 filas y 270 3
columnas 4
9 rows
4. Cada unidad es un byte (8 5
bits) 6
5. Modo de tx: Byte por byte, 7
fila por fila, de izquierda a 8
derecha, de arriba hacia 9
abajo
270 Columns

1 byte = un canal de 64 kbit/s

STM-N = 9 X 270 X N (N = 4, 16, 64)
 Estructura de Trama SDH

Frame = 125 us

1
Three parts: 2 SOH
3
1. Information 4 PTR Information
5 9 filas
Payload 6 Payload
2. Section 7 SOH
Overhead 8
9
3. Pointer
9

270 Columnas
 Information Payload
Information Payload

√ tambien conocido como Virtual Container level 4 (VC-4)

√ Usado para transportar bajas velocidades de tributarios
√ contiene bajas velocidades de tributarios y Path Overhead (POH)
√ ubicacion: rows #1 ~ #9, columns #10 ~ #270

POH

SOH
package
POH

PTR loading and

9 filas Payload low rate signal
aligning

SOH package

POH
9 1 Data
package
270 Columnas
 SDH Overhead

Concept of Path and Section

one Path ( low rate signal)

one Path ( low rate signal) Section
(SDH signal)
one Path ( low rate signal)

Two main types of overheads:

1. Section Overhead
2. Path Overhead
 Section Overhead

Fulfills the section layer OAM functions

1
2 RSOH Types of Section Overhead
3
PTR Information 1. Regenerator Section
5 9 filas Overhead (RSOH), monitors
6
Payload the whole STM-N
7 MSOH 2. Multiplex Section Overhead
8 (MSOH), monitors STM-1 in
9 STM-N
√ Location:
9
1. RSOH: rows #1 ~ #3,
270 Columnas columns #1 ~ #9
2. MSOH: rows #5 ~ #9,
columns #1 ~ #9
 Pointer

√ Indicates the first RSOH

byte of the payload
container
4 AU-PTR Information
√ Pointers permit 9 rows
phase and frequency Payload
differences of the VCs MSOH

► Location:
row #4, columns #1 ~ #9 9

270 Columns
Two stage alignment operation: TU-PTR AU-PTR
1st alignment 2nd alignment
2M

34 M
 SDH Multiplexing

SDH Multiplexing includes:

√ Low to high rate SDH signals (STM-1  STM-N)

√ PDH to SDH signals (2M, 34M & 140M  STM-N)
√ Other hierarchy signals to SDH Signals (ATM  STM-N)

Some terms and definitions:

► Mapping
► Aligning
► Multiplexing
► Stuffing
Go to glossary
 SDH Multiplexing Structure
×1 Mapping
STM-64 AUG-64
Aligning
×4
×1 Multiplexing
STM-16 AUG-16
×4 Pointer processing
×1
STM-4 AUG-4

×4
×1 ×1
STM-1 AUG-1 AU-4 VC-4 C-4 139264 kbit/s

×3

×1 34368 kbit/s
TUG-3 TU-3 VC-3 C-3

×7
TUG-2

Go to glossary TU-12 VC-12 C-12 2048 kbit/s

×3
 SDH Tributary Multiplexing (140M)

140 Mbit/s to STM-N

C4 VC4
1 1
1
P
Rate Add POH Next
140M
adaptation O page

9 Mapping
H
Packing 9
1 260 1 261
125 μs 125μs
 SDH Tributary Multiplexing (140M)

AU-4 AUG-1 STM-1

1 270
10 270
1
Add 1 9 RSOH
AU-PTR Add Info
Pointer ×1 AU-PTR
SOH
Payload
9
MSOH
Aligning Multiplexing STM-N
1
AUG-N 270X N
1
Multiplexing route:
1X140M  1XVC-4 
1XSTM-1
One STM-1 frame can load 9
only one 140Mbit/s Signal Multiplexing
 SDH Tributary Multiplexing (34M)

34 Mbit/s to STM-N

C3 VC3
1 1
1
P
34M Rate Add POH Next
Adaptation O page

9
H
9
Packing 84 Mapping 85
1 1
125μs 125μs
 SDH Tributary Multiplexing (34M)

TU-3 TUG-3 VC-4

1 86 1 86 1 261
3
1 1 H1 1
H1 H2
H2 H3
H3 P
1st Fill O R R
×3
gap H
align R

9 9 9

Aligning Stuffing Multiplexing Same

as for
Multiplexing route: 1X34M  1XTU-3  3XTUG-3  C4
1XAU-4---One STM-1 can load three 34Mbit/s signals
 SDH Tributary Multiplexing (2M)

2 Mbit/s to STM-N
C12 VC12 TU12
POH
1 4 1 4 1 4
1 1 1

Rate Add Add Next

2M
Adaptation POH Pointer page

9 9 9

Packing 125μs Mapping Aligning TU-PTR

 SDH Tributary Multiplexing (2M)

TUG-2 TUG-3
1 12 1 86
1 1

R R
×3 ×7

9 9

Same
Multiplexing Multiplexing as for
C3
Multiplexing route: 1X2M  3XTU12 
7XTUG-2  3XTUG-3  1XSTM-1--- One
STM-1 can load 3X7X3 = 63X2M Signals
Multiplexing structure: 3-7-3 structure
 Glossary

► Mapping - A process used when tributaries are

adapted into VCs by adding justification bits and POH
information

► Aligning - This process takes place when a pointer is

included in a Tributary Unit (TU) or an Administrative
Unit (AU), to allow the 1st byte of the VC to be located

GO back to SDH Multiplexing

 Glossary

► Multiplexing - This process is used when multiple

low-order path signals are adapted into a higher-order
path signal, or when high-order path signals are adapted
into a Multiplex Section

► Stuffing – As the tributary signals are multiplexed

and aligned, some spare capacity has been designed into
the SDH frame to provide enough space for all various
tributary rates. Therefore, at certain points in the
multiplexing hierarchy, this space capacity is filled with
“fixed stuffing” bits that carry no information, but are
required to fill up the particular frame GO back to SDH Multiplexing
 Glossary

 SDH Multiplexing Structure

C = Container
VC = Virtual Container
TU = Tributary Unit
AU = Administrative Unit
TUG = Tributary Unit Group
AUG = Administrative Unit Group
STM = Synchronous Transfer Module

Go back
 Glossary

 TU Multiframe
In the floating TU mode, four consecutive 125 microsecond frames
of the VC-4 are combined into one 500 microsecond structure,
called a TU Multiframe. The occurrence or the TU Multiframe and
its phase is indicated in the VC-N Path Overhead.
 Concatenation
The linking together of various data structures. In SDH, a number
(M) of TUs can be linked together to produce a concatenated
container, M times the size of the TU.
 Contenido del curso

Parte 1 Revision de SDH

Part 2 Estructura de trama y metodo de multiplexa

Parte 3 Cabecera y Puntero

i. SOH
a. RSOH
b. MSOH
ii. POH
a. H.O. POH
b. L.O. POH
iii. POINTERS
a. AU-PTR
b. TU-PTR
 Parte 3 Section Overheads

R 1 A1 A1 A1 A2 A2 A2 J0
S ∆ ∆ ∆
2 B1 E1 F1
O
S H 3 D1 ∆ ∆ D2 ∆ D3

T AU-PTR
M
5 B2 B2 B2 K1 K2
-
1 M 6 D4 D5 D6
S
7 D7 D8 D9
O
H 8 D10 D11 D12
9 S1 M1 E2
∆ = Media dependent bytes
 A1 and A2 Bytes

 Framing Bytes – Indicate the beginning of the

STM-N frame
 The A1, A2 bytes are unscrambled
 A1 = f6H (11110110), A2 = 28H (00101000)
 In STM-N: (3XN) A1 bytes, (3XN) A2 bytes

stream

STM-N STM-N STM-N STM-N STM-N STM-N

Finding frame head

 A1 and A2 Bytes

Framing

N
Find
A1,A2

OOF
Y
over 3ms

LOF

Next AIS
process
Back
 D1 ~ D12 Bytes

Data Communications Channels (DCC) Bytes –

 Message-based Channel for OAM between NEs
and NMS
 RS-DCC – D1 ~ D3 – 192 kbit/s (3X64 kbit/s)
 MS-DCC – D4 ~ D12 – 576 kbit/s (9X64kbit/s)

NE NE NE NE

DCC channel
TMN OAM Information: Control, Maintenance,
Remote Provisioning, Monitoring (Alarm &
Performance), Administration
 E1 and E2 Bytes

 Orderwire Bytes – Provides one 64 kbit/s each for

voice communication
 E1 – RS Orderwire Byte – RSOH orderwire message
 E2 – MS Orderwire Byte – MSOH orderwire message

NE NE NE NE

E1 and E2

Digital telephone channel

E1-RS, E2-MS
 B1 Byte

Bit interleaved Parity Code (BIP-8) Byte –

 A parity code (even parity), used to check the
transmission errors over the RS
 B1 BBE is represented by RS-BBE

A1 00110011 STM-N

A2 11001100 Tx Rx
A3 10101010
BIP-8
A4 00001111 Calculate
1#STM-N 2#STM-N
B1, B2

Verify B1
B 01011010 2#STM-N
B2 1#STM-N
 B2 Byte

Bit interleaved Parity Code (MS BIP-24) Byte –

 This bit interleave parity NX24 code is used to
determine transmission errors occurred over the MS
 B2 BBE is represented by MS-BBE

Insert Detect
B2 B2

SDH STM-N SDH

Equipment Equipment
Sending NE Receiving NE

If error blocks occur

 MS-BBE performance event
 M1 Byte

Multiplex Section Remote Error Indication（MS-REI）

Byte
 A return message from Rx to Tx ,when Rx find MS-
BBE
 A count of the number of BIP-24xN (B2) errors
 Tx generate corresponding performance event MS-
REI
Traffic

Tx Rx

Return M1
Find MS-BBE
Generate
MS-REI
 K1 and K2 (b1 ~ b5)

Automatic Protection
Switching (APS channel)
bytes

Transmitting APS signaling

Implement equipment self-healing function

Used for network multiplex

protection switch function
 K2 (b6 ~ b8)

 Multiplex Section Remote Start

Defect Indication (MS-RDI):
K2 (b6-b8)
Detect
 Rx detects K2 (b6-
K2(b6- 110
b8)="111" generate MS- b8)
AIS alarm after 5 111
consecutive frames
Generate
 Rx detects K2 (b6- MS-AIS
b8)="110" generate MS-
RDI alarm
Return MS- Generate
RDI MS-RDI
 S1 Byte

Synchronization Status Message Byte (SSMB): S1

(b5~ b8)
 Value indicates the sync. level
 Used to implement the clock source protection
function
bits 5 ~ 8 Meaning
0000 Quality unknown (existing sync. Network)

0010 G.811 PRC

0100 SSU-A (G.812 transit)

1000 SSU-B (G.812 local)

1011 G.813 (Sync. Equipment Timing Clock)

1111 Do not use for sync.

 Path Overheads
1 2 3 4 5 6 7 8 9 10
1 J1
2 B3
3 C2
4 G1
5 F2
6 H4
7 F3
8 K3
9 N1
VC-n Path Trace Byte
Path BIP-8
Path Signal Label
Path Status
Path User Channel
TU Multiframe Indi
Path User Channel
AP Switching
Network Operator

Higher Order Path Overhead

 Path trace byte: J1

Detect J1

> The first byte of VC-4 N

Match
Y
> User-programmable
> Required match
HP-TIM Next
process

Insert AIS
downward
 Path BIP-8 Byte

> Path bit interleaved parity

code byte (even parity code)

> Used to detect Verify B3

transmission errors
(Performance Monitoring)

> Calculated over all bits N Y

of the previous VC before correct
scrambling and placed in
the B3 of the current frame

HP-BBE Next
process
 Signal label byte: C2

> Specifies the mapping Detect C2

type in the VC-N

> 00 H  Unequipped N Y
00H
02 H  TUG structure
13 H  ATM mapping Y N
Match HP-UNEQ

> Requires matching

Next HP-SLM
process

Insert AIS
downward
 Path Status Byte: G1

Detect receiving
VC4
> Return performance
message from Rx to Tx

> HP-REI  b1 ~ b4 N
HP-
UNEQ Y
HP-TIM

> HP-RDI  b5 HP-SLM

N HP- Y Return
BBE
HP-RDI

Next Return
process HP-REI
 Path Overheads
Low Order Path Overhead
1 4
1
V5 J2 N2 K4

VC-12 VC-12 VC-12 VC-12

9
500μs VC-12 multiframe
 Path Overhead Bytes

V5
> First byte of the multiframe
> Indicated by TU-PTR
> Functions: Error checking, Signal Label and Path Status
of VC-12

 b1 ~ b2  Error Performance Monitoring (BIP-2)

 b3  Return Error detected in VC-12 (LP-REI)
 b4  Return Failure declared in VC-12 (LP-RFI)
 b5 ~ b7  Signal Label for VC-12
 b8  Indicate Defect in VC-12 path (LP-RDI)
 Path Overhead Bytes

Detect V5

Detect b5-b7
Verify b1 b2

N Y
000 N Y
match
Y N LP-UNEQ
Match
LP-BBE Next
Next process
process LP-SLM

Return LP-
REI b3
Return LP-
RDI b8
 Pointers

Pointers

AU-PTR TU-PTR
 AU-PTR

RSOH

AU-PTR 4

MSOH
 AU-PTR

> Payload pointers to permit differences in

phase and frequency of the VC-N wrt the STM-N
> Indicates the offset between VC payload &
STM-N frame by pointing to the 1st byte in the
VC
> Consists of H1, H2 and H3 Bytes
> Divide the VC-4 payload bytes into 3  783
units
> Each unit is given an address  0 ~ 782

H1 H1 H1 H2 H2 H2 H3 H3 H3
3 x AU-3 1 = All 1s
H1 Y Y H2 1 1 H3 H3 H3 Y = 1001ss11
1 x AU-4
(S bits unspecified)
 AU-PTR
> H1 & H2 Bytes  Pointer bytes:
VC pointer bytes specify the VC frame location
 Used to align the VC and STM-1 SOHs in an STM-N
 Perform frequency justification

> H3 Byte  Pointer action byte

 Used for frequency justification
 Depending on the pointer value, the bytes are used
as buffers for positive or negative pointer justifications

> If receiver side cannot interpret the PTR value,

AU-LOP then AIS alarms are inserted downwards
> Receiving H1H2H3H3H3 all 1s, insert AU-AIS
downwards
 TU-PTR
1 4
1

VC-12 VC-12 VC-12 VC-12

9 V1 V2 V3 V4
500μs VC-12 multiframe
TU POINTERS
 TU-PTR

> TU payload PTR allows dynamic alignment of the

L-O VC-12 within the Multiframe
> Payload PTR value is located in bits 7~ 16 of V1 &
V2 Bytes
> VC-12 Multiframe is divided into 140 units, each unit
is 1 Byte. Each Byte has an address, Range 0~ 139,
Unit 1 (Add = 0) is located after V2 Byte in the
Multiframe
> If receiver side cannot interpret the PTR value, TU-
LOP then AIS alarms are inserted downwards
> Receiving V1, V2, V3, V4 all 1s, insert TU-AIS
downwards
> Indication of Multiframe in H4 Byte
 Summary

 SOH consists of RSOH & MSOH

 POH consists of L-O POH & H-O POH
 PTR consists of AU-PTR & TU-PTR