MT6572

Free Datasheet http://www.nDatasheet.
com
Project : MT6572
REF_SCH TOP LEVEL
Debug
port
Keypad
Gyro
sensor
Magnetic
sensor
ALS + PXS
Motion
Sensor
CTP
controller
LCD
module
2nd Camera
Module
Camera
Module
CMMB
micro SD
+ hot-plug
Memory
MCP
x32
MSDC 4-bit
EINT
I2C
EINT
I2C
EINT
I2C
EINT
I2C
EINT
I2C
UART
JTAG
LCD IF
Camera IF
Camera IF
EINT
NFI
EMI
I2C
CAM
(MIPI / Parallel)
SPI
MSDC1
NFI
EMI
i2C_1
LCD
(MIPI / Parallel)
i2C_0
MT6572
USB
ABB
USB 2.0
BC1.1
SPI
POWER
AUD I/F
32K_BB
CONN ctrl
CONN IQ
26M_CN
26M_AUD
26M_BB
BSI ctrl
RF IQ
BPI, APC
Charger
Power
Management
BJT
Charger
Audio
Speech
MT6323
RTC
MT6627
26M_CN
DCXO ctrl
MT6166
RX
32K
TCXO
26M
RX
balun
FEM
VIB
Friday, December 28, 2012

Date:
Sheet
MT6572 REF PHONE
Document Number
MT6572 Block diagram
micro USB
Battery
SIM1
SIM2
Connectivity ANT
Size
D
Title
SIM1
SIM2
AU_VIN0
Receiver
Class D/AB
Headset
(HPL, HPR, AU_VIN1)
TX
Celullar ANT
of
19
Rev
V1.0
Free Datasheet http://www.nDatasheet.com
VIO18_PMU
VUSB_PMU
VIO18_PMU
C101
C104
C109
C / 1000 / nF / 0402
C113
C / 1000 / nF / 0402
VIO18_PMU
VUSB_PMU
VIO18_PMU
dedicate VSS ball, must return to cap then to main GND:

1. REFN(G6) => C109
2. DVSS18_MIPIRX(U25) => C107
3. DVSS18_MIPITX(P25) => C101
C107
REFP
A26
U10
U11
V13
W11
Y21
AC21
AD11
AF13
AB11
AC8
AB5
AB14
W26
T15
W23
T14
AF26
G3
K21
L11
L12
L14
L15
L16
M5
M11
M12
M13
M14
M15
M16
N10
N8
N9
N11
N12
N13
N14
N15
N16
P10
N22
P11
P12
P13
P14
P15
P16
R10
R11
R12
R13
R14
R15
R16
T10
T11
T12
T13
AF1
G6
F6
H23
G24
G23
R25
P25
T25
U25
BG
AVDD18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
AVSS18_MD
DVDD18_PLLGP
AVDD18_AP
AVDD28_DAC
VCC
Core
VCC
CPU
DVDD
Peripheral
VCC
Memory
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
VCCK_CPU
DVDD28_BPI
DVDD3_LCD
DVDD3_MC1
DVDD18_MC0
DVDD18_CAM
DVDD18_VIO_1
DVDD18_VIO_2
DVDD18_VIO_3
DVDD18_LCD
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
VCCIO_EMI
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
DUMMY
VSS
VSS
VSS
VSS
VSS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VSS
U101-B
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
REFN
REFP
AVDD18_USB
AVDD33_USB
AVSS33_USB
DVDD18_MIPITX
DVSS18_MIPITX
DVDD18_MIPIRX
DVSS18_MIPIRX
VMC_PMU
DVDD18_LCD
VIO28_PMU
K24
W24
C10
J9
J15
M9
K6
K7
K8
K9
K11
K14
K15
M10
K16
K17
U17
M17
L7
L8
L9
L17
M6
M7
M8
J17
J16
R17
T16
L6
K12
T17
J10
J11
U12
U13
U14
U15
U16
J8
J14
P6
T7
P7
P8
P9
R6
R7
R8
R9
T6
U6
T9
T8
U7
C128
C / 100 / nF / 0402
C112
1.8V IO for DDR1

1.2V IO for DDR2
VIO18_PMU
VIO18_PMU
VIO18_PMU
VIO18_PMU
VIO18_PMU
DVDD18_LCD
VIO18_PMU
VTCXO_PMU
AA1
K20
L3
J19
H13
AB24
W9
W12
W14
W16
W19
D3
A1
A4
C3
E2
U9
E5
F1
C108
C117
C / 1000 / nF / 0402
C406
VIO28_PMU
VMC_PMU
Close to BB IC, recommand < 150mil
C405
VIO_EMI
VIO18_PMU
VIO18_PMU
VTCXO_PMU
4mil - defferential - GND shielding
120mil
C121
C126
C / 1000 / nF / 0402
VPROC_FB
VPROC_FB
[3]
VPROC_FB
[3]
GND_VPROC_FB
Sheet
MT6572 REF PHONE

Wednesday, January 02, 2013
Date:
BB- Power
Document Number
Size
D
Title
[3]
Vproc remote sense :

differential 4mil with good shielding, from the BB to PMIC
Based on your system level

design , if better FM performance
is needed on your system ,
please refer to FM desense
performance enhance proposal
R / 0 / ohm / 0402
R119
VIO18_PMU
If double-sided SMT, put C405 & C406 below BB.

If single-sided SMT, put C405 & C406 around memory.
1 C114
2
U101-H
1 C115
2
cap Close to BB IC
1 C118
2
cap Close to BB IC
1 C116
2
1 C135
2
1
2
1
2
2
1
1
2
1 C120
2
1
2
1 C134
2
C / 1000 / nF / 0402
1 C119
2
C / 1000 / nF / 0402
1 C136
2
C / 1000 / nF / 0402
1 C137
2
C / 1000 / nF / 0402
1
2
1
2
1
2
1 C106
2
C / 4700 / nF / 0603
C111
1
1 C102
2
2
1 C103
2
1
2
of
19
Rev
V1.0
A2
B2
B4
B3
[6] TX_I_P
[6] TX_I_N
[6] TX_Q_P
[6] TX_Q_N
[13] MIPI_RDN0
[13] MIPI_RDP0
[13] MIPI_RDN1
GPIO_CMPDN2
GPIO_CMRST2
GPIO_CMPDN
GPIO_CMRST
R202
[12] MIPI_TCN
[12] MIPI_TCP
[12] MIPI_TDN0
[12] MIPI_TDP0
[12] MIPI_TDN1
[12] MIPI_TDP1
close to BB
100-ohm differential
[13] MIPI_RCN
[13] MIPI_RCP
100-ohm differential[13] MIPI_RDP1
[13]
[13]
[13]
[13]
F2
[6] VAPC1
U101-A
BSI_DATA2
BSI_DATA1
BSI_DATA0
BSI_EN
BSI_CLK
BPI_BUS7
BPI_BUS8
BPI_BUS9
BPI_BUS10
BPI_BUS11
BPI_BUS12
BPI_BUS13
BPI_BUS14
BPI_BUS15
BPI_BUS4
BPI_BUS5
BPI_BUS6
BPI_BUS0
BPI_BUS1
BPI_BUS2
BPI_BUS3
P26
P19
P20
N25
N26
P23
P24
N20
N19
R24
R23
R22
R21
R26
T26
L25
K25
H22
J22
U101-G
MIPI_LCD
MIPI_CAM
CMDAT3
CMDAT2
CMDAT1
CMDAT0
RCN_A
RCP_A
RDN1_A
RDP1_A
RDN0_A
RDP0_A
CMPCLK
CMMCLK
MIPI_2nd_CAM
Parallel 8-bit
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
VRT
TDN0
TDP0
TDN1
TDP1
TDN2
TDP2
TCN
TCP
RDN0
RDP0
RDN1
RDP1
RCN
RCP
CMPDN2
CMRST2
CMPDN
CMRST
BSI-A_DAT2 [6]
BSI-A_DAT1 [6]
BSI-A_DAT0 [6]
BSI-A_EN [6]
BSI-A_CK [6]
Y26
Y25
AA25
AB25
V25
W25
V24
V23
U22
U21
Y23
Y22
[13]
[13]
CMDAT3
CMDAT2
CMDAT1
CMDAT0
[13]
[13]
[13]
[13]
CMVSYNC [13]
CMHSYNC [13]
CMDAT7 [13]
CMDAT6 [13]
CMDAT5 [13]
CMDAT4 [13]
CMPCLK
CMMCLK
Based on your system level design , if better

desense performance is needed on your
system , please refer to desense
D6
C7
F9
F11
G11
[5]
[6]
[6]
[6]
[6]
EINT_MAG [80]
EINT_ALPXS [21]
EINT_ACC [21]
EINT_HP
D11
C11
A13
A10
B10
D10
E9
E8
B9
B8
E7
D7
BPI_0
BPI_1
BPI_2
BPI_3
B12
B11
C12
A11
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
VBIAS
APC
TXBPI
VM0
VM1
UL_I_P
UL_I_N
UL_Q_P
UL_Q_N
DL_I_P
DL_I_N
DL_Q_P
DL_Q_N
MIPI_VRT
F3
D5
[6] TXBPI
A8
A7
D2
C2
B1
C1
[6] RX_I_P
[6] RX_I_N
[6] RX_Q_P
[6] RX_Q_N
USB_VRT
[13] SCL_0
[13] SDA_0
[12,21] SCL_1
[12,21] SDA_1
[12,21] SCL_1
[12,21] SDA_1
[13] SCL_0
[13] SDA_0
B7
B6
C5
B5
C4
A5
K23
L21
K22
M22
M25
L26
F24
F25
F23
E23
C25
C26
B24
B23
G26
G25
H25
J26
J25
AC24
R206
2.2K
VIO18_PMU
R204
2.2K
SPI
i2C
USB 2.0
BC 1.1
UART
KP
UTXD1
URXD1
UTXD2
URXD2
KROW0
KROW1
KROW2
KCOL0
KCOL1
KCOL2
LPCE0B
LPTE
LRSTB
LPRDB
LPA0
LPWRB
LPD17
LPD16
LPD15
LPD14
LPD13
LPD12
LPD11
LPD10
LPD9
LPD8
LPD7
LPD6
LPD5
LPD4
LPD3
LPD2
LPD1
LPD0
Power by CTP, MEMS sensor
R207
2.2K
Power by CAM_IO
R205
2.2K
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
AUX_IN0
ADC
AUX_IN1
AUX_IN2_XP
AUX_IN3_YP
AUX_IN4_XM
AUX_IN5_YM
MC1_CMD T-flash
MC1_CK
MC1_DAT0
MC1_DAT1
MC1_DAT2
MC1_DAT3
SPI_MISO
SPI_MOSI
SPI_SCK
SPI_CS
SCL_0
SDA_0
SCL_1
SDA_1
USB_DM
USB_DP
USB_VRT
CHD_DP
CHD_DM
FSOURCE
TESTMODE
SYSRSTB
CLK32K_IN
CLK26M
LCD
Parallel
J5
M1
[3] SIM2_SCLK
[3] SIM2_SIO
PWM_A
PWM_B
H5
M3
[3] SIM1_SCLK
[3] SIM1_SIO
PWM
G2
H4
J2
[3] WATCHDOG
[3,6] SRCLKENA
[3] EINT_PMIC
SYSTEM
L2
L5
L4
K2
J1
K5
K1
[3] PMIC_SPI_MOSI
[3] PMIC_SPI_MISO
[3] PMIC_SPI_SCK
[3,4] PMIC_SPI_CS
[3] AUD_MISO
[3] AUD_CLK
[3] AUD_MOSI
U101-E
VCAMD_IO_PMU
[18] MC1CMD
[18] MC1CK
[18] MC1DAT0
[18] MC1DAT1
[18] MC1DAT2
[18] MC1DAT3
[80] SPI_MISO
[80] SPI_MOSI
[80] SPI_SCK
[80] SPI_CSB
R203
90-ohm differential
close to BB
[14] USB_DM
[14] USB_DP
[3] RESETB
[3] CHD_DP
[3] CHD_DM
M2
[3] CLK32K_BB
G4
E1
H2
[6] CLK1_BB
1
1
2
2
1
1
2
2
E25
D25
E26
F26
B25
A24
B26
C24
D24
A25
AD25
AB26
AC26
AA22
AB23
AC25
N1
N2
N3
P2
N4
R2
N5
R1
P5
T1
R5
T2
T5
U2
T3
U5
T4
V2
D12
E12
[18]
[80]
[80]
[20]
[20]
[20]
KROW0
KROW1
KCOL0
EINT_GY [80]
LPTE [12]
GPIO_LRSTB [12]
[80]
GPIO_FLASH_SEL
GPIO_TV_RST [80]
GPIO_CTP_RSTB
[12]
MC1_INS
EINT_CMMB
GPIO_FLASH_EN
EINT_CTP [12]
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
SIM2_SCLK
SIM2_SIO
SIM1_SCLK
SIM1_SIO
WATCHDOG
SRCLKENA
EINTX
PMIC_SPI_MOSI
PMIC_SPI_MISO
PMIC_SPI_SCK
PMIC_SPI_CSN
AUD_DAT_MISO
AUD_CLK_MOSI
AUD_DAT_MOSI
U101-D
Reserve R footprint
for JTAG debugging
Normal : NC
JTAG : 20K
VIO18_PMU
URXD1

Date:
Sheet
MT6572 REF PHONE
Document Number
BB - peripheral
TP202
Size
D
Title
MT6572 support JTAG from below :

1. KP (recommand)
1
JTMS
2. MC1
TP205
3. CAM
1
JTCK
TP206
for JTAG pin out from MC1/CAM, refer
1
to HW design
UTXD1 notice
TP201
[3] SIM1_SCLK
reserve for JTAG debug
of
19
Rev
V1.0
NC-4MIL_
VBAT+
NC
NC
NC
GND-
NC NTC
40mils
40mils
40mils
40mils
R0805
R328
4mil
4mil
80mil
BATSNS
R335
R334
R331
AUXADC_REF
STT818B
E U303
Between IC and IO port
Refer to MT6323 design

notice for Zener selection
40mils
R329
BATSNS
BATSNS[6]
BAT_ON
BATSNS
R334,R335 must to be close to

PMIC AUXADC_REF pin
1R317
40mils
[6]
Differential
ISENSE
VDRV
CHR_LDO
VCDT rating: 1.268V
2 SSM3K35MFV
U305
VCDT
AUXADC_REF
R324
39K
Add Zenar Diode

Place on the500mW
path
from VBAT to IC
D302
(Battery connector
SOD323/SMD/MM3Z2V4T1
or test point or IO
connector) VF : 4.85V~5.36V
Based on your system level design , if

better ESD performance is needed on
your system, please refer to ESD
BAT/SMD/KBC23S3D4XR/KEIRAKU
CON301
BATTERY
CONNECTOR
Rsense
40mils
1. Close to Battery Connector.

(Rsense (R328) <10mm)
2. Main path should be 40mil.
(VBUS -> U303's E, -> U303's C -> R328 -> VBAT)
3. Star connection from R328 to BAT Connector
cap rating depends on C329
Phone OVP spec.
VBUS
[6]
C310
VIO18_PMU
VSYS_PMU
20mil
20mil
20mil
20mil
15mil
4mil (VPA no use)
40mil
CHR_LDO
BAT_ON
VCDT
VDRV
C316
C / 1000 / nF / 0402
BATSNS
BATSNS
BATSNS
BATSNS
VA_PMU
Close to PMIC
BATSNS
BATSNS
BATSNS
ISENSE/BSTSNS 4mil
[6] BATSNS
differential
to Rsense
ISENSE
Refer to MT6323 design notice

for Buck GND layout rule

better EOS performance is needed on your
system, please refer to EOS performance
enhance proposal
VIO18_PMU
SH301
Refer to GPS co-clock layout rule
GND_SIGNAL
refer to system analog LDO

performance improve proposal
[2] CHD_DM
[2] CHD_DP
AUXADC_REF
AUXADC_TSX
GND_AUXADC
K9
K11
K10
[19] SCLK2
[19] SIO2
[19] SRST2
M9
N11
M10
C5
L11
D6
B5
M11
E6
A10
A11
C2
B1
B2
[19] SCLK
SIO
[19]
[19] SRST
[2] SIM2_SCLK
[2] SIM2_SIO
[2] SIM1_SCLK
[2] SIM1_SIO
[6] GND_AUXADC
A5
A8
J14
M14
H13
P8
P6
P5
P2
F13
G14
G13
A13
D9
B7
D8
B8
A2
M1
[2] PMIC_SPI_SCK
[2,4] PMIC_SPI_CS
[2] PMIC_SPI_MOSI
[2] PMIC_SPI_MISO
[2,6] SRCLKENA
FCHR_ENB
N2
E7
E8
B6
[2] EINT_PMIC
M2
A1
K4
A9
A7
N12
N13
[2] AUD_MOSI
[2] AUD_CLK
[2] AUD_MISO
DVDD18_DIG_PMIC
Connect TSX/XTAL GND

to AUXADC_GND first
than connect to main GND
C322 must to be close

to PMIC AUXADC_TSX pin
FCHR_ENB
R316
[6] AUXADC_REF
CHR_LDO
P13
P12
K3
A12
M13
E1
[6] CLK4_AUDIO
J2
D3
H2
E2
BATSNS
ISENSE
BAT_ON
VCDT
VDRV
G3
G4
[5] AU_VIN1_P
[5] AU_VIN1_N
D2
D1
E4
F4
F2
G2
L2
P1
[5] AU_VIN0_P
[5] AU_VIN0_N
MICBIAS1
C313
[5] ACCDET
VA_PMU
C312
C322
C / 100 / nF / 0402
[6] AUXADC_TSX
TP301
[20] PWRKEY
[2] WATCHDOG
[2] RESETB
C314
C / 1000 / nF / 0402
MICBIAS0
BATSNS
1
2
1 C301
2
1
2
1
2
Charger
1 C303
2
1
2
1
1 C304
2
2
1
CHARGER
AUXADC
SIM LVS
SIMLS2_SCLK
SIMLS2_SIO
SIMLS2_SRST
SIMLS1_SCLK
SIMLS1_SIO
SIMLS1_SRST
SIM2_AP_SCLK
SIMLS2_AP_SIO
SIM2_AP_SRST
SIM1_AP_SCLK
SIMLS1_AP_SIO
SIM1_AP_SRST
CHG_DM
CHG_DP
BC 1.1
AUXADC_VREF18
AUXADC_AUXIN_GPS
AVSS28_AUXADC
DVDD18_IO
DVDD18_DIG
AVDD22_BUCK
AVDD22_BUCK
VBAT_VSYS
VBAT_LDOS3
VBAT_LDOS3
VBAT_LDOS2
VBAT_LDOS1
VBAT_VPROC
VBAT_VPROC
VBAT_VPROC
VBAT_VPA
VBAT INPUT
SPI_CLK
SPI_CSN
SPI_MOSI
SPI_MISO
SRCLKEN
FCHR_ENB
AUD_MOSI
AUD_CLK
AUD_MISO
PMU_TESTMODE
PWRKEY
SYSRSTB
RESETB
FSOURCE
INT
EXT_PMIC_EN
CONTROL SIGNAL
CHRLDO
BATSNS
ISENSE
BATON
VCDT
VDRV
CLK26M
ACCDET
AVDD28_ABB
AVDD28_AUXADC
GND_ABB
AU_VIN2_P
AU_VIN2_N
AU_VIN1_P
AU_VIN1_N
AU_VIN0_P AUDIO
AU_VIN0_N
AU_MICBIAS0
AU_MICBIAS1
GND_SPK
VBAT_SPK
SPK_P
SPK_N
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_ISINK
GND_VSYS
GND_VPA
GND_VPROC
GND_VPROC
GND_VPROC
RTC_32K1V8
RTC_32K2V8
XIN
XOUT
GND_VREF
VREF
VIBR
VGP2
VGP3
VCAM_AF
VEMC_3V3
VMC
VMCH
VUSB
VSIM1
VSIM2
VGP1
VM
VRF18
VIO18
VIO28
VCN18
VCAMD
VCAM_IO
DLDO OUTPUT
RTC
VCN28
VTCXO
VA
VCAMA
VCN33
AVDD33_RTC
ALDO OUTPUT
VSYS
VPA_FB
VPA
VPA
VPROC_FB
GND_VPROC_FB
VPROC
VPROC
VPROC
ISINK0
ISINK1
ISINK2
ISINK3
AU_HPL
AU_HPR
AU_HSP
AU_HSN
BUCK OUTPUT
DRIVER
MT6323/VFBGA145/P0.4/B0.25/5.8X5.8
U301
K1
L1
L/IND/SMD/2520
1
2
F5
F6
F7
F8
F9
G5
G6
K6
K8
B10
G11
E13
E11
F11
F10
D5
C4
A3
A4
N14
P14
32K_IN
32K_OUT
CLK32K_BB
C320
VGP3_PMU
VCAM_AF_PMU
[2]
VIBR_PMU
M7
N8
L14
N7
VM_PMU
VRF18_PMU
VEMC_3V3_PMU
VMC_PMU
VMCH_PMU
VUSB_PMU
VSIM1_PMU
VSIM2_PMU
VGP1_PMU
C / 1000 / nF / 0402
VCAMA_PMU
VCN_3V3_PMU
VRTC
VCN_2V8_PMU
VTCXO_PMU
VA_PMU
L303
[1]
C354
C / 100 / nF / 0402
VEMC_3V3_PMU
VSYS_PMU
[1]
VPROC_PMU
VPROC_PMU
[1]
VPROC_FB
GND_VPROC_FB
SSP-T7
VRTC
R333
C319
DCXO_32K
==> for longer RTC time sustain after battery remove,

please refer to RTC design notice
C325
R312
Close to chip
C324
SSP-T7-F
RTC 32K : X301+C324+C319=> mount, R333=> NC

X301
32K-less: X301+C324=>
remove, C319+R333=> 0R
dedicate VSS ball, must return to cap then to main GND:

1. GND_VREF(N14) => C320
VIO18_PMU
VIO28_PMU
Please use inductor recommand by MTK

L/IND/SMD/2520
1
2
P7
L6
P4
N6
P9
N9
L8
VREF
[5]
[5]
[12]
[12]
[12]
[12]
L301
[5]
[5]
[5]
[5]
VCN_1V8_PMU
VCAMD_PMU
VCAMD_IO_PMU
C355
VSYS_SW
VPROC_SW
ISINK0
ISINK1
ISINK2
ISINK3
AU_HPL
AU_HPR
AU_HSP
AU_HSN
AU_SPKP
AU_SPKN
J13
H11
L12
M4
J12
K14
L13
P3
M6
C3
N3
L4
M3
H14
D12
A14
B14
B12
C12
C14
D14
E14
E9
C9
E10
C10
H4
J4
H1
G1
1 C306
1 C309
2
C / 1000 / nF / 0402
1 C307
2
C / 1000 / nF / 0402
1 C308
2
1
2
3
2
1
2
Before you select BJT , please take power dissipation into consideration.
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
GND_LDO
J10
J9
J8
J7
J6
H10
H9
H8
H7
H6
H5
G9
G8
G7
1
2
2
1
1
2
[6]
RTC
Document Number
Date:
PMIC
Size
D
Title
Vibrator
VIB301
Sheet
MT6572 REF PHONE
VIBR_PMU
C311
C / 1000 / nF / 0402
Vibra
1
2
2
+
1
K
0
K9
03
9=
=5
53
33
3R
R,
,K
K0
99e
31c
i
==t
44o
33n
33n
RRg
,,i
s
mme
hhd
oo
kkW
07
14H
3
s
s
ii2
CC3
TT6
NNT
M
yo
yr
r
et
et
t
r
t
ae
at
bbf
e
fR
fi
i
of
19
Rev
V1.0
NC-4MIL_
R634 1
2
2
2
2
2
2
2
2
SH609 1
SH610 1
SH611 1
SH612 1
[2] TX_Q_P
[2] TX_Q_N
[2] TX_I_N
[2] TX_I_P
SH605 1
SH606 1
SH607 1
SH608 1
VIO18
R / 0 / ohm / 0402
R / 0 / ohm / 0402
[2] RX_Q_P
[2] RX_Q_N
[2] RX_I_N
[2] RX_I_P
[2] CLK1_BB
[10] SYSCLK_WCN
CLK3_CMMB
[3] CLK4_AUDIO
[2,3] SRCLKENA
[2] TXBPI
BSI-A_EN
BSI-A_CK
BSI-A_DAT0
BSI-A_DAT1
BSI-A_DAT2
VIO18_PMU
R633 1
DCXO_32K
VRF18_PMU
[3]
[2]
[2]
[2]
[3]
[2]
[2]
TX_BBQP
TX_BBQN
TX_BBIN
TX_BBIP
RX_BBQP
RX_BBQN
RX_BBIN
RX_BBIP
CLK1_BB [2]
SYSCLK_WCN [10]
CLK3_CMMB
CLK4_AUDIO [3]
TXBPI [2]
SRCLKENA
[2,3]
SRCLKENA [2,3]
BSI-A_EN [2]
BSI-A_CK [2]
BSI-A_DAT0 [2]
BSI-A_DAT1 [2]
BSI-A_DAT2 [2]
VRF18-1
VTCXO28-1
DCXO_32K
WG_GGE_PA_VRAMP
BPI_3
[2] WG_GGE_PA_VRAMP
BPI_0
BPI_1
BPI_2
[2] BPI_3
BPI5~9and12~14are3Gmodeonly
[2] BPI_0
(suggestBPI5~9=1.8V)
[2] BPI_1
[2] BPI_2
VTCXO_PMU
[2]
[2]
[2]
[2]
[2]
[3]
BPI0~4and10~11are2G+3Gmodeboth
VBAT
VBAT
R612
C607
R605
R610
R607
R609
R / 0 / ohm / 0402
R / 0 / ohm / 0402
C615
1
2
C625
C667
C600
C668
C665
L622
L618
C685
C / 1000 / nF / 0402
1(VTXCO28)
DCXO + 32K-Less
DCXO_
32K_EN
0(GND)
Logic
DCXO + 32K XO
MODE
1(VTXCO28)
1(VIO18)
XMODE
1(VTXCO28)
1(VIO18)
VXODIG
C666
R654
1
3
VIO18
VTCXO28-1
R648
VIO18
VTCXO28-1
R649
R647
R655 NC
NC
R653
0R
R657 NC
C670
0R
R656
Z600
VXODIG
XMODE
DCXO_32K_EN
connect to main GND
Close to each other

and nearby X600
Route AUXADC_GND with 24mil trace width

under AUXADC_REF/AUXADC_TSX trace
Route AUXADC_TSX with 4mil trace width
Connect TSX/XTAL GND

to GND_AUXADC first
than connect to main GND
[3] GND_AUXADC
[3] AUXADC_TSX
[3] AUXADC_REF
Route AUXADC_REF with 4mil trace width
2G_HB
RF9810
18
19
15
HB OUT 6
HBOUT
LBOUT
LB OUT 9
C614
TXM_ANT1
HOT
GND
[3] CLK4_AUDIO
[10] SYSCLK_WCN
[2] CLK1_BB
[3] DCXO_32K
CLK3_CMMB
[2,3] SRCLKENA
[2,3] SRCLKENA
VTCXO28-1
VRF18-1
L600
C611
L623
L619
GND
2
1
R608
BPI_0
[2]
F2
VRF18-1
HB_RX_N
VXODIG
XMODE
K2
VIO18
CON600
GND
GND
GND
GND
XO3
CLK_SEL
EN_BB
32K_EN
VTCXO28
XTAL2
XTAL1
XO
TDD RX
26M output
RFVCO_MON
VRXHF
HB_RXN
HB_RXP
LB_RXN
LB_RXP
B40_RXN
B40_RXP
GND
GND
GND
GND
GND
GND
ASM_ANT2
L630
C682
Reserved LC filter
C / 1000 / nF / 0402
MT6166
TXO
RX(I/Q)
MT6166/VFBGA104/P0.4/B0.25/4.6X4.6
FDD RX
CLK4_AUDIO
SYSCLK_WCN
CLK1_BB
DCXO_32K
R /10 / ohm / 0402 2
E4
F4
G4
H4
CLK3_CMMB L2
SRCLKENA
SRCLKENA L1
K1
G1
VTCXO28-1
DCXO_32K_EN
H2
J1
F1
HB_RX_N
HB_RX_P
G2
E1
HB_RX_P
XTAL1
D1
XTAL2
C1
B1
A1
F3
G3
H3
J3
C4
D4
U600
LB_RX_P
C624
[2]
[2]
LB_RX_N
BPI_2
BPI_1
LB_RX_P
HB_RX_N
HB_RX_P
LB_RX_N
LB_RX_P
C609
[2]
LB_RX_N
L625
L616
2G_HB
2G_LB
R602
R / 0 / ohm / 0402
TXM_ANT2
BPI_3
C677
C675
2
R614
R606
C612
HOT
L626
L624
L615
X600
connect to main GND
HBIN
GND
GND
LBIN
RX2
RX1
ANT
R615
1
2
1
2
2G_LB
7
VRAMP
1
2
EDGE TXM
RFIN_LB
RFIN_HB
U601
C613
1
2
R611
11
VBATT
R603
C608
10
C606
R613
8
TX_EN
Two Application Circuit Conditions,

1.TSX Circuit : X600=TSX, R653=R656=NC, R654=100K+-1%, R655=R657=0ohm
2.XTAL Circuit :X600=Mobile XTAL, R653=R656=0ohm, R654=R655=R657=NC
C / 100 / nF / 0402
Route AUXADC_REF/AUXADC_TSX as differential trace with well GND shielding

and route AUXADC_GND with 24mil trace width under
AUXADC_TSX/AUXADC_REF trace to provide return current path.
VTCXO28-1
GGE_PA_LB_IN
GGE_PA_HB_IN
C637
1
2
12
GPCTRL1
1
2
WG_GGE_PA_VRAMP
1
2
RF9810 control logic table

Enable VctC VctB VctA
LB_GMSK_TX
H
L
H
L
HB_GMSK_TX
H
L
H
H
LB_EDGE_TX
H
L
L
L
HB_EDGE_TX
H
L
L
H
RX1
L
H
L
L
RX2
L
L
H
L
RX3
L
L
H
H
RX4
L
L
L
H
[2]
1
2
9
GPCTRL0
2
1
2
RX3
17
GPCTRL2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
1
3
5
6
13
14
20
21
22
23
1
RX4
1
16
C610
1
2
10
GND
GND
5
1
2
1
2
1
2
2
1
2
1
2
2
1
C604
GND
GND
GND
GND
GND
GND
J4
C5
D5
E5
F5
D7
5
K4
VBAT
A2
XO4
A3
XO2
K3
E3
D3
C3
J2
C2
GND
GND
GND
GND
GND
XO1
B3
3GB1_RXP
OUT32K
B5
AVDD_VIO18
K6
1
2
B4
3GB5_RXP
3GB1_RXN
XMODE
L5
L4
1
A6
3GB2_RXN
VXODIG
VIO18_VGPIO
VRXLF
RX_BBIP
A5
3GB2_RXP
3GB5_RXN
GGE_PA_HB_IN
B6
3GB8_RXP
GGE_PA_HB_IN
B8
2GHB_TX
3GB8_RXN
RX_IP
L8
L7
K7
VRF18-1
K5
2
A8
RX_BBIP
GGE_PA_LB_IN
VRF18-1
BSI
GND
GND
GND
GND
BSI_DATA1
BSI_DATA2
TST1
TST2
RCAL
TXBPI
VTXLF
TXVCO_MON
3GTX_QN
3GTX_QP
3GTX_IN
3GTX_IP
V28
TMEAS
DETGND
GND
GND
GND
GND
GND
GND
C684
TX_BBQN
F11
TXBPI
RCAL
J10
BSI-A_EN
VRF18-1
BSI-A_CK
BSI-A_EN
BSI-A_DAT0
[2]
[2]
[2]
BSI-A_DAT1
H8
B7
J6
D8
E8
BSI-A_DAT2
G8
L10
K11
H10
J11
BSI-A_CK
BSI-A_DAT0
TX_BBQP
F10
VRF18-1
TX_BBIN
L11
TX_BBIP
G11
TMEAS
2
C669
C623
R / 0 / ohm / 0402
L605
G10
E10
C11
D10
D9
E9
F9
G9
H9
J9
C618
[2]
C676
TXBPI
BSI-A_DAT1
BSI-A_DAT2
[2]
[2]
VTCXO28-1
TX_BBQN
TX_BBQP
TX_BBIN
TX_BBIP
VRF18-1
ANT604
ANT603
ANT602
Antenna matching, depends on antenna design
TX(I/Q)
Test pin
BSI_EN
A9
RX_BBIN
D11
GGE_PA_LB_IN
A11
H6
G6
A10
3GL5_TX
RX_IN
K8
RX_BBIN
2GLB_TX
B11
VTXHF
BSI_CLK
3GH1_TX
RX_QP
K10
RX_BBQP
B10
C10
DET
BSI_DATA0
F8
3GH2_TX
RX_QN
K9
RX_BBQN
RX_BBQP
RX_BBQN
C7
J7
C8
J8
C9
GND
GND
GND
GND
E7
J5
R600
C674
2
VRF18-1
GND
GND
GND
GND
GND
GND
GND
GND
GND
C6
D6
E6
F6
1
2
VTCXO28-1
1
2
Sheet
MT6572 REF PHONE
Document Number
Date:
RF-2G
Size
D
Title
R610 close to 3G PA
R645
NCP15WF104F03RC
R639
of
19
Rev
V1.0
NC-4MIL_
TCXO/SMD/2.5X2.0/IT2205BE
FM
50 Ohm
[5] FM_ANT
[5] FM_RX_N_6572
1
3
2
50 Ohm
1
FM_LANT_P

better GPS performance is needed on
your system, please refer to GPS
L1011
L1012
FM_RX_N_6572

better WiFi TX performance is needed on
your system, please refer to WiFi
NC
CON1001
WIFI/BT/GPS Single ANT Ref.
R / 0 / ohm / 0402
L1004
50 Ohm
R1006
FEED
C1042
FEED
ANT1003
ANT1004
50 Ohm
GPS_RF
31
AVDD18_GPS
41
40
39
38
37
36
35
34
33
50 Ohm 32
50 Ohm
50 Ohm
VCN_2V8_PMU
AVDD33_WB
WBG_ANT
SYSCLK_WCN
1
C1022
C / 1000 / nF / 0402
WB_CTRL5
WB_CTRL4
DVSS
WB_SEN
WB_SDATA
WB_SCLK
FM_CLK
FM_DATA
WB_RSTB
AVDD18_GPS
GPS_RFIN
FM_LANT_P
FM_LANT_N
AVDD28_FM
NC
NC
AVDD33_WBT
GPS_DPX_RFOUT
WB_GPS_RF_IN
U1000
[6]
2
1
W_LNA_EXT
NC
VCN_2V8_PMU
AVDD28_FSOURCE
1
AVDD18_WBT
VCC
HRST_B
2
MT6627-NS/MQFN40/SMD/P0.4/5X5
WB_CTRL5
GND
FM_DBG
3
26
OUT
WB_CTRL4
F2W_DATA
25
WB_CTRL3
U1006
F2W_CLK
5
CONN_XO_IN
WB_CTRL2
30
SCLK
29 AVDD18_WB
WB_CTRL1
SDATA
7
R1013
27
28
23
WB_CTRL0
SEN
C1012
A19
B19
B18
A18
A21
A22
B20
B21
F18
WB_TXIN
WB_TXIP
WB_TXQN
WB_TXQP
WB_RXIN
WB_RXIP
WB_RXQN
WB_RXQP
AVDD18_WBG
C1011
11 GPS_RX_QN
12 GPS_RX_QP
13 GPS_RX_IN
14 GPS_RX_IP
15 WB_TXQN
16 WB_TXQP
17 WB_TXIN
18 WB_TXIP
19 WB_RXQN
CONN_XO_IN
MT6627 SMD QFN40
GPS_RX_QN
GPS_RX_QP
GPS_RX_IN
GPS_RX_IP
WB_TX_QN
WB_TX_QP
WB_TX_IN
WB_TX_IP
WB_RX_QN
WB_RX_QP
WB_RXIN
WB_RXIP
WB_CTRL0
WB_CTRL1
WB_CTRL2
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
GND_WBG
AVDD18_WB
AVDD18_WBG
AVDD18_GPS
C1004
AVDD33_WB
C1008
SH1003
SH1002
SH1001
C1009
C1006
C / 1000 / nF / 0402
C1010
Date:
Sheet
of
VCN_3V3_PMU
VCN_2V8_PMU
MT6572 REF PHONE
Document Number
19
VCN_1V8_PMU
VCN_1V8_PMU
VCN_1V8_PMU
Star Conn
for WB/GPS/WBG 1V8
Wireless Connectivity
SH1004
C1003
C1002
Size
D
Title
C1001
CONN_XO_IN
FM_DATA
FM_CLK
WB_RSTB
WB_SEN
WB_SDATA
WB_SCLK
WB_CTRL0
WB_CTRL1
WB_CTRL2
WB_CTRL3
WB_CTRL4
WB_CTRL5
refer to FM desense performance

enhance proposal
C1007
Close to MT6627
VCN_2V8_PMU
C1005
F14
E13
F12
C14
E15
E14
G12
E20
F20
D22
E22
C22
C23
A14
D18
B22
C16
C17
C18
C19
C20
C15
D16
D17
D19
D20
C21
Close to MT6572
CONN_XO_IN
CONN_F2W_DAT
CONN_F2W_CLK
CONN_RSTB
CONN_SEN
CONN_SDATA
CONN_SCLK
CONN_WB_CTRL0
CONN_WB_CTRL1
CONN_WB_CTRL2
CONN_WB_CTRL3
CONN_WB_CTRL4
CONN_WB_CTRL5
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
AVDD18_WBG
WB_RXQN
WB_RXQP
WB_RXIN
WB_RXIP
WB_TXQN
WB_TXQP
WB_TXIN
WB_TXIP
GPS_RXQN
GPS_RXQP
GPS_RXIN
GPS_RXIP
U101-C
20 WB_RXQP
B14
B15
GPS_RX_QN
GPS_RX_QP
WB_CTRL3
B16
A16
GPS_RX_IN
GPS_RX_IP
1
2
1
2
24
22
WB_RX_IP
C / 1000 / nF / 0402
21
WB_RX_IN
XO_IN
10
1
2
1
2
1
2
1
2
CEXT
1
2
1
2
1
2
1
2
9
1
2
1
2
1
2
Rev
V1.0
BA[1:0] =
EA[15:14]
(LPDDR1)
EBA1
EBA0
ED31
ED30
ED29
ED28
ED27
ED26
ED25
ED24
ED23
ED22
ED21
ED20
ED19
ED18
ED17
ED16
ED15
ED14
ED13
ED12
ED11
ED10
ED9
ED8
ED7
ED6
ED5
ED4
ED3
ED2
ED1
ED0
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
EA1
EA0
DRAM
Address
EDQS0
EDQS1
EDQS2
EDQS3
EDQM0
EDQM1
EDQM2
EDQM3
EWR_B
ERAS_B
ECAS_B
ECKE
ECS0_B
ECS1_B
NAND I/F
NCEB
NWRB
NREB
NCLE
NALE
NRNB
GPIO47
ND0
ND1
ND2
ND3
ND4
ND5
ND6
ND7
ND8
ND9
ND10
ND11
ND12
ND13
ND14
ND15
EDCLK1_B
EDCLK1
EDCLK0_B
EDCLK0
EDQS0_B
EDQS1_B
EDQS2_B
EDQS3_B
DRAM
Ctrl
MT6572/TFBGA428/P0.4/B0.25/10.6X10.6
ERESET
EA18
EA17
EA16
EA15
EA14
EA13
EA12
EA11
EA10
EA9
EA8
EA7
EA6
EA5
EA4
EA3
EA2
EA1
EA0
VREF1
VREF0
ED31
ED30
ED29
ED28
ED27
ED26
ED25
ED24
ED23
ED22
ED21
ED20
ED19
ED18
ED17
ED16
ED15
ED14
ED13
ED12
ED11
ED10
ED9
ED8
ED7
ED6
ED5
ED4
ED3
ED2
ED1
ED0
DRAM
Data
W5
Y5
AB2
AC3
AD3
AE3
AB3
AA2
Y2
W1
W3
AB1
AD2
W4
AE1
W2
Y3
AC2
AC1
Y4
V5
AE2
V1
AA19
Y19
Y18
AA18
NCEB
NWRB
NREB
NCLE
NALE
NRNB
EDQS0
EDQS1
EDQS2
EDQS3
AA14
Y13
Y8
AA9
NLD0
NLD1
NLD2
NLD3
NLD4
NLD5
NLD6
NLD7
NLD8
NLD9
NLD10
NLD11
NLD12
NLD13
NLD14
NLD15
EDQM0
EDQM1
EDQM2
EDQM3
AB13
AD12
AD8
AE12
EDCLK_B
EDCLK
EWR_B
ERAS_B
ECAS_B
ECKE
AF21
AD21
AB20
AD24
Y14
AA13
AA8
Y9
ECS0_B
ECS1_B
AF22
AF19
Please make sure the ball map is

match to the MCP type you selected
AC22
AB18
AE18
AE17
AE21
AB19
AE22
AC23
AD22
AD18
AE25
AE23
AF25
AE24
AF24
AE26
AC18
AE19
AE20
AF18
AB17
AC11
AF6
AE6
AF8
AE7
AE8
AC9
AC7
AB9
AF5
AE5
AD5
AC5
AE4
AF3
AF2
AB6
AE11
AD15
AE10
AE9
AF12
AF11
AF9
AC13
AE16
AE13
AE15
AE14
AF15
AF16
AC15
AB16
U101-F
VM_PMU
C401
R / 0 / ohm / 0402
R403
20K
2
1
2
R401
C / 4700 / nF / 0603
VIO18_PMU
C / 4700 / nF / 0603
C / 1000 / nF / 0402
C404
C / 1000 / nF / 0402
C110
C129
C403
C402
ECS1_B
ECKE
VIO_EMI
VIO_EMI
EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
EA10
EA11
EA12
NLD0
NLD1
NLD2
NLD3
NLD4
NLD5
NLD6
NLD7
P10
A10
N1
N2
N3
M5
P7
M6
N6
M8
R1
R2
R9
R10
B5
N5
C5
P6
B1
B2
B10
F3
K4
L1
L2
L3
C2
D2
E1
D3
E2
D4
K3
F2
F1
N10
M9
J9
G10
F9
E10
L10
K10
D9
C10
C1
J1
B9
H9
P9
M2
H10
H1
M1
B8
D1
P8
C9
D10
E9
F10
G9
J10
K9
L9
M10
N9
NC
DNU
NLD0
NLD1
NLD2
NLD3
NLD4
NLD5
NLD6
NLD7
DNU
DNU
DNU
DNU
VCCN
VCCN
VSSN
VSSN
NC
NC CKE1
NC
NC CS1#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSD
VSSD
VSSD
VSSD
VSSD
VSSD
VDDD
VDDD
VDDD
VDDD
VDDD
VDDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
U401
NC
DNU
CLE
ALE
/CE
/RE
/WE
/WP
R/#B
NLD8
NLD9
NLD10
NLD11
NLD12
NLD13
NLD14
NLD15
DNU
NC
NC
A13 NC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
CLK
CLK#
CKE0
CS0#
RAS#
CAS#
WE#
BA0
BA1
DM0
DM1
DM2
DM3
DQS0
DQS1
DQS2
DQS3
M4
A9
B4
C4
B6
B3
B7
C3
C6
P2
P3
N4
P4
P5
N7
M7
N8
A2
P1
G1
M3
L4
L5
L6
L7
K8
L8
K7
K5
K6
G7
J6
J5
H6
H5
J4
G3
G4
F4
E4
F5
H3
H4
E6
F7
F6
D5
E8
D6
D8
D7
C8
C7
G8
H8
E3
J2
G2
H2
K1
J3
K2
J8
G6
F8
E7
J7
G5
H7
E5
Memory MCP
HW trapping PIN
20K: VM=1.8V
NC : VM=1.2V
Put C402 & C403 between BB & memory.
[2,3] PMIC_SPI_CS
1
2
EA13
NLD8
NLD9
NLD10
NLD11
NLD12
NLD13
NLD14
NLD15
ED0
ED1
ED2
ED3
ED4
ED5
ED6
ED7
ED8
ED9
ED10
ED11
ED12
ED13
ED14
ED15
ED16
ED17
ED18
ED19
ED20
ED21
ED22
ED23
ED24
ED25
ED26
ED27
ED28
ED29
ED30
ED31
NCLE
NALE
NCEB
NREB
NWRB
WATCHDOG
EA13
EDCLK
EDCLK_B
ECKE
ECS0_B
ERAS_B
ECAS_B
EWR_B
EBA0
EBA1
EDQM0
EDQM1
EDQM2
EDQM3
EDQS0
EDQS1
EDQS2
EDQS3
Document Number
Date:
Sheet
MT6572 REF PHONE
NRNB
Memory
R402
47K
Size
D
Title
VIO18_PMU
BA[1:0] = EA[15:14] (LPDDR1)
1
2
of
19
Rev
V1.0
NC-4MIL_
close to connector
C504
C505
C506
C503
C502
C501
C512
if you use digital MIC,

please change cap
(C511,C512) to 1.0uF
[3] AU_VIN0_N
[3] AU_VIN0_P
C511
R516
Close to
MIC
together then single via to main GND
R517
Close to
BB
C513
C / 4700 / nF / 0603
R515
R514
MICBIAS0
Handset Microphone 1
[3] AU_HSN
[3] AU_HSP
close to IC
Receiver

[3] AU_SPKN
close to
connector
C508
1
2
1
2
Microphone
MIC1
RECEIVER
REC501
SPK501
Analog MIC
2
1
BEAD504
C520
C519
2
2
1
1
1
[3] ACCDET
[3] AU_VIN1_P
[3] AU_VIN1_N
C524
C523
Close to BB
C525
R513
C527
C526
AU_VIN1_N1
Close to MIC
Earphone MICPHONE
Based on your system level design , if better ESD

performance is needed on your system, please
refer to ESD performance enhance proposal
[3] AU_HPR
[3] AU_HPL
BEAD503
C530
NC
R512
R511
MICBIAS1
R508
R507
Reserve bead+C footprint for FM

performance tuning
Earphone Audio
C521
HP_MIC
[2] EINT_HP
VIO28_PMU
HP_MIC
together then single

via to main GND
Close to EarJack
R505
R506
BEAD505
BEAD502
BEAD501
same power domain
GND of C(4.7uF) and headset

should tie together and single
via to
GND plane
GND_SIGNAL
C522
close to connector
HP_MP3L
C / 4700 / nF / 0603
C531
HP_MP3R
C529
NC
close to IC
2
1
2
1
[3] AU_SPKP
1
2
close to IC
1
1
2
1
2
Speaker
C510
1
2
1
2
1
1
2 R509
2 R510
C509
2
1
1
2
1
2
2
1
L502
EAR_DET
FM_ANT
CON501
FM_RX_N_6572
5
3
1
6
2
4
Date:
Sheet
MT6572 REF PHONE
Document Number
Audio
[10]
[10]
Single via to GND plane
SH503
VR501
VR0402
VR0402
Size
D
Title
1
2
of
19
Rev
V1.0

[3] ISINK3
[3] ISINK2
[3] ISINK1
[3] ISINK0
[2] MIPI_TDP0
[2] MIPI_TDN0
[2] MIPI_TCP
[2] MIPI_TCN
[2] MIPI_TDP1
[2] MIPI_TDN1
0R YAGEO PN: YC102-FR-070R

[2] GPIO_LRSTB
[2] LPTE
C1203
C / 1000 / nF / 0402
cap for iSINK BL flicking improve,

close to LCM connector
2
1
100-ohm
100-ohm
ISINK2
ISINK2
ISINK3
ISINK3

better LCD uniformity is needed on
ISINK0
your system , please refer to BLISINK0
ISINK1
uniformity with iSINK improve proposal
ISINK1
VIO28_PMU
VIO18_PMU
VBAT
ISINK3
ISINK3
ISINK2
ISINK2
ISINK1
ISINK1
ISINK0
ISINK0
61
51
52
53
54
55
56
57
58
59
60
50
44
45
46
47
48
49
40
41
42
43
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
16
17
18
19
20
21
10
11
12
13
14
15
7
8
3
4
5
6
1
2
VDD3(NC)
DSI_VSS
DSI_D1P
DSI_D1N
DSI_VSS
DSI_CLKP
DSI_CLKN
DSI_VSS
DSI_D0P
DSI_D0N
DSI_VSS
NC
NC
NC
NC
NC
NC
GND
RDX
WRX
DCX
CSX
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
LEDK7
LEDK6
LEDK5
LEDK4
LEDK3
LEDK2
TE
IM0
IM1
IM2
LANSEL
RESETB
LEDK8
VDD2_(AVDD)
VDD1_(IOVDD)
YU
XR
YD
XL
LEDK1
LEDA
CON1201
LCM
VIO28_PMU
C1205
SENS0
SENS1
SENS2
SENS3
SENS4
SENS5
SENS6
SENS7
SENS8
SENS9
GT_SENS0
GT_SENS1
GT_SENS2
GT_SENS3
GT_SENS4
GT_SENS5
GT_SENS6
GT_SENS7
GT_SENS8
GT_SENS9
GT_DRV9
GT_DRV10
GT_DRV11
GT_DRV12
1
2
3
4
5
6
7
8
9
10
U1201
C1204
C / 1000 / nF / 0402
GT_SENS0
GT_SENS1
GT_SENS2
GT_SENS3
GT_SENS4
GT_SENS5
GT_SENS6
GT_SENS7
GT_SENS8
GT_SENS9
CTP
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
2
1
AVDD18_CTP
DVDD12_CTP
2
1
41
EP
GT_DRV0
GT_DRV1
GT_DRV2
GT_DRV3
GT_DRV4
GT_DRV5
GT_DRV6
GT_DRV7
GT_DRV8
40
39
38
37
36
35
34
33
32
31
AGND
DRV0
DRV1
DRV2
DRV3
DRV4
DRV5
DRV6
DRV7
DRV8
AVDD28
AVDD18
DVDD12
DGND
INT
SENSOR_OPT1
SENSOR_OPT2
I2C_SDA
I2C_SCL
DVDDIO
C1206
CON1202
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
11
12
13
14
15
16
17
18
19
20
44
43
42
41
30
29
28
27
26
25
24
23
22
21
C1207
C / 1000 / nF / 0402
Date:
EINT_CTP
[2]
SCL_1 [2,21]
SDA_1 [2,21]
GPIO_CTP_RSTB
[2]
Sheet
MT6572 REF PHONE
Document Number
LCD, Touch
GT_DRV9
GT_DRV10
GT_DRV11
GT_DRV12
GT_DRV13
GT_DRV14
GT_DRV15
GT_DRV16
Size
D
Title
GT_DRV8
GT_DRV7
GT_DRV6
GT_DRV5
GT_DRV4
GT_DRV3
GT_DRV2
GT_DRV1
GT_DRV0
GT_DRV16
GT_DRV15
GT_DRV14
GT_DRV13
DVDDIO_CTP
DRV9
DRV10
DRV11
DRV12
DRV13
DRV14
DRV15
DRV16
NC
RSTB
of
19
Rev
V1.0
PWDN
HREF
VSYNC
RESET
DVDD
DOVDD
AVDD
DGND
PCLK
DGND
XCLK
AGND
SIO-D
SIO-C
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
CON1302
Sub CAM
[2] GPIO_CMPDN
[2] SDA_0
[2] SCL_0
[2] GPIO_CMRST
1
3
5
7
9
11
13
15
17
19
21
23
24
22
20
18
16
14
12
10
8
6
4
2
Main CAM
CMDAT7
CMDAT6
CMDAT5
CMDAT4
CMDAT3
CMDAT2
CMDAT1
CMDAT0
AGND
STROBE
SIOD
SIOC
RESETB
PCLK
VSYNC
HREF
PWDN
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
DGND
CON1301
CMMCLK
CMPCLK
CMHSYNC
CMVSYNC
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
SDA_0 [2]
SCL_0 [2]
GPIO_CMRST2
GPIO_CMPDN2
AF_AGND
AF_VCC
PD
AVDD
INTD
INTC
DGND
MDP1
MDN1
DGND
MCP
MCN
DGND
MDP0
MDN0
DGND
XCLK
DVDD
DOVDD
DGND
[2]
[2]
[2]
[2]
[2]
C1310
C / 1000 / nF / 0402
1v8
1v2
VCAMA_PMU
VCAM_AF_PMU
VCAMD_PMU
VCAMD_IO_PMU
VCAMA_PMU
CMDAT0
CMDAT1
CMDAT2
CMDAT3
CMDAT4
CMDAT5
CMDAT6
CMDAT7
VCAMD_PMU
MIPI_RDP0
MIPI_RDN0
MIPI_RCP
MIPI_RCN
[2]
[2]
[2]
[2]

100-ohm
system , please
refer to desense
MIPI_RDP1 [2]
MIPI_RDN1 [2]
CMDAT0
CMDAT1
CMDAT2
CMDAT3
CMDAT4
CMDAT5
CMDAT6
CMDAT7
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
CMHSYNC [2]
CMVSYNC [2]
CMPCLK [2]
only 150mA from VCAMD

please check your CAM module DVDD current
external LDO is required for DVDD current > 150mA

VCAMD_IO_PMU
Reserve cap footprint for better

camera performance
please refer camera power
100-ohm
noise improve proposal
2v8
2V8

CMHSYNC
CMVSYNC
CMPCLK
CMMCLK
[2] CMMCLK
C1303
C / 1000 / nF / 0402
CMMCLK
SDA_0
SCL_0
C1302
C1301
C / 1000 / nF / 0402
1
2
Sheet
10
MT6572 REF PHONE

Date:
Camera
Document Number
Size
D
Title
of
19
Rev
V1.0

[2] USB_DP
[2] USB_DM
USB HS IF
VBUS

better ESD performance is needed on
your system, please refer to ESD
VBUS
D-
D+
ID
GND
CON1401
7
GND0
GND3
8
GND1
GND2
9
Date:
Size
D
Title
USB
Sheet
1
11
MT6572 REF PHONE

Document Number
of
19
Rev
V1.0
[2] MC1_INS
[2] MC1DAT0
[2] MC1DAT1
[2] MC1CK

better MSDC signal quality is needed on
[2] MC1DAT2
your system, please refer to SD card D
[2] MC1DAT3
[2] MC1CMD
Micro SD CARD
C1801
VMCH_PMU
11
12
13
14
10
3
5
4
7
8
1
2
SHIELD
SHIELD
SHIELD
SHIELD
CD1
CD2
VSS
CMD
CLK
VDD
DAT0
DAT1
DAT2
DAT3
CON1801
Shielding connect to ground
Date:
Size
D
Title
Thursday, December 27, 2012
Sheet
1
12
MT6572 REF PHONE
Memory CARD
Document Number
of
19
Rev
V1.0
VSIM2_PMU
VSIM1_PMU
[3] SRST2
[3] SCLK2
[3] SRST
[3] SCLK
C1902
C / 1000 / nF / 0402
C1901
C / 1000 / nF / 0402
C1
C2
C3
C4
CON1901
SIM1
VCC
RST
CLK SIM2
VCC
RST
CLK
DP
GND
VPP
I/O
GND
VPP
I/O
DM
C5
C6
C7
C8
SIM2
SIM1
Based on your system level design , if better ESD performance is needed

on your system, please refer to ESD performance enhance proposal
11
10
9
G
G
G
G
G
12
13
SIO2
SIO
[3]
[3]
Sheet
13
MT6572 REF PHONE

Date:
SIM
Document Number
Size
D
Title
of
19
Rev
V1.0
[2] KCOL0
[2] KROW0
[3] PWRKEY
R2003
R2002
DO NOT put pull-up

resistor on PWRKEY
2
4
1
3
SW2001
2
4
1
3
SW2003
1
3
SW2002
R2005
R2004
[2]
KROW1
KCOL0
Based on your system level design , if better ESD

performance is needed on your system, please
refer to ESD performance enhance proposal
2
4
[2]
Volume Down
Volume Up
Power Key
Date:
Size
D
Title
KP
Sheet
14
MT6572 REF PHONE

Document Number
of
19
Rev
V1.0
C2116
VIO18_PMU
10
11
RES
VDD2
VDDIO2
VDDIO
VDD
U2106
GND2
INT
SCL
SDA
ADD
[2]
[2,12]
[2,12]
EINT_ACC
SCL_1
12
SDA_1
G Sensor I2C address

0000 111X
X : pin ADDR
GND
GNDIO
C / 1000 / nF / 0402
CM3652
D2110
C2103
VIO28_PMU
R2126
LED
GND
U2103
SCL
SDA
INT
VDD
6
5
4
ALS I2C address:

PS I2C address :
ALS & PS Sensor
1
2
2
1
1
2
G-Sensor
1
2
C2104
[2,12]
SCL_1
SDA_1 [2,12]
EINT_ALPXS [2]
0X90 to 0X92
0XF0 to 0XF2
Date:
Size
D
Title
Sheet
1
15
MT6572 REF PHONE
MEMS Sensors
Document Number
of
19
Rev
V1.0
NC-4MIL_
[2]
[2]
[2]
[2]
[2]
EINT_GY
[2]
EINT_MAG [2]
GPIO_FLASH_SEL
GPIO_FLASH_EN
VGP3_PMIC
VGP1_PMIC
EINT_CMMB
GPIO_TV_RST
SPI_MISO
SPI_MOSI
SPI_SCK
SPI_CSB
[2]
[2]
[2]
Magnetic, Gyro sensor
Flash LED driver
CMMB
Title
Others
MT6572 REF PHONE
of
19
Rev
V1.0
Document Number
Size
D
Date:
Sheet
16
SH8006
SH8005
SH8008
SH8007
SH8012
2
2
2
2
1
1
1
1
SH8011
SH8010
SH8009
SH8001
SH8002
SH8003
SH8004
[2] EINT_GY
[2] EINT_MAG
[2] GPIO_FLASH_SEL
[2] GPIO_FLASH_EN
VGP3_PMU
VGP1_PMU
[2] EINT_CMMB
[2] GPIO_TV_RST
[2] SPI_MISO
[2] SPI_MOSI
[2] SPI_SCK
[2] SPI_CSB
SENSOR_FLASH_SEL
H: Flash mode
L: Torch mode
VIH = 1.3V
GPIO_FLASH_EN
GPIO_FLASH_SEL
C1325
C / 4700 / nF / 0603
VBAT
C1329
C / 1000 / nF / 0402
1
2
Camera Flash
EN
FLASH
C2
C1
VIN
U1304
GND
11
RSET
FB
SGND
PGND
VOUT
10
1
2
1
2
Rset
R1315
C1326
1 A
Torch : <150mA
Flash : <1000mA
Vfb(Torch) = 47mV
Vfb(Flash) = 1.26/Rset x10.2K
I_out = Vfb / Rsen
Yageo : RL0805FR-7W0R4L
Rsen
R0805
R1317
K 2
FLASH_LED/LUW_F8DN
LED1301
1
2
Date:
Size
D
Title
Sheet
17
MT6572 REF PHONE
LED flash
Document Number
of
19
Rev
V1.0
C2118
VIO28_PMU
C2117
VIO18_PMU
M-Sensor
C1
D2
D1
B3
C2
C4
B1
VSS
CAD1
CAD0
RSV
TST1
VID
VDD
U2105
DRDY
CSB
SO
SDA/SI
SCL/SK
TRG
SDA_1
A4
A1
A2
B4
SCL_1
A3
C3
M Sensor I2C address

CAD1 / CAD0 / Add
0 / 0 / 0x0C
0 / 1 / 0x0D
1 / 0 / 0x0E
D4
1RSTN
/ 1 / 0x0F
EINT_MAG
VIO18_PMU
SCL_1
SDA_1
C2107
1
2
3
4
5
6
CLKIN
NC
NC
NC
NC
IME_DA
U2102
GND
NC
NC
NC
NC
VDD
C2110
C2108
18
17
16
15
14
13
50V
C2109
EINT_GY
VIO28_PMU
I2C Address: 0x68 (Write:0xD0, Read:0xD1)
Gyro Sensor
1
2
2
1
25
24
23
22
21
20
19
GND
SDA
SCL
CLKOUT
RESV
CPOUT
RESV
IME_CL
VLOGIC
AD0
REGOUT
FSYNC
INT
7
8
9
10
11
12
1
2
1
2
Date:
Size
D
Title
Monday, December 24, 2012
Sheet
18
MT6572 REF PHONE
eCompass, Gyro
Document Number
of
19
Rev
V1.0
NC-4MIL_
SH1602
Close to Antenna
CMMB_ANT
ANT1601
SPI_SCK
SPI_MISO
SPI_MOSI
SPI_CSB
VDD_1V2_CMMB
C1602
C / 1000 / nF / 0402
GPIO_TV_RST
EINT_CMMB
VGP3_PMIC
C1601
C / 1000 / nF / 0402
FB1601
C1603 C1604
The circuit
is used for
antenna
matching
L1605
VDDRF
C1605 C1606
C1615
L16071
SH1601
L1606
C1614
L1609
C1613
close to the chip
VDDRF
VDDIO
TP1601
VDD_1V2_CMMB
L1601
RFGND
UHFIN
NC1
VDD12
GPIO15
GPIO7/UART_TXD
GND
VDDIO
GPIO_TV_RST
17
18
19
20
21
22
23
24
U1601
VDDRF
L1602
C1612
VDD_1V2_CMMB
R1606
8
7
6
5
4
3
2
1
R1604
VDDIO
MMIS_D3
MMIS_VLD
MMIS_CLK
MMIS_DO
VDDIO
GND
VDD12
GPIO14
VDD_1V2_CMMB
EINT_CMMB
SPI_CSB
SPI_MOSI
SPI_SCK
SPI_MISO
VDDIO
C1609
TP1602
Note:
Leave these NC pins floating, do not
connect them to GND or Power
IF258
C1611
1
2
VDDIO
1
2
1
VGP1_PMIC
1
2
4
X2
GND2
GND1
X1
Y1601
1
2
1
2
33
GND
2
16
15
14
13
12
11
10
9
LNALOAD
MIXIN
VDDRF
REGCAP
VDDBB
VDD12
XTALP
XTALN
25
26
27
28
29
30
31
32
NC2
NC3
GPIO1
RSTN
MGND
MMIS_D2
MMIS_D1
VDDIO
1
2
1
2
C1610
C1607
C1608
1
1
2
R1603
CLK3_CMMB
Sheet
19
MT6572 REF PHONE

Monday, December 24, 2012
Date:
CMMB
Document Number
Size
D
Title
26MHz co-clock
of
19
Rev
V1.0

MT6572

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MT6572

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Formatos disponibles

Free Datasheet http://www.nDatasheet.

Friday, December 28, 2012

MT6572 REF PHONE

MT6572 Block diagram

Free Datasheet http://www.nDatasheet.com

dedicate VSS ball, must return to cap then to main GND:

1.8V IO for DDR1

Close to BB IC, recommand < 150mil

4mil - defferential - GND shielding

MT6572 REF PHONE

Vproc remote sense :

Based on your system level

If double-sided SMT, put C405 & C406 below BB.

Free Datasheet http://www.nDatasheet.com

100-ohm differential[13] MIPI_RDP1

Based on your system level design , if better

Power by CTP, MEMS sensor

Wednesday, January 02, 2013

MT6572 REF PHONE

MT6572 support JTAG from below :

reserve for JTAG debug

Free Datasheet http://www.nDatasheet.com

Between IC and IO port

Refer to MT6323 design

R334,R335 must to be close to

VCDT rating: 1.268V

Add Zenar Diode

Based on your system level design , if

1. Close to Battery Connector.

4mil (VPA no use)

Refer to MT6323 design notice

Based on your system level design , if

Refer to GPS co-clock layout rule

refer to system analog LDO

Connect TSX/XTAL GND

C322 must to be close

==> for longer RTC time sustain after battery remove,

RTC 32K : X301+C324+C319=> mount, R333=> NC

dedicate VSS ball, must return to cap then to main GND:

Please use inductor recommand by MTK

Friday, December 28, 2012

MT6572 REF PHONE

connect to main GND

Close to each other

Route AUXADC_GND with 24mil trace width

Route AUXADC_TSX with 4mil trace width

Connect TSX/XTAL GND

Route AUXADC_REF with 4mil trace width

R /10 / ohm / 0402 2

connect to main GND

Two Application Circuit Conditions,

Route AUXADC_REF/AUXADC_TSX as differential trace with well GND shielding

RF9810 control logic table

Antenna matching, depends on antenna design

Free Datasheet http://www.nDatasheet.com

Wednesday, January 02, 2013

MT6572 REF PHONE

Free Datasheet http://www.nDatasheet.com

Based on your system level design , if

Based on your system level design , if

WIFI/BT/GPS Single ANT Ref.

MT6627 SMD QFN40

Wednesday, January 02, 2013

MT6572 REF PHONE