717

diseo de C ASE
12 para el extracto de la estabilizacin
del amplificador: Los autores han estado estudiando algunos usos del ducibility
del repro- de conclusiones en campos elctricos. Una de las conclusiones era que
las caractersticas del aparato de medicin, los ajustes del factor de la seal, y
los factores del control de los elementos de circuito afectaron el cociente del
SN. En el estudio,
un amplificador nuevo fue diseado que consideraba los puntos precedentes. El dis
eo
del parmetro fue conducido variando dos combinaciones de los factores del contro
l.
1. El circuito
de la introduccin A diseado para nuestra investigacin se ilustra en
el cuadro 1. ste es un circuito tpico de la amplificacin
del transistor que funcin es expresada por el  M del  de y,
donde est M el voltaje de entrada y la y es el voltaje
de la salida. Seleccionamos ocho factores de la resistencia R,
del condensador C, y del inductor L como factores del control y
los asignamos a un arsenal orthogonal L18. Entre
los factores del control demostrados en la tabla 1, los factores C, D,
E, y F fueron determinados en la fase de diseo
considerando la relacin tcnica de las caractersticas
del circuito. En cuanto a un factor de la seal del voltaje
de entrada de un circuito de la amplificacin, asignamos
los valores demostrados en la tabla 2 a cada uno de cuatro niveles. En
la adicin, definimos frecuencia de la entrada como factor
tive indica- y asignamos tres niveles. Como tor del facdel ruido, seleccionamos la temperatura ambiental para
el circuito e instalamos dos niveles del sitio y de los peratures altos
del tem-. El anterior es aproximadamente 25 el  C, y
el ltimo es hasta alrededor 80 el  calentado C usando un secador
de pelo.
2. Procedimiento experimental
usando el oscilador de RC representado en el cuadro 2,
agregamos una seal de entrada sinusoidal a un circuito y el measured el voltaje de entrada con un voltmetro como factor
de la seal. Fijando la frecuencia de la seal de entrada como
indicador, procedimos con nuestro experimento
midiendo el voltaje de la salida. Ahora, simplificar nuestra
medida y anlisis, medimos todos los datos en
forma del raz-significar-cuadrado. Cada resistencia demostrada en
el cuadro 2 fue expresada como resistencia interna, una caracterstica
ical del typ- de cada aparato para medir, y
mir como elemento importante en medir
un circuito electrnico.
Para evaluar cmo la diferencia en la medida
condiciona resultados experimentales afectados, concanalizamos el experimento bajo cuatro condiciones ment
de la medida distinta. Demostramos algunos elementos
mirados como influyentes a travs del proceso
tal del experimen-:
1. Cargue la resistencia entre un circuito y un aparato
de la medida. Un diseador elctrico del circuito en
tienta a guardar stant con- de las condiciones
de la medida predetermining la impedancia
de la entrada-salida de un circuito (valores representativos
de las caractersticas del trazado de circuito) en referencia
al aparato de la medida usado. Porque podemos
cambiar la impedancia agregando los resistores,

medimos generalmente un circuito usando 50 75- del  resistores o. En nuestra investigacin confirmamos
los efectos sobre la medida alterando
las caractersticas de los aparatos de la medida con
los resistores agregados.
2. Disposicin de las seales que reflejan la gama capaz
de un circuito. Esta investigacin se ocupa de un circuito
de la amplificacin del transistor. If the input voltage goes
out of the capable range of a circuit, the
output voltage tends to saturate, due to the
718 Case 12
Figure 1
Transistor amplification circuit
characteristics of the circuit. Therefore, we
postulated that selection of signal factors (input voltage) affects SN ratio and sensitivity
and experimented on this presumption.
3. Experiment 1: Amplification Circuit
Design without Considering the Effect
on Measurement
Since in this experiment we focused on a case that
we do not consider characteristic of measuring
equipment, a circuit and measurement apparatus
were connected directly, without resistors. A signal
factor has four levels, as shown in Table 2. As for
other factors, we used levels of Table 2. We discuss
only the data from experiment 1, shown in Table 3,
which is chosen from 18 experiments designed
based on an L18 orthogonal array and explain the
calculation procedure.
S1, S2, and S3 represent the sensitivitys for each
indicative factor (frequency of input signal).
Total variation:
2 2 2 2S  510  610    3930  3810T
 125,390,500 (f  24) (1)
Effective divider:
2 2 2r  5.0  10.0  40.0  2125 (2)
Linear equations:
L  (5.0)(510)  (10.0)(1020)  (20.0)(2010)11
 (40.0)(3690)
 200,550
L  217,25021
L  210,90031
L  200,70012
L  218,60022
L  212,55032 (3)
Variation of proportional term:
2(L  L  L  L  L  L )11 21 31 12 22 32S  6r
 124,626,376.7 (f  1) (4)
Variation of proportional term difference of indicative factor:
2 2(L  L )  (L  L )11 12 21 22
2 (L  L )31 32S   SF 2r
 144,608.6 (f  2) (5)
Design for Amplifier Stabilization 719
Table 1
Control factors
Control Factor
Level
1 2 3

A: resistance R1 0 6.8
B: resistance R2 10 22 33
C: resistance ratio R3 / (R2  R3) 0.1 0.2 0.4
D: resistance R5 Ic  1 mA Ic  3 mA Ic  5 mA
E: inductor L(H) 10 22 56
F: capacitor C 20 0 20
G: resistance R4 470 820 200
H: resistance R6 0 22 47
Table 2
Signal, indicative, and noise factors
Factor
Level
1 2 3 4
Signal factor M: input Voltage (mV) 5.0 10.0 20.0 40.0
Indicative factor F: frequency (kHz) 125.0 250.0 500.0
Noise factor N: temperature Room High
Variation of proportional term due to error factor:
2 2 2 2 2 2L  L  L  L  L  L11 21 31 12 22 32S N(F)B r
 S  S F
 1074.7 ( f  3) (6)
Error variation:
Se  ST  S  SF  SN(F )  618,440 ( f  18)
(7)
Error variance:
SeV   34,357.78 (f  18) (8)e 18
Total error variance:
S  Se N(F )V   29,500.7 (f  21) (9)N 21
SN ratio:
(1/6r)(S  V ) e  10 log  4.80 dB (10)
VN
Sensitivity:
1
S  10 log (S  V )  39.50 dB (11)1 i e2r
2(L  L )11 12S  (12)i 2r
S  40.22 S  39.96 dB (13)2 3
Figure 3 shows the response graphs. Since we
concentrated on reproducibility of the SN ratio in
our study, only S1 is posted in terms of sensitivity.
Looking at the graphs, we find a remarkable Vshape in factors G and H. For G, we can judge that
this is reasonable because this shape is caused by
the order of levels (level 3  level 1  level 2), due
720 Case 12
Figure 2
Measuring apparatus
Table 3
Measured data for experiment 1 (mV)
Noise
Factor
Indicative
Factor M1 M2 M3 M4
Linear
Equation
N1 F1
F2
F3
510
610
580
1020

1180
1140
2010
2300
2250
3690
3910
3790
L11
L21
L31
N2 F1
F2
F3
520
700
590
1010
1170
1160
2000
2310
2280
3700
3930
3810
L12
L22
L32
to technical relationships with other factors. For H,
this is because we did not take into account measurement characteristics at output terminals where
a resistor as factor H was connected. The optimal
configuration of SN ratio is A1B1C1D3E3F2G3H1. On
the other hand, the current configuration is
A1B2C2D2E2F2G2H2. Thus, we can see a considerable
difference between the two.
Table 4 of the confirmatory experiment (shown
in Table 3) reveals that we do not obtain sufficient
reproducibility of gain. This is particularly because
of the V-shape for factor H shown in the response
graph. More specifically, we believed the reason to
be that output measurement varies due to no resistance between a circuit and the measurement
apparatus.
4. Experiment 2: Amplification
Circuit Design Reflecting Effects
on Measurement
In experiment 2, we adopted a common method to
place a 50- impedance between the input and output terminals of a circuit. As Figure 4 illustrates, we
connected a 50- resistor between the input and
output terminals. This is called terminal resistance.
Other conditions were exactly as in experiment 1,
as was the analysis procedure. Table 5 shows the
data of experiment 1 from the L18 orthogonal array.
Due to the effect of the added terminal resistor,
each measured datum was changed. This is because
the circuit load changes, and eventually, measurement apparatus characteristics also vary. Although

Design for Amplifier Stabilization 721

Figure 3
Response graphs of experiment 1
Table 4
Gain in SN ratio of confirmatory experiment for
experiment 1 (dB)
SN Ratio
Configuration
Optimal Current Gain
Estimation 1.87 8.09 9.96
Confirmation 0.26 6.88 6.62
we changed only terminal resistance in this experiment, the factor effect plot in Figure 5 shows characteristics similar to those of experiment 1 in Figure
3. Nevertheless, since the V-shape of factor H is
somewhat less significant, the effect of terminal resistance was not negligible.
The optimal and current configurations obtained from the response graph in Figure 5 were
the same as those of experiment 1. Table 6 shows
the result of a confirmatory experiment. The fact
that we did not obtain sufficient reproducibility is
reasonable since the optimal and current configurations were unchanged. Although this experiment
was performed on the assumption that insufficient
reproducibility is caused by measurement apparatus
characteristics, experiment 2 revealed that there are
factors other than the characteristics affected by
722 Case 12
Figure 4
Terminal resistance-added amplification circuit for experiment 2
load resistance connected to a circuit. In sum, the
reason is that a measured datum (output y) and signal (input M) whose relationship is supposed to
satisfy the proportionality of y  M shows
nonlinearity, as typified by M4 in Figure 6. This is
because we have added input voltage beyond a
range where linearity of amplification capability is
maintained. With this in mind, we conducted another experiment, experiment 3.
5. Experiment 3: Amplification Circuit
Design Reflecting Characteristics
Affecting Signals and Measurement
This experiment evaluated how appropriately a signal factor is set up and how much measurement
apparatus terminal resistance affects SN ratio and
sensitivity, both of which were regarded as technical
problems from experiments 1 and 2. After checking
the amplification capability range of a circuit, we
selected three levels of signal factor from within the
range of voltage (Table 7). For other factors we did
not make any change and followed the setup shown
in Table 2. Similar to experiment 2, we used a 50-
resistor as terminal resistance (Figure 4) because in
experiment 2 we confirmed that we should flatten
the V-shape of factor H.
Table 8 shows the result of experiment 3 based
on an L18 orthogonal array. As discussed with experiment 2, measured data were changed by terminal resistance. Since the number of data are

different from those of experiments 1 and 2, the

number of degrees of freedom was also altered in
experiment 3 but is substantially equivalent to that
of experiment 1. Figure 7 shows the response graph.
Although these demonstrate trends similar to those
of the former experiments, we can see that the Vshape of factor H is larger. This implies that there
exist factors other than the effects of measurement
apparatus characteristics that we have mentioned so
far. The optimal configuration is A1B1C1D3E3F2G1H1.
Gs level is different from that of experiments 1
and 2.
On the other hand, the current configuration is
A1B2C2D2E2F2G2H2, which is the same as that of experiments 1 and 2. Now we considered the reason
that the trends of factors G and H changed. Factor
G is a resistor connected to a resistor of factor H.
Additionally, the resistor of factor H is connected to
the terminal resistor near the output terminal. Then
factor H is affected by three sources: factor G, output terminal resistance, and input voltage. On the
Design for Amplifier Stabilization 723
Table 5
Measured data of experiment 2 (mV)
Noise
Factor
Indicative
Factor M1 M2 M3 M4
Linear
Equation
N1 F1
F2
F3
53
68
74
109
134
142
212
262
280
399
460
468
L11
L21
L31
N2 F1
F2
F3
55
69
75
110
134
144
219
265
282

410
473
485
L12
L22
L32
Figure 5
Response graphs of experiment 2
724 Case 12
Table 6
Results of confirmatory experiment for
experiment 2 (dB)
SN Ratio
Configuration
Optimal Current Gain
Estimation 0.58 7.09 7.67
Confirmation 1.42 6.40 4.98
Table 7
Signal factors reflecting amplification capability
Signal Factor M1 M2 M3
Input Voltage (mV): 5.0 10.0 20.0
Figure 6
Nonlinearity of output characteristic for signal factor level
other hand, the sensitivities of experiment 3 are
closer to those of experiment 2 than to those of
experiment 1. This fact implies that a terminal resistor of 50  as the circuit load affects the results
significantly. As for reproducibility in the confirmatory experiment, we obtained the best results for
all the experiments so far, as shown in Table 9.
These results also prove that the insufficient SN ratios of experiments 1 and 2 were caused by signal
factors.
However, interaction among Factors G and H,
and terminal resistance, considered the other reason, are still unclear because they are quite complicated. Therefore, by keeping all the levels of a signal
factor as shown in Table 7 and changing only terminal resistance, we performed experiment 4.
6. Experiment 4: Amplification Circuit
Design Reflecting Effect of
Terminal Resistance
To check the effect of terminal resistance added to
a circuit by connecting a 50- terminal resistor to
the input terminals of a circuit (Figure 4), we set
the impedance at to 50 . At the same time, by
adding a 50- terminal resistor to the output terminals, we made the impedance equivalent to RL.
For RL we set up four levels, and by using the threelevel signal factor (input voltage) shown in Table 7,
we performed an experiment. More specifically, we
took measurements independently for each terminal resistance by following the same procedure as
that of experiments 1 to 3. Bring at level 4 means
no terminal resistance (Table 10), which was done
by removing RL in Figure 4.
In addition, to evaluate how much change of resistance affects voltage measurement, based on premeasured data, we implemented two types of
analyses, one with an indicative factor of terminal

resistance RL and the other a two-signal analysis with

the signal factor a product of input voltage and terminal resistance.
1. Analysis of terminal resistance as an indicative factor. First, based on premeasured data, we used
terminal resistance RL as an indicative factor.
Figure 8 shows its response graph. Accordingly, we can see the differences for both SN
ratio and sensitivity. Effects due to terminal
resistance are in magnitude only, but each
overall trend was analogous. This is because
terminal resistance was proportional to output. The lone factor whose characteristic was
very distinct for each different resistance was
G. Although we can confirm that factor G was
influenced by terminal resistance RL, we cannot be sure of an interaction between input
Design for Amplifier Stabilization 725
Table 8
Measured data of experiment 3 (mV)
Error Factor
Indicative
Factor M1 M2 M3
Linear
Equation
N1 F1
F2
F3
65
88
98
128
175
196
258
348
380
L11
L21
L31
N2 F1
F2
F3
66
87
97
130
170
190
262
340
372
L12
L22
L32
Figure 7
Response graphs of experiment 3
726 Case 12
Table 9
Result of confirmatory experiment for

experiment 3 (dB)
SN Ratio
Configuration
Optimal Current Gain
Estimation 16.55 4.19 12.36
Confirmation 17.07 7.36 9.71
Table 10
Levels of terminal resistance RL
Level 1 2 3 4
Resistance, RL() 50 200 1000 
Figure 8
Response graphs for each terminal resistance of experiment 4
voltage and factor G/H and the terminal resistance RL, as discussed before.
2. Analysis with terminal resistance as a signal factor.
To clarify the mutual relationship, by combining all resistances of factors H and G and the
terminal resistance into a single resistance, we
focused on this as a signal factor. When we set
the combined resistance of factors H and G
and the terminal resistance as a signal factor,
we regarded this as two-signal factors, defining
input voltage as M and terminal resistance as
M*. Due to the fact that both were proportional to the output voltage, we could combine them into a product of two signals MM*
and express its relationship with y as y 
MM*. Although we calculated actual MM* as
Design for Amplifier Stabilization 727
Figure 9
Schematic of combined resistances
(signal factor of M)  (terminal resistance
M*), we needed to convert RL into M* because we did not have the equation M*  RL
in this case.
Figure 9 depicts a partial equivalent schematic of
the terminal resistance in Figure 4. Setting each resistance at sections where Vall and Vout were added
as R all and R out, respectively, we expressed M* as
shown in Figure 8.
1
R  (14)all 1/R  1/(R  R )4 6 L
RLR  R (15)out all R  R6 L
M*  R (16)out
In sum, MM* is a product of equation (16) and
input voltage M.
After substituting a new signal for a product of
two signals MM*, we sorted them in increasing order (Table 11). Each subscript from M1 to M12 in
the table indicates a product of two level numbers,
an input voltage level (three levels), and a terminal
resistance level (four levels) (obviously, a maximum
subscript is 3  4  12). Although the number of
data was changed due to the increased number of
levels, the basic procedure for analyzing was the
same as that of experiment 1 because the indicative
and noise factors were identical. Thus, we do not
describe it in detail.
Figure 10 shows the response graph for experiment 4. The optimal configuration is A1B3C2D2E2

F1G3H1. We can see that this is entirely different

from those of the former experiments. The current
configuration is A1B2C2D2E2F2G2H2, which is the
same.
Looking at the optimal configuration, we find
that it had a larger number of the same levels as the
current configuration, but not as the previous experiments had. Also, in terms of the SN ratio, there
were peaked and V-shaped characteristics in factors
C, D, F, and G. Factor G had an especially steep Vshape.
Although factor Gs characteristic was not unreasonable because its levels were not placed in regular
order, we should pay attention to the fact that the
V-shape of factor H, which was discussed for experiments 1 to 3, disappeared. However, since the number of peaks and V-shapes increased compared to
the previous experiments, as a whole we believe that
a change in terminal resistance affects the overall
circuit to some extent. On the other hand, for sensitivity, there was no particular difference except
728
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2
4
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7
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4
9
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5
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4
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6
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5
9
9
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7
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6
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3
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3
8
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2
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6
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6
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2
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1
2
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3
8
5
7
0
6
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2
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2
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1
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7
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5
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5
0
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5
5
0
3
2
1
0
3
4
0
0
L 1
2
L 2
2
L 3
2
Design for Amplifier Stabilization 729
Figure 10
Response graph of experiment 4
that some factors had a higher sensitivity value.
Thus, we concluded that a change in terminal resistance does not have a significant impact on
sensitivity.
7. Analysis of Experiment 4 and
Confirmatory Experiment
By checking whether a circuit becomes nonlinear or
saturated, as shown in Figure 6, we investigated the
reason that many peaks and V-shapes appeared in
the factor effect plot. We plotted graphs of y 
MM* using the data regarding all 18 circuits,
shown in Table 11. Then, as illustrated in Figure 11,
we discovered irregularity in the graph of experiment 10 of the L18 orthogonal array. This graph was
not only nonlinear but had a momentary voltage
decrease. If the circuit becomes saturated, the slope
may become less steep but the voltage cannot go
down. This obviously demonstrates that a certain abnormality happened in measuring. Therefore, by altering the input voltage, input frequency, and
terminal resistance in various steps, we found that
without knowing the exact values, this irregularity
occurs when a particular terminal resistance and input frequency are added to a circuit.
730 Case 12
Figure 11
Irregularity unveiled by two-signal factor analysis
Table 12
Result of confirmatory experiment 1 (dB)
SN Ratio
Configuration
Optimal Current Gain
Estimation 34.02 49.01 14.99
Confirmation 39.93 48.94 9.01
Then we conducted two confirmatory experiments to check reproducibility, the first an ex-

periment that we performed using the optimal

configuration of experiment 1 after removing the
data causing this irregularity; the second was an experiment using the optimal configuration selected
according to the response graphs of experiment 4,
shown in Figure 8, for four different terminal resistances. (Note: For four different resistances, each optimal level was also different, but we chose a level
that was selected most frequently as the optimal, to
observe reproducibility.)
Confirmatory Experiment 1: Optimal Configuration
When Irregular Part Was Removed
Since the combination of terminal resistance and a
nominal factor level F3 (500 Hz) causes irregularity,
we removed F3. We do not describe our analysis procedure because only two data combinations of N1F3
and N2F3 were eliminated from the measured data
in Table 11.
As a result of analysis, we selected A1B1C1D3E3
F2G3H1 as the optimal configuration. This was the
same as that of an experiment that does not make
the setup range of four levels of a signal factor
within the circuit capability in experiments 1 and 2.
In short, this result shows that factor G was relatively
easily affected, as discussed in the previous experiments. Using this configuration we conducted
a confirmatory experiment and summarized the
results in Table 12. We obtained the worst reproducibility in terms of gain as well as the optimal
configuration.
Design for Amplifier Stabilization 731
Table 13
Result of confirmatory experiment 2 (dB)
SN Ratio
Configuration
Optimal Current Gain
Estimation 48.05 50.99 2.94
Confirmation 47.47 52.45 4.98
Confirmatory Experiment 2: Optimal Configuration
That Was Selected Most Often
This experiment used a combination of optimal levels that was selected most often according to the
response graph in Figure 8. The optimal configuration was A1B1C1D3E3F2G1H1. Using this configuration, we conducted a confirmatory experiment and
summarized the results in Table 13. We have obtained good reproducibility.
Reference
Naoki Kawada, Yoshisige Kanemoto, Masao Yamamoto,
and Hiroshi Yano, 1996. Design for the stabilization
of an amplifier. Quality Engineering, Vol. 4, No. 3, pp.
6981.
This case study is contributed by Naoki Kawada.