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3.
PROYECTOS EN
WINCUPL
Proyectos en WINCUPL
Name
Name Gates;
Partno
Partno 01;
Revision
Revision 00;
Date
Date 02/07/2012;
Designer
Designer Teth;
Company ITS Zapopan;
Location
Location None;
Assembly
Assembly None;
Device
Device g16v8a;
Pin 1 = a;
Pin 1
Pin 2
Pin 2 = b;
Pin 12
Pin 12 = inva;
Pin 13
Pin 13 = invb;
Pin 14
Pin 14 = and;
Pin 15
Pin 15 = nand;
Pin 16
Pin 16 = or;
Pin 17
Pin 17 = nor;
Pin 18
Pin 18 = xor;
Pin 19
Pin 19 = xnor;
/* Logic:
Logic: examples of simple
simple gates
gates expressed
expressed in CUPL */
Simulación
Tabla de verdad
Name ECULOG1 ;
PartNo 00 ;
Date 02/07/2012 ;
Revision 01 ;
Designer Teth Cortes ;
Company ITS ZAPOPAN ;
Assembly NA ;
Location NA ;
Device g16v8a ;
Ecu1 = (!A&!B&C)#(!A&B&!C)#(A&B&!C)#(A&B&C);
Ecu2 = (!A&!B&C)#(!A&B&C)#(A&!B&C)#(A&B&!C);
Simulación
Tabla de verdad
A B C Ecu1 Ecu2
0 0 0 0 0
0 0 1 1 1
0 1 0 1 0
0 1 1 0 1
1 0 0 0 0
1 0 1 0 1
1 1 0 1 1
1 1 1 1 0
Name Dec2 ;
PartNo 00 ;
Date 03/07/2012 ;
Revision 01 ;
Designer Teth Cortes ;
Company ITS ZAPOPAN ;
Assembly NA ;
Location NA ;
Device g16v8a ;
M0 = !A & !B;
M1 = !A & B;
M2 = A & !B;
M3 = A & B;
Simulación
Tabla de verdad
A B Mo M1 M2 M3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
̅
̅
Proyectos en WINCUPL
Name DECBCD;
PartNo 00;
Date 03/07/2012;
Revision 01;
Designer Teth Cortes;
Company ITS ZAPOPAN;
Assembly NA;
Location NA;
Device g16v8a;
PIN 12 = a;
PIN 13 = b;
PIN 14 = c;
PIN 15 = d;
PIN 16 = e;
PIN 17 = f;
PIN 18 = g;
'h'A=> 'b'0000000;
'h'B=> 'b'0000000;
'h'C=> 'b'0000000;
'h'D=> 'b'0000000;
'h'E=> 'b'0000000;
'h'F=> 'b'0000000;
}
Simulación
Tabla de verdad
A3 A2 A1 A0 a b c d e f g
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 0 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1 1 1 1
1 0 0 1 1 1 1 0 0 1 1
1 0 1 0 0 0 0 0 0 0 0
1 0 1 1 0 0 0 0 0 0 0
1 1 0 0 0 0 0 0 0 0 0
1 1 0 1 0 0 0 0 0 0 0
1 1 1 0 0 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0 0 0
Observe que todas las posibles combinaciones de A0, A1, A2 y A3 están
presentes en la tabla de verdad, sin embargo solo se despliega un valor en el
display de 0 (0000) a 9 (1001), después a partir de 10 (1010) hasta 15 (1111)
las salidas se asignan en cero.
4.9. Multiplexor de 4 a 1
Código
Name MUX4A1 ;
PartNo 00 ;
Date 03/07/2012 ;
Revision 01 ;
Designer Teth Cortes ;
Company ITS ZAPOPAN ;
Assembly NA ;
Location NA ;
Device g16v8a ;
() ()
() ()
Proyectos en WINCUPL
Simulación
Name johnson ;
PartNo 00 ;
Date 05/07/2012 ;
Revision 01
Revision 01 ;
Designer Teth
Designer Teth Cortes ;
Company ITS ZAPOPAN ;
Assembly NA
Assembly NA ;
Location NA
Location NA ;
Device g16v8a ;
Pin 1 = clk;
Pin 2 = clr;
Pin 3 = dir;
Pin 11 = !oe; /* Register output enable
*/
Pin [14..17]
Pin [14..17] = [Q3..0]; /* Counter outputs */
field count = [Q3..0];
field count /* declare counter bit field */
$define S0
$define S0 'b'0000 /* define counter states */
$define S1
$define S1 'b'0001
$define S2
$define S2 'b'0011
$define S3
$define S3 'b'0111
$define S4
$define S4 'b'1111
field mode = [clr,dir];
field mode /* declare mode control field */
anillo_up = mode:0;
anillo_dw = mode:1;
clear = mode:[2..3]; /* define count clear mode */
Proyectos en WINCUPL
Sequenced count
Sequenced count {
present S0
present S0 if anillo_up
if anillo_up next S1;
next S1;
if anillo_dw
if anillo_dw next S4;
next S4;
if clear
if clear next S0;
next S0;
present S1
present S1 if anillo_up
if anillo_up next S2;
next S2;
if anillo_dw
if anillo_dw next S4;
next S4;
if clear
if clear next S0;
next S0;
present S2
present S2 if anillo_up
if anillo_up next S3;
next S3;
if anillo_dw
if anillo_dw next S1;
next S1;
if clear
if clear next S0;
next S0;
present S3
present S3 if anillo_up
if anillo_up next S4;
next S4;
if anillo_dw
if anillo_dw next S2;
next S2;
if clear
if clear next S0;
next S0;
present S4
present S4 if anillo_up
if anillo_up next S1;
next S1;
if anillo_dw
if anillo_dw next S3;
next S3;
if clear
if clear next S0;
next S0;
}
Simulación
Anillo Johnson
CLK Q0 Q1 Q2 Q3 Q0 Q1 Q2 Q3
1 0 0 0 1 0 0 0
0 1 0 0 1 1 0 0
0 0 1 0 1 1 1 0
0 0 0 1 1 1 1 1
1 0 0 0 1 0 0 0
0 1 0 0 1 1 0 0
0 0 1 0 1 1 1 0
0 0 0 1 1 1 1 1
Name Stepper;
Partno 01;
Date 14/04/11;
Revision 01;
Designer ELECTRONICA 2;
Company ITS ZAPOPAN;
Assembly None;
Location None;
Device g16v8a;
if downB next S5;
default next S6;
present S7 if upB next S0;
if downB next S6;
default next S7;
}
Según el valor del campo mode se carga en alto el valor de una de las
variables upA, upB, downA y downB, que posteriormente son evaluadas en
las sentencias if que configuran la transiciones de estados dentro de las dos
instrucciones sequenced asignada cada una para el control de un motor
distinto.
Proyectos en WINCUPL