;

; prepa6_ingresoMultiplicacionDisplays.asm
;
; Created: 15/06/2017 16:44:26
; Author : Mario Ramos
;
;

.def temp = r16

.def numero = r17
.def mc8u = r18 ;multiplicand
.def mp8u = r19 ;multiplier
.def m8uL = r20 ;result Low byte
.def m8uH = r21 ;result High byte
.def drem8u = r22 ;remainder
.def dres8u = r23 ;result
.def dd8u = r23 ;dividend
.def dv8u = r25 ;divisor

.cseg
.org 0x00
;CONFIGURACIN DE PUERTOS
;Configuracion de puertos de entrada A y B
clr temp
out ddra, temp
out ddrb, temp
ser temp
out porta, temp
out portb, temp
;Configuracin de puertos de salida C y D
out ddrc, temp
;En el puerto D el pin 8 es la entrada del control
ldi temp, 0b01111111
out ddrd, temp
ldi temp, 0b10000000
out portd, temp
;Activacin de mcucr
in temp, mcucr
andi temp, 0b11101111
out mcucr, temp
;CONFIGURACION DE STACK
ldi temp, high(RAMEND)
out sph, temp
ldi temp, low(RAMEND)
out spl, temp
;INICIO DEL PROGRAMA
inicio:
in temp, pind
andi temp, 0b10000000
cpi temp, 0b10000000
brcc multiplicacion
division:
ldi temp, 0
out portc, temp
in dd8u, pina
in dv8u, pinb
rcall div8u
mov temp, dres8u
rcall BIN_7_SEG
 mov r3, numero
out portc, r3
mov temp, drem8u
rcall BIN_7_SEG
out portd, numero
rcall delay
rjmp inicio

multiplicacion:
ldi temp, 0b11111111
out portc, temp
in mc8u, pina
in mp8u, pinb
rcall mpy8u

cpi m8uL, 0b00001111

brcs continuar
breq continuar
mov temp, m8uL
andi temp, 0b11110000
swap temp
rcall BIN_7_SEG
mov r3, numero
ldi temp, 0b10000000
or r3, temp
out portc, r3

mov temp, m8uL

andi temp, 0b00001111
rcall BIN_7_SEG
out portd, numero
rcall delay
rjmp inicio

continuar:
ldi temp, 0b11111111
out portc, temp

mov temp, m8uL

rcall BIN_7_SEG
out portd, numero
rcall delay
rjmp inicio

;***************************************************************************
;*
;* "mpy8u" - 8x8 Bit Unsigned Multiplication
;*
;* This subroutine multiplies the two register variables mp8u and mc8u.
;* The result is placed in registers m8uH, m8uL
;*
;* Number of words :34 + return
;* Number of cycles :34 + return
;* Low registers used :None
;* High registers used :3 (mc8u,mp8u/m8uL,m8uH)
;*
;* Note: Result Low byte and the multiplier share the same register.
;* This causes the multiplier to be overwritten by the result.
;*
;***************************************************************************
;Code

mpy8u:
clr m8uH ;clear result High byte
ldi temp,8 ;init loop counter
lsr mp8u ;rotate multiplier

m8u_1:
brcc m8u_2 ;carry set
add m8uH,mc8u ;add multiplicand to result High byte
m8u_2:
ror m8uH ;rotate right result High byte
ror m8uL ;rotate right result L byte and multiplier
ror mp8u
dec temp ;decrement loop counter
brne m8u_1 ;if not done, loop more
ret

;***************************************************************************
;*
;* "div8u" - 8/8 Bit Unsigned Division
;*
;* This subroutine divides the two register variables "dd8u" (dividend) and
;* "dv8u" (divisor). The result is placed in "dres8u" and the remainder in
;* "drem8u".
;*
;* Number of words :66 + return
;* Number of cycles :50/58/66 (Min/Avg/Max) + return
;* Low registers used :1 (drem8u)
;* High registers used :2 (dres8u/dd8u,dv8u)
;*
;***************************************************************************
; Code

div8u:
sub drem8u,drem8u ; clear remainder and carry
ldi temp,9 ; init loop counter
d8u_1:
rol dd8u ; shift left dividend
dec temp ; decrement counter
brne d8u_2 ; if done
ret ; return
d8u_2:
rol drem8u ; shift dividend into remainder
sub drem8u,dv8u ; remainder = remainder - divisor
brcc d8u_3 ; if result negative
add drem8u,dv8u ; restore remainder
clc ; clear carry to be shifted into result
rjmp d8u_1 ; else
d8u_3:
sec ; set carry to be shifted into result
rjmp d8u_1
ret

;*************************************************************************
;Subrutina de decodificacin de binario a 7 segmentos
;
;*************************************************************************
;Codigo

BIN_7_SEG:
cpi temp,0 ;compara el resultado de la operacin con cero
ldi numero, 0b01000000 ;pone en R19 el valor de cero equivalente en 7
segmentos
brne SIG1 ;si la comparacion es diferente salta a la siguiente comparacin
ret;

SIG1:
cpi temp,1 ;esta comparacin se realiza con cada uno de los nmeros
hexadecimales
ldi numero, 0b01111001 ;y su equivalente en 7 segmentos
brne SIG2
ret

SIG2:
cpi temp,2
ldi numero, 0b00100100
brne SIG3
ret;

SIG3:
cpi temp,3
ldi numero, 0b00110000
brne SIG4
ret

SIG4:
cpi temp,4
ldi numero, 0b00011001
brne SIG5
ret

SIG5:
cpi temp,5
ldi numero, 0b00010010
brne SIG6
ret

SIG6:
cpi temp,6
ldi numero, 0b00000010
brne SIG7
ret

SIG7:
cpi temp,7
ldi numero, 0b01111000
brne SIG8
ret

SIG8:
cpi temp, 8
ldi numero, 0b00000000
brne SIG9
ret
SIG9:
cpi temp, 9
ldi numero, 0b00011000
brne SIG10
ret

SIG10:
cpi temp,10
ldi numero, 0b00001000
brne SIG11
ret

SIG11:
cpi temp,11
ldi numero, 0b00000011
brne SIG12;
ret;

SIG12:
cpi temp,12
ldi numero,0b01000110
BRNE SIG13
ret

SIG13:
cpi temp, 13
ldi numero, 0b00100001
brne SIG14
ret

SIG14:
cpi temp,14
ldi numero, 0b00000110
brne SIG15
ret

SIG15:
cpi temp,15
ldi numero, 0b00001110
ret

;*****************************************************************************
;Subrutina de espera
;
;*****************************************************************************
delay:
push r20
push r21
push r22
ldi r20, 100
l1:
ldi r21, 100
l2:
ldi r22, 10
l3:
dec r22
nop
brne l3
dec r21
 brne l2
dec r20
brne l1
pop r22
pop r21
pop r20
ret