THE INVERTERS

Digital Integrated Circuits Inverter Prentice Hall 1995

 DIGITAL GATES
Fundamental Parameters

Functionality
Reliability, Robustness
Area
Performance
Speed (delay)
Power Consumption
Energy

Digital Integrated Circuits Inverter Prentice Hall 1995

 Noise in Digital Integrated Circuits

VDD
v(t)
i(t)

(a) Inductive coupling (b) Capacitive coupling (c) Power and ground
noise

Digital Integrated Circuits Inverter Prentice Hall 1995

 DC Operation:
Voltage Transfer Characteristic

V(y)
V(x) V(y)

V f
OH
V(y)=V(x)

V Switching Threshold
M

VOL

VOL V V(x)
OH

Nominal Voltage Levels

Digital Integrated Circuits Inverter Prentice Hall 1995
Mapping between analog and digital signals

V V(y)
"1" OH
Slope = -1
V V
IH OH

Undefined
Region
Slope = -1
V
IL VOL
"0"
V
OL V V V(x)
IL IH

Digital Integrated Circuits Inverter Prentice Hall 1995

 Definition of Noise Margins

"1"
V
OH
NMH
V
Noise Margin High IH
Undefined
Region
Noise Margin Low
NML V
IL
V
OL
"0"

Gate Output Gate Input

Digital Integrated Circuits Inverter Prentice Hall 1995

 The Regenerative Property

...
v0 v1 v2 v3 v4 v5 v6

(a) A chain of inverters.

v1, v3, ... v1, v3, ...

f(v) finv(v)

finv(v) f(v)

v0, v2, ... v0, v2, ...

(b) Regenerative gate (c) Non-regenerative gate

Digital Integrated Circuits Inverter Prentice Hall 1995

 Fan-in and Fan-out

(a) Fan-out N

M
(b) Fan-in M
N

Digital Integrated Circuits Inverter Prentice Hall 1995

 The Ideal Gate

Vout

Ri =

Ro = 0
g=

Vin

Digital Integrated Circuits Inverter Prentice Hall 1995

 VTC of Real Inverter

5.0

4.0 NML

3.0
Vout (V)

2.0
VM
NMH
1.0

0.0 1.0 2.0 3.0 4.0 5.0

Vin (V)

Digital Integrated Circuits Inverter Prentice Hall 1995

 Delay Definitions
Vin

50%

t
t t
pHL pLH
Vout
90%

50%

10% t
tf tr

Digital Integrated Circuits Inverter Prentice Hall 1995

 Ring Oscillator

v0 v1 v2 v3 v4 v5

v0 v1 v5

T = 2 tp N

Digital Integrated Circuits Inverter Prentice Hall 1995

 Power Dissipation

Digital Integrated Circuits Inverter Prentice Hall 1995

CMOS INVERTER

Digital Integrated Circuits Inverter Prentice Hall 1995

 The CMOS Inverter:
A First Glance
VDD

Vin Vout

CL

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverters
VDD

PMOS

1.2mm
=2l
Out
In
Metal1

Polysilicon

NMOS
GND

Digital Integrated Circuits Inverter Prentice Hall 1995

Switch Model of CMOS Transistor
|V GS|

Ron

|VGS| > |VT|

|VGS| < |VT|

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverter: Steady State Response

VDD VDD

Ron
VOH = VDD
Vout
Vout VOL= 0

Ron VM = f(Ronn,Ronp)

Vin = V DD Vin = 0

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverter: Transient Response

VDD

tpHL = f(Ron.CL)
= 0.69 RonCL

Vout
Vout ln(0.5)
CL
1 VDD
Ron

0.5
0.36

Vin = V DD
t
RonCL

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Properties

Full rail-to-rail swing

Symmetrical VTC
Propagation delay function of load
capacitance and resistance of transistors
No static power dissipation
Direct path current during switching

Digital Integrated Circuits Inverter Prentice Hall 1995

 Voltage Transfer
Characteristic

Digital Integrated Circuits Inverter Prentice Hall 1995

 PMOS Load Lines

IDn
V in = V DD -VGSp
IDn = - IDp
V out = VDD -VDSp

V out

IDp IDn IDn

Vin=0 Vin=0

Vin=3 Vin=3

V DSp V DSp Vout

VGSp=-2

VGSp=-5
Vin = V DD-VGSp Vout = V DD-VDSp
IDn = - IDp

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverter Load Characteristics

In,p
V in = 0 Vin = 5

NMOS
PMOS

Vin = 4 Vin = 1 Vin = 4

Vin = 3 Vin = 2 Vin = 3 Vin = 2

Vin = 4 Vin = 2 Vin = 1

V in = 3
Vin = 5 Vin = 0

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverter VTC

Vou t NMOS off

PMOS lin

5 NMOS sat
PMOS lin
4

NMOS sat
3

PMOS sat
2

NMOS lin
PMOS sat NMOS lin
1

PMOS off

1 2 3 4 5 Vin

Digital Integrated Circuits Inverter Prentice Hall 1995

 Simulated VTC

4.0
Vout (V)

2.0

0.0
0.0 1.0 2.0 3.0 4.0 5.0
Vin (V)
Digital Integrated Circuits Inverter Prentice Hall 1995
 Gate Switching Threshold
4.0

3.0
VM

2.0

1.00.1 0.3 1.0 3.2 10.0

kp/kn

Digital Integrated Circuits Inverter Prentice Hall 1995

 MOS Transistor Small Signal Model

G D
+
vgs gmvgs ro
-

Digital Integrated Circuits Inverter Prentice Hall 1995

 Determining VIH and VIL

Digital Integrated Circuits Inverter Prentice Hall 1995

Propagation Delay

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverter: Transient Response

VDD

tpHL = f(Ron.CL)
= 0.69 RonCL

Vout
Vout ln(0.5)
CL
1 VDD
Ron

0.5
0.36

Vin = V DD
t
RonCL

Digital Integrated Circuits Inverter Prentice Hall 1995

CMOS Inverter Propagation Delay
VDD

tpHL = CL Vswing/2
Iav

Vout CL
~
Iav CL kn VDD

Vin = V DD

Digital Integrated Circuits Inverter Prentice Hall 1995

 Computing the Capacitances
VDD VDD

M2
Cdb2 Cg4 M4
Cgd12
Vin Vout Vout2

Cdb1 Cw Cg3
M1 M3
Interconnect

Fanout
Vin Vout
Simplified
Model CL

Digital Integrated Circuits Inverter Prentice Hall 1995

 CMOS Inverters
VDD

PMOS

1.2mm
=2l
Out
In
Metal1

Polysilicon

NMOS
GND

Digital Integrated Circuits Inverter Prentice Hall 1995

 The Miller Effect

Cgd1 Vout
V
V Vout

V
Vin 2Cgd1

M1
M1 V
Vin

A capacitor experiencing identical but opposite voltage swings

at both its terminals can be replaced by a capacitor to ground,
whose value is two times the original value.

Digital Integrated Circuits Inverter Prentice Hall 1995

 Computing the Capacitances

Digital Integrated Circuits Inverter Prentice Hall 1995

 Impact of Rise Time on Delay
0.35

0.3
tpHL(nsec)

0.25

0.2

0.15
0 0.2 0.4 0.6 0.8 1
trise (nsec)

Digital Integrated Circuits Inverter Prentice Hall 1995

 Delay as a function of VDD

28

24

20
Normalized Delay

16

12

0
1.00 2.00 3.00 4.00 5.00
VDD (V)

Digital Integrated Circuits Inverter Prentice Hall 1995

Where Does Power Go in CMOS?

Dynamic Power Consumption

Charging and Discharging Capacitors

Short Circuit Currents

Short Circuit Path between Supply Rails during Switching

Leakage
Leaking diodes and transistors

Digital Integrated Circuits Inverter Prentice Hall 1995

 Dynamic Power Dissipation
Vdd

Vin Vout

CL

Energy/transition = CL * Vdd2

Power = Energy/transition * f = CL * Vdd2 * f

Not a function of transistor sizes!

Need to reduce CL, Vdd, and f to reduce power.

Digital Integrated Circuits Inverter Prentice Hall 1995

 Impact of
Technology Scaling

Digital Integrated Circuits Inverter Prentice Hall 1995

 Technology Evolution

Digital Integrated Circuits Inverter Prentice Hall 1995

 Technology Scaling (1)

Minimum Feature Size

Digital Integrated Circuits Inverter Prentice Hall 1995
 Technology Scaling (2)

Number of components per chip

Digital Integrated Circuits Inverter Prentice Hall 1995

 Propagation Delay Scaling

Digital Integrated Circuits Inverter Prentice Hall 1995

 Technology Scaling Models

Full Scaling (Constant Electrical Field)

ideal model dimensions and voltage scale
together by the same factor S

Fixed Voltage Scaling

most common model until recently
only dimensions scale, voltages remain constant

General Scaling
most realistic for todays situation
voltages and dimensions scale with different factors

Digital Integrated Circuits Inverter Prentice Hall 1995

 Scaling Relationships for Long Channel
Devices

Digital Integrated Circuits Inverter Prentice Hall 1995

Scaling of Short Channel Devices

Digital Integrated Circuits Inverter Prentice Hall 1995