Universidad de Oviedo

Leccin 4

Teora bsica de los convertidores CC/CC (I)

(convertidores con un nico transistor)

Diseo de Sistemas Electrnicos de Potencia

4 Curso. Grado en Ingeniera en Tecnologas y
Servicios de Telecomunicacin

SEA_uniovi_CC1_001
 Outline (I)

Introducing switching regulators

Basis of their analysis in steady state
Detailed study of the basic DC/DC converters in
continuous conduction mode
Buck, Boost and Buck-Boost converters
Common and different properties
Introduction to the synchronous rectification
Four-order converters

SEA_uniovi_CC1_012
 Outline (II)

Study of the basic DC/DC converters in discontinuous

conduction mode
DC/DC converters with galvanic isolation
How and where to place a transformer in a DC/DC converter
The Forward and Flyback converters

SEA_uniovi_CC1_023
 Linear DC/DC conversion (analog circuitry)
RV Q iO
ig iO ig
= (vOiO)/(vgig)
RL vO vg RL vO
vg
i O ig
vE vE -
Av - vO/vg Av

Feedback loop Vref Feedback loop Vref

First idea Actual implementation

Only a few components

Robust
No EMI generation
Only lower output voltage
Efficiency depends on input/output voltages
Low efficiency
Bulky
SEA_uniovi_CC1_034
 Linear versus switching DC/DC conversion

ig Q iO S
ig iO

vg RL vO
vg RL vO
vE -
Av vE -
PWM Av
Feedback loop Vref
Feedback loop Vref
Linear
Switching (provisional)

Features:
vO_avg
vO 100% efficiency
vg Undesirable output voltage
waveform
t

SEA_uniovi_CC1_045
 Introducing the switching DC/DC conversion (I)

ig
S
iO vO vO_avg
vg
vg RL vO t
The AC component must be
vE -
PWM Av removed!!
Feedback loop Vref
S
ig iO
S
ig iO
Filter
vg RL vO
vg RL vO
C filter
PWM Av -
C filter vE
Vg VO Feedback loop Vref
t
Basic switching DC/DC
It doesnt work!!! converter (provisional)

SEA_uniovi_CC1_056
 Introducing the switching DC/DC conversion (II)
S iL
ig iO S
ig iO
Filter L
vg RL vO LC filter
vg RL vO
C

PWM Av -
vE LC filter

Feedback loop Vref Infinite voltage across L when

S1 is opened
Including a diode It doesnt work either!!!

S iL
ig iO
+ L + vD VO
vD RL vO Vg
vg iD C
D - -
t
LC filter
Basic switching DC/DC converter
SEA_uniovi_CC1_067
 Introducing the switching DC/DC conversion (III)

iS iL
S iL iO
iO ig
ig
L
S + L C +
+ + vD vO
vD vO vg RL
vg iD RL iD D - -
D - C -

LC filter Buck converter

Starting the analysis of the Buck converter in steady state:
L & C designed for negligible output voltage ripple (we are designing a DC/ DC
converter)
i never reaches zero (Continuous Conduction Mode, CCM)
L

The study of the Discontinuous Conduction Mode (DCM) will done later
CCM DCM
iL
iL
t t

SEA_uniovi_CC1_078
 First analysis of the Buck converter in CCM
(In steady-state)
Analysis based on the specific topology of the Buck converter

iS iL iL
ig iO iO
+ L C
S + L C + +
vD vO vD RL vO
vg RL -
iD D - -

LC filter
vD
vg vD vD_avg = vO
vO vg
t t
dT The AC component is
T
d: duty cycle removed by the filter

This procedure is only valid for

vO = vD_avg = dvg converter with explicit LC filter

SEA_uniovi_CC1_089
 Introducing another analysis method (I)

Could we use the aforementioned analysis in the

case of this converter (SEPIC)?

ig L1 C1 iD D
+ -
iS iL2 R
+
Vg VO
L2 C2 -
S

Obviously, there is not an explicit LC filter

Therefore, we must use another method

10
SEA_uniovi_CC1_09
 Introducing another analysis method (II)
Powerful tools to analyze DC/DC converters in steady-state

Step 1- To obtain the main waveforms (with no quantity values)

using Faradays law and Kirchhoffs current and voltage laws
Step 2- To take into account the average value of the voltage
across inductors and of the current through capacitors in
steady-state
Step 2 (bis)- To use the voltsecond balance
Step 3- To apply Kirchhoffs current and voltage laws in average
values
Step 4- Input-output power balance

11
SEA_uniovi_CC1_10
 Introducing another analysis method (III)

Any electrical circuit that operates in steady-state satisfies:

The average voltage across an inductor is zero. Else, the net current
through the inductor always increases and, therefore, steady-state is
not achieved

The average current through a capacitor is zero. Else, the net voltage
across the capacitor always increases and, therefore, steady-state is not
achieved

+
L vL_avg = 0
Circuit in
Vg -
steady-state
C iC_avg = 0

12
SEA_uniovi_CC1_11
 Introducing another analysis method (IV)
Particular case of many DC/DC converters in steady-state:

Voltage across the inductors are rectangular waveforms

Current through the capacitors are triangular waveforms
vL Same areas
+ v1
Circuit in
L vL + t
- - -v2
Vg steady-state dT
C iC T Voltsecond balance:
V1dT V2(1-d)T = 0
vL_avg = 0 iC_avg = 0
iC
+ t
-
Same areas
13
SEA_uniovi_CC1_12
 Introducing another analysis method (V)
Any electrical circuit of small dimensions (compared with the wavelength
associated to the frequency variations) satisfies:

Kirchhoffs current law (KCL) is not only satisfied for instantaneous current values, but
also for average current values

Kirchhoffs voltage law (KVL) is not only satisfied for instantaneous voltage values, but
also for average voltage values

KVL applied to Loop1 yields:

Example vg - vL1 - vC1 - vL2 = 0
Node1 vg - vL1_avg - vC1_avg - vL2_avg = 0
iL1 L1 iC1 C1 Therefore: vC1_avg = vg
+ vL1 - + - KCL applied to Node1 yields:
vC1
iS +
vL2 iL1 - iC1 - iS = 0
Vg L2
S - iL1_avg - iC1_avg - iS_avg = 0
Loop1
Therefore: iS_avg = iL1_avg

14
SEA_uniovi_CC1_13
 Introducing another analysis method (VI)
A switching converter is (ideally) a lossless system

ig Input power:
iO
Pg = vgig_avg
Switching-mode +
vg RL vO Output power:
DC/DC converter -
PO = vOiO = vO2/RL

Power balance:
Therefore: vgig_avg = vO2/RL
Pg = PO

A switching-mode DC/DC converter as an ideal DC transformer

ig_avg iO
being N = vO/vg
+
RL vO
vg - ig_avg = iOvO/vg = NiO
1:N
DC Transformer Important concept!!
15
SEA_uniovi_CC1_14
 Steady-state analysis of the Buck converter in CCM (I)

Step 1: Main waveforms. Remember that the output voltage remains constant
during a switching cycle if the converter has been properly designed
ig vS iS iL iO
+ -
Driving signal
iD + L C +
S vD vO
vg RL t
D - -
iL
iL iO
t
S on, D L C +
vO iS
off vg RL
-
t
During dT
iL iO iD
t
S off, D L C +
RL vO dT
on -
T
During (1-d)T
16
SEA_uniovi_CC1_15
 Steady-state analysis of the Buck converter in CCM (II)

Step 1: Main waveforms (cont)

vS iL + vL - iO Driving signal
+ -
+ L C + t
S vD vO
vg RL iL
D - - DiL
iL_avg
t
iL + vL - iO vL
S on, D vg-vO
L C + t
off, RL
vO
vg -
dT - vO
dT
T
iL + vL - iO
S off, D
on, L C + From Faradays law:
RL vO
(1-d)T - DiL = vO(1-d)T/L

17
SEA_uniovi_CC1_16
 Steady-state analysis of the Buck converter in CCM (III)

Step 2 and 2 (bis): Average inductor voltage and capacitor current

Average value of iC: ig iS + vL - iL iO
iC_avg = 0 iD L iC +
Node1 vO
vg S RL
Voltsecond balance over L: D -
C
(vg - vO)dT - vO(1-d)T = 0
Therefore: vO = dvg (always vO < vg)
Driving signal
Step 3: Average KCL and KVL:
t
KCL applied to Node1 yields: iL
iL - iC - iO = 0 iL_avg
t
iL_avg - iC_avg - iO = 0 vL
vg-vO
Therefore: iL_avg = iO = vO/RL
+ t
Step 4: Power balance: - - vO
dT
ig_avg = iS_avg = iOvO/vg = diO
T
18
SEA_uniovi_CC1_17
 Steady-state analysis of the Buck converter in CCM (IV)

ig vS
-
iS iL iO Summary
+
iD + L C + Driving signal
S vD vO
vg RL t
D - -
vD
vg
vO = dvg (always vO < vg)
t
vSmax = vDmax = vg iL iO
iL_avg = iO = vo/RL t
iS
ig_avg = iS_avg = diO DiL
t
iD_avg = iL_avg - iS_avg = (1-d)iO
iD
DiL = vO(1-d)T/L
t
iL_peak = iL_avg + DiL/2 = iO + vO(1-d)T/(2L) dT
iS_peak = iD_peak = iL_peak T

19
SEA_uniovi_CC1_18
 Steady-state analysis of the Boost converter in CCM (I)

Can we obtain vO > vg? Boost converter

Step 1: Main waveforms
Driving signal
ig + vL - iL iD iO
t
L iS D + + iL
vO DiL
vg S C - RL -
t
iS
iL + vL -
t
S on, D off, L
during dT vg iD
t
iL + vL - iO dT
T
S off, D on, L C +
during (1-d)T RL vO From Faradays law:
-
DiL = vgdT/L
20
SEA_uniovi_CC1_19
 Steady-state analysis of the Boost converter in CCM (II)

Step 2 and 2 (bis): Average values Node1

ig + vL - iL iD iO
Average value of iC:
L iC
iC_avg = 0 iS D + +
vO
Voltsecond balance over L: vg S C - RL -
vgdT - (vO - vg)(1-d)T = 0
Therefore: vO = vg/(1-d) (always vO > vg)
Driving signal
Step 3: Average KCL and KVL:
t
KCL applied to Node1 yields:
iD
i D - iC - i O = 0 iD_avg DiL
t
iD_avg - iC_avg - iO = 0 vL
Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL vg
t
Step 4: Power balance:
dT -(vO-vg)
ig_avg = iL_avg = iOvO/vg = iO/(1-d)
T
21
SEA_uniovi_CC1_20
 Steady-state analysis of the Boost converter in CCM (III)

ig + vL - iL - vD + iO Summary
L iC Driving signal
iS D iD +
+ RL vO t
vg S vS C -
- vD
vO

vO = vg/(1-d) (always vO > vg) t

iL
vSmax = vDmax = vO
t
iL_avg = ig_avg = iO/(1-d) = vo/[RL(1-d)] iS
DiL
iS_avg = diL_avg = dvo/[RL(1-d)] t

iD_avg = iO DiL = vgdT/L iD

iO
iL_peak = iL_avg + DiL/2 = iL_avg + vgdT/(2L) dT t

iS_peak = iD_peak = iL_peak T

22
SEA_uniovi_CC1_21
 Steady-state analysis of the Buck-Boost converter in CCM (I)

Can we obtain either vO < vg or vO > vg? Buck-Boost converter

ig iS iD iO
Driving signal
iL D
+ - -
S vO t
vL C + RL +
vg L iL
- DiL
ig t
+ iS
iL
S on, D off, vL
during dT vg L
t
-
Charging stage iD
iO t

iL+ dT
S off, D on, C - -
vL vO T
during (1-d)T + RL
L - +
From Faradays law:
Discharging stage DiL = vgdT/L
23
SEA_uniovi_CC1_22
 Steady-state analysis of the Buck-Boost converter in CCM (II)

Step 2 and 2 (bis): Average values Node1

ig iS iD iO
Average value of iC:
iL D iC
iC_avg = 0 + - -
S vO
Voltsecond balance over L: vL C + RL +
vg L -
vgdT - vO(1-d)T = 0
Therefore: vO = vgd/(1-d)
Driving signal
Step 3: Average KCL and KVL:
t
KCL applied to Node1 yields: iD
iD_avg DiL
i D - iC - i O = 0 t
iD_avg - iC_avg - iO = 0 vL
vg
Therefore: iD_avg = iL_avg(1-d) = iO = vO/RL t

Step 4: Power balance: -vO

dT
ig_avg = iS_avg = iOvO/vg = iOd/(1-d) T

24
SEA_uniovi_CC1_23
 Steady-state analysis of the Buck-Boost converter in CCM (III)

ig i iD + vD - iO Summary
+ vS - S
iL Driving signal
+ D - -
S vO t
vL + RL +
vg L C
- vD
vO + vg

vO = vgd/(1-d) (both vO < vg and vO > vg) t

iL
vSmax = vDmax = vO + vg
t
iD_avg = iO DiL = vgdT/L iS
DiL
iL_avg = iD_avg/(1-d) = iO/(1-d) = vo/[RL(1-d)] t

iD
iS_avg = ig_avg = diL_avg = dvo/[RL(1-d)] iO

iL_peak = iL_avg + DiL/2 = iL_avg + vgdT/(2L) dT t

iS_peak = iD_peak = iL_peak T

25
SEA_uniovi_CC1_24
 Common issues in basic DC/DC converters (I)

L + + Complementary
S vO
vg C - RL switches + inductor
D -

Buck
S D

L d 1-d
D + + + +
vO vO
vg C - RL vg C - RL -
S - L
Boost

D +
- vO Voltage source
S
vg L C + RL -

Buck-Boost The inductor is a energy buffer to

connect two voltage sources
26
SEA_uniovi_CC1_25
 Common issues in basic DC/DC converters (II)
Diode turn-off
vg

L + +
S RL vO
vg C - -
D Buck The diode turns off when the
transistor turns on
The diode reverse recovery time is
L D of primary concern evaluating
C + +
vO
vg S vO - RL -
switching losses
Boost Schottky diodes are desired from
this point of view
vO + v g
In the range of line voltages, SiC
D C + diodes are very appreciated
- vO
S
vg L Buck- + RL -
Boost
27
SEA_uniovi_CC1_26
 Comparing basic DC/DC converters (I)
Generalized study as DC transformer (I)
ig iO

L ig_avg iO
+ +
S vO
vg C - RL
D - +
RL vO
Buck vg -
ig iO 1:N
DC Transformer
L D + +
vO
vg S C - RL -

Boost Buck: N= d (only vO < vg)

ig iO
Boost: N= 1/(1-d) (only vO > vg)
D
- + Buck-Boost: N= -d/(1-d)
S vO
C + RL - (both vO < vg and vO > vg)
vg L

Buck-Boost
28
SEA_uniovi_CC1_27
 Comparing basic DC/DC converters (II)
Generalized study as DC transformer (II)
ig_avg iO

+
RL vO
vg -
1:N
DC Transformer

ig_avg = iON = iOd/(1-d)

Buck: ig_avg = iON = iOd

Boost: ig_avg = iON = iO/(1-d)

Buck-Boost: ig_avg = iON = - iOd/(1-d)

29
SEA_uniovi_CC1_28
 Comparing basic DC/DC converters (III)
Electrical stress on components (I)

ig iS vS iO
+ -
iD + +
S vD RL vO
vg -
D -
DC/DC converter

Buck: Boost: Buck-Boost:

vSmax = vDmax = vg vSmax = vDmax = vO vSmax = vDmax = vO + vg

iS_avg = ig_avg iL_avg = ig_avg iS_avg = ig_avg

iL_avg = iO iD_avg = iO iD_avg = iO

iD_avg = iL_avg - iS_avg iS_avg = iL_avg - iD_avg iL_avg = iS_avg + iD_avg

30
SEA_uniovi_CC1_29
 Comparing basic DC/DC converters (IV)
Example of electrical stress on components (I)
1 A (avg) 2A
vS_max = vD_max = 100 V
L + + iS_avg = iD_avg = 1 A
S 50 V
C - RL
100 V D - iL_avg = 2 A

100 W Buck, 100% efficiency

FOMVA_S = FOMVA_D = 100 VA

1 A (avg) 2A vS_max = vD_max = 150 V

D iS_avg = 1 A
- -
S 50 V iD_avg = 2 A
100 V C + RL +
L iL_avg = 3 A
100 W Buck-Boost, 100% efficiency FOMVA_S = 150 VA
FOMVA_D = 300 VA
Higher electrical stress in the case of Buck-
Boost converter
Therefore, lower actual efficiency
31
SEA_uniovi_CC1_30
 Comparing basic DC/DC converters (V)
Example of electrical stress on components (II)
4 A (avg) 2A
vS_max = vD_max = 50 V
L D iS_avg = iD_avg = 2 A
+ +
25 V C - RL 50 V iL_avg = 4 A
S -
FOMVA_S = FOMVA_D = 100 VA
100 W Boost, 100% efficiency

4 A (avg) 2A

D vS_max = vD_max = 75 V
- -
S 50 V iS_avg = 4 A
25 V C + RL +
L iD_avg = 2 A
100 W Buck-Boost, 100% efficiency iL_avg = 6 A
FOMVA_S = 300 VA
Higher electrical stress in the case of Buck-
Boost converter FOMVA_D = 150 VA
Therefore, lower actual efficiency
32
SEA_uniovi_CC1_31
 Comparing basic DC/DC converters (VI)

Price to pay for simultaneous step-down and step-

up capability:
Higher electrical stress on components and,
therefore, lower actual efficiency

Converters with limited either step-down or step-up

capability:
Lower electrical stress on components and,
therefore, higher actual efficiency

33
SEA_uniovi_CC1_32
 Comparing basic DC/DC converters (VII)
Example of power conversion between similar voltage
levels based on a Boost converter

6.12 A (avg) L 5A
vS_max = vD_max = 60 V
1.12 A D + + iS_avg = 1.12 A
(avg) C - RL 60 V iD_avg = 5 A
50 V S -
iL_avg = 6.12 A
300 W Boost, 98% efficiency FOMVA_S = 67.2 VA
FOMVA_D = 300 VA

Very high efficiency can be achieved!!!

34
SEA_uniovi_CC1_33
 Comparing basic DC/DC converters (VIII)
The opposite case: Example of power conversion between
very different and variable voltage levels based on a Buck-
Boost converter
20 - 2 A (avg) 5A

D
- -
S 60 V
C + RL +
20 - 200 V L vS_max = vD_max = 260 V
iS_avg_max = 20 A
300 W Buck-Boost, 75% efficiency
iD_avg_max = 5 A
Remember previous example: iL_avg = 25 A
FOMVA_S = 67.2 VA FOMVA_S_max = 5200 VA
FOMVA_D = 300 VA
FOMVA_D = 1300 VA

High efficiency cannot be achieved!!!

35
SEA_uniovi_CC1_34
 Comparing basic DC/DC converters (IX)

One disadvantage exhibited by the Boost converter:

The input current has a direct path from the input voltage source to the
load. No switch is placed in this path. As a consequence, two problems arise:

Large peak input current in start-up

No over current or short-circuit protection can be easily implemented
(additional switch needed)

L D + +
vg vO
S C - RL -
Boost

Buck and Buck-Boost do not exhibit these problems

36
SEA_uniovi_CC1_35
 Synchronous rectification (I)

To use controlled transistors (MOSFETs) instead of diodes to achieve high

efficiency in low output-voltage applications
This is due to the fact that the voltage drop across the device can be lower
if a transistor is used instead a diode
The conduction takes place from source terminal to drain terminal
In practice, the diode (Schottky) is not removed

L idevice
S L
D MOSFET S1
Diode S2
L
S1
S2 vdevice
37
SEA_uniovi_CC1_36
 Synchronous rectification (II)
In converters without a transformer, the control circuitry must provide
proper driving signals
In converters with a transformer, the driving signals can be obtained
from the transformer (self-driving synchronous rectification)
Nowadays, very common technique with low output-voltage Buck
converters

L
L S2 + +
S1 S1 vO
vg C - RL -
vO D
S2
Synchronous Buck
Q -
PWM Av
Q Vref
Feedback loop

38
SEA_uniovi_CC1_37
 Input current and current injected into the output RC cell (I)

If a DC/DC converter were an ideal DC transformer, the input and output

currents should also be DC currents
As a consequence, no pulsating current is desired in the input and output
ports and even in the current injected into the RC output cell

ig iS vS iRC
+ -
iD + + +
S vD v
vg C - RL - O
D -

Desired current DC/DC converter

Desired current
ig iRC

t t
39
SEA_uniovi_CC1_38
 Input current and current injected into the output RC cell (II)
ig iRC
ig iRC
L + +
S vO
vg C - RL
t D - t
Noisy Buck Low noise
ig iRC

ig L D + +
iRC
vO
vg S C - RL -
t t
Low noise Boost Noisy
ig iRC

ig D
-
+
vO
iRC
S -
C + RL
t vg L t
Noisy Buck-Boost Noisy
40
SEA_uniovi_CC1_39
 Input current and current injected into the output RC cell (III)

ig iRC Adding EMI filters

LF + L + +
S vO
vg CF - C - RL
D -

Filter Buck
ig iRC

L D LF
+ + +
vO
vg S CF - C - RL -

Boost Filter
ig iRC

LF D LF
+ - - -
CF S CF vO
vg - + C + RL +
L

Filter
Buck-Boost Filter
41
SEA_uniovi_CC1_40
 Four-order converters (converters with integrated filters)
ig L1 C1 iD D Same v /v as Buck-Boost
O g
+ -
iS vC1 iL2
+ RL
Same stress as Buck-Boost
vg L2
vO v =v C1 g
C2 -
S Filtered input
SEPIC ig L1 C1 iL2 L2
-
Same v /v as Buck-Boost
O g
+
vC1 iD RL
iS
Same stress as Buck-Boost -
vO
vg C2 +
v =v +v
C1 g O S
D

Filtered input and output

Cuk
iS iL2
C1
- +
S vC1 L2
RL
Same v /v as Buck-Boost
O g
+
L1
D
C2 vO Same stress as Buck-Boost
vg iL1
iD
-
v =v C1 O

Filtered output
Zeta
42
SEA_uniovi_CC1_41
 DC/DC converters operating in DCM (I)

Only one inductor in basic DC/DC converters

The current passing through the inductor decreases when the load
current decreases (load resistance increases)
iL iL
iL_avg
L iO
ig t

+ Driving signal
S RL vO t
vg D -
dT
DC/DC converter
T

Buck: Boost: Buck-Boost:

iL_avg = iO iL_avg = iO/(1-d) iL_avg = iS_avg + iD_avg = diO/(1-d) + iO

= iO/(1-d)

43
SEA_uniovi_CC1_42
 DC/DC converters operating in DCM (II)

When the load decreases, the converter goes toward Discontinuous

Conduction Mode (DCM)

RL_1
iL
iL_avg
Decreasing load

t Operation in CCM
RL_2 > RL_1
iL
iL_avg

t
RL_crit > RL_2 Boundary between CCM
iL iL_avg and DCM
t
It corresponds to RL = R L_crit
44
SEA_uniovi_CC1_43
 DC/DC converters operating in DCM (III)

What happens when the load decreases below the critical value?

RL_crit DCM starts if a diode is used as

iL iL_avg rectifier
Decreasing load

t If a synchronous rectifier (SR) is used,

the operation depends on the driving
RL_3 > RL_crit
iL iL_avg signal

t CCM operation is possible with

CCM w. SR synchronous rectifier with a proper
driving signal (synchronous rectifier with
signal almost complementary to the
RL_3 > RL_crit main transistor)
iL iL_avg
t
DCM w. diode

45
SEA_uniovi_CC1_44
 DC/DC converters operating in DCM (IV)
Remember:
iL_avg = iO (Buck) or iL_avg = iO/(1-d) (Boost and Buck-Boost)

RL > RL_crit For a given duty cycle, lower average

CCM w. SR value (due to the negative area)
iL iL_avg lower output current for a given load
lower output voltage
t

RL > RL_crit For a given duty cycle, higher average

DCM w. diode value (no negative area) higher
iL iL_avg output current for a given load higher
output voltage
t
The voltage conversion ratio vO/vg is always higher in DCM
than in CCM (for a given load and duty cycle)
46
SEA_uniovi_CC1_45
 DC/DC converters operating in DCM (V)

How can we get DCM (of course, with

a diode as rectifier) ?
iL
After decreasing the
inductor inductance

t
iL After decreasing the
switching frequency

t
iL After decreasing the
load (increasing the
load resistance)
t

47
SEA_uniovi_CC1_46
 DC/DC converters operating in DCM (VI)
Three sub-circuits instead of two:
Driving signal The transistor is on. During dT
The diode is on. During dT
t
iL Both the transistor and the diode are off. During (1-
iL_avg d-d)T

t Example: Buck-Boost converter

iD
ig iS iD iO
iD_avg
iL D
vL t + - -
vg S
vL RL
vO
+ +
+ vg L -
C

- -vO t ig iO
dT dT
+ iL + iL +
T iL C - -
vL vL vO vL
vg + RL L -
L L - +
-
During dT During dT During (1-d-d)T
48
SEA_uniovi_CC1_47
 DC/DC converters operating in DCM (VII)
Voltage conversion ratio vO/vg for the Buck-Boost converter in DCM

ig +
iL
Driving signal vL From Faradays law:
vg L - vg = LiL_max/(dT)
iL iL_max t During dT
iL_avg iO
iL +
C - - And also:
iL_max t vL vO
iD + RL vO = LiL_max/(dT)
L - +
iD_avg
During dT
vL t
vg Also:
+ iD_avg = iL_maxd/2, iD_avg = vO/R
- -vO t
dT dT And finally calling M = vO/vg we obtain:
T M =d/(k)1/2 where k =2L/(RT)

49
SEA_uniovi_CC1_48
 DC/DC converters operating in DCM (VIII)

The Buck-Boost converter just on the boundary RL = RL_crit

iL iL_avg
between DCM and CCM t

Due to being in DCM: M = vO/vg = d/(k)1/2, where: k =

2L/(RT)
Due to being in CCM: N = vO/vg = d/(1-d)
Just on the boundary: M = N, R = Rcrit, k = kcrit
Therefore: kcrit = (1-d)2
The converter operates in CCM if: k > kcrit
The converter operates in DCM if: k < kcrit

50
SEA_uniovi_CC1_49
 DC/DC converters operating in DCM (IX)

Summary for the basic DC/DC converter

Buck Boost Buck-Boost

N=d 1 d
N= N=
1-d 1-d
2
M= d
4d2 M=
4k 1+ 1+
1+ 1+ 2 k k
d M=
2
kcrit = (1-d)2
kcrit = (1-d) kcrit = d(1-d)2
kcrit_max = 1
kcrit_max = 1 kcrit_max = 4/27
k = 2L/(RT)
51
SEA_uniovi_CC1_50
 DC/DC converters operating in DCM (X)
CCM versus DCM
Driving signal Driving signal
t
vD t vD

t - Lower conduction losses in t

CCM (lower rms values)
iL iL
iL_avg - Lower losses in DCM when S iL_avg
turns on and D turns off
iS t - Lower losses in CCM when S iS t
turns off
- Lower inductance values in
t DCM (size?) t
iD iD

dT t dT t
T T

52
SEA_uniovi_CC1_51
 Achieving galvanic isolation in DC/DC converters (I)
- A two-winding magnetic device is needed
- The voltsecond balance in the case of magnetic devices with two
windings must be used

From Faradays law:

+ + vi = ni d/dt B
v1
-
v2
-

D= B - A = (vi/ni)dt
A
n1:n2 In steady-state:
vg (D)in a period= 0
Circuit in steady-
state And therefore:
(vi /ni)avg = 0

Voltsecond balance: If all the voltages are DC voltages, then:

CCM: dT(V1/n1) (1-d)T(V2/n2) = 0
DCM: dT(V1/n1) dT(V2/n2) = 0
53
SEA_uniovi_CC1_52
 Achieving galvanic isolation in DC/DC converters (II)
Transformer models

Model 1 Ll1 Model 2 Ll2

Lm1 Lm1
n1:n2 n1:n2 n1:n2

Model 1: Model 2: Model 3:

Circuit Theory Magnetic transformer Magnetic transformer
element with perfect coupling with real coupling

At least the magnetizing inductance must be taken

into account analyzing DC/DC converters

54
SEA_uniovi_CC1_53
 Achieving galvanic isolation in DC/DC converters (III)
Where must we place the transformer?

Lm1
n1:n2
In a place where the
average voltage is zero

ig iO
vS
+ - + +
vD RL vO
vg D - -
S
DC/DC converter

55
SEA_uniovi_CC1_54
 Achieving a Buck converter with galvanic isolation (I)

L + + No place with average

S vO
vg C - RL - voltage equal to zero
D Buck

New node with possible zero average voltage

L + +
S vO
vg C - RL -
D

S on S off D2

L + +
S RL vO
vg Lm1 C - -
D1
n1:n2
It does not work!!

56
SEA_uniovi_CC1_55
 Achieving a Buck converter with galvanic isolation (II)

A circuit to a apply a given DC voltage

across Lm1 when S is off
vextra S off
S on n3 D2
L + +
D1 RL vO
vg Lm1 C - -
n1:n2

n1:n1:n2 D2
L + +
D1 C RL vO Standard design:
Lm1 - -
vextra = vg
vg n3 = n 1
D3 Final implementation: the
S Forward converter

57
SEA_uniovi_CC1_56
 The Forward converter
As the Buck converter replacing vg with vgn2/n1
n1:n1:n2 D2 iL iO
L + + L C +
vO RL vO
D1 C - RL vgn2/n1 -
Lm1 -

D3 Inductor magnetizing
vg S & D2 on, D1 stage
S & D2 off, D1
S & D3 off, im1
on, during dT
+
vL
vg Lm1
during (1-d)T D3 on, during dT -
iL iO im1 Transformer
+ magnetizing stage
L C +
vO vg vL
RL vO = dvgn2/n1
- Lm1 -
vSmax = 2 vg
Inductor demagnetizing Transformer reset
stage stage dmax = 0.5 (reset transformer)
58
SEA_uniovi_CC1_57
 Achieving a Buck-Boost converter with galvanic isolation (I)

D There is a place with

C - -
S vO average voltage equal to
Buck- + RL +
vg L zero: the inductor
Boost

Inductor and transformer

integrated into only one
D - - magnetic device (two-winding
S RL vO inductor)
vg Lm1 C + +
L
n1:n2

S on S off

D - -
S RL vO
vg L C + +
n1:n2

59
SEA_uniovi_CC1_58
 Achieving a Buck-Boost converter with galvanic isolation (II)

D - -
S RL vO
vg L C + +
n1:n2
Two-winding
inductor ig

+
n1:n2 D S on, D off, vL
during dT vg L1 -
+ +
L1 L2 C RL vO
- - Charging stage
iO
vg
+
C - -
S vLn2/n1 vO
RL
S off, D on, - L2 + +
during (1-d)T
Final implementation: the Discharging stage
Flyback converter
60
SEA_uniovi_CC1_59
 The Flyback converter
Analysis in steady-state in CCM

Voltsecond balance:

n1:n2 D dTvg/n1 - (1-d)TvO/n2 = 0

+ + vO = vg(n2/n1)d/(1-d)
L1 L2 C RL vO
- - Therefore, the result is the
same as Buck-Boost
vg converter replacing vg with
S vgn2/n1
vSmax = vg + vOn1/n2

Very simple topology v = v n /n + v

Dmax g 2 1 O

Useful for low-power, low-cost converters

Critical false transformer (two-winding inductor) design
61
SEA_uniovi_CC1_60
 Achieving other converters with galvanic isolation (I)
L1 C1 n1:n2
L D RL + -
+ + D
vO vg L2 + RL
vg S C - - vO
Boost C2 -
S
SEPIC
It is not possible with
only one transistor!!

L1 C1 n1:n2 C2 L2 Zeta converter is also

+ - + - possible
Vg RL
- vO = vg(n2/n1)d/(1-d)
VO
D C3 +
S vSmax = vg + vOn1/n2
Cuk
vDmax = vgn2/n1 + vO

Like the Flyback converter

62
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