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Jamia hamdard
Intel 8086
Intel 8086
MICROPROCESSOR
MICROPROCESSOR
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Features
It is a 16-bit p.
8086 has a 20 bit address bus can access up
to 220 memory locations (1 MB) (unlike 8085,
64 KB).
It provides 16 -bit registers.
Word size is 16 bits.
It has multiplexed address and data bus
AD0- AD15 and A16 A19.
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8086 is designed to operate in two modes,
Minimum and Maximum.
A 40 pin package.
separate address.
Intel
Intel 8086
8086 Internal
Internal Architecture
Architecture
Pipelining : FIFO
4
BUS INTERFACE UNIT (BIU)
Contains
6-byte Instruction Queue (Q)
The Segment Registers (CS, DS, ES, SS).
The Instruction Pointer (IP).
The Address Summing block ()
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EXECUTION UNIT
Control Circuitry
Instruction decoder
ALU
6
7
8
EXECUTION UNIT Flag Register
A flag is a flip flop which indicates some conditions produced by the execution of
an instruction or controls certain operations of the EU .
In 8086 The EU contains
a 16 bit flag register
9 of the 16 are active flags and remaining 7 are undefined.
6 flags indicates some conditions- status flags
3 flags control Flags
U U U U O D IF TF SF ZF U A U PF U CF
F F F
Sign Auxiliary Carry
Interrupt Trap Zero Parity
Over flow Direction
10
U - Unused
Segmented Memory Physical Memory
00000
The memory in an 8086/88
based system is organized as
segmented memory. Code segment (64KB)
1 MB
address 1Mbyte of memory.
Extra segment (64KB)
The Complete physically
available memory may be Stack segment (64KB)
divided into a number of logical
segments.
FFFFF
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Physical address= segment base address+ effective address
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Segment base: offset form
348A: 4214
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SS:SP
5000: FFE0
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Calculate Physical Address
A. 4370: 561E
B. 7A32:0028
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