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FGMOS to presents a high performance, resistively compensated low voltage current mirror using floating gate MOSFETs (FGMOS). CM is a circuit designed to copy current through one active device and replicating it to another active device. Important feature of current mirror is its high output resistance. It provides bias current and active loads in amplifier stages. If the input current increases then the value of gm also increases. As a result of this frequency response of the system is improved.
FGMOS to presents a high performance, resistively compensated low voltage current mirror using floating gate MOSFETs (FGMOS). CM is a circuit designed to copy current through one active device and replicating it to another active device. Important feature of current mirror is its high output resistance. It provides bias current and active loads in amplifier stages. If the input current increases then the value of gm also increases. As a result of this frequency response of the system is improved.
FGMOS to presents a high performance, resistively compensated low voltage current mirror using floating gate MOSFETs (FGMOS). CM is a circuit designed to copy current through one active device and replicating it to another active device. Important feature of current mirror is its high output resistance. It provides bias current and active loads in amplifier stages. If the input current increases then the value of gm also increases. As a result of this frequency response of the system is improved.
ENHANCEMENT BY: PROJECT TO: GOPI KRISHNA [14317188] M.TECH (MET)
DR. MANISH KUMAR
MR.SHAMIM AKHTAR
INTRODUCTION FGMOS
To presents a high performance, resistively compensated
low voltage current mirror using floating gate MOSFETs (FGMOS). Current mirrors (CMs) have been used as basic circuit element for the design of various low voltage circuit structures . Floating gate MOS is similar to conventional MOSFET. The gate of FGMOS is electrically isolated , and a no. of secondary gates or inputs are deposited over the floating gate and are electrically isolated from it.
CONTD..
FG is completely surrounded by highly resistive
material, the charge contained in it remains unchanged for long period of time. Usually Hot-Carrier injection scheme is applied to modify the charge stored in the FG.
INTRODUCTION CURRENT MIRROR
Current mirror is a circuit designed to copy current
through one active device and replicating it to another active device , keeping the output current constant regardless of loading. Important feature of current mirror is its high output resistance. It provides bias current and active loads in amplifier stages.
WORKING
(a)
In FGMOS it is possible to programme the threshold
voltage of FGMOS. For two input FGMOS with Vs=Vb=0 and C1,C2 >> Cd. Then VFG is
CONTD..
FGMOS CM CIRCUIT
MODIFIED CM
Basic structure of FGMOS cuurent mirror is modified by
adding a resistance (R) in series with capacitance (C2) . The output short circuit transfer function of the modified current mirror is given by
MODIFIED CM CIRCUIT
CONTD..
Transfer function has a zero at (-1/RC2) and complex
poles (P1,2) at
CONTD..
If gm1 = gm2 = gm then one of the pole is cancel out by
zero , because zero approaches towards one of poles. Pole of transfer function is at S= -(gm/3C) . If the input current increases then the value of gm also increases , resulting pole at higher frequency. As a result of this frequency response of the system is improved. Capacitance (C) is gate to source capacitance which is process dependent and its value is low when transistor dimensions are low.
SENSITIVITY
Sensitivity of output current for the change in resistance R
is given as
When R is very high then
Thus, as R increases sensitivity decreases.
REFRENCES:(1) S. Sharma, L.K. Mangotra , S.S. Rajput and S. S.
Jamuar, FGMOS Current mirror: Bandwidth enhancement SPRINGER, Analog Integrated Circuits and Signal Processing, 46, 281286, 2006. (2) S.S. Rajput and S.S. Jamuar, Design techniques for low voltage analog circuit Structures in Proc. NSM 2001/IEEE, Malaysia, Nov. 2001. (3) S. S. Rajput and S.S. Jamuar, Low voltage analog circuit design techniques. IEEE Circuits and Systems Magazine, vol. 2, no. 1, pp. 2442, 2002. (4) Design of Analog CMOS Integrated Circuits, Behzad Razavi, Tata McGraw-Hill 2002 .