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LTspice/SwitcherCAD III
Mike Engelhardt Linear Technology Corporation
Historical Timeline
1969
1972 1975
1981
1983 1985 SPICE 2G6 SPICE 3
1991
1993 1996 SPICE 3F4
1999
2004
Demo Board
The Bench
SwCAD III Min. Slew Rate Limit With Current Slew Limit With Voltage Slew Limit 73.0% 66.0% 63.0%
- Complete documentation
Integrated with Industry superlative SPICE simulator - Unlimited, professional-quality SPICE proven for IC design - Unmatched combination of robustness, accuracy, speed and compatibility - Advanced analysis/simulation options, parameter sweeps, FFTs, etc. - Run 3rd party models - Active independent users group Macromodels of over 950 Linear Technology products
Waveform average and RMS calculator Fourier analysis (both .four statements and FFT's) Parametric plotting (X-Y plotting) Multiple plot planes - Attached cursors ganged across plot panes Eye diagrams Complex data: Bode, Nyquist, and Cartesian Dynamic waveform data compression
Copyright 2004, 2005 Linear Technology Corporation
Rewrite Berkeley SPICE 3F4/5 for machines with faster CPUs than RAM - Reduced address calculation and function calling overhead - Improved timestep control and numerical methods - Enhanced integration methods and convergence improvements - Alternate solver/SPARSE matrix package 1000x more accurate. - Circuit size limited by computer memory Added/Enhanced semiconductor models - Diode recombination current - JFET impact ionization current - BJT quasi-saturation - VBIC - Binned BSIM3v3.2.4 - BSIM4.4.0 - VDMOS(a new vertical double diffused MOSFET for power MOS) - EKV 2.6 - BSIMSOI3.2 Advanced Analog Behavioral Modeling Technology - Traditional ABM, specialized behavioral devices, HDL, co-simulation Leadership in the SPICE community - Subcircuit port current monitoring - Unlimited output file size, i.e., >> 2GB
Copyright 2004, 2005 Linear Technology Corporation
Benchmarking SPICE
Transistor-level performance LTspice PSPICE hspice
ab_ac ab_integ ab_opamp arom astabl b330 bias bjtff bjtinv counter cram e1480 g1310 gm1 gm17 gm19 gm2 gm3 gm6 hussamp jge latch 4.750* 0.109* 5.454* 3.656 1.046* 2.172 3.234* 2.453* 7.594* 7.234* 0.625* 0.250 3.969* 5.562* 2.703* 12.625 1.125* 3.453* 5.109* 0.781* 33.875 0.969* 7.59 .23 6.44 6.94 4.52 3.16 5.19 4.17 13.03 15.16 .91 (fails) 10.91 12.39 4.47 (fails) 4.91 8.66 13.45 (fails) (fails) 2.30 14.63 0.17 7.72 3.34* 5.21 1.90* 8.63 2.94 14.28 7.40 0.74 0.09* 5.45 11.14 2.92 9.37* 3.21 8.13 11.84 1.42 9.08* 2.42
Benchmarking SPICE(Cont.)
LTspice PSPICE hspice
loc mike2 mosrect mux8 nagle nand opampal optrans pump rca reg0 rich3 ring ring11 schmitecl schmitfast schmitslow slowlatch todd3 toronto vreg 46.687 8.86* 5.797* 37.83 9.734* 17.22 6.531* 12.00 0.672* 1.28 2.250 1.08* 5.109 1.41* 7.500 6.17 0.016* .23 1.719 1.53 4.406* 37.22 35.610 (fails) 5.562* 10.33 2.360* 3.11 0.015* .16 8.297* 21.16 10.781* 23.84 0.156 .22 0.156 .22 5.031* 11.74 0.735* 2.16 10.64 21.39 29.14 11.91 1.53 2.45 4.50 3.14* 0.49 1.45* 28.78 4.67* 19.36 4.72 0.06 29.09 37.28 0.11* 0.06* 11.72 2.86
WINS:
30
10
- Arbitrary expressions
- Laplace - Look-up tables. Arbitrary capacitance: write an expression for the charge. Arbitrary inductor: write an expression for the flux. An original mixed-mode simulator -- not xspice based.
Mixed-Mode Simulator
Computationally lightweight Tight feedback between analog and digital circuitry - Implemented as a mix of intrinsic SPICE devices and ~30 optimizing HDL compilers. - Predictors aid timestep control.
Easy to program so that models for new products are usually quick to be generated.
SPICE Solver Initial Solution Guess V[0] = 0V I D Linearize 1mA 1mA G[n] I[n] I [G][V]=[I] Solve Matrix for Voltages 1mA G[n] I[n] V[n] D I Newton-Raphson Iteration V[n+1] D
Circuit Matrix
Nodal analysis: [G][V] = [I] G: Conductivity matrix V: Unknown voltage vector I: Known current vector Modified Nodal analysis: [ G 1] [v] = [I] [1 R ] [i] = [V] G: Conductivity matrix v: Unknown voltage vector i: Unknown current vector V: Known voltage vector I: Known current vector
Node count is more important than part count. Its best to avoid floating voltage sources
Copyright 2004, 2005 Linear Technology Corporation
VDMOS MOSFET
Normal Monolithic MOSFET (Used in ICs)
Drain
Source
Gate
Gate
Bulk(Substrate)
Drain-Source Current Path
Drain
If you use the worst inductor that works in simulation, you will have failures over service temperature and production scatter.
Copyright 2004, 2005 Linear Technology Corporation
Simulating Transformers
Multiple Windings
=
Common Pitfalls
Mirror & Rotate buttons greyed out Copy block from one schematic to another
Adding
rd 3
Party Models
RCL databases - standard.res - standard.cap - standard.ind - standard.bead Intrinsic Devices - standard.dio - standard.bjt - standard.mos - standard.jft Subcircuits - define on schematic - program symbol to automatically include the required library - explicitly .inc the model
Reporting a Bug
Make sure youre using the current version with Field sync.