Global & Detailed Routing

Routing :

The process of finding the geometric layouts of all the nets is called routing.
Given INPUT:

1.
2.

3.

4.

Netlist, Timing budget for nets, typically for critical nets only, Placement information including location of blocks, locations of pins on the block boundary as well as on top, location of I/O pins on the chip boundary as well as on top, RC delay per unit length on each metal layer, as well as RC delay for each type of via. The objective of the routing problem is dependent on the nature of the chip.

Routing :
One approach to the general routing problem is called Area Routing. This technique routes one net at a time considering all the routing regions. The traditional approach to routing, however, divides the routing into two phases: The first phase is called global routing and generates a loose route for each net. In fact it assigns a list of routing regions to each net without specifying the actual geometric layout of wires. The second phase, which is called detailed routing, finds the actual geometric layout of each net within the assigned routing regions.

Global Routing :

The global routing consists of three distinct phases; Region definition, Region assignment & Pin assignment. The first phase of global routing is to partition the entire routing space into routing regions. This includes spaces between blocks and above blocks. Between blocks there are two types of routing regions: channels and 2D-switchboxes. Above blocks, the entire routing space is available, however, we partition it into smaller regions called 3D-switchboxes. Each routing region has a capacity, which is the maximum number of nets that can pass through that region. The capacity of a region is a function of the design rules and dimensions of the routing regions and wires.

Global Routing :

A channel is a rectangular area bounded by two opposite sides by the blocks.

Capacity of a channel is a function of the number of layers (l), height (h) of the channel, wire width (w) & wire separation (s) i.e. capacity = l x h / w + s In a five layer process, only M1, M2 & M3 are used for channel routing. Channel may also have pins in the middle. The pins in the middle are actually used to make connections to nets routed in 3Dswitchboxes. A 2D-switchbox is a rectangular area bounded on all sides by blocks. It has pins on all four sides as well as pins in the middle.

Global Routing :

A 3D-switchbox is a rectangular area with pins on all six sides. The pins on the bottom are the pins which allow for connections to nets in channels, 2Dswitchboxes.

Global Routing :
The second phase of global routing can be called region assignment. The purpose of this phase to identify the sequence of regions through which a net will be routed. This phase must take into account the timing budget of each net and routing congestion of each routing region. After the region assignment, each net is assigned a pin on region boundaries. This phase of global routing is called pin assignment. The region boundaries can be between two channels, channel and 3D-switchbox, 2D-switchbox and a 3Dswitchbox among others. The pin assignment phase allows the regions to be somewhat independent.

Detailed Routing :

After global routing is complete, the output is pin locations for each net on the all the region boundaries it crosses. Using this information, we can extract the length of the net and estimate its delay. If some net fails to meet its timing budget, it needs to be ripped-up or global routing phase needs to be repeated. Detailed routing includes channel routing, 2D-switchbox and 3D-switchbox routing. Typically channels and 2Dswitchboxes should be routed first, since channels may expand. After channels and 2D-switchboxes have been routed, the pin locations for 3D-switchboxes are fixed. After detailed routing is completed, exact wire geometry can be extracted & used to compute RC delays. If some nets fail to meet their timing constraints, they need to be ripped-up.

Graph Models for Global Routing :

Grid Graph: Each cell is represented by a vertex. Two vertices are joined by an edge if the corresponding cells are adjacent to each other. The occupied cells are represented as filled circles, whereas the others are as clear circles.

Graph Models : Channel Intersection Graph

Channels are represented as edges. Channel intersections are represented as vertices. Edge weight represents channel capacity. Extended channel intersection graph: terminals are also represented as vertices.

Global routing in different design styles

Global routing in Full Custom:

The global routing problem formulation for full custom design style is similar to the general formulation of routing problem. The only difference is how capacity constraints guide the global routing solution. In the general formulation the edge capacities cannot be violated. In full custom, since channels can be expanded, some violation of capacity constraints is allowed. However, major violation of capacities which leads to significant changes in placement are not allowed. In such case, it may be necessary to carry out the placement again. Minimize the maximum wire length.

Global routing in Standard Cell:

In the standard cell design style, the location of each cell in a row is fixed. In addition, the capacity and location of each feedthrough is fixed. However, the channel heights are not fixed. Feedthroughs have predetermined capacity. The area of a standard cell layout is determined by the total cell row height and the total channel height. The total cell row height is fixed, the layout area could only be minimized by minimizing the total channel height. So, main objective of standard cell global routers is: - to minimize the total channel height. - to minimize the total wire length. - to minimize maximum wire length.

Global routing in Gate Array:

In gate array design style, the size and location of all cells and the routing channels and their capacities are fixed by the architecture. This is the key difference between gate array and other design styles. The primary objective of the global routing in gate arrays is to guarantee routability. The secondary objective may be to minimize the total wire length or to minimize the maximum wire length. If there is no feasible solution to a given instance of global routing problem, the netlist can not be routed. In this case, the placement phase has to be carried out again.

Classification of Global routing algorithms:

Sequential approach: Assigns priority to nets; routes one net at a time based on its priority. Concurrent approach: All nets are considered at the same time.

Maze routing:

Maze routing algorithms are used to find a path between a pair of points, called the source(s) and the target(t) respectively, in a planar rectangular grid graph. The areas available for routing are represented as unblocked vertices, whereas, the obstacles are represented as blocked vertices. The objective of a maze routing algorithm is to find a path between the source and the target vertex without using any blocked vertex. The process of finding a path begins with the exploration phase, in which several paths start at the source, and are expanded until one of them reaches the target. Once the target is reached, the vertices need to be retraced to the source to identify the path.

Lees Algorithm:

It is the most widely used algorithm for finding a path between any two vertices on a planar rectangular grid. Guarantee to find connection between 2 terminals if it exists. Guarantee minimum path. Requires large memory for dense layout Slow

Soukups Algorithm:

Lees algorithm explores the grid symmetrically, searching equally in the directions away from target as well as in the directions towards it. In Soukups algorithm, during each iteration, the algorithm explores in the direction toward the target without changing the direction until it reaches the target or an obstacle, otherwise it goes away from the target. If the target is reached, the exploration phase ends. If the target is not reached, the search is conducted iteratively. If the search goes away from the target, the algorithm simply changes the direction so that it goes towards the target and a new iteration begins.

Detailed routing:

The detailed routing problem is usually solved by routing one region at a time in a predefined order. A routing region may be channel, 2D-switchbox or a 3Dswitchbox. The routing area is first partitioned into smaller regions. Since, the global router only assigns wires to different regions, the detailed routing problem is to find the actual geometric path for each wire in a region. The complexity of the routing problems varies due to many factors including shape of the routing region, number of layers available, and number of nets. However, the shape of the region is perhaps the most important factor.

Order of routing regions & L-channels:

No conflicts in case of routing in the order of 1, 2, and 3. (b) No ordering is possible to avoid conflicts. (c) The situation of (b) can be resolved by using L-channels. (d) An L-channel can be decomposed into two channels and a switchbox.
(a)

Detailed routing considerations:

Number of terminals (two-terminal vs. multi-terminal nets) Net widths (power and ground vs. signal nets) Via restrictions (stacked vs. conventional vias) Boundary types (regular vs. irregular) Number of layers (two vs. three, more layers) Net types (critical vs non-critical nets)

Detailed routing models:

Grid-based model:
a rectilinear grid is super-imposed on the routing region Wires follow paths along the grid lines. A horizontal grid line is called a track and a vertical grid

line is called a column.

Gridless model:
Any model that does not follow this gridded approach.

Model for multi-layer routing:

unreserved layer model:

Any net segment is allowed to be placed in any layer

reserved layer model:

Certain type of segments are restricted to particular

layer(s) Two-layer: HV & VH Three Layer: HVH & VHV

Routing Layer Models

1. unreserved layer model 2. reserved layer model:
1 layer

VH model

HV model Layer 1 Layer 2 Layer 3 Via

2 layers

VHV model 3 layers

HVH model

Terminology for channel routing problems:

Horizontal constraint graph:

There is a horizontal constraint between two nets if the trunks of these two nets overlap each other when placed on the same track. For a net, Ni, the interval spanned by the net, denoted by, Ii, is defined by, (ri, li) where ri is the right most terminal of the net and li is the leftmost terminal of the net. Given a channel routing problem, a horizontal constraint graph (HCG) is a undirected graph Gh=(V,Eh) where v = {vi Ivi represents Ii corresponding to Ni}

Eh = {(vi, vj)I Ii and Ij have non-empty intersection}

Vertical constraint graph:

A net Ni, in a grid based model, has a vertical constraint with net Nj if there exists a column such that the top terminal of the column belongs to Ni and the bottom terminal belongs to Nj and i j.

Constraint Graphs
0 1 6 1 2 3 5 0 1 6 1 2 3 5
6 3 5 4 0 2 4 6 1 3 5 2 4

6 3 5 4 0 2 4 6 5 1 2 1 3 6 5

2 Vertical constraint graph

Horizontal constraint graph

Lower Bound on Channel Width

0 1 6 1 2 3 5 6 3 5 4 0 2 4 0 1 6 1 2 3 5

1 3
6 5

2 4

Channel density = Maximum local density

Local density 1 3 4 4 4 4 2 Lower bound = 4 Lower bound on channel width = Channel density

6 3 5 4 0 2 4

Basic left-edge algorithm:

No vertical constraint. HV-layer model is used. Doglegs are not allowed. Treat each net as an interval. Intervals are sorted according to their left-end xcoordinates. Intervals (nets) are routed one-by-one according to the order. For a net, tracks are scanned from top to bottom, and the first track that can accommodate the net is assigned to the net. Optimality: produces a routing solution with the minimum no. of tracks (if no vertical constraint).

Basic left-edge algorithm:

Basic left-edge algorithm example:

U= {I1, I2,, I6}, I1=[1,3], I2=[2,6], I3=[4,8], I4=[5,10], I5=[7,11], I6=[9,12] t=1: t=2:
Route I1: watermark=3; Route I3: watermark=8;

Route I2: watermark=6; Route I5: watermark=11;

Route I6: watermark=12;

t=3: Route I4

Left-edge Algorithm: Example

0 1 6 1 2 3 5 6 3 5 4 0 2 4

1. Sort by left end points.

0 1 6 1 2 3 5

2. Place nets greedily.

0 1 6 1 2 3 5 5 4 2

1 3

3 1

6 3 5 4 0 2 4

6 3 5 4 0 2 4