King Saud University

College of Engineering at Alkharj

Electrical Engineering Department

Digital Design Laboratory

CEN206

Term2
1429-1430 h

Experiment 6

MUX. & DEMUX.

1. Objectives :
In this experiment, you will construct and test two multiplexers :
-

The first is 4:1 multiplexer

The second is 8:1 multiplexer

2. Equipment Components needed:

-

Digital Lab trainer

Wires

IC chips (74151)

A- The 8:1 multiplexer (74151):

A-1 Presentation:
The 74151 is a multiplexer that selects binary information from one of 8 input lines and
directs it to a single output line, the circuit has a complemented output. The selection of a
particular input line is controlled by three of selection lines. A strobe control S acts as an
enable signal.
The block diagram of 74151 is shown in figure1

Vcc

GND

8 Data
Inputs
74151
MUX 8:1

2 Outputs

Strobe

3 Select Inputs
Figure 1 : Block diagram of IC type 74150

Experiment 6

MUX. & DEMUX.

A-2 Pin configuration

Figure2 : Connecting diagram (TOP VIEW)

A-3 Theory : Referring to figure 2 and to annex
A-3-1 Compete the following table:
Designation
Data Inputs
Select Inputs
Output
Complemented Output
Strobe
+VCC
Ground

Pin(s) number
. . . . . . . .
. . .
.
.
.
.
.

Table1 : Pins number and their designation for the 74151 IC

A-3-2 Write the Boolean expression of the output by using only data inputs and select inputs.

F1 = xyz + x'yz' + x'y'z' + xyz',

A-3-3 Let
Draw the circuit diagram of F1 (in figure 3) and fill table2.
Step1: Determine the state of each data input and the state of each select input.

Experiment 6

MUX. & DEMUX.

Step2: Draw the circuit and fill the table.

x

0
D0
D1
D2
D3 8:1
D4 MUX
D5
D6
D7
C B A

Figure3

x
0
1
1
0
1

y
1
1
1
0
0

z
0
0
1
1
1

B A D7

D6

Inputs
D5 D4 D3

D2

D1

D0

Output F1
Y

Table2
A-3-4 Let F2 = x'yzt + x'yz't' + x'y'zt + x'y'z't',
Draw the circuit diagram of F2 (in figure 4) and fill table3.
Step1: Determine the state of each data input and the state of each select input.

..

Experiment 6

MUX. & DEMUX.

Step2: Draw the circuit and fill the table.

0
D0
D1
D2
D3 8:1
D4 MUX
D5
D6
D7
C B A

Figure4

x
0
0
0
0
1

y z
0 0
0 1
1 0
1 1
0 1

t C B A D7
0
0
1
1
1

D6

Inputs
D5 D4 D3

D2

D1

D0

Output F1
Y

Table3

B - Practice Procedures:
Step1: Place the 74151 in the Breadboard.
Step2: Connect Pin8 (GND) to 0V and Pin16 (Vcc) to +5V.
Step3: Implementation of F1 :
According to circuit obtained in figure3, implement the function F1.
Test the circuit and fill table4.

Experiment 6

x
0
0
0
0
1
1
1
1

y
0
0
1
1
0
0
1
1

MUX. & DEMUX.

z
0
1
0
1
0
1
0
1

B A D7

D6

Inputs
D5 D4 D3

D2

D1

D0

Output F1
Y

Table4
Step4: Implementation of F2 :
According to circuit obtained in figure4, implement the function F2.
Test the circuit and fill table5.
x
0
1
1
0
1
1

y z
1 0
1 0
1 1
0 1
0 1
1 1

t C B A D7
0
1
1
0
0
1

D6

Inputs
D5 D4 D3

D2

D1

D0

Output F2
Y

Table5

B- The 1:8 demultiplexer

The logic symbol of a demultiplexer is shown in figure5

Y0
D

DEMUX

Y1
Y2
Y3

S 1 S0
Figure5

B1: Choice the correct answer.

The demultiplexer of figure5 is a :
4 to 1 demultiplexer
1 to 4 demultiplexer
3 to 4 demultiplexer
4:1 demultiplexer
Table6
6

Experiment 6

MUX. & DEMUX.

B2 : Express the Boolean function of each output

Y0=

Y1= Y2= Y3=

B3 : Complete the following truth table

S1

So

0
0
1
1
0
0
1
1

0
1
0
1
0
1
0
1

0
0
0
0
1
1
1
1

Y0

Y1

Y2

Y3

Table7

Experiment 6

MUX. & DEMUX.

Annex

Experiment 6

MUX. & DEMUX.

Experiment 6

MUX. & DEMUX.

10