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frequency_counter.vhd
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-- Reference design - Frequency counter for Spartan-3E Starter Kit (Rev.C).
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-- Ken Chapman - Xilinx Ltd - 7th March 2006
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-- *** This design contains an evaluation test feature of the DCM. ****
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-- *** Before this design can be processed a special environment
****
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-- *** needs to be set or the 'dcm_fixed_osc' module removed.
****
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-- *** Please read the notes provided in 'dcm_fixed_osc.vhd' for
****
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-- *** details of this special requirement.
****
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-- Provides a frequency counter with resolution of 1Hz up to a maximum frequency of
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-- approximately 200MHz (limited by maximum clock rate of design).
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-- The 50MHz on board oscillator is used to provide a 1 second time base and therefore
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-- defines the accuracy of the measurement. If the frequency of the 50MHz oscillator can
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-- be determined using a calibrated frequency counter or frequency generator then this
design
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-- could be tuned to match the particular board.
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-- Slide switches SW0, SW1, SW2 and SW3 allow selection of the input signal or one of thr
test
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-- signals. Only one switch should be selected and the LCD display will guide and confirm
the
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-- selection process.
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-- SW0 selects SMA connector (J17) as the input signal to be analysed.
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-- SW1 selects the 50MHz oscillator as a test signal and must yield a perfect result sinc
it is
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-also the definition of the measurement time base..
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-- SW2 selects a signal of approximately 145MHz which is generated by one of the DCMs
operating
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-in a special test oscillator mode.
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-- SW3 selects a ring oscillator implement using a combinatorial loop in the CLB fabric.
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-- LED indicate measurements in progress (1 second alternate flashing of 4 LEDs).
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-- PicoBlaze performs calculations and conversions as well as driving the LCD display.
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-- NOTICE:
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-- Copyright Xilinx, Inc. 2006.
This code may be contain portions patented by other
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-- third parties. By providing this core as one possible implementation of a standard,
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-- Xilinx is making no representation that the provided implementation of this standard
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-- is free from any claims of infringement by any third party. Xilinx expressly
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-- disclaims any warranty with respect to the adequacy of the implementation, including
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-- but not limited to any warranty or representation that the implementation is free
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-- from claims of any third party. Furthermore, Xilinx is providing this core as a
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-- courtesy to you and suggests that you contact all third parties to obtain the
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-- necessary rights to use this implementation.
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-- Library declarations
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-- Standard IEEE libraries
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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