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N-channel 200V - 0.15 - 15A - TO-220 - D2PAK MESH OVERLAY Power MOSFET
General features
Type STB19N20 STP19N20
ID 15A 15A
3
DPAK
Description
This Power MOSFET is designed using the companys consolidated strip layout-based MESH OVERLAY process. This technology matches and improves the performances compared with standard parts from various sources.
Applications
Switching application
Order codes
Part number STB19N20 STP19N20 Marking B19N20 P19N20 Package DPAK TO-220 Packaging Tape & reel Tube
October 2006
Rev 1
1/14
www.st.com 14
Contents
STB19N20 - STP19N20
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) ............................. 5
3 4 5 6
Test circuit
................................................ 8
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Electrical ratings
Electrical ratings
Table 1.
Symbol VDS VGS ID ID IDM
(1)
Peak diode recovery voltage slope Operating junction temperature Storage temperature
1. Pulse width limited by safe operating area 2. ISD 15A, di/dt 300A/s, VDD =80%V(BR)DSS
Table 2.
Symbol Rthj-case Rthj-a Tl
Thermal data
Parameter Thermal resistance junction-case max Thermal resistance junction-ambient max Maximum lead temperature for soldering purpose Value 1.38 62.5 300 Unit C/W C/W C
Table 3.
Symbol IAR EAS
Avalanche data
Parameter Avalanche curent, repetitive or not-repetitive (pulse width limited by Tj Max) Single pulse avalanche energy (starting Tj=25C, Id=Iar, Vdd=50V) Value 15 110 Unit A mJ
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3/14
Electrical characteristics
STB19N20 - STP19N20
Electrical characteristics
(TCASE=25C unless otherwise specified) Table 4.
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On/off states
Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Gate threshold voltage Static drain-source on resistance Test conditions ID = 1mA, VGS= 0 VDS = Max rating, VDS = Max rating @125C VGS = 20V VDS= VGS, ID = 250A VGS= 10V, ID= 7.5A 2 3 0.15 Min. 200 1 10
100
Typ.
Max.
Unit V A A nA V
4 0.16
Table 5.
Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS =8V, ID = 7.5A VDS =25V, f=1 MHz, VGS=0 VDD=160V, ID = 15A VGS =10V (see Figure 14) Min. Typ. 12 800 165 26 24 4.4 11.6 Max. Unit S pF pF pF nC nC nC
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Electrical characteristics
Table 6.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time Test conditions VDD=100 V, ID= 7.5A, RG=4.7, VGS=10V (see Figure 13) VDD = 100 V, ID = 7.5A, RG = 4.7, VGS = 10V (see Figure 13) Min. Typ. 11.5 22 Max. Unit ns ns
19 11
ns ns
Table 7.
Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM trr Qrr IRRM
1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300s, duty cycle 1.5%
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Electrical characteristics
STB19N20 - STP19N20
2.1
Figure 1.
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Figure 6.
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Figure 9.
Rev 1
7/14
Test circuit
STB19N20 - STP19N20
Test circuit
Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit
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P
Q
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Rev 1
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STB19N20 - STP19N20
* on sales type
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STB19N20 - STP19N20
Revision history
Revision history
Table 8.
Date 06-Oct-2006
Revision history
Revision 1 First Release Changes
Rev 1
13/14
STB19N20 - STP19N20
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