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A565 Specifications
A565 Specifications A565 System Specification Advanced Analog Pin Unit Advanced Time Measurement Subsystem Breakdown Voltage Current Source DC Reference Source DC Subsystem Handler/Prober Control Interface High Current Current Source High Current Unit High Current Voltage Source High Frequency Digitizer High Power Matrix High Power V/I Source High Speed Digital Instrumentation High Speed Sampler High Voltage Ammeter High Voltage Digital Card (HVDC) IF Modulated Source LA302 System Frequency Reference Low Current Ammeter Low Frequency AC 100 Digitizer Low Frequency AC 100 Source Microwave Source Octal V/I Source Power AL Disconnect Card Power V/I Source

June 1999

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Precision Low Frequency Digitizer Precision Low Frequency Source Precision Multimeter Pulse Driver Quad Opamp Channel Card Serial Bus Channel Card Stored Data Performance Bits Superclock Synchronized Power Subsystem Base THADS24 Channel Card Universal Backplane V/I Source Universal Backplane 100 V V/I Source VHF Arbitrary Waveform Generator VHF Arbitrary Waveform Generator, 1 Meg VHF Arbitrary Waveform Generator 400 VHF Arbitrary Waveform Generator 400 Differential VHF Continuous Wave Source VHF Measure Module

June 1999

Version 6.4

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Specs
Notes: 1.

A565 System Specification

This specification is the MASTER reference specification for the A565 Analog VLSI Test system. It contains the specifications that define the proper conditions for the system instrumentation specifications. The information in this document supersedes any similar information in earlier dated individual instrument ESSD's, or other Teradyne documentation.

2.

Specifications assume no unusual environmental conditions, e.g.: rapid rate of temperature change, thermal gradients, drafts. Specifications are checked by Teradyne supplied procedures. Other methods may yield different results. All specifications subject to change without notice. NOMINAL values refer to calculated values for specified quantities without incorporating variations due to tolerances. Nominal values are supplied as guidelines and are not guaranteed. TYPICAL values refer to measured values for specified quantities which have been determined based upon a limited sample of systems. Typical values are supplied as guidelines and are not guaranteed. This is the period of time that System power must be continuously applied before Instrumentation Auto-Calibration is performed in order for Instrumentation to be guaranteed to meet specification. System power must be continuously applied during this period, and all system covers must be properly in place and closed.

3.

4. 5.

6.

7.

8.

Inrush current value applies for one half line cycle, decreasing in amplitude to Steady State Line Current Value within 10 cycles. Power Supply should be set for the 'Nominal Voltage', but is allowed to be within the indicated 'Limits'. "Ripple & Noise" (PARD) is the combination of AC ripple & power supply switching noise. See the applicable note to determine where this parameter should be measured. "Current" indicates the maximum available current for the particular supply, and is used as reference only. No measurements are done. "Power Supply Reference" refers to location and/or power supply reference number.

9.

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A565 System Specification

10.

Voltage measurements for this supply are made at the Sense pins on the Power Supply molex connector. Pin 1 is +, pin 4 is -. Ripple & Noise measurements are made at the Force pins (studs). Use a differential scope w/ two X10 probes. Scope should be bandwidth limited to 20MHz. CONSULT THE A565 SERVICE MANUAL FOR A DETAILED EXPLANATION ON HOW TO MEASURE NOISE & RIPPLE. This supply should be measured at the PACS backplane terminals. (+) at J14, and (-) at Power Ground Stud. These voltages and noise measurements are made at the Analog DC Distribution Bus located on the right side(Operator) of the cabinet. Power Supply should be set for the "Nominal Voltage", but is allowed to be within the indicated "Limits". "Ripple & Noise" (PARD) is the combination of AC ripple & power supply switching noise. These parameters are measured at the Analog backplane in the test head, at Slot 22 on the indicated pin numbers. First number is the ground reference. (Note these measurements can be made at ANY Analog Channel card slot for those configurations that have a Channel Card located in Slot 22) "Current" indicates the maximum available current for the particular supply, and is used as reference only. No measurements are done. "Power Supply Reference" refers to location and/or power supply reference number. SWPS2; Mainframe Base Switcher Power Supply output: +5v, is shared between BOTH the Mainfame Bus and BOTH PATH II Analog sections. This voltage is adjusted inside the mainframe at that listed setting. PS4,7-9; Mainframe Base Linear +/-30, +/-75v, are shared between the Mainframe Analog DC Distribution Bus and BOTH PATHII Analog sections. These voltages are adjusted inside the mainframe at those listed settings.

11.

12.

13.

14.

15.

This power supply output is programmed by the SFO board. The manual adjustment is complex, refer to the service documentation for complete details. The voltages shown here reflect the supply output when the SFO board is in the cleared state. Test head User power is shared from the Analog Power Supplies located on the Base Linear Power Tray. The outputs to the test head are fused and relay switched by software control. The specifications listed in this table refer to the nominal voltage available at the DIB and the MAXIMUM current allowed in order to maintain a +/-5% voltage tolerance. Voltages are measured at the DIB, ground ref is 'User Power Ground'. Digital Test head power supplies: SWPS3 refers to TH#1, SWPS4 to TH #2. SWPS5-7; Mainframe HSD25 Power Supply outputs: -2, +5v and -5.2v, are shared between BOTH the Mainfame Digital Busbar and BOTH PATH II HSD25 sections. These voltages are adjusted inside the mainframe at those listed settings.

16.

17. 18.

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A565 System Specification

SWPS5; +15v,is shared between the Mainfame and PATHII HSD25 slots. This voltage is adjusted inside the mainframe at those listed settings. SWPS6: +6v output is shared between BOTH PATHII DTH Sections. This output is kelvined at the supply and is adjusted to those settings listed in the Mainframe HSD25 section. 19. This output remains unused at this time, with future use committed to the DSIO cage. THADS is an acronym for the Test Head Analog Distribution System, a coaxial connection network which is local to the test head. This Specification gives typical characterization data for the INTERNAL distribution network only, from one Channel Card slot to another. It does NOT include the effects of Channel Cards, or Config Board, Isopin, or DIB wiring. Instrument specifications for the A565 system, with a PATH II test head apply at the end of cable assemblies, either Teradyne or customer supplied. MAXIMUM LENGTH OF THESE CABLES ARE 1 meter (39 inches) long, except for the Handler/Prober communications interface. The Handler/Prober interface specifications apply at the end of up to 12 feet (3.6 meters) of cable. These cable assemblies must be fabricated using wire types listed below: DC Subsystem: - Matrix pins: 50 ohm miniature coax (30 AWG) [Sense (shld), Force (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. - DUT Source: 100 ohm Shielded Twisted Pair (STP) (30 AWG) [F & S (center conductors), Guard (shield)] Analog Pin Unit: High Current Unit: Power V/I: - Force lines: - Sense lines: Same as Matrix pins Same as DUT Source

20.

21.

#14 awg #20 awg

w/600v insulation (UL 1015) w/600v insulation (UL 1015)

HSD25: - 50 ohm precision coax cable. Gore p/n DXSN 1456 or equivalent: 26 AWG center conductor w/ expanded teflon dielectric 50 ohm +/1 ohm characteristic impedance Time delay 1.23 ns/ft nominal Capacitance 27 pf/ft max Advanced Time Measurement Subsystem: - 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)]

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A565 System Specification High Frequency Digitizer: shielded) 50 Ohm coax, RD316 or equivalent (Double

Precision Low Frequency Source / Low Frequency AC Source: - PLFS / LFAC S HI: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & HI (center conductors), Shield (shld)] - PLFS / LFAC S LO: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & LO (center conductors), Shield (shld)] - KELVIN LO: 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. Precision Low Frequency Digitizer / Low Frequency AC Digitizer: - PLFD / LFAC D HI: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & HI (center conductors), Shield (shld)] - PLFD / LFAC D LO: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & LO (center conductors), Shield (shld)] - KELVIN LO: 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. Precision Multimeter: - 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. Reference Source: - REFSRC HI: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & HI (center conductors), Shield (shld)] - REFSRC LO: 100 ohm Shielded Twisted Pair (30 AWG) [AC DGS & LO (center conductors), Shield (shld)] - KELVIN LO: 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. High Frequency Sampler: - 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Stored Data Performance Bits: Ultra High Frequency Source: TBD Very High Frequency Arbitrary Waveform Generator: - 50 ohm coax, RG223 or equivalent (Double shielded) Very High Frequency Continuous Wave Source: - 50 ohm coax, RG223 or equivalent (Double shielded) Serial Bus Channel Card: - 100 ohm miniature coax cable. 33 AWG center/drain conductors 100 ohm +/- 10 ohm characteristic impedance Nominal capacitance: 12 pf/ft Propagation delay: 1.20 ns/ft +/- 0.03 ns/ft Vp (nominal) 85% #24 gauge wire

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A565 System Specification Test Head User Power: #24 gauge wire

Miscellaneous Signals: - 50 ohm miniature coax (30 AWG) [Shield (shld), Signal (cntr)] Coax dielectric must NOT be PVC. Teflon or similar material is required for proper leakage performance. Used on the following signals: User Clock DGS - #24 AWG wire used on the following signals: TIP Config ID D0 User Alarm Config ID +5V Safety* Config ID3 CE Config ID SK Config ID4 CE Config ID DI

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A565 System Specification 1 1.1 OPERATING ENVIROMENT Ambient Temperature: 20 deg C to 30 deg C (68 deg F to 86 deg F) [Note 2]

1.2 1.3 1.4

Relative Humidity: System Warm-Up Period:

40% to 60% non-condensing [Note 2] Thirty minutes Minimum [Note 7]

Air Conditioning Requirement:

47,782 BTU/hourm maximum at system's maximum Configured power consumption of 20 kVA. 59,728 BTU/hour maximum at system's maximum rated power consumption of 25 kVA.

2 2.1 2.2 2.2.1 2.2.2 2.2.3 2.3 2.3.1 2.3.2 2.4 2.4.1 2.5

AC POWER Input Power Configuration 3 phase/4 wire Delta

System Power Consumption Maximum System Consumption 25 kVA Maximum Maximum System Configuration 20 kVA Maximum Typical System Configuration 16 - 20 kVA Line Voltage Line Voltage Ranges Line Voltage Variation

190,200,208,240,380,400,416,480 VAC +/-5% Maximum

Line Frequency 50 or 60 Hz Line Frequency Variation +/-2 Hz Inrush Line Current 10X steady state line current [Note 8]

3 3.1

A565 DC POWER SUPPLY SPECIFICATIONS Base System Power (supplies located on Linear Power Tray, EXCEPT SWPS2) [Note 9] Nominal Voltage & Limits --------------- 2.10 V +/-50 mV - 5.25 V +/-50 mV + 5.15 V +/-50 mv +12.00 V +/-100 mV +12.00 V +/-100 mV +15.00 V +/-50mV -15.00 V +/-50 mV

Ripple/ Noise -------200 mV p-p 200 mV p-p 200 mV p-p 150 mV p-p 150 mv p-p 150 mV p-p 150 mV p-p

NOTE ---10 10 10 12 12 12 12

Current ------150 A 60 A 150 A 10 A 10 A 14.7 A 14.7 A

Power Supply Reference ------------SWPS2

PS5 PS6 PS10 PS11

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A565 System Specification +30.00 V +/-25 mV -30.00 V +/-25 mV +40.00 V +/-50 mv -40.00 V +/-50 mv +75.10 V +/-75 mV -75.10 V +/-75 mV 3.2 200 mV p-p 200 mV p-p 150 mV p-p 150 mV p-p 150 mV p-p 150 mV p-p 12 12 12 12 12 12 3.3 A 3.3 A 6 A 6 A 1.2 A 1.2 A PS4 PS9 PS1 PS2 PS7 PS8

HSD-25 Power *Optional (Supplies located below Digital Option Card Cage) [Note 9] Nominal Voltage & Limits --------------+5.05 V +/-50 mV +15.05 V +/-50 mV -15.05 V +/-50 mV -5.25 V +/-50 mV -2.05 V +/-50 mV +6.05 V +/-50 mV - 5.25 V +/-50 mV

Ripple/ Noise -------200 mV p-p 200 mV p-p 200 mV p-p 200 mV p-p 200 mV p-p 200 mV p-p 200 mV p-p

NOTE ---10 10 10 10,19 10 10 10

Current ------150 A 52 A 16 A 150 A 150 A 60 A 400 A

Power Supply Reference ------------SWPS5

SWPS6

SWPS7

3.3

PACS Power *Optional(SWPS1 located in PS Column Switcher Side, PS3 located in Base Linear Power Tray.) [Note 9] Nominal Voltage Ripple/ Power Supply & Limits Noise NOTE Current Reference -------------------------------------------5.25 V +/-50 mV 200 mV p-p 10 250 A SWPS1 +5.05 V +/-50 mv 200 mV p-p 10 150 A +6.05 V +/-50 mV 150 mV p-p 11 5 A PS3

3.4 3.4.1

Test Head Power Analog Channel Cards (Supplies located on Test head Power Tray) (*Shared Supplies located on Base Power Tray, *SEE NOTE 14) [Note 13] Nominal Voltage Ripple/ Slot 22/ Power Supply & Limits Noise Pin No. Current Reference ---------------------------------------------5.25 V +0mv/-25mv 150mV p-p 50C/49C 20A PS4 +5.15 V +50mV/-80mv +6.00 V +50mv/-0mv +15.00 V +50mv/-0mv 200mV p-p 100mV p-p 100mV p-p 48C/47C 48C/47C 44C/43C n/a 7.5A 4.5A *SWPS2 PS1 PS2

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A565 System Specification -15.00V +30.10V -30.10V +75.10V -75.10V 3.4.2 +0mv/-50mv +25mv/-55mv +55mv/-25mv +75mv/-100mv +100mv/-75mv 100mV p-p 200mV p-p 200mV p-p 150mV p-p 150mV p-p 44C/42C 48C/46C 48C/45C 44C/40C 44C/39C 4.5A PS3 *PS4 *PS9 *PS7 *PS8

Digital Channel Cards (Supplies located in Switcher Power Supply Column, *Shared Supplies are located below Digital Option Card Cage [Note 9] Nominal Voltage Ripple/ Power Supply & Limits Noise NOTE Current Reference ------------------------------------------+10.10V +/- 50mV 200mV p-p 15,17 60A SWPS3/4 - 5.30V +/- 50mV 200mV p-p 15,17 60A -10.05V +/- 50mV 200mV p-p 10 15A + 6.05V - 2.05V - 5.25V + 5.05V +15.15V +50mV/-80mV +80mV/-50mV +80mV/-50mV +50mV/-80mV +50mV/-80mV 200mV p-p 200mV p-p 200mV p-p 200mV p-p 200mV p-p 18 18 18 18 18 *SWPS6 *SWPS6 *SWPS7 *SWPS5 *SWPS5

3.5

Test Head User Power [Note 16] Nominal Voltage --------------+ 5.15 V - 5.25 V +12.00 V +15.05 V -15.05 V +30.05 V -30.05 V Maximum Current --------------1 A 1 A 1 A 1 A 1 A 0.5 A 0.5 A

3.6

Handler/Prober Interface Power (Parallel I/F Connectors J11-J14) Nominal Voltage --------------+ 5.15 V +12.00 V Maximum Current (per connector) --------------100 mA 50 mA

4.0

THADS Internal Bus Specifications [Note 20] These specifications apply for connection of any Analog Channel Card slot to any other Analog Channel Card slot. THESE SPECIFICATIONS INCLUDE ONLY THE EFFECTS OF THE THADS SYSTEM.

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A565 System Specification THEY ARE MEASURED FROM ONE CHANNEL CARD SLOT TO ANOTHER, AND DO NOT INCLUDE THE EFFECTS OF CHANNEL CARDS, CONFIG BOARDS, OR DIB WIRING. These specifications are typical only. Insertion loss and cross talk are specified for a 50 ohm environment. CAPACITANCE <200 pF (typical) For THAD-A or THAD-B INSERTION LOSS LOSS FREQUENCY (Minimum) 1 dB 10 MHz (typical) 2 dB 15 MHz (typical) 3 dB 20 MHz (typical) 10 dB 40 MHz (typical) For THAD-A or THAD-B CROSSTALK TO QUIET CHANNEL FREQUENCY CROSSTALK 1 kHz -110 dB (typical) 10 kHz -90 dB (typical) 100 kHz -70 dB (typical) 1 MHz -50 dB (typical) 10 MHz -30 dB (typical) For THAD-A (driven) to THAD-B; or from THAD-B (driven) to THAD-A

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Specs
NOTES: NOTE1 NOTE2

Advanced Analog Pin Unit

All of accuracy is defined by software calibration. All specs apply with the measurement filter on and average 10 times. All of accuracy is defined by software calibration. Resolution and Accuracy are defined by 14-bits Standard Voltmeter.

0.

AAPU FEATURES

0.1 CUSTOMER FEATURES 0.1.1 0.1.2 4 Quadrant operation at full square (+/-30 V, +/-30 mA) 3 Modes available V-FORCE/I-MEASURE mode I-FORCE/V-MEASURE mode Voltage Measure mode (High-Z mode) Programmable Clamp Voltage-Clamp (I-FORCE/V-MEASURE mode) Current-Clamp (V-FORCE/I-MEASURE mode) 4 AAPU V/I Source and Measurement per board Device Ground Sense (DGS) compensation for accuracy Two alarm types: Overload Alarm Guard Alarm Independent control Force/Sense and Guard output relays Solid-state Ranging for V and I ranges Force and Sense connection via two Diodes(1.2 V Clamp) Gate control by Trigger bus Independent Clear for each AAPU Automatic calibration every 4 hours Gate on/off control

0.1.3

0.1.4 0.1.5 0.1.6

0.1.7 0.1.8 0.1.9 0.1.10 0.1.11 0.1.12 0.1.13

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Advanced Analog Pin Unit 1. AAPU Specifications 1.1 1.1.1 Voltage Forcing (Note1) Range Resolution (14 bits) 2V 0.25 mV 5V 0.625 mV 10V 1.25 mV 30V 3.75 mV Maximum Forcing Voltage Maximum Allowable Voltage Voltage Measuring (Note2) Range Resolution (14 bits) 2V 0.25 mV 5V 0.625 mV 10V 1.25 mV 30V 3.75 mV Maximum measurable voltage Current Forcing (NOTE1) Range Resolution (14 bits) 200uA 25 nA 1mA 0.125 nA 5mA 0.625 nA 30mA 3.75 nA

Accuracy +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-30 V +/-60 V + + + + 1.5 mV) 3.0 mV) 6.0 mV) 18 mV)

1.1.2 1.1.3 1.2 1.2.1

Accuracy +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-30 V + + + + 1.5 mV) 3.0 mV) 6.0 mV) 18 mV)

1.2.2 1.3 1.3.1

Accuracy +/-(0.1% + 0.25 uA + 1 nA/V) +/-(0.1% + 0.8 uA) +/-(0.1% + 4.0 uA) +/-(0.1% + 24 uA) Matrix leakage included +/-30 mA

1.3.2 1.4 1.4.1

Maximum Forcing Current Current Measuring (NOTE2) Range Resolution (14 bits) 2uA 10uA 50uA 200uA 1mA 5mA 30mA 0.25 1.25 6.25 25 125 625 3.75 nA nA nA nA nA nA uA

Accuracy

+/-(0.5% + 110 nA + 1 nA/V) +/-(0.2% + 120 nA + 1 nA/V) +/-(0.2% + 200 nA + 1 nA/V) +/-(0.1% + 0.3 uA + 1 nA/V) +/-(0.1% + 1.0 uA) +/-(0.1% + 5.0 uA) +/-(0.1% + 30 uA) Matrix leakage included +/-30 mA

1.4.2 1.5 1.5.1

Maximum measurable current

Voltage Measure mode (High-Z mode) (NOTE2) Range Resolution Accuracy (14 bits) 2V 0.25 mV +/-(0.1% + 1.5 mV) 5V 0.625 mV +/-(0.1% + 3.0 mV) 10V 1.25 mV +/-(0.1% + 6.0 mV) 30V 3.75 mV +/-(0.1% + 18 mV)

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Advanced Analog Pin Unit

1.5.2 1.5.3 1.6 1.6.1

Maximum measurable voltage Output impedance Programmable Clamp Voltage Clamp Range Resolution (8 bits) 2V 8 mV 5V 20 mV 10V 40 mV 30V 120 mV Current Clamp Range Resolution (8 bits) 2uA --10uA 40 nA 50uA 0.2 uA 200uA 0.8 uA 1 mA 4 uA 5 mA 20 uA 30 mA 120 uA

+/-30 V >10 MOHM

Accuracy +7%,-0% +7%,-0% +7%,-0% +7%,-0% of of of of Range Range Range Range full full full full scale scale scale scale (Nominal) (Nominal) (Nominal) (Nominal)

1.6.2

Accuracy Not supported +7%,-0% of Range +7%,-0% of Range +7%,-0% of Range +7%,-0% of Range +7%,-0% of Range +7%,-0% of Range

full full full full full full

scale scale scale scale scale scale

(Nominal) (Nominal) (Nominal) (Nominal) (Nominal) (Nominal)

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Specs
Notes: Note A Note 1

Advanced Time Measurement Subsystem

Specification supported after TMS autocalibration. The accuracy of a time measurement is a function of many sources of error. These errors are characteristics of the TMS timer, input channel selected, and input signal. They are listed (see referenced specifications for individual parameter values): TMS Base Timer Specifications: RESL = Resolution = quantization error TBE = Time Base Error = Gain error TJTTR = Timer Jitter = Random error Front End PLE FJTTR TLE En

(1.1.2) (1.1.3) (1.1.4)

Specifications: = Time meas. offset (skew) = PLE (start) + PLE (stop) = Front End Jitter = Random error = Trigger level error at selected input = Gain error = Analog noise voltage at the front end = Random error

Absolute uncertainty calculations need to combine each source of gain, offset, random, and quantization error for the measurement. In many cases, some error terms cancel or are negligible. For example: the 10 ps resolution spec is always negligible; the 1 ppm Time Base Error does not add significant error to short time measurements; and trigger level errors will cancel in a period type measurement. Please see the TMS section and appendix of the user's manual for a complete discussion of determining time measurement accuracy. Note 2 Precounter must be counting events on the start channel to maintain precounter accuracy. Similarly, the postcounter must be counting events on the stop channel for its accuracy specification to hold. See the TMS section of the user's manual for TMS applications which will reduce counter uncertainty to zero. This is a worst case specification which applies to free-running, asynchronous input signals. Counter will perform to +/-0 counts for gated or synchronized signals.

Note 5

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Advanced Time Measurement Subsystem I - ADVANCED TMS BASE SPECIFICATIONS 0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.1.6 0.2 0.2.1 0.2.2 0.2.3 0.3 0.3.1 0.3.2 0.3.3 0.3.4 0.3.5 0.3.6 0.4 0.4.1 0.4.2 0.4.3 0.4.4 0.4.5 0.5 0.5.1 0.5.2 0.5.3 0.5.4 0.5.5 0.5.6 0.5.7 0.5.8 0.5.9 0.6 0.7 0.7.1 0.7.2 TMS Base Features TMS Input Selection -Advanced Test Head 2 TMS (TFE) Channels -standard 2 additional TFE Channels -optional Analog Channels with THADS access -optional Trigger Bus Access -optional HSDS Channels (vol or voh receivers) -optional HSD Channels (vol or voh receivers) -optional Independent Start, Stop, Enable Event/Slope Selection Start-Stop on same channel Start-Stop on different channels Independent Start, Stop, Enable Slope Selection Start Enable (Start holdoff) control Precount Events on START, STOP, or ENABLE channel Precount Time (after TMS ARM'ing) Precount Time after an Event on START, STOP, or ENABLE channel Direct Start Enable computer control Start Enable Gate (ENABLE channel) Independent Start Enable Event Slope Selection Stop Enable (Stop holdoff) control Stop-After-Start interlock Postcount Events on START, STOP, or ENABLE (after Start) Postcount Time (after Start) Direct Stop Enable computer control Stop Enable Gate (ENABLE channel) TMS Timer/Counter Modes Period Mode Frequency Mode Duty Cycle Mode Risetime Mode Pulsewidth Mode Propagation Delay Mode Event Count Mode Ratio Count Mode Time Interval Mode (a general purpose timer/counter mode) Time Measurement RAM -available in all modes Timer Operation Control (Available in all modes except Duty Cycle) High Resolution (20 us interpolation - Not in Duty Cycle mode) High Speed (real time measurement)

1. 1.1 1.1.1 1.1.1.1 1.1.1.2

TMS Base Timer/Counter Functions Timer - Time Measurement Range Direct TMS Measurement Computer Extension

+/-250 ms +/-no limit

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Advanced Time Measurement Subsystem 1.1.2 1.1.2.1 1.1.2.2 1.1.3 1.1.4 1.1.4.1 1.1.4.2 1.1.5 Resolution High Resolution timer 8 ps, Nominal High Speed timer 8 ns, Nominal Time Base Error (Note A) see LA302 specifications Timer Jitter (Note A) Jitter (pk-pk) <500 ps Jitter (rms) <100 ps Accuracy Relationship +/-[Resolution + TBE*Time + Jitter] (Total measurement uncertainty also includes time channel errors. See also time channel specifications and Note 1.) Counter - Event Count Range Direct TMS count Computer Extension Resolution Accuracy (Note 5) Maximum Count Rate Start Enable Precounter (Note 2) Range Resolution Accuracy Window of Uncertainty Maximum Count Rate Pre Timer Range Resolution Accuracy Stop Enable Postcounter (Note 2) Range Resolution Accuracy Maximum Count Rate Post Timer Range Resolution Accuracy Multiple Measurement Memory Range All modes except duty cycle Duty cycle mode Resolution Minimum Cycle Time High resolution mode High speed mode

1.2 1.2.1 1.2.1.1 1.2.1.2 1.2.2 1.2.3 1.2.4 1.3 1.3.1 1.3.1.1 1.3.1.2 1.3.1.3 1.3.1.4 1.3.1.5 1.3.2 1.3.2.1 1.3.2.2 1.3.2.3 1.4 1.4.1 1.4.1.1 1.4.1.2 1.4.1.3 1.4.1.4 1.4.2 1.4.2.1 1.4.2.2 1.4.2.3 1.5 1.5.1 1.5.1.1 1.5.1.2 1.5.2 1.5.3 1.5.3.1 1.5.3.2

0 to 16777215 0 to no limit 1 count +/-1 count 100 MHz

0 to 16777215 counts 1 count +/-1 count +/-8 ns 100 MHz 0 to 134 ms 8 ns +/-10 ns

0 to 16777215 counts 1 count +/-0 counts 100 MHz 0 to 134 ms 8 ns +/-10 ns

2 to 1024 measurements 2 to 512 measurements Integer <20 us <400 ns

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Advanced Time Measurement Subsystem 2. 2.0 2.0.1 Time Front End (TFE) Channel Input

TFE Features Time Channel Accuracy Relationship (Note 1) +/-[PLE + SQRT[Jitter^2 + (En/Slew)^2] + TLE/Slew] 2.0.2 THADS Bus Access - see analog instrument specifications 2.0.3 Selectable Hysteresis levels Low Hyst High Hyst 2.0.3.1 Standard Linear Stations, Advanced Linear Stations, and Advanced Mixed-Signal Stations have selectable hysteresis levels Low Hyst. High Hyst. 2.0.3.1.1 +/-6 V range 6 mV 100 mV 2.0.3.1.2 +/-30 V range 30 mV 500 mV 2.0.3.1.3 +/-200 V range 300 mV 5 V 2.0.3.2 Catalyst Stations have selectable hysteresis levels (specified levels are typical) Low Hyst. High Hyst. 2.0.3.2.1 +/-6 V range 6 mV 10 mV 2.0.3.2.2 +/-30 V range 30 mV 50 mV 2.0.3.2.3 +/-200 V range 300 mV 500 mV 2.0.4 Selectable Input Impedance 50 Ohm and 1 Mohm 2.1 2.1.1 2.1.2 TFE Path Length Error (Note A) +/-250 ps Prior to autocal release (V5.0) +/-5.0 ns, Typical Catalyst test head using +/-500 ps A5 DIB Adapter Front End Jitter negligible

2.2 2.3 2.3.1 2.3.2 2.3.3 2.3.4 2.3.5

Input Capacitance Advanced Linear Stations <150 Advanced Mixed Signal Stations <150 Production Analog Test Head <300 using LA683-00 Configuration Board Catalyst Test Head <200 Catalyst Test Head using <250 A5 DIB Adapter

pF pF pF pF pF

2.4 2.4.1 2.4.1.1 2.4.1.2 2.4.1.2.1 2.4.1.2.2 2.4.1.3 2.4.1.4 2.4.1.5 2.4.1.6 2.4.1.6.1 2.4.1.6.2 2.4.1.7 2.4.1.8 2.4.2 2.4.2.1 2.4.2.2

Analog Errors (Note A) 6 V Range (50 Ohm/1 MOhm): Standard Linear, Advanced Linear, and Advanced Mixed-Signal Stations Maximum Operating Range +/-6.4 V Maximum Allowable Voltage 50 Ohm input +/-6.4 V, Nominal 1 MOhm input +/-15 V, Nominal Threshold Range +/-6.0 V Threshold Resolution 0.76 mV, Nominal Trigger Level Error (TLE) +/-(1.0% + 15 mV) Input Amplifier Noise (En) TFE Channel Noise (pk-pk)<20.0 mV TFE Channel Noise (rms) <4.0 mV Input R Accuracy +/-1% Hysteresis Accuracy +/-(20% + 3 mV) 30 V Range: Standard Linear, Advanced Linear, and Advanced Mixed-Signal Stations Maximum Operating Range +/-32 V Maximum Allowable Voltage +/-60 V, Nominal

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Advanced Time Measurement Subsystem 2.4.2.3 2.4.2.4 2.4.2.5 2.4.2.7 2.4.2.8 2.4.3 2.4.3.1 2.4.3.2 2.4.3.3 2.4.3.4 2.4.3.5 2.4.3.7 2.4.3.8 2.4.4 2.4.4.1 2.4.4.2 2.4.4.2.1 2.4.4.2.2 2.4.4.3 2.4.4.4 2.4.4.5 2.4.4.6 2.4.4.6.1 2.4.4.6.2 2.4.4.7 2.4.5 2.4.5.1 2.4.5.2 2.4.5.3 2.4.5.4 2.4.5.5 2.4.5.7 2.4.6 2.4.6.1 2.4.6.2 2.4.6.3 2.4.6.4 2.4.6.5 2.4.6.7 Thresh. Range +/-30 V Threshold Resolution 3.8 mV, Nominal Trigger Level Error (TLE) +/-(1.5% + 75 mV) Input R Accuracy +/-1% Hysteresis Accuracy +/-(20% + 15 mV) 200 V Range: Standard Linear, Advanced Linear, and Advanced Mixed-Signal Stations Maximum Operating Range +/-220 V Maximum Allowable Voltage +/-220 V, Nominal Thresh. Range +/-200 V Threshold Resolution 38 mV, Nominal Trigger Level Error (TLE) +/-(2.0% + 750 mV) Input R Accuracy +/-1% Hysteresis Accuracy +/-(20% + 150 mV) 6 V Range (50 Ohm/1 MOhm): Catalyst Station Maximum Operating Range +/-6.0 V Maximum Allowable Voltage 50 Ohm input +/-6.0 V, Nominal 1 MOhm input +/-12.5 V, Nominal Threshold Range +/-6.0 V Threshold Resolution 0.76 mV, Nominal Trigger Level Error (TLE) +/-(1.0% + 15 mV) Input Amplifier Noise (En) TFE Channel Noise (pk-pk)<20.0 mV TFE Channel Noise (rms) <4.0 mV Input R Accuracy +/-1% 30 V Range: Catalyst Station Maximum Operating Range +/-30 V Maximum Allowable Voltage +/-60 V, Nominal Thresh. Range +/-30 V Threshold Resolution 3.8 mV, Nominal Trigger Level Error (TLE) +/-(1.5% + 75 mV) Input R Accuracy +/-1% 200 V Range: Catalyst Station Maximum Operating Range +/-220 V Maximum Allowable Voltage +/-220 V, Nominal Thresh. Range +/-200 V Threshold Resolution 38 mV, Nominal Trigger Level Error (TLE) +/-(2.0% + 750 mV) Input R Accuracy +/-1%

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Note: 1

Breakdown Voltage Current Source

Measurement resolution is determined by the system resource used for analog-to-digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty.

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Breakdown Voltage Current Source I. BVCS SPECIFICATION LIST

0.

BVCS Features Forcing Current Source Measure Voltage Low Z off-state to discharge DUT and delivery capacitance Two Compensation Settings Forcing Voltage Source Measure Current General Features Instrument Safety Interlock IMAGE Programming Language Synchronization Capabilities Trigger Bus Output Delivery System 8 output pins in AL test head or in PATH head Internal Protection Heat Sink Thermal Protection Excess Current in Off-state Shutdown Measurement Alarms Heat Sink Thermal Protection Excess Current in Off-state Shutdown Open Loop Indicator

0.1 0.1.1 0.1.2 0.1.3 0.2 0.2.1 0.3 0.3.1 0.3.2 0.6 0.6.1 0.7 0.7.1 0.8 0.8.1 0.8.2 0.9 0.9.1 0.9.2 0.9.3

1. 1.1

BVCS Forcing Current Source Specifications Resolution and Accuracy Range ----10 uA 100 uA 1 mA 10 mA Resolution ---------305 pA (nominal) 3.05 nA (nominal) 30.5 nA (nominal) 305 nA (nominal) Accuracy -------+/-(0.5% +/-(0.5% +/-(0.5% +/-(0.5%

1.1.1 1.1.2 1.1.3 1.1.4 1.2 1.2.1 1.3 1.3.1

+ + + +

50 nA) 500 nA) 5 uA) 50 uA)

Maximum Programmable Output Current BVCS as current source Maximum Programmable Output Voltage High Power V/I as voltage supply

10 mA

750 V

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Breakdown Voltage Current Source 1.4 Settling Time into a short circuit (50 ohms) Range ----10 uA 100 uA 1 mA 10 mA Settling time into 50 ohms ------------------------<1.5 ms typical <5.5 ms typical <750 us typical <400 us typical

1.4.1 1.4.2 1.4.3 1.4.4 1.4

Settling time into device is a combination of settling time of the current source and characteristics of output delivery system such as capacitance. Periodic and Random Deviations (PARD) Range ----10 uA 100 uA 1 mA 10 mA PARD -------------------<50 nA typical <100 nA typical <500 nA typical <5 uA typical

1.5

1.5.1 1.5.2 1.5.3 1.5.4

1.6

Stability

The BVCS will settle into any real or first order reactive load within the specifications. Settling time is limited by the delivery path and device characteristics.

1.7

Maximum Allowable Voltage Any voltages applied to BVCS output should never exceed voltage programmed on the HPVI.

2. 2.1

BVCS Voltage Measurement Specifications Accuracy Resolution Range _____ see DC subsystem specifications (NOTE 1) Accuracy ________ +/-(0.5% + 1.25 V) +/-(0.5% + 1.00 V) +/-(0.5% + 0.50 V)

2.1.1 2.1.2 2.1.3 2.1.4

1000 V 200 V 50 V

Additional correction applied to voltage forcing mode Vreal = vmeas - iout * Rout where iout is current measured with BVCS ammeter Rout is output resistance specified in 3.2 of this document

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Breakdown Voltage Current Source

2.2 2.3 2.4

Voltmeter Noise Voltmeter Settling Time

<200 mV p-p typical <20 us typical

Maximum Allowable Voltage not to exceed voltage programmed on the HPVI

3. 3.1

Voltage Forcing Accuracy Accuracy Determined by high voltage source instrument and Rout

3.2

Output Resistance (Rout) 249.7 453.5 493.8 498.3 498.8 for for for for for irange irange irange irange irange = = = = = 10 mA 1 mA 100 uA 10 uA 1 uA

3.3 3.3.1 3.4 3.5 3.6 3.7

Maximum Programmable Output Voltage High Power V/I as voltage supply Maximum Programmable Output Current Settling Time Periodic and Random Deviations (PARD) Stability

750 V 10 mA Limited by high voltage source Limited by high voltage source Limited by high voltage source

4. 4.1

BVCS Current Measurement Specifications Accuracy Resolution Range ----see DC subsystem specifications (NOTE 1) Accuracy (% of reading + offset) -------------------------------+/-(0.5% +/-(0.5% +/-(0.5% +/-(0.5% +/-(0.5% + + + + + 10 nA) 50 nA) 500 nA) 5 uA) 50 uA)

4.1.1 4.1.2 4.1.3 4.1.4 4.1.5

1 uA 10 uA 100 uA 1 mA 10 mA

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Breakdown Voltage Current Source 4.2 Ammeter Noise Range ----10 uA 100 uA 1 mA 10 mA

4.2.1 4.3.2 4.4.3 4.5.4

<30 nA typical <50 nA typical <300 nA typical <3 uA typical

4.3 4.4

Ammeter Settling time Maximum Allowable Current

<100 us typical 10 mA

5. BVCS Output Delivery System Specifications 5.1 5.1.1 Capacitance For Advanced Linear (AL) Test Head unguarded guarded For Production Analog Test Head (PATH) unguarded guarded

<180 pF typical <60 pF typical

5.1.2

<120 pF typical <60 pF typical

5.2 5.2.1

Leakage and Dielectric Absorption For Advanced Linear (AL) Test Head After 1 ms After 2 ms After 10 ms < 130 nA + 0.1 nA/V typical < 50 nA + 0.1 nA/V typical < 5 nA + 0.1 nA/V typical

5.2.2

For Production Analog Test Head (PATH) After 1 ms After 2 ms After 10 ms <130 nA + 0.1nA/V typical <50 nA + 0.1 nA/V typical <5 nA + 0.1 nA/V typical

7. 7.2

BVCS Miscellaneous Specifications Maximum Output Voltage (applied to any disconnected output) Limited to programmed voltage of high voltage source

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NOTES:

DC Reference Source

1) Notation Notes: + = arithmetic sum ** = raised to the power Vbl = programmed dc baseline 2) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 3) TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. 4) NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed.

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DC Reference Source 1. 1.1 1.2 1.3 1.4 1.5 1.6 1.6.1 1.6.2 REFERENCE SOURCE SPECIFICATIONS Maximum Output Voltage Voltage Resolution Accuracy Long Term DNL DC Baseline Drift Output Current Compliance Limit Maximum Short Circuit +/-11.0 V max. 17 bits, 168 uV +/-(Vbl*6 + 2.5) mV 14 bits <(10 uV + (0.2 + 0.0011(Vbl**3.5))(time)) uV

>20 mA <65 mA

1.7 Output Impedance (DC - 500 kHz) 1.7.1 25 Ohms 1.7.1.1 Accuracy 1.7.1.2 Max. Capacitive Load 1.7.2 Low Z 1.7.2.1 Zout 1.7.2.2 Max. Capacitive Load 1.7.3 Remote Kelvin (C pin only) 1.7.3.1 Zout 1.7.3.2 Max. Capacitive Load 1.8 Settling Time

+/-1 Ohm >1 nF <1 Ohm >100 pF <0.1 Ohm >100 pF <2 ms to 1 PPM of final value

1.9 1.9.1 1.9.2 1.9.3 1.9.4 1.10 1.11 1.12 1.12.1 1.12.2

Total Noise (BW) 0.1 Hz - 10 Hz 50 Hz - 20 kHz 50 Hz - 100 kHz 50 Hz - 1 MHz Slew Rate Overcurrent Alarm Detection Threshold

<18 <20 <22 <40

uVrms uVrms uVrms uVrms

>8 V/us nominal <45 mA

Time Measurement Access Path Length Error (after autocalibration) +/-5 ns Input Capacitance <500 pF

2 2.1 2.2

DC REFERENCE SOURCE FEATURES Output protected against sustained short circuit to ground. Kelvin Operation on C pin output via D pin connection

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NOTES: 1.

DC Subsystem

All measurement specifications apply with the filter on. Filter settling time may be reduced by leaving the filter off until just before making a measurement. This is called "precharging". Time to settle is typically <1 ms after precharging. Settling time is dependent on noise and signal variations and must be determined for each application individually. All specifications for voltage accuracy apply at the point the Kelvin connection is made. In cases where the Kelvin connection is made on the channel card rather than at the Device Under Test (DUT), there will be an additional voltage error term which is proportional to the current flowing. The resistance is specified for the path between the channel card internal Kelvin point and the Iso-Pin(TM). Linear stations on the A520 are specified and checked as an A510. The 100 V Voltmeter is only available when the UBVI100 is also present in the configuration.

2.

3. 4.

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DC Subsystem I DC SUBSYSTEM SPECIFICATION LIST (See Note 3)

1 1.1 1.1.1

V-I SOURCE PERFORMANCE SPECIFICATIONS Voltage Forcing (See Note 2) Range Resolution (16 BITS) (Nominal) 0.5V 15.63 uV 1V 31.25 uV 2V 62.50 uV 5V 156.25 uV 10V 312.50 uV 20V 625.0 uV 50V 1.563 mV 100V 3.125 mV 200V 6.250 mV Max Voltage Output Max Current Output Max Allowable Voltage Maximum Path Resistance (channel card to Iso-Pin)

Accuracy

+/-1 mV +/-1 mV +/-(0.05% OR 1 mV) +/-(0.05% OR 1 mV) +/-(0.05% OR 2.5 mV) +/-(0.05% OR 5 mV) +/-(0.05% OR 25 mV) +/-(0.1% OR 50 mV) +/-(0.1% OR 100 mV)

(WHICHEVER IS GREATER) " " " " "

1.1.2 1.1.3 1.1.4 1.1.5

+/-60 V +/-200 mA +/-65 V Nominal 500 milliohms Typical (see note 2)

1.2 1.2.1

Voltage Measuring (See note 2) Range Resolution Accuracy (14 BITS) (Nominal) 0.5V 62.50 uV +/-1 mV 1V 125.0 uV +/-1 mV 2V 250.0 uV +/-(0.05% OR 1 mV) (WHICHEVER IS 5V 625.0 uV +/-(0.05% OR 1 mV) GREATER) 10V 1.25 mV +/-(0.05% OR 2.5 mV) " 20V 2.50 mV +/-(0.05% OR 5 mV) " 50V 6.250 mV +/-(0.05% OR 25 mV) " 100V 12.50 mV +/-(0.1% OR 50 mV) " 200V 25.00 mV +/-(0.1% OR 100 mV) " (All specs apply with the measurement filter on. See note 1.) Maximum Operating Voltage Maximum Allowable Voltage Maximum Path Resistance (channel card to Iso-Pin) +/-60 V min. +/-65 V Nominal 500 milliohms Typical (see note 2)

1.2.2 1.2.3 1.2.4

1.3 1.3.1

Current Forcing Range Resolution Accuracy (12 BITS) (Nominal) +/- % of Value + Offset + Volt Effect 200mA 100 uA +/-(0.1% + 200 uA) 20mA 10 uA +/-(0.1% + 20 uA) 2mA 1 uA +/-(0.1% + 2 uA) 200uA 100 nA +/-(0.1% + 300 nA + 1 nA/V) 20uA 10 nA +/-(0.1% + 120 nA + 1 nA/V) (Matrix, multiplexer, and standard cabling leakage included.)

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DC Subsystem 1.4 1.4.1 Current Measuring Range Resolution (14 BITS) (Nominal) 200mA 25 uA 100mA 12.5 uA 50mA 6.25 uA 20mA 2.5 uA 10mA 1.25 uA 5mA 625 nA 2mA 250 nA 1mA 125 nA 500uA 62.5 nA 200uA 25 nA 100uA 12.5 nA 50uA 6.25 nA 20uA 2.5 nA 10uA 1.25 nA 5uA 625 pA

Accuracy +/- % of +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% +/-(0.1% Reading + Offset + Volt Effect + 100 uA) + 50 uA) + 25 uA) + 10 uA) + 5 uA) + 2.5 uA) + 1 uA) + 600 nA + 1 nA/V) + 350 nA + 1 nA/V) + 200 nA + 1 nA/V) + 150 nA + 1 nA/V) + 125 nA + 1 nA/V) + 110 nA + 1 nA/V) + 105 nA + 1 nA/V) + 103 nA + 1 nA/V)

1.4.2

Maximum Operating Current 200 mA min. (Matrix, multiplexer, and standard cabling leakage included.) (All specs apply with the measurement filter on. See note 1.)

A. A.1 A.2

V/I SOURCE SUPPLEMENTAL CHARACTERISTICS Four Quadrant Ground Referenced Operation Parallel operation of sources for increased current output (up to 4 sources in parallel) Active Driven Guard System with protection alarm Diodes Clamps between Force and Sense lines for protection against open Kelvin Operation Individual Source Gating, Clearing, and Reset Functions Source Diagnostic Modes Source Alarms. - Open Loop, Guard, Overload Common Device Ground Sense for all sources Individual Source Disconnect Function Performance of Correction DACs - Offset, Gain, Linearity

A.3 A.4

A.5 A.6 A.7 A.8 A.9 A.10

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DC Subsystem 2 2.1 2.1.1 VOLTMETER Voltage Measuring: Range Resolution Accuracy (14 BITS) (Nominal) 0.5V 62.50 uV +/-1 mV 1V 125.0 uV +/-1 mV 2V 250.0 uV +/-(0.05% OR 1 mV) (WHICHEVER IS 5V 625.0 uV +/-(0.05% OR 1 mV) GREATER) 10V 1.25 mV +/-(0.05% OR 2.5 mV) " 20V 2.50 mV +/-(0.05% OR 5 mV) " 50V 6.250 mV +/-(0.05% OR 25 mV) " 100V 12.50 mV +/-(0.1% OR 50 mV) " 200V 25.00 mV +/-(0.1% OR 100 mV) " (All specs apply with the measurement filter on. See note 1.)

2.1.2 2.1.2.1 2.1.2.2 2.1.2.3 2.1.2.4 2.1.3 2.1.4 2.1.4.1 2.1.4.2 2.1.5

Maximum Measurable Voltage 60 V Voltmeter Single-ended +/-60 V (Either Input) 60 V Voltmeter Differential +/-120 V 100 V Voltmeter Single-ended +/-100 V (Either Input) 100 V Voltmeter Differential +/-200 V CMRR 80 dB at dc Maximum Allowable Voltage 60 V Voltmeter +/-65 V w/ respect to Gnd, Nominal 100 V Voltmeter +/-105 V w/ respect to Gnd, Nominal Input Leakage 10 nA + 1 nA/V max., Typical (includes matrix, mux and cabling effects) 2.1.6 Filter 2.1.6.1 0.5,5,50 V ranges 150 Hz (-3 dB) Nominal 2.1.6.2 1,10,100 V ranges 270 Hz (-3 dB) Nominal 2.1.6.3 2,20,200 V ranges 410 Hz (-3 dB) Nominal 2.2 2.2.1 SAMPLE AND DIFFERENCE Gains Resolution (Nominal) Gain Accuracy + Offset X1 Same as Measure Range +/-(0.5% + 0.1% F.S.) X10 Measure Range x10 +/-(0.5% + 0.1% F.S.) X100 Measure range x100 +/-(1% + 1% F.S.) SAD Decay X1 0.1% of FS/10 s X10 0.1% of FS/1 s X100 0.1% of FS/0.1 s COMPARATORS Resolution Accuracy

2.2.2

2.3 2.3.1 2.3.2

0.05% of Full Scale Nominal +/-0.25% of Full Scale + accuracy of selected metering function. Typical

B. B.1 B.2 B.3

VOLTMETER SUPPLEMENTAL CHARACTERISTICS Two Input Channels - VM1, VM2 Driven Guard System with output alarm Device Ground Sense for meter reference

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DC Subsystem B.4 B.5 B.6 Selectable Low Input Impedance - 20K Diagnostic Modes - Power supplies, Delta Bus, Internal Temperature Alarms - DGS, Guard, Overload

3 3.1

MATRIX Switching Time 3.5 ms MAX

4 4.1 4.2

DELTA SOURCE/BUS Delta Source V/I Modulation Ranges Delta Source Resolution 2, 20, 200 V 0.05% of Full Scale

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Specs
0.1 0.1.1 0.1.2

Handler/Prober Control Interface

Handler/Prober Interface Features True Hardware Readback (DEFAULT = Low True Logic) FIVE (5) Input Hardware Control Signals: [AutoSS, Reject, Retest, Alarm, and Start] FOURTEEN (14) Output HARDWARE Control Signals: [BIN0 - BIN11, EOS, and Retest (Input Echoed)] ALL I/O Signals Phase, Logic Levels, and Timing are programmable. ALL I/O Phase (LOW or HIGH True Logic) programmable.(Default=Low) ALL I/O Logic Levels (+5 V or +12 V) programmable. BIN and EOS Timing are Independently programmable for output sequences up to 1 second duration in 1 ms steps. INPUT group of Signals Phase and Logic Levels are independently programmable from OUTPUT Group of Signals.

0.1.3

0.1.4 True)

0.1.5

ALL inputs from Remote Handler/Prober are debounced through RC filters consisting of an Input series Resistor (47 Kohm) shunted to ground via a 0.01 uF Capacitor. ALL Input thresholds between -0.6 V and +5.6 V, are protected via clamping diodes after the filter. ALL inputs are "pulled up" to 5 V via 12 Kohm resistors. Output Signals are gated via SAFETY* signal.

0.1.6

0.1.7 0.1.8

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Handler/Prober Control Interface 1. 1.1 1.1.1 1.1.2 1.1.3 REMOTE HANDLER/PROBER INTERFACE SPECIFICATIONS INPUT SPECIFICATIONS Input "HIGH" Level Range = 3 V to 30 V. Signal duration = 1 ms minimum. Input Current requirements(nominal) for various "HIGH" Input Voltage Levels. (Currents into the Tester are considered positive.) Input Voltage Current 0 V -400 uA typical 5 V +/-20 uA typical 12 V +700 uA typical 24 V +2.0 mA typical 30 V +2.6 mA typical Logic State 0 1 Voltage <1.2 V >1.9 V

1.1.4

1.1.5 1.1.6 1.2 1.2.1

Maximum Input Voltage = +30 V Minimum Input Voltage = -0.6 V

OUTPUT SPECIFICATIONS LOW Output: Vout-Lo(VoL), bit set to 1-Low True Logic. VoL < 0.3 V @ Isink = 8 mA VoL < 1.0 V @ Isink = 50 mA 1.2.1.1 Maximum Short Circuit Current when Vout-Lo shorted to Vcc. Nominal Sinking current @ +5 V or +12 V Rail = 60 mA. Maximum short circuit duration = 1 second. (RETEST OUTPUT = 20 mA nominal Sinking @ either +5 V/+12 V Rail) 1.2.2 HIGH Output: VoH (Vout-Hi, +5 V Rail, bit set to 1-High True Logic) VoH > 4.6 V @ Isource = 0 uA VoH > 3.9 V @ Isource = 500 uA VoH = 4.4 V typical 1.2.2.1 IosH (Short Circuit Current @ Vout-Hi) 4.0 mA nominal Sourcing @ +5 V Rail 1.2.3 HIGH Output: VoH (Vout-Hi, +12 V Rail, bit set to 1-High True Logic) VoH > 10.9 V @ Isource = 0 uA VoH > 10.2 V @ Isource = 500 uA VoH = 10.8 V typical 1.2.3.1 IosH (Short Circuit Current @ Vout-Hi) 9.5 mA nominal Sourcing @ +12 V Rail 1.3 1.3.1 OUTPUT TIMING SPECIFICATIONS EOS and BIN Signals are Independently programmable up to a period of 1 second in 1 ms steps. [Up to 1000 events (each event = 1 ms) with 1 ms resolution] Timing Accuracy = +/-20%

1.3.2

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NOTES:

High Current Current Source

NOTE 1

Pulsed specifications are guaranteed for duty cycles less than 10%. Exceeding specifications may result in an instrument shutdown during power pulse. Specification is guaranteed for an output current between 30% of full-scale and full scale. Sinking power quadrant programming conditions must not exceed either the maximum current or the maximum power specification. Exceeding either parameter may result in permanent instrument damage. Measured over a 10 Hz to 1 MHz bandwidth. Measurement resolution is determined by the system resource used for analog-to-digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty. Voltage clamp settling time depends on current programming conditions. Typical numbers apply for a 20% overcurrent. The voltage/current compliance specification is defined as follows. The current is the maximum current that may be programmed for the specified duration without damaging the instrument. The voltage is supplied as a typical number for the maximum voltage that can be sustained across the load with the maximum current flowing.

NOTE 2

NOTE 3

NOTE 4 NOTE 5

NOTE 6

NOTE 7

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High Current Current Source I. 0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.2 0.2.1 0.2.2 0.2.3 0.2.4 0.3 0.3.1 0.4 0.4.1 0.4.2 0.4.3 0.5 0.5.1 0.5.2 0.5.3 0.5.4 0.5.5 0.5.6 0.5.7 0.6 0.6.1 0.6.2 0.6.3 0.6.4 0.5.5 0.6.6 0.6.7 HIGH CURRENT CURRENT SOURCE INSTRUMENTATION SPECIFICATIONS HCCS Features Forcing Current Source Measure Voltage Voltage Clamp with automatic crossover Sink Power (Load Mode) Programmable ON and OFF States Modulation Capability/Modulation Bus Access General Features Instrument Safety Interlock Safety Fault Shutdown Sequencer Floating 4 Wire Kelvin Output Image(tm) Programming Language Synchronization Capabilities Trigger Bus Output Delivery Systems Two Station Multiplexer High Power Matrix (HPM) Access AL Test Head Access Internal Protection Heat Sink Thermal Shutdown Junction Thermal Protection Sense Overload Shutdown Over Voltage Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown Measurement Alarms Heat Sink Thermal Shutdown Junction Thermal Protection Sense Overload Shutdown Over Voltage Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown

1. 1.1

HCCS Forcing Current Source Specifications Resolution and Accuracy Range ----1 A 5 A 10 A 100 A Resolution ---------------30.5 uA (nominal) 152.5 uA (nominal) 305 uA (nominal) 3.05 mA (nominal) Accuracy ----------------+/-(0.5% + 5 mA) +/-(0.5% + 12.5 ma) +/-(0.5% + 25 mA) +/-(0.5% + 250 mA)

1.1.1 1.1.2 1.1.3 1.1.4

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High Current Current Source 1.2 1.2.1 1.2.2 1.3 1.5 Maximum Programmable Output Voltage Load Mode Source Mode Maximum Programmable Output Current Compliance Points (Notes 1 and 7) Sourcing Power Quadrant Voltage(typical)/ Current(nominal) DC 100 ms 1 ms --------------------25 V/15 A 17 V/50 A 14 V/100 A -25 V/15 A -17 V/50 A -14 V/100 A 100 A

-30 V -> 100 V 0 V -> 30 V

1.5.1 1.5.2

Range/Mode (nominal) --------30 V source -30 V load

1.5.4

Sinking Power Quadrant (Load Mode) (Note 3) Power Limit (nominal) DC 100 ms 10 ms 1 ms ----------------0 V compliance 400 W 1.8 kW 2.9 kW 3.2 kW Max. Current 25 A 50 A 50 A 100 A

1.6 1.6.1 1.6.2 1.7 1.8 1.8.1 1.8.2

Settling Time (Note 2) to specification at 100 us

<500 us (resistive) +/-3% of final value (resistive)

Voltage Clamp Response Time 50 us for a 20% over voltage typical Periodic and Random Deviations (PARD) (Note 4, typical) Current <0.025% FS rms <0.15% FS p-p Voltage <50 mV rms <300 mV p-p

1.9

StabilityThe HCCS will settle into any real or first order inductive load within the compliance specifications. Settling time may be limited by slew rate or overshoot. Voltage settling into a capacitor not recommended.

2. 2.1

HCCS Current Measurement Specifications Accuracy Resolution Range ----1 A 5 A 10 A 100 A see DC subsystem specifications (Note 5) Accuracy (% of reading + offset) -------------------------------+/-(0.5% + 5 mA) +/-(0.5% + 12.5 mA) +/-(0.5% + 25 ma) +/-(0.5% + 250 mA) <0.1% of range p-p typical

2.1.1 2.1.1 2.1.2 2.1.3 2.2

Ammeter noise

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High Current Current Source

2.3

Maximum allowable Current

FS value limited by current clamp

3. 3.1

HCCS Voltage Clamp Specifications Resolution and Accuracy Vrange -----100 V Resolution Accuracy (typical) --------------------------12.5 mV (nominal) +/-[1.5% + 1 V + 1.5 V*(Iactual/Irange)]

3.1.1 3.5 3.5.1 3.5.2 3.7

Settling Time (Note 6) to specification at 50 us

<100 us typical +/-3% of final value typical

Periodic and Random Deviations (PARD) (note 4) <1 mA rms <6 mA p-p typical StabilityThe HCCS will settle into any real or first order inductive load within the compliance specifications. Settling time may be limited by slew rate or overshoot. Voltage settling into a pure capacitance is unspecified.

3.8

4.0 4.1

HCCS Voltage Measurement Specifications Accuracy Resolution Range ----2 V 10 V 20 V 100 V see DC subsystem specifications (Note 5) Accuracy (% of reading + offset) -------------------------------+/-(0.5% + 5 mV) +/-(0.5% + 10 mv) +/-(0.5% + 20 mV) +/-(0.5% + 100 mV) <0.1% FS p-p typical

4.1.1 4.1.2 4.1.3 4.1.4 4.2 4.3 4.3.1 4.3.2 4.3.3 4.3.4

Voltmeter noise Maximum 100 20 10 2

Allowable Voltage V range 1000 V, nominal V range 200 V, nominal V range 100 V, nominal V range 20 V, nominal

7. 7.1 7.2 7.3

HCCS Miscellaneous Specifications Output Connect time Output Disconnect time Trigger Delay

<50 ms nominal <50 ms nominal 30 us +/- 20 us

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High Current Current Source 7.4 Maximum Output Voltage (not to exceed) 7.4.1 Disconnected 7.4.1.1 Any output to chassis 7.4.1.2 Between any input 7.4.2 Connected 7.4.2.1 (any output to chassis) 7.4.2.2 Between any output - source mode 7.4.2.3 Between any output - load mode 7.5 7.5.1 7.5.2 7.6

1000 V Common Mode nominal 1000 V Differential nominal 1000 V Common Mode nominal 0 V < Vout <30 V nominal -30 V < Vout < 100 V nominal

Kelvin Performance Allowable F-S Separation at user area Direct output 2.0 V nominal Matrixed Output 1.5 V nominal Modulation Accuracy +/-1.0% nominal

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I

High Current Unit

HCU SPECIFICATION LIST

1 1.1 1.1.1

V-I SOURCE PERFORMANCE SPECIFICATIONS Voltage Forcing: Range Resolution Accuracy (14 bits) (Nominal) 2 V 250 uV +/-(0.1% + 1.5 mV) 30 V 3.75 mV +/-(0.1% + 15 mV) Max Voltage Output Max Current Output Voltage Measuring Range Resolution (14 bits) (Nominal) 2V 250uV 30V 3.75mV +/-30 V (see A.1) +/-2 A (Note 1,see A.1)

1.1.2 1.1.3 1.2 1.2.1

Accuracy

+/-(0.1% + 1.5mV) +/-(0.1% + 15mV) +/-30 V (see A.1)

1.2.2 1.3 1.3.1

Maximum Operating Voltage Current Forcing Range Resolution (12 bits) (Nominal) 20 mA 5 uA 200 mA 50 uA 2 A 500 uA Maximum Output Current

Accuracy

+/-(0.1% + 20 uA) +/-(0.1% + 200 uA) +/-(0.2% + 2 mA) +/-2 A (Note 1,see A.1)

1.3.2 1.4 1.4.1

Current Measuring Range Resolution Accuracy (14 bits) (Nominal) 20 mA 5 uA +/-(0.1% + 20 uA) 200 mA 50 uA +/-(0.1% + 200 uA) 2 A 500 uA +/-(0.2% + 2 mA) (All specs apply with the measurement filter on.)

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High Current Unit 1.4.2 Maximum Operating Current Note 1: LIMITATIONS: +/-2 A (Note 1,see A.1)

HCU used through system MATRIX: 1 A MAX This includes: A520 Test Head at the DIB A510AL Test Head at the DIB A510 Systems at the J1-J4 Bulkhead connectors HCU as a DUTSRC (DUTSRC 2,3,4, ONLY): 1 A MAX When used in the: A520 Test Head at the DIB A510 System at the J1-J4 Bulkhead connectors HCU as a DUTSRC (DUTSRC 2,3,4 ONLY): 2 A MAX When used in the: A510AL Test Head with DUTHCU cable installed A510 System at the HCU Bulkhead connectors

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High Current Unit A. A.1 HCU SUPPLEMENTAL CHARACTERISTICS Four Quadrant Ground Reference Operation, however 2nd and 4th Quadrants have the limitation as below. | +I | | +2 A ---------/| | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | -V ----------------------------------------- +V -30 V | | / +30 V | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | | / | |/ ----------------| -2 A | -I A.2 A.3 Active Driven Guard System with protection alarm Diode Clamps between Force and Sense lines for protection against open Kelvin Operation Individual Source Gating, Clearing, and Reset Functions Alarm -- Over load, Guard Common Device Ground sense for all sources Individual Source Disconnect Function

A.4 A.5 A.6 A.7

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NOTES: 1

10

High Current Voltage Source

Pulsed specifications are guaranteed for duty cycles less than 10%. Exceeding specifications may result in an instrument shutdown during power pulse. Optimum range means that the specification is guaranteed for a specified portion of the voltage range. Full range means that the specification is guaranteed for any output voltage within the compliance range. The compliance range is not the nominal range but a range between 0 and the specified compliance. The V/I compliance of forcing voltage source in the power sink quadrant is limited by a load line of specified resistance. Measured over a 10 Hz to 1 MHz Bandwidth. Measurement resolution is determined by the system resource used for Analog-to-Digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty.

5 6

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High Current Voltage Source I - HCVS SPECIFICATION LIST

0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.1.6 0.2 0.2.1 0.2.2 0.2.3 0.2.4 0.3 0.3.1 0.4 0.4.1 0.4.2 0.4.3 0.5 0.5.1 0.5.2 0.5.3 0.5.4 0.5.5 0.5.6 0.6 0.6.1 0.6.2 0.6.3 0.6.4 0.6.5 0.6.6 1. 1.1

HCVS Features Forcing Voltage Source Measure Current Current Clamp with automatic crossover Sink Power (discharge C) Programmable ON and OFF States Modulation Capability / Modulation Bus Access Two Compensation settings General Features Instrument Safety Interlock Safety Fault Shutdown Sequencer Floating 4 Wire Kelvin Output IMAGE Programming Language Synchronization Capabilities Trigger Bus Output Delivery Systems Two Station Multiplexer High Power Matrix (HPM) Access AL Test Head Access Internal Protection Heat Sink Thermal Shutdown Junction Thermal Shutdown Open Kelvin/Sense Overload Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown Measurement Alarms Heat Sink Thermal Shutdown Junction Thermal Shutdown Open Kelvin/Sense Overload Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown HCVS Forcing Voltage Source Specifications Resolution and Accuracy Range ----30 V 60 V 90 V 120 V Resolution ----------------1.83 mV (nominal) 1.83 mV (nominal) 1.83 mV (nominal) 1.83 mV (nominal) Accuracy -----------------+/-(0.5% + 150 mV) +/-(0.5% + 150 mV) +/-(0.5% + 150 mV) +/-(0.5% + 150 mV) 120 V

1.1.1 1.1.2 1.1.3 1.1.4 1.2

Maximum Programmable Output Voltage

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High Current Voltage Source 1.3 1.4 Maximum Programmable Output Current Optimum Range Compliance Points (Notes 1, and 2) Sourcing Power Quadrant Compliance Range / Compliance dc 100 ms ----------------------8-25V / 15A 0-10V / 50A 15-50V / 8A 0-30V / 40A 20-80V / 5A 0-40V / 30A 45-110V / 4A 5-65V / 20A 100 A

1.4.1 1.4.2 1.4.3 1.4.4 1.5

Range (nominal) --------30 V 60 V 90 V 120 V

Current 1 ms -----------10-40V / 85A 20-70V / 60A 30-100V / 35A

Full Range Compliance Points (Notes 1, 3, and 4) Sourcing Power Quadrant Full Scale Range / Full Range Compliance dc 100 ms 10 ms 1 ms ---------------------------------25V / 12A 15V / 40A 15V / 50A 12V / 100A 50V / 6A 35V / 30A 40V / 40A 45V / 65A 80V / 3A 60V / 15A 70V / 20A 75V / 40A 110V / 2A 95V / 8A 100V / 12A 110V / 25A

1.5.1 1.5.2 1.5.3 1.5.4

Range (nominal) --------30 V 60 V 90 V 120 V

1.5.5 1.6 1.6.1 1.6.2 1.7 1.8 1.8.1 1.8.2 1.9

Sinking Power Compliance 10 ohm / 300 W average Settling Time to specification at 100 us Current Clamp Response Time

<500 us (non-reactive) +/-3% of final value (non-reactive) 200 us for a 20% overcurrent

Periodic and Random Deviations (PARD) (note 5) <50 mV rms <300 mV p-p Stability The HCVS will settle into any real or first order reactive load within the compliance specifications. Settling time may be limited by slew rate or overshoot.

2. 2.1

HCVS Current Measurement Specifications Accuracy Resolution Range ----100 A 10 A 1 A see DC subsystem specifications (note 6) Accuracy (% of reading + offset) -------------------------------+/-(1.0% + 250 mA) +/-(1.0% + 25 mA) +/-(1.0% + 5 mA)

2.1.1 2.1.1 2.1.2

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High Current Voltage Source 2.2 2.3 2.3.1 2.3.2 2.4 Ammeter noise Ammeter settling time to specification at 100 us Maximum allowable Current <1% of range p-p

<500 us +/-5% of final value FS value limited by current clamp

3. 3.1

HCVS Current Clamp Specifications Resolution and Accuracy Irange -----100 A Resolution --------------25 mA (nominal) Accuracy -----------------+/-(1.5% + 250 mA)

3.1.1 3.5 3.5.1 3.5.2 3.7 3.7.1 3.7.2 3.8

Settling Time to specification at 100 us

<1 ms +/-3% of final value

Periodic and Random Deviations (PARD) (note 5) < 1 mA rms < 6 mA p-p Stability The HCVS current clamp will settle into any reasonable real or first order reactive load within the compliance specifications. Settling time may be limited by slew rate or overshoot.

4. 4.1

HCVS Voltage Measurement Specifications Accuracy Resolution Range ----150 V Voltmeter noise see DC subsystem specifications (note 6) Accuracy (% of reading + offset) -------------------------------+/-(0.5% + 150 mV) <60 mVp-p <10 mVrms <100 us 1200 V Nominal

4.1.1 4.2

4.3 4.4

Voltmeter settling time Maximum Allowable Voltage

7. 7.1 7.2 7.3

HCVS Miscellaneous Specifications Output Connect time Output Disconnect time Trigger Delay

<50 ms <50 ms 30 us +/- 10 us

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High Current Voltage Source 7.4 7.5 7.5.1 7.5.2 7.5.3 7.6 Maximum Output Voltage (any output to chassis) Kelvin Performance (Allowable F-S Separation) Direct output Matrixed Output AL Test head Output Modulation Accuracy

1000 V

2.0 V 1.5 V 1.0 V +/-1.0%

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1.

11

High Frequency Digitizer

HIGH FREQUENCY AC DIGITIZER SPECIFICATIONS A. Customer Level Specifications

1.1

General Specifications (Apply to all Frequency Ranges) (NOTE: All specifications including those that are Frequency Range specific assume that the signal being digitized is between full scale and half scale of the selected range.) Peak Input Voltage (AC + DC) AC p-p Input Voltage AC Waveform Amplitude Ranges +/-20.0 V max. 16.384 V max. 8.192 V peak 4.096 V peak 2.048 V peak 1.024 V peak 512 mV peak 256 mV peak 128 mV peak 64 mV peak 32 mV peak 16 mV peak 8 mV peak <80 pF typ. +/-2% +/-5%

1.1.1 1.1.2 1.1.3

1.1.4 1.1.5

1.1.6

Input Capacitance Input Resistance Accuracy @ DC 50 ohm 10k ohm DC Offset Without Autocal Amplitude Range --------------8.192 V peak 4.096 V peak 2.048 V peak 8.0 mV - 1.024 V peak

DC Offset --------+/-160 mV RTI +/-80 mV RTI +/-40 mV RTI +/-20 mV RTI

1.1.7

DC Offset With Autocal (NOTE: Requires "dccal: on "to be selected) Amplitude Range --------------8.192 V peak 4.096 V peak 2.048 V peak 8.0 mV - 1.024 V peak DC Offset --------+/-16 mV RTI +/-8 mV RTI +/-4 mV RTI +/-2 mV RTI

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High Frequency Digitizer 1.1.8 1.1.9 DC Offset Drift Programmable DC Baseline Removal Range Resolution Accuracy Settling Time for 24 V Change 500 uV/C nominal

+/-12.288 V 6 mV(12 bits) +/-(.1% FSR + 10 mV) 5 ms to 0.1% of final value nominal 1.1.10 Settling Time for 4.0 V Step to 1% of Step 100 ns typ. (NOTE: The above specification for settling time assumes no antialiasing filter is selected.) 1.1.11 Overvoltage Recovery Time 300 ns nominal (Need to spec conditions.) 1.1.12 Sample Rate Range 600 kHz min.- 20 MHz max. 1.1.13 Dynamic AC Gain 20 dB +/- 0.5 dB to 1.0 MHz 1.1.14 High Pass Filter Stop Band End 128 kHz min. Pass Band Start 256 kHz min. Pass Band Gain 20 dB +/- 0.5 dB Stop Band Attenuation 20 dB min. 1.1.15 Waveform Digitizing Resolution 12 bits 1.1.16 Overvoltage Alarm Detection Threshold +/-1.024 V peak nom. 1.1.17 Time Measurement Access 1.1.17.1 Path Length Error (after autocalibration) +/-5 ns 1.1.17.2 Input Capacitance <500 pF 1.2 1.2.1 FREQUENCY RANGE I 100 Hz - 1 MHz Sine Wave Amplitude Accuracy Amplitude --------4.097 V peak - 8.192 V peak 2.049 V peak - 4.096 V peak 8.0 mV peak - 2.048V peak INPUT Z MODE -----------10 kohm 50 ohm 10 kohm 50 ohm 10 kohms 50 ohm ACCURACY --------+/-0.5 dB +/-0.5 dB +/-0.4 dB +/-0.4 dB +/-(0.30 dB +1.0 mV rms)

1.2.2

Sine Wave Harmonics(2nd & 3rd) Amplitude --------4.097 V peak - 8.192 V peak 2.049 V peak - 4.096 V peak 129 mV peak - 2.048 V peak 8.0 mV peak - 128 mV peak Harmonic Level --------------50 dB -55 dB -60 dB 91 uV rms max.

1.2.3

Sine Wave Spurious Responses (BW = 100 Hz - 5 MHz) Amplitude --------2.049 V peak - 8.192 V peak 257 mV peak - 2.048 V peak 8.0 mV peak - 256 mV peak Spurious Level --------------50 dB -60 dB 181 uV rms max.

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High Frequency Digitizer 1.2.4 Noise Density (BW = 30 kHz) (NOTE: Applicable over a BW = 100 Hz - 5 MHz) AMPLITUDE RANGE --------------8.192 V peak 4.096 V peak 2.048 V peak 1.024 V peak 512 mV peak 256 mV peak 128 mV peak 64 mV peak 32 mV peak 16 mV peak 8 mV peak 1.2.5 Anti-Aliasing Filter Characteristics Filter -----400 kHz 2.0 MHz Stop Band Start Frequency ------------------------600 kHz max. 3.0 MHz max. Stop Band Attenuation ---------------------50 dB min. to 30 MHz -50 dB min. to 30 MHz S/N RATIO -------->77 dB >77 dB >75 dB >73 dB >69 dB >63 dB >57 dB >51 dB >45 dB >39 dB >33 dB

(NOTE: The frequencies under the filter column represent the frequencies where the above guaranteed level accuracies end. THEY ARE NOT THE -3 dB FREQUENCIES.)

1.3 1.3.1

FREQUENCY RANGE II 1 MHz - 5 MHz Sine Wave Amplitude Accuracy Amplitude --------8.0 mV peak - 8.192 V peak Input Z Mode -----------10 kohm 50 ohm Accuracy -------+/-(0.5 dB + 1 mV rms)

1.3.2

Sine Wave Amplitude Accuracy - Production Analog Test Head (PATH) Amplitude --------8.0 mV peak - 8.192 V peak Input Z Mode -----------10 kohm 50 ohm Accuracy -------+/-(0.75 dB + 1 mV rms)

1.3.3

Sine Wave Harmonics(2nd & 3rd) Amplitude --------4.097 V peak - 8.192 V peak 2.049 V peak - 4.096 V peak 129 mV peak - 2.048 V peak 8.0 mV peak - 128 mV peak Harmonic Level --------------40 dB -45 dB -50 dB 288 uV rms max.

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High Frequency Digitizer 1.3.4 Sine Wave Spurious Responses (BW = 100 Hz - 10 MHz) Amplitude --------4.097 V peak - 8.192 V peak 2.049 V peak - 4.096 V peak 129 mV peak - 2.048 V peak 8.0 mV peak - 128 mV peak 1.3.5 Noise Density (BW = 30 kHz) (NOTE: Applicable over a BW = 100 Hz - 10 MHz) AMPLITUDE RANGE --------------8.192 V peak 4.096 V peak 2.048 V peak 1.024 V peak 512 mV peak 256 mV peak 128 mV peak 64 mV peak 32 mV peak 16 mV peak 8 mV peak 1.3.6 Anti-Aliasing Filter Characteristics Filter Stop Band Start Frequency -----------------------------2.0 MHz 3.0 MHz max. 3.6 MHz 5.4 MHz max. 6.1 MHz (see 2.3.6) 9.15 MHz max. 10.0 MHz 15.0 MHz max. Stop Band Attenuation ---------------------50 dB min. to 30 MHz -50 dB min. to 30 MHz -50 dB min. to 30 MHz -50 dB min. to 30 MHz S/N RATIO -------->77 dB >77 dB >75 dB >73 dB >69 dB >63 dB >57 dB >51 dB >45 dB >39 dB >33 dB Spurious Level --------------40 dB -45 dB -50 dB 288 uV rms max.

(NOTE: The frequencies under the filter column represent the frequencies where the above guaranteed level accuracies end. THEY ARE NOT THE -3 dB FREQUENCIES.) 1.3.7 1.3.8 Group Delay of 6.1 MHz Filter NTSC Video Waveform Specifications Differential Gain Differential Phase <10 ns up to 4.4 MHz typ. +/-0.5% max. +/-0.5 degrees max.

1.4 1.4.1

FREQUENCY RANGE III

5 MHz - 9.5 MHz

Sine Wave Amplitude Accuracy Advanced Linear & Advanced Mixed-Signal Test Heads Frequency = 5 MHz - 7.5 MHz Input Z mode -----------10 kohm 50 ohm Accuracy ---------+/-(1.0 dB +1 mV rms)

1.4.1.1 1.4.1.1.1

Amplitude --------8.0 mV peak - 8.192 V peak

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High Frequency Digitizer 1.4.1.1.2 Frequency = 7.5 MHz - 9.5 MHz Input Z mode -----------10 kohm 50 ohm Accuracy ---------+/-(1.5 dB +1 mV rms) +/-(1.0 dB +1 mV rms)

Amplitude --------8.0 mV peak - 8.192 V peak

1.4.1.2 1.4.1.2.1

Production Analog Test Head(PATH) Frequency = 5 MHz - 7.0 MHz Input Z mode -----------10 kohm 50 ohm Accuracy ---------+/-(1.25 dB +1 mV rms)

Amplitude --------8.0 mV peak - 8.192 V peak

1.4.1.2.2

Frequency = 7.0 MHz - 9.5 MHz Input Z mode -----------10 kohm 50 ohm 10 kohm 50 ohm Accuracy ---------+/-(1.75 dB +1 mV rms) +/-(1.5 dB +1 mV rms) +/-(2.0 dB +1 mV rms) +/-(1.0 dB +1 mV rms)

Amplitude --------2.049 V peak - 8.192 V peak 8.0 mV peak - 2.048 V peak

1.4.2

Sine Wave Harmonics(2nd & 3rd) Amplitude ---------2.049 V peak - 4.096 V peak 129 mV peak - 2.048 V peak 8.0 mV peak - 128 mV peak Harmonic Level --------------40 dB -45 dB 512 uV rms max.

1.4.3

Sine Wave Spurious Responses (BW = 100 Hz - 10 MHz) Amplitude --------2.049 V peak - 4.096 V peak 129 mV peak - 2.048 V peak 8.0 mV peak - 128 mV peak Spurious Level --------------40 dB -45 dB 512 uV rms max.

1.4.4

Noise Density (BW = 30 kHz) (NOTE: Applicable over a BW = 100 Hz - 10 MHz) AMPLITUDE RANGE --------------8.192 V peak 4.096 V peak 2.048 V peak 1.024 V peak 512 mV peak 256 mV peak 128 mV peak 64 mV peak 32 mV peak 16 mV peak 8 mV peak S/N RATIO -------->74 dB >74 dB >74 dB >73 dB >69 dB >63 dB >57 dB >51 dB >45 dB >39 dB >33 dB

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High Frequency Digitizer

1.4.5

Anti-Aliasing Filter Characteristics Filter Stop Band Start Frequency Stop Band Attenuation -------------------------------------------------6.1 MHz (see 2.3.6) 9.15 MHz max. -50 dB min. to 30 MHz 10.0 MHz 15.0 MHz max. -50 dB min. to 30 MHz (NOTE: The frequencies under the filter column represent the frequencies where the above guaranteed level accuracies end. THEY ARE NOT THE -3dB FREQUENCIES.)

1.5 1.5.1 1.5.2 1.5.3

HIGH FREQUENCY AC DIGITIZER FEATURES Unbalanced Differential Test Head to Mainframe Transmission Input protected against sustained +/-60 V overvoltage. Monitoring port before the A/D (after the anti-aliasing filters) section of signal path in the mainframe. Parity generation for the data going to the CMEM. Overvoltage input alarm sent to the CMEM with the waveform samples as measured at the A/D input.

1.5.4 1.5.5

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NOTES:

12

High Power Matrix

NOTE 1

Measurement resolution is determined by the system resource used for analog-to-digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty. High Power Matrix pins must be programmed in parallel and connected in parallel at the device area for currents greater than per-pin specifications (up to the maximum spec listed). Pulsed specifications are guaranteed for duty cycles less than 10% with a period of less than 10 ms. Exceeding specifications may result in permanent damage to relay contacts. Specifications apply from the input of the HPM to the end of the standard linear delivery system or to the beginning of the Advanced Linear/Advanced Mixed-Signal delivery system, whichever is appropriate. The test head delivery system begins at the SPS AL Disconnect Card. OVP may be disabled at user's discretion for reduced leakage, but this is not currently implemented due to safety considerations. Over Voltage Protection (SCR crowbar - both polarities).

NOTE 2

NOTE 3

NOTE 4

NOTE 5

OVP

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High Power Matrix I. 0. 0.1 0.2 0.2.1 0.2.2 0.2.3 0.3 0.4 HIGH POWER MATRIX INSTRUMENTATION SPECIFICATIONS HPM Features Two Station Multiplexer Four lines by 12 pins per HPM Module All lines withstand maximum voltage Lines 1 and 2 are designated high current lines (10 A per pin) Lines 3 and 4 are designated medium current lines (5 A per pin) Expandable to 24 pins per SPS/UB card cage (two HPM modules) The High Voltage Ammeter (HVA) can be parallel connected or serial connected to certain hp_lines via a system connection from the HVA to the HPM Connection to Standard DC Matrix Non-Universal Backplane based systems: Force/Sense/Guard connections made on a pin per pin basis. (DC XPT 1 connects only to hp_xpt 1, etc.) Maximum number of connections equal to whichever is less: the number of hp_xpts or dc_xpts present in the system. Universal Backplane based systems: Force/Sense/Guard connections can be between any hp_xpt and the standard DC lines 1-8. Maximum number of connections is equal to the number of hp_xpts present in the system. Safety Features Safety signal must be grounded to make any connections in HPM Triggering of SPS_Shutdown signal in the event of an attempted unsafe connection. Non-Universal Backplane based systems: All connections to standard DC matrix (force/sense/guard for all hp_xpts) fused at maximum current OVP on all pins Universal Backplane based systems: All connections to standard DC matrix (force/sense/guard for all hp_xpts) fused at maximum current OVP on all pins Triggering of SPS_Shutdown in the event of a crowbar alarm.

0.5 0.5.1 0.5.1.1 0.5.1.2 0.5.2 0.5.2.1 0.5.2.2

0.6 0.6.1 0.6.2 0.6.3 0.6.3.1 0.6.3.2 0.6.4 0.6.4.1 0.6.4.2 0.6.4.3

1. 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.2 1.2.1 1.2.2 1.2.3

HPM Current Specifications (Notes 2, 3, 4) High Current Lines 1 and 2 Maximum Current per Pin Maximum Current per Pin (Note 3) Maximum Operating Current (Note 2) Maximum Operating Current (Notes 2, 3) Medium Current Lines 3 and 4 (Notes 2, 3, 4) Maximum Current per Pin Maximum Current per Pin (Note 3) Maximum Operating Current (Note 2)

10 20 40 80

A, A, A, A,

continuous pulsed continuous pulsed

5 A, continuous 10 A, pulsed 20 A, continuous

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High Power Matrix 1.2.4 Maximum Operating Current (Notes 2, 3) 40 A, pulsed

2. 2.1 2.1.1 2.1.2 3. 3.1 3.2 3.2.1 3.2.2 3.2.3

HPM Voltage Specifications (all Lines and Pins) Maximum Voltage Line or Pin to ground, non-switching Force to guard, non-switching HPM Switching Specifications (all Lines and Pins) Maximum Switching Speed Switching voltage/current cannot exceed: Max switching current Max switching voltage Max switching power 2.0 ms, nominal 1 A, nominal 50 V, nominal 10 VA, nominal

+/-1000 V, nominal +/-200 V, nominal

4. 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5

HPM DC Matrix Interface Specifications Non-Universal Backplane based Systems Maximum Current per xpt, non-switching Max Allowable Voltage Max Leakage at 60 V Max Allowable Voltage, OVP off Max Leakage at 60 V, OVP off

1 A, nominal +/-60 V, nominal < +/-10 uA +/-200 V, nominal < +/-1 uA, typical

4.2 Universal Backplane based Systems 4.2.1 Current Specifications 4.2.1.1 Maximum Current, non-switching 2 A, nominal 4.2.1.2 Force Fuse rating 2 A, nominal 4.2.1.3 Sense/Guard Fuse rating 1 A, nominal 4.2.2 Voltage Specifications 4.2.2.1 Max Allowable Voltage +/-60 V, nominal 4.2.2.2 Max Allowable Voltage, OVP off +/-200 V, nominal 4.2.3 Switching Specifications 4.2.3.1 Switching speed 2 ms, nominal 4.2.3.2 Switching voltage/current cannot exceed: 4.2.3.3 Max switching current 10ma, nominal 4.2.3.4 Max switching voltage 30V, nominal 4.2.3.5 Max switching power 300mW, nominal 4.2.4 Leakage Specifications (DC Matrix, HPM, and standard cabling errors included) 4.2.4.1 Max Leakage at 60 V < +/-15 uA 4.2.4.2 Max Leakage at 60 V, OVP off < +/-2 uA 4.2.5 OVP Specifications 4.2.5.1 OVP activation point 67 V, nominal 4.2.5.2 Activation time, Current > 40 mA 1 us, nominal 4.2.5.3 Voltage Clamp Value, Current < 40 mA 67 V, nominal

5. 5.1

HPM Leakage Specifications Max Leakage at +/- 1000V, with active guard (HPM, and standard cabling errors included) < +/-10 uA, typical

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High Power Matrix

6. 6.1

HPM Path Resistance Specifications HPM Instrument to SPS bulkhead 300 mohms, max, nominal (round trip - HPM, standard cabling errors included) Standard DC Matrix to SPS bulkhead Non-Universal Backplane based Systems 300 mohms, max, nominal (AD819, HPM, standard cabling errors included) Universal Backplane based Systems 500 mohms, max, nominal (AD751, HPM, standard cabling errors included)

6.2 6.2.1 6.2.2

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NOTES: 1

13

High Power V/I Source

Pulsed specifications are guaranteed for duty cycles less than 10%. Exceeding specifications may result in an instrument shutdown during power pulse. Optimum range means that the specification is guaranteed for an output voltage between 40% of full-scale and full scale. Full range means that the specification is guaranteed for any output voltage within the range. The forcing voltage range is defined between 2V and full scale. The forcing voltage compliance V/I region is specified by a load line resistance in the power sinking quadrant. The current will be less than the voltage on the source output divided by the stated resistance. Measured over a 10 Hz to 1 MHz Bandwidth. Measurement resolution is determined by the system resource used for Analog-to-Digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty. Settling time is specified for output values between 5% and 100% of range.

5 6

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High Power V/I Source I - HPVI SPECIFICATION LIST

0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.1.6 0.1.7 0.2 0.2.1 0.2.2 0.2.3 0.2.4 0.5 0.5.1 0.5.2 0.5.3 0.5.4 0.6 0.6.1 0.7 0.7.1 0.7.2 0.7.3 0.8 0.8.1 0.8.2 0.8.3 0.8.4 0.8.5 0.8.6 0.9 0.9.1 0.9.2 0.9.3 0.9.4 0.9.5 0.9.6

HPVI Features Forcing Voltage Source Measure Current Current Clamp with automatic crossover Sink Power (discharge C) Programmable ON and OFF States Modulation Capability / Modulation Bus Access Current Measurement Range is Independent of Current Limit Two Compensation settings Forcing Current Source Measure Voltage Voltage Clamp with automatic crossover Programmable ON and OFF States Two Compensation settings General Features Instrument Safety Interlock Safety Fault Shutdown Sequencer Floating 4 Wire Kelvin Output IMAGE Programming Language Synchronization Capabilities Trigger Bus Output Delivery Systems Two Station Multiplexer High Power Matrix (HPM) Access AL Test Head Access Internal Protection Heat Sink Thermal Shutdown Junction Thermal Shutdown Open Kelvin Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown Measurement Alarms Heat Sink Thermal Shutdown Junction Thermal Shutdown Open Kelvin Shutdown Over Current Relay Protection Open loop indicator SPS Shutdown

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High Power V/I Source 1. 1.1 HPVI Forcing Voltage Source Specifications Resolution and Accuracy Range ----85 V 170 V 255 V 340 V 510 V 750 V Resolution ---------------6.25 mV (nominal) 6.25 mV (nominal) 12.5 mV (nominal) 12.5 mV (nominal) 12.5 mV (nominal) 12.5 mV (nominal) Accuracy ----------------+/-(0.5% + 250 mV) +/-(0.5% + 250 mV) +/-(0.5% + 500 mV) +/-(0.5% + 500 mV) +/-(1.0% + 1.0 V) +/-(1.0% + 1.0 V) 750 V 10 A

1.1.1 1.1.2 1.1.3 1.1.4 1.1.5 1.1.6 1.2 1.3 1.4

Maximum Programmable Output Voltage Maximum Programmable Output Current Optimum Range Compliance Points (Notes 1, and 2) Sourcing Power dc 100 ms --------4.0 A 8.0 2.0 A 5.0 1.4 A 4.0 1.0 A 3.5 700 mA 2.0 500 mA 1.9 Quadrant 10 ms ----A 10.0 A 7.0 A 4.5 A 4.0 A 2.2 A 2.0

1.4.1 1.4.2 1.4.3 1.4.4 1.4.5 1.4.6

Range ----85 V 170 V 255 V 340 V 510 V 750 V

1 ms ----A 10.0 A 10.0 A 8.5 A 7.0 A 4.2 A 3.5

A A A A A A

1.5

Full Range Compliance Points (Notes 1, 3, and 4) Sourcing Power dc 100 ms --------3.0 A 8.0 1.5 A 5.0 1.0 A 3.5 700 mA 2.6 500 mA 1.7 350 mA 1.3 Quadrant 10 ms ----A 10.0 A 7.0 A 4.0 A 3.5 A 2.0 A 1.7 Sinking Power Quadrant 1 ms (nominal) ------------A 10.0 A 58 ohm A 10.0 A 58 ohm A 6.5 A 58 ohm A 5.0 A 58 ohm A 3.2 A 233 ohm A 2.5 A 233 ohm

1.5.1 1.5.2 1.5.3 1.5.4 1.5.5 1.5.6

Range ----85 V 170 V 255 V 340 V 510 V 750 V

1.6 1.6.1 1.6.2 1.7 1.8 1.8.1 1.8.2 1.9

Settling Time (Note 7) to specification at 100 us Current Clamp Response Time

<500 us (non-reactive) +/-3% of final value (non-reactive) 200 us for a 20% over current

Periodic and Random Deviations (PARD) (note 5) 85-340 V ranges < 50 mV rms < 300 mV p-p 510, 750 V ranges < 100 mV rms < 600 mV p-p Stability The HPVI will settle into any real or first order reactive load within the compliance specifications.

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High Power V/I Source Settling time may be limited by slew rate or overshoot.

2. 2.1

HPVI Current Measurement Specifications Accuracy Resolution Range ----10 A 1 A 100 mA 10 mA 1 mA 100 uA Ammeter noise Ammeter settling time to specification at 100 us Maximum allowable Current see DC subsystem specifications (note 6) Accuracy (% of reading + offset) -------------------------------+/- (1.0% + 12.5 mA) +/- (1.0% + 8.5 mA) +/- (1.0% + 125 uA) +/- (1.0% + 85 uA) +/- (1.5% + 2 uA) +/- (1.5% + 2 uA) <1% of range p-p typical

2.1.1 2.1.2 2.1.3 2.1.4 2.1.5 2.1.6 2.2 2.3 2.3.1 2.3.2 2.4

<500 us typical +/-5% of final value typical 10 A independent of ammeter range.

3. 3.1

HPVI Forcing Current Source Specifications Resolution and Accuracy Irange -----100 mA 100 mA 10 A 10 A Vrange -----510, 750 V 85-340 V 510, 750 V 85-340 V Resolution ------------25 uA (nominal) 50 uA (nominal) 2.5 mA (nominal) 5 mA (nominal) 10 A 750 V Accuracy --------------+/-(1.5% + 1 mA) +/-(1.5% + 2 mA) +/-(1.5% + 25 mA) +/-(3.0% + 50 mA)

3.1.1 3.1.2 3.1.3 3.1.4 3.2 3.3 3.4

Maximum Programmable Output Current Maximum Programmable Output Voltage Compliance Points Irange -----100 mA 100 mA 10 A 10 A Vrange --------510, 750 85 - 340 510, 750 85 - 340

3.4.1 3.4.2 3.4.3 3.4.4 3.5 3.5.1 3.5.2

V V V V

Sourcing Quadrant dc 100 ms 10 ms 1 ms --------------------Vrange Vrange Vrange Vrange Vrange Vrange Vrange Vrange same as FV compliance points (1.4 & 1.5). same as FV compliance points (1.4 & 1.5).

Settling Time (note 7) to specification at 100 us

<1 ms typical +/-3% of final value typical

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High Power V/I Source 3.6 3.7 3.7.1 3.7.2 3.8 Voltage Clamp Response Time <100 us for 10% over voltage typical

Periodic and Random Deviations (PARD) (note 5) 100 mA range <20 uA rms < 100 uA p-p typical 10 A range <1 mA rms < 6 mA p-p typical Stability The HPVI will settle into any real or first order reactive load within the compliance specifications. Settling time may be limited by slew rate or overshoot.

4. 4.1

HPVI Voltage Measurement Specifications Accuracy Resolution Range ----800 V Voltmeter noise see DC subsystem specifications (note 6) Accuracy (% of reading + offset) -------------------------------+/-(0.5% + 1.0 V) <6 Vp-p typical <1 Vrms typical <100 us typical 1200 V

4.1.1 4.2

4.3 4.4

Voltmeter settling time Maximum Allowable Voltage

7. 7.1 7.2 7.3 7.4 7.5 7.5.1 7.5.2 7.5.3 7.6

HPVI Miscellaneous Specifications Output Connect time <50 ms typical Output Disconnect time <50 ms typical Trigger Delay 30 us +/- 20 us Maximum Output Voltage (any output to chassis) 1000 V Kelvin Performance Allowable F-S Separation Direct output 2.0 V typical Matrixed Output 1.5 V typical AL Test head Output 1.0 V typical Modulation Accuracy +/-1.0% typical

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Specs
Note:

14

High Speed Digital Instrumentation

Recalibration is required after Temperature change of > +/-3 C or a 1% power supply change in the test head programmable supply from the values the system was calibrated at.

I. 1. 1.1 1.2

HIGH SPEED DIGITAL SPECIFICATIONS CHANNEL COUNT Maximum Channel Count Channel increment by which system is expandable 64 channels 8 channels

The channel mainframe backplane supports 64 channels. Each backplane slot supports 8 channels. Channel numbers are assigned based on backplane slot number. Within a backplane, channels can be populated in any order. Up to two PATH II test heads are supported.

2. 2.1 2.2 2.3

VECTOR RATE Vector Rate Single Cycle IO Rate Dual Drive 25 MHz 25 MHz 50 MHz

The base vector rate for the system allows full functionality on all channels. A special "dual drive" mode provides drive only vector rates of twice the nonmultiplexed rate using a single channel.

3. 3.1 3.1.1 3.1.2 3.1.3 3.1.3.1

DRIVER SPECIFICATIONS VIH/VIL Voltage Voltage Voltage DC Voltage Levels (No load) ranges -2 to +7 V resolution 1 mV Accuracy for 0.5 V to 9 V swings (with no load) Accuracy +/-(0.25% + 30 mV) True when: VIH/VIL > 1 V above their negative rail VIH > 1 V below its positive rail VIL > 1.4 V below its positive rail Accuracy at/near voltage rails +/-(0.25% + 60 mV)

3.1.3.2

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High Speed Digital Instrumentation 3.1.3.3 VIH/VIL after focused calibration 3.2 3.2.1 3.2.2 3.3 3.3.1 VIH/VIL DC Output Current DC Output Current Hi Source DC Output Current Low Sink Output Impedance Resistance, DC VIH/VIL > 1 V from either voltage rail VIH/VIL < 1 V from either voltage rail Measured at current 30 mA. Impedance +/-(0.05% + 14 mV)

30 mA < I < 100 mA 30 mA < I < 100 mA

50 ohms, +/-2.5 ohms 50 ohms, +/-5 ohms typ. 50 ohms, nominal

3.3.2 3.4 3.4.1 3.4.2 3.4.2

Waveform Fidelity Overshoot or undershoot up to 25 ns <(20% delta V) after transition. Overshoot or undershoot 25 ns to 5 us <(1% delta V + 40 mV) after transition. Preshoot up to 2 ns before transition <(10% delta V) Transition is defined as the 80% point on the drive waveform. Valid when levels are more than 1 V from either rail. Rise/Fall Time 3 V swing (20%-80%) <5 ns 9 V swing (20%-80%) <10 ns Valid when levels are more than 1 V from either rail. When swinging within 1 V of a rail the edge transition time increases by 500 ps typically. Minimum Pulse Width (with full level and edge placement accuracy) 3 V swing 10 ns

3.5 3.5.1 3.5.2

3.6 3.6.1

4. 4.1 4.1.1 4.1.2 4.1.3 4.1.3.1 4.1.3.2 4.1.4

COMPARATOR SPECIFICATIONS VOH/VOL Voltage Voltage Voltage DC Voltage Levels ranges -2 to +7 V resolution 1 mV Accuracy for 0.5 V to 9 V swings VOH/VOL +/-(1.0% + 60 mV) VOH/VOL after focused calibration +/-(0.1% + 20 mV) Inputs are protected by a silicon diodes. This provides current protection of: 200 mA nominal This current is the total for all the channels cards in the test head. It is assumed that only a few boards will be in a overload state at a time. The diodes are clamped to voltages 0.2 V above and below the driver, comparator and load voltage rails. See spec 4.1.1 for the rail values.

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High Speed Digital Instrumentation 4.2 Input Impedance 4.2.1 DC resistance 4 Megohms nominal 4.2.2.1 Leakage <50 uA 4.2.2.2 Leakage, -2 V to +3 V <25 uA Assuming the IOH/IOL current loads are programmed to zero current. 4.3 Device Loading The device loading is most accurately modeled as a transmission line from the device under test to the channel card's pin electronics. 50 ohm transmission line from 7 ns typical Iso-pin (TM) to channel card through 1 M cable. Lumped capacitance on the path <2 pF typical (As measured by a 1 ns TDR waveform) Distributed capacitance of a precision 27 pF/ft Maximum 50 ohm coaxial cable (+/-1 ohm) Waveform Fidelity Overshoot or undershoot up to 25 ns <(20% delta V) after transition. Overshoot or undershoot 25 ns to 5 us <(1% delta V + 40 mV) after transition. typical Preshoot up to 2 ns before transition <(10% delta V) Transition is defined as the 80% point on the input waveform. Valid when levels are more than 1 V from either rail. (Driven by a backmatched source, channel's driver in HIZ) Input Minimum Pulse Width Minimum pulse detectable with comparators. Receiver Hysteresis 5 ns Minimum 12 ns @ 500 mV overdrive

4.3.1

4.3.2 4.3.3

4.4 4.4.1 4.4.2 4.4.3

4.5 4.6.1

4.7

2 mV typical

5. 5.1 5.1.1 5.1.2 5.1.3 5.1.3.1 5.1.3.2

DYNAMIC LOAD SPECIFICATIONS IOH/IOL Current Current Current DC Current Levels range resolution Accuracy IOH/IOL 0 ua to 32 mA IOH/IOL 300 ua to 10 mA Where |IOH| + |IOL| <= 10 mA For the entire test program

50 mA 5 uA +/-(1.0% + 250 uA) +/-(0.5% + 100 uA) typ.

VCP DC Voltage Levels Voltage range -2 to +7 V Voltage resolution 1 mV Voltage Accuracy (with no external load) For |Vcp - Vdut| > 1 V and: 5.2.3.1 IOH = IOL = 2 mA +/-(0.1% + 115 mV) Some headroom between the VDUT and the channel voltage rails is required to meet the accuracies stated above.

5.2 5.2.1 5.2.2 5.2.3

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High Speed Digital Instrumentation 5.3 Input Resistance, DC 50 ohms, +/-10 ohms The active load can be used to terminate the channel's transmission line if IOH and IOL are programmed to an appropriately large value and VCP is programmed to the desired termination voltage. Settling Time IOH/IOL settles to within +/- 10% of programmed value after transition through VCP.

5.4

<10 ns typically

6.

PER PIN PARAMETRIC MEASUREMENT UNIT (PPMU) A four quadrant Force Voltage and Measure Current or Force Current and Measure Voltage parametric measurement circuit. Voltage Voltage Voltage Voltage Voltage Voltage Forcing/Measuring (No load) range force resolution force accuracy measure resolution measure accuracy

6.1 6.1.1 6.1.2 6.1.3 6.1.4 6.1.5 6.2

-2 to +7 V 275 uV +/-(0.16% + 14 mV) 3.66 mV +/-(0.43% + 18 mV)

Current Forcing Ranges Range -------+/-2 mA +/-200 uA Resolution ---------220 nA 22 nA Accuracy ---------------+/-(0.25% + 17 uA) +/-(0.2% + 1.7 uA)

6.3

Current Measuring Ranges Range Resolution Accuracy ---------------------------------+/-2 mA 2.93 uA +/-(0.58% + 16 uA) +/-200 uA 293 nA +/-(0.52% + 2.1 uA) +/-20 uA 29.3 nA +/-(0.51% + 0.16 uA) +/-2 uA 2.93 nA +/-(1.0% + 21 nA) +/-200 nA 293 pA +/-(1.4% + 2.1 nA) Integrating current measurement ranges Acquire Time --------1 us 1 us 1 ms 10 ms 100 ms

* * * * 6.5 6.5.1 6.5.2 6.5.3

VSYS Level Range Resolution Accuracy

-2 to +7 V 59.6 mV +/-(0.15% + 60 mV)

7. 7.1 7.1.1

TIMING GENERATION

Clock Generation Master Clock (MCLK) The HSD25 subsystem timing is derived from a master clock source. Master clock originates from a 10 MHz reference in the system. 7.1.1.1 Frequency Range 160 MHz to 200 MHz Period Range 6.25 ns to 5 ns 7.1.1.2 Frequency Resolution 4 Hz 7.1.1.3 Frequency Accuracy 1 ppm + 1 ppm/year

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High Speed Digital Instrumentation 7.1.2 7.1.2.1 7.1.2.2 7.1.2.3 7.1.2.4 7.1.2.5 7.1.3 7.1.3.1 7.1.3.2 7.1.3.3 7.1.3.4 7.1.3.5 7.1.4 C0 Digital Subsystem Clock C0 is generated by dividing down from master clock. Frequency Range ~5 kHz to 25 Mhz Frequency Resolution <=1 Hz Frequency Accuracy 1 ppm + 1 ppm/year Divider Range 8 to 32771 Number of timing sets 1023 T0 Digital Subsystem Clock T0 is generated by dividing down from the C0 clock. Frequency Range ~5 kHz to C0 rate Frequency Resolution <=1 Hz Frequency Accuracy 1 ppm + 1 ppm/year Divider Range 1 to 255 Number of timing sets 1023 Clock Selection Each channel can select either T0 or C0 as its cycle clock. This allows clock channels to operate at a higher rate than data channels. Channels running on the C0 clock must be drive only. Edge Generation Timing Generators per Channel Up to six edges can be active per cycle per channel. Several of the edges have multiple functions depending on the mode selected for the channel. D0 - go active and if format is complement surround also go to complement of the data. D1 - go to the data value. D2 - if the format is a return format go to complement of the data. D3 - Go to HIZ or if the channel is in dual drive mode go to the complement of the 2nd cycle's data. R1 - Open compare window edge or if the channel is in dual drive mode, go to the 2nd cycle's data value. R2 - Close compare window or if the channel is in dual drive mode and the format is a return format, go to the complement of the 2nd cycle's data value. Timing Sets Number of timing sets 1023 There are 1023 global timing sets, TSETs. Each TSET number selects one of 32 sets of timing per channel, an edge set. Each edge set has unique timing information for each channel's six edges. TSETs can be changed on the fly on each vector. Selectable masking of any edge Repeat of the previous timing set within a pattern Formatting Capabilities Each channel can be independently programmed for one of three formatting modes: Normal I/O, Single Cycle I/O, and dual drive. Normal mode I/O Formats Each cycle is either a drive cycle or a compare cycle. Several drive and compare formats are supported both statically and dynamically. Drive Formats nrz, nrzc Non Return To Zero and its complement rz, rzc Return To Zero and its complement

7.2 7.2.1

7.2.2 7.2.2.1

7.2.2.2 7.2.2.3 7.2.3

7.2.3.1

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High Speed Digital Instrumentation ro, roc cs, csc clkhi clklo fhi flo off Return To One Complement Surround Clock High Clock Low Static drive high Static drive low Static HIZ and its complement and its complement independent of pattern independent of pattern independent of pattern independent of pattern independent of pattern

data data data data data

The following drive formats operate similarly to those above expect they operate only during drive cycles: drvclkhi, drvclklo, drvhi and drvlo. Compare Formats cmplo cmphi cmplog cmpmid cmppat cmpmask cmpoff

Compare to Low Compare to High Compare to Logic (also known as Valid) Compare to Midband Compare to Data Pattern Mask Comparator, Inhibits Pass/fail Comparisons Mask r1/r2 edges, turns off comparisons

The following compare formats operate similarly to those above expect they operate only during compare cycles: rcvlo, rcvhi, rcvlog, rcvmid, rcvmask. Pattern Data Bit Assignments (3 bits per channel) Pattern Bits Driver Comparator C B A State Expect ------------------0 0 0 Low Mask 0 0 1 Mask Mask 0 1 0 Repeat Mask 0 1 1 High Mask 1 0 0 HIZ Low 1 0 1 HIZ Midband 1 1 0 HIZ Valid 1 1 1 HIZ High 7.2.3.2 Single Cycle IO Mode Formats "io_midband and io_valid" Each cycle contains both drive and compare edges. There is no required sequence to the order of the drive portion of the cycle to the compare portion of the cycle. In IO mode return to HIZ is the default format. The edge assignments are the same as the I/O Mode. All of the formats listed for the I/O mode can be used in IO mode. Due to a limit in the number of pattern data bits there are two sets of formats. One supports testing logic outputs and the other digital signal outputs. To test a logic pin the io_midband format is selected. In this mode all expect pattern codes are supported with the exception of the valid expect code. To test a digital signal pin the io_valid format is

Pedit Symbol -----0 X 1 L M V H

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High Speed Digital Instrumentation selected. For this mode midband is not supported. Format Comparator Expect ---------Low Midband Mask High Low Midband Mask High

Pattern Data Bit Assignments for the io_midband Pattern Bits Driver C B A State ---------0 0 0 Low 0 0 1 Low 0 1 0 Low 0 1 1 Low 1 0 0 High 1 0 1 High 1 1 0 High 1 1 1 High

Pedit Symbols ------0 L 0 M 0 X 0 H 1 L 1 M 1 X 1 H

Pattern Data Bit Assignments for the io_valid Format Pattern Bits C B A ----0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 Driver State -----Low Low Low Low High High High High Comparator Expect ---------Low Mask Valid High Low Mask Valid High Pedit Symbols ------0 L 0 X 0 V 0 H 1 L 1 X 1 V 1 H

7.2.3.3 Dual Drive Mode Formats This mode uses the comparison edges to generate two drive states per cycle. It is a drive only mode of operation. Either drive state can be generated first. All of the same drive formats as normal mode are supported with the exception of the complement surround formats. Dual Drive Mode Pattern Data Bit Assignments Pattern Bits 1st Drive C B A State -------------X 0 0 Low X 0 1 High X 1 0 Low X 1 1 High 7.2.4

2nd Drive State ---------Low Low High High

Pedit Symbols ------0 0 1 0 0 1 1 1

Channel Output Initialization Prior to a pattern burst each channel can be initialized to a user specified condition: Driver LOW, HIGH or HIZ. At the start of a pattern burst the system will initialized all channels to: high, low or HIZ depending on what the first vector's pattern data is.

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High Speed Digital Instrumentation 7.2.5 Edge Range Minimum Maximum, the smaller of either:

7.2.6 7.2.7

or: Edge Resolution Edge Placement Accuracy Edge accuracy applies at the device socket. However, the device interface board must be in place at the time calibration is run and the HSD traces on the board must have a 50 ohm impedance. +/-1 +/-1 +/-1 +/-1 +/-1

0 ns 4*(Tester Cycles) 8*(MCLK period) 8188*(MCLK Period) (MCLK Period)/64

7.2.7.1 D1, D2 Edges 7.2.7.2 R1, R2 Edges Window Strobe Narrow Strobe (typical) Dual Drive Window type ----------Window Strobe Narrow Strobe Break point ----------(R2-R1) > 5 ns 2.5 ns < (R2-R1) < 5 ns

ns ns ns ns ns

7.2.7.3 D0, D3 Edges Used as Complement or HIZ Edges

+/-2 ns typical

7.2.7.4 Maximum electrical length of trace 2 ns typical deskewable from end of interface cables to device socket. 7.2.7.5 Reduction in edge placement accuracy when +/-150 ps calibration set has been interpolated 7.2.8 Edge Restrictions 7.2.8.1 Edge Regeneration time 4 MCLK periods This is the time required between the generation of any edge and the next occurrence of the same edge on the same channel. (i.e. D1 to the next D1) 7.2.8.2 Minimum Drive pulse width 10 ns Minimum This defines the minimum spacing between drive edges; D0, D1, D2, D3 as well as R1, R2 when operating in dual drive mode. (Level and edge placement accuracy may be degraded) 7.2.8.3 Minimum HIZ or Active pulse width 10 ns Minimum This defines the minimum spacing between HIZ control edges; D0 to D3 and D3 to D0. 7.2.8.4 Minimum R2 to R1 edge separation 8.5 ns Minimum This is the time required from the closing of a comparison window to the opening of the next comparison window on the same channel. 7.3 Pass/Fail Generation Pass/Fail status will be generated for each compare cycle that has a R2 edge. In cases where the R2 edge is masked the pass/ fail result is not determined until a cycle that closes the comparison window with a R2 edge occurs. All other cycles generate a default "Pass" status. A compare cycle will

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High Speed Digital Instrumentation generate a pass if the input to the digital channel is in a stable state for the entire comparison window and the state of the input matches the vector's expected state. HIGH LOW MIDBAND LOGIC 7.4 = Above the high comparator (VOH) and above the low comparator (VOL). = Below VOH and below VOL. = Below VOH and above VOL. = Above VOH or below VOL.

Logic Signal Generation The logic level detected at the comparator is generated for every channel for every comparison cycle. The logic signal will be a logic 1 if the input to the channel's comparator is not below the low comparator, VOL, at any time during the comparison window. If the channel's input was below the low comparator for the entire comparison window, a logic 0 value is returned. The ambiguity of whether the channel was high during the entire comparison window or a whether transition occurred can be eliminated by using an expect valid pattern format for the vector of interest. If a transition occurs the pattern will fail.

8. 8.1 8.1.1 8.1.1.1 8.1.1.2 8.1.1.3

Digital Vector I/O Pattern Source Number Of Digital Vectors Random access memory PRAM 16 k vectors Sequential Access Memory (SAM) 64 k vectors Optional Large Sequential Access Memory (SAM) 1 M vectors The memory architecture consists of a mixture of random access memory and sequential access memory. Patterns are automatically split up between the two memories by the system software. Pattern writing and debugging are both performed on a virtual vector pattern space. Pattern Memory Loading Patterns can be loaded from the Tester computer using DMA. Scan Testing Scan patterns can be coded into the vector memories.

8.1.2 8.1.3

9. 9.1 9.1.1 9.1.2 9.1.3

SEQUENCE CONTROL Microcode Memory Depth Random access memory PRAM Sequential Access Memory (SAM) Optional Large Sequential Access Memory (SAM) 16 k vectors 64 k vectors 1 M vectors

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High Speed Digital Instrumentation 9.2 9.2.1 Pattern Execution Control Basic Opcodes <blank> Continue to next vector unless the fail flag is set. If fail is set, halt. HALT Stop pattern execution unconditionally. It is not allowed on the very first vector executed. Opcode Modifiers NO_HALT Do not stop the pattern if there is a failure. By default a failing vector halts the pattern immediately. ICYC Inhibit counting by the cycle counter and the fail counter for this vector. MASK Masks the comparisons on all channels. Pass/Fail generation is inhibited but logic capture is still active. CLR_FAIL Clear formatter accumulated fail information that will be read back by the test program. The clear takes effect immediately; fails up to and including the current vector are cleared. QUAL Controls the capture of vectors into the history RAM in some of the history RAM modes. CLR_COND Clear the condition bits used to make conditional branches in the pattern. This modifier only works on conditional branch opcodes. Only the conditions being tested will be cleared. Repeat opcode REPEAT <n>

9.2.2

9.2.3

Execute this vector n times.

1 <= n <= 32768.

9.2.4

Looping Opcodes SET_LOOP <n> Push n onto loop stack, 1 <= n <= 65536. SET_LOOP 1 will execute vectors in loop once. There is a loop stack for this counter which allows a loop nesting level of 5. SET_LOOP1 <n> Set loop counter 1 to n, 1 <= n <= 65536. There is no loop stack for loop counter 1. SET_LOOP2 <n> Set loop counter 2 to n, 1 <= n <= 65536. There is no loop stack for loop counter 2. LOOP <n> Similar to SET_LOOP, but pushes n onto the stack the first time only, not each time the loop executes. LOOP1 <n> Similar to SET_LOOP1, but sets loop counter 1 the first time only, not each time the loop executes. LOOP2 <n> Similar to SET_LOOP2, but sets loop counter 2 the first time only, not each time the loop executes. EXIT_LOOP <label> Pop loop stack and jump to label. Used for early escape from a loop. Can only be used with LOOP and SET_LOOP. END_LOOP <label>Decrement the loop counter. If not zero, goto label. If zero, pop loop stack and continue. Can only be used with SET_LOOP and LOOP. END_LOOP1 <label>Decrement loop counter 1. If not zero, goto label. If zero, continue. Can only be used with SET_LOOP1 and LOOP1. END_LOOP2 <label>Decrement loop counter 2. If not zero, goto label.

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High Speed Digital Instrumentation If zero, continue. Can only be used with SET_LOOP2 and LOOP2. Pop the loop counter stack. Terminate a match-mode loop. Decrement loop counter. If non-zero and failure detected, goto label. Else continue.

POP_LOOP MATCH <label>

9.2.5

Branching JUMP <label> Go to vector specified unconditionally. SET_GLO <label> Loads the global address register with the address of the vector with the specified label. This register may also be loaded from the IMAGE program using the "set hsd50 global_address" statement. JMP_GLO Jump to the address in the global address register. Subroutine Calls Subroutine stack depth CALL <label> EXE_GLO RETURN EXE_ARG

9.2.6

8 levels

END_ARG PUSH <label> POP 9.2.7

Call vector specified as a subroutine. Call the address in the global address register as a subroutine. Return from CALL or EXE_GLO. Called from within a subroutine: execute the vectors following the CALL until an END_ARG is encountered. Terminate subroutine argument vectors; transfer control back to subroutine. Push address of label onto subroutine stack. Pop subroutine stack.

Conditional operations IF (FLAG), JUMP, ENABLE <FLAG> The commands JUMP, CALL, RETURN, EXIT_LOOP, EXE_ARG, END_ARG, EXE_GLO, and JMP_GLO may be made conditional on any of four conditions using the ENABLE and IF statements. The conditions are: FAIL A failing vector was detected. PASS No failing vector has been detected. CPU The pattern has been signaled by the test program statement "resume hsd50". EXT Vector bus cage or formatter cage condition was detected. SCF Other SCM executed the SET_SCF opcode. To invert the sense of a test, '!' may precede the condition. All conditions are latched until a CLR_COND or CLR_FLAG command is executed. ENABLE <flag list> Enables the testing of multiple condition flags The flags can be ANDed or ORed together. ENABLE must occur on a vector previous to the one containing the IF. CLR_FLAG <flag list>Clears the specified condition flags. in the pattern. The condition bits are FAIL, CPU, EXT, and SCF.

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High Speed Digital Instrumentation

9.2.8

Synchronization READCODE <n> Return a readback code to the test program. CLR_CODE Erase a previous READCODE. A code persists until this command is issued, even across different pattern runs. SET_SCF Set SCF condition on the other SCM. Cycle Counter 32 bits wide This counter keeps track of how many tester cycles have been executed. Since vectors can be repeated the number of vectors in a pattern will often not equal the number of cycles executed. Counting may be inhibited under microcode control. Fail Counter 16 bits wide This counter keeps track of how many cycles the fail flag as been asserted. In general it will equal the number of failing cycles in a pattern. Counting may be inhibited under microcode control. Debug Features History RAM 4 k vectors Tester cycles can be captured in a RAM. There are several modes of operating this RAM to aid in debugging. Capture all cycles. Capture only cycles qualified by the QUAL opcode modifier. Start capture on the first vector with a QUAL. Capture the first 63 failures. Start capture after Nth Cycle. There are two modifiers to the HRAM's operation: Capture until full or wrap. Compress repeat cycles. For each channel either Pass/Fail or logic data can be selected for storage. For the SCM, cycle count, vector and flag status are stored.

9.3

9.4

9.5 9.5.1

9.5.2

Sequencer Debug Features Global Mask Of Comparators For N Cycles. Halt After N Cycles. Halt On Fails. Inhibit Halt On Fail. Inhibit Halt On Fail For N Cycles. Keep Alive Operation 1 to 16 vectors This mode always the HSD subsystem to continue to provide a simple pattern to the device under test while various memories within the subsystem are reloaded. Entry into Keep Alive occurs on the vector programmed and starts at the first keep alive vector. Exit from Keep Alive occurs at the end of the keep alive pattern and starts sourcing the first vector of the pattern indicated. All failures can be masked during keep alive so accumulated fail can be valid across keep alive

9.6

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High Speed Digital Instrumentation boundaries. Memories that can be reloaded: All vector memories, 16 K and 1 Meg. All channel timing values, ie. edge_sets. The channel's TSET to edge_set mappings. Memories that cannot be reloaded: The divider timing sets for T0 and C0. Channel setup that cannot be modified: Drive and receive formats. Channel card DC level values. Channel card relay setups T0 and C0 clock divider values. 9.7 9.7.1 System Pipelines (number of cycles) 39

9.7.2

9.7.3

SCM Vector To Dpin Output From the SCM executing a vector to the data for that vector arriving at the DUT. Dpin Input To SCM Formatter Fail Or Condition Flag From the cycle on which a vector's data arrives at the DUT and the DUT is tested to the cycle on which a branch can be conditional on the DUT's response, FAIL or EXT. SCM Vector To Branchable Result From the SCM executing a vector to the cycle on which a branch can be conditional on the DUT's response, FAIL or EXT.

21

60

10. 10.1 10.2 11. 11.1 11.1.1 11.1.2 11.2

DC MATRIX FRONT END DC Path Series Resistance From Kelvin Point Number of connections TIME MEASUREMENT INTERFACE TO DIGITAL CHANNELS

<=0.65 ohms typical 1 matrix/8 channels

Time Measurement (TMS) access on each HSD channel Start, Stop, and/or Enable on either HSD Comparator (vol, voh) Enable channel access to either HSD Comparator

Time Measurement Interface Accuracy TMS path length error correction through the HSD comparators. 11.2.1 Path Length Error (rising edge to rising edge) 11.2.1.1Relative to HSD channel +/-300 ps 11.2.1.2Relative to non-HSD channel +/-5.0 ns HSD to non-HSD performance is only specified for systems with a TDR test head board of -01 or greater version. Part number 879-943-01. 11.2.2 Analog Parameters (Cin, Trigger Level Error, etc.) See section 4.

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Notes:

15

High Speed Sampler

1) Thermal tail compensation utilized. 2) AD928-03 unit driven from a source with output resistance <=50 ohms. 3) Applies after a minimum of 30 minute warm-up of the sampler control card in the test head, and after a minimum 5 minute warm-up of the AD928 sampler front end. Ambient temperature changes occurring after calibration may degrade DC offset further. See DC offset drift specs (1.14.X). 4) dT refers to the change in ambient temperature between the time when DC offset calibration was performed and the time when the actual measurement was made on the DUT (in degrees centigrade). 5) Rsource is the parallel combination of the source resistance of the circuitry driving the sampler front end and the input resistance of the sampler front end (typically 13 kohm). For example, assume the AD928-03 were driven from a DUT (or DIB circuit) having a 300 ohm output resistance, and a 2 degree C temperature change was anticipated between the time DC calibration was performed and the time the measured result was taken. This might be the case if the DC offset were not calibrated every time the job was run. The worst case DC offset drift would be: +/-(0.1 mV + ((0.3 mV *2) + (300*0.4e-6)*2)) = +/-0.94 mV 6) Aperture jitter is uncertainty in the timing position of where the input signal is sampled. Timing reference for the sampling event is the system 10 MHz reference (the reference supplied to the aux clock unit). The specification thus includes jitter of the aux clock unit. The DUT, DUT clock, and DIB-derived sampler clock (if used) can add to the total jitter in a given application. These jitter components can be added to the sampler jitter using a square-root-of-the-sum-of-the-squares type of calculation to determine total jitter SDR means the user programmed strobe delay range, in nanoseconds. SWR means the user programmed sweep window range, in nanoseconds. CSR means the sampler clock slew rate, in volts per nanosecond. 7) Actual full scale ranges may be read back within the test program using the function tl_hfsc_get_sweep_window() or tl_hfsc_get_strobe_range(). 8) Specification applies after autocalibration. Includes effects of sweep linearity and sweep range accuracy. SWR means the user programmed sweep window range. For example, if the 300 ns sweep window range was

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High Speed Sampler chosen, the accuracy would be: +/-(0.5 ns + (300 ns * 0.0025) + (300 ns/600 us) * 300 ns) = +/-1.4 ns Now, if a sweep resolution of 256 were used, the effective sampling rate would be 256/300 ns, or 853 MHz. The time interval between samples would be 1/853 MHz, or 1.17 ns. The accuracy of this time interval would be: +/-((1.4 ns/300 ns) * 1.17 ns) = +/-5.4 ps So the nominal size of each of the 255 time intervals would be 1.17 ns +/- 5.4 ps (that is, all intervals have the same nominal error). Note that timing jitter may force averaging techniques to be used to achieve the above accuracy. 9) Aperture delay is the time delay from the occurrence of a clock input to the sampler to the actual point on the analog input waveform that is sampled. The aperture delay variation is the unit-to-unit variation of the aperture delay (for the sampler front end unit). When several sampler front end units are included on a DIB for a particular application, the aperture delay variation is sometimes referred to as the skew between the sampler front end units. The aperture delay variation can be reduced to almost zero with a DIB-type deskew. This process generally requires that jumpers be manually placed into the DUT socket during the deskew procedure. Limitations on the accuracy of this deskew are imposed by timing jitter, noise, and equal path length wiring techniques on the DIB. Deskew to a level of +/-75 ps has been demonstrated. 10) The strobe signal from the master controller is distributed to each sampler front end using a buffer located on the DIB. Relative skew of this buffer is not included in this specification. 11) The strobe signal for each sampler front end comes directly from the sampler control card. Only one front end is connected to each sampler control card. 12) The actual effective sampling rate in sweep mode depends on the user programmed sweep window and sweep increment resolution: eff. samp. rate = (sweep inc. res./sweep window) In step mode, the effective sample rate depends on the user programmed sample clock frequency and the DUT clock frequency, and therefore is only limited by the sampler ref clock divider range. See the User Manual for methodology used to compute the effective sample rate. 13) For sweep increment resolution programmed to 4, the sweep window is limited to less than 1.5 us. For sweep increment resolution programmed to 2, the sweep window is limited to less than 640 ns. 14) The strobe repetition period must always be at least 2.25 times longer than the sweep_window or the strobe_range to achieve specified linearity. In sweep mode, if sweep_resolution is smaller than 4096, the strobe repetition period must be further increased by a factor of (sweep_res)/(sweep_res-1) 15) When using the system aux clock at frequencies in the range of 200 MHz to 250 MHz to provide the clock for the sampler, the aux clock amplitude

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High Speed Sampler must be programmed in the range of 0 dB to -7 dB. the use of the -8 dB and -9 dB settings. Cable losses prohibit

16) The risetime specification of 350 ps corresponds to a 10% to 90% risetime. Verification of this specification is performed at the 20% to 80% points with a 221 ps test limit. 17) The range beyond 1.0 V is still usable with reduced linearity specifications. 18) The DC accuracy of the AD706-00 can be calibrated to the accuracy of the AD928-XX using a simple gain correction. 19) Spec only guaranteed when used with Teradyne AD706-00 compatible configuration boards. 20) Spec valid for a 50 ohm source impedance. Lower source impedances will yield a more extreme DC offset.

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High Speed Sampler I. 1.0 1.1 1.2 1.2.1 1.2.2 1.3 1.3.1 1.3.2 1.4 1.4.1 1.4.2 1.5 1.6 1.6.1 1.6.2 1.6.3 1.6.4 1.6.5 1.7 HIGH FREQUENCY SAMPLER INSTRUMENTATION SPECIFICATIONS GENERAL SPECIFICATIONS Voltage Resolution Bandwidth AD928-XX AD706-00 Risetime (NOTE 16) AD928-XX AD706-00 Input Voltage Range AD928-XX AD706-00 Maximum Safe Input Voltage Input Resistance AD928-03 AD928-02 AD928-01 AD928-00 AD706-00 Input Capacitance - AD928-XX units only 2 - 16 bits (adjustable)

DC to > 1 GHz DC to > 520 MHz

<350 ps <675 ps

+/-2.048 V +/-1.0 V +/-3 V nominal

>10 kohm, <16 kohm 75 ohm +/-1% nominal 50 ohm +/-1% nominal 37.5 ohm +/-1% nominal 50 ohm +2/-1% nominal <5 pF nominal

1.8 Settling Time (NOTE 1) 1.8.1 AD928-00 unit 1.8.1.1 to +/-1500 uV of final value 1.8.1.2 to +/-750 uV of final value 1.8.1.3 to +/-400 uV of final value 1.8.2 AD928-01 unit 1.8.2.1 to +/-1500 uV of final value 1.8.2.2 to +/-750 uV of final value 1.8.2.3 to +/-400 uV of final value 1.8.3 AD928-02 unit 1.8.3.1 to +/-1600 uV of final value 1.8.3.2 to +/-800 uV of final value 1.8.3.3 to +/-425 uV of final value 1.8.4 AD928-03 unit 1.8.4.1 to +/-1500 uV of final value 1.8.4.2 to +/-800 uV of final value 1.8.4.3 to +/-500 uV of final value 1.8.5 AD706-00 unit 1.8.5.1 to +/-1100 uV of final value 1.8.5.2 to +/-600 uV of final value 1.8.5.3 to +/-400 uV of final value 1.9 1.9.1 1.9.2 1.10 Noise (BW = 1 GHz) AD928-XX (NOTE 2) AD706-00 DC Linearity

<4 ns <6 ns <15 ns <4 ns <6 ns <15 ns <4 ns <6 ns <15 ns <6 ns <8 ns <15 ns <40 ns <80 ns <100 ns

<100 uV RMS <175 uV RMS +/-0.01% of Input Voltage Range

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High Speed Sampler

1.11 1.11.1 1.11.2 1.12 1.12.1 1.12.2 1.12.3 1.13 1.13.1 1.13.2 1.13.3 1.14 1.14.1 1.14.2 1.15 1.15.1 1.15.2 1.15.3 1.16 1.17

DC Accuracy AD928-XX AD706-00 (NOTE 18) DC Offset (uncalibrated) AD928-00, -01, -02 AD928-03 AD706-00 (NOTES 19, 20) DC Offset (calibrated) (NOTE 3) ref clk freq DC to < 20 MHz ref clk freq 20 MHz to < 130 MHz ref clk freq 130 MHz to 250 MHz

+/-0.1% of reading +/- DC offset +/-0.1%, -1.1% of reading +/- DC offset

+/-7.0 mV +/-440 mV +/-10 mV

+/-0.5 mV +/-1.5 mV +/-2.5 mV

DC Offset Drift (NOTE 4) AD928-00, -01, -02, AD706-00 +/-0.3 mV/dT nominal AD928-03 (NOTE 5) +/-((0.3 mV/dT) + (Rsource*0.4 uA)/dT) nominal Total Harmonic Distortion Fin < 15 MHz Fin < 40 MHz Fin < 100 MHz DIB Clock Frequency Range (NOTE 15) DIB Clock dV/dt

-52 dB typical -47 dB typical -45 dB typical <250 MHz >5 V/us

2.0 2.1 2.2 2.2.1 2.2.2 2.3 2.4 2.5 2.6 2.7 2.8

TIMEBASE SPECIFICATIONS Effective Sampling Rate (NOTE 12) Aperture Jitter (NOTE 6) Sweep Mode Fixed, Step Modes Aperture Delay Variation (NOTE 9) Strobe Delay Range (SDR) (NOTE 7) Strobe Delay Resolution Strobe Delay Linearity Sweep Window Range (SWR) (NOTE 7) Sweep Increment Resolution (NOTE 13) 40 ns to 4 us, in >12288 ranges 1/4096 (12 bits) of SDR +/-0.25% of SDR 40 ns to 4 us, in >12288 ranges 1/(2**n) of SWR, for integer n = 1 to 12 +/-0.25% of SWR <10 ps nominal

< +/-(1 ps+(3.5 V/CSR)+(SWR/10E3)) RMS < +/-(1 ps+(3.5 V/CSR)+(SWR/10E3)) RMS

2.9 2.10

Sweep Increment Linearity

Sweep Increment Absolute Accuracy (NOTE 8) +/-(0.5 ns + (0.25% + (SWR/600 us) * 100% of SWR)) Strobe Repetition Rate (NOTE 14) >=1.3 us

2.11

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NOTES: NOTE 1 NOTE 2

16

High Voltage Ammeter

Specifications supported after HVA autocalibration. Specification applies to ammeter current over-range to 1/2 A. Ammeter is fused at 1 A. Specification applies at the end of the standard linear delivery system. Applies to DC leakage currents at +/-750 VDC from ground. Feature applies to HVA+ only. Applies when 2 KV delivery system is used. Limited to 1 KV when connected to the HPM or a bulkhead configured for use at 1 KV.

NOTE 3

NOTE 4 NOTE 5 NOTE 6

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High Voltage Ammeter I. 0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.2 0.2.1 0.2.2 0.3 0.3.1 0.3.2 0.3.3 0.3.4 0.4 0.4.1 0.4.2 0.5 0.5.1 0.5.2 0.5.3 0.6 0.7 HIGH VOLTAGE AMMETER INSTRUMENTATION SPECIFICATIONS HIGH VOLTAGE AMMETER FEATURES On board matrix capability. 2 high lines in per each of 2 stations 6 low lines out per each of 2 stations. Series connection to HPM Parallel connection to HPM Direct input line from HVS (Note 5) Programmable guards Guards on 2 direct input lines Guards on 6 direct output lines Input floatability 1400 V minimum 1000 V minimum 2040 V minimum 2040 V minimum

pin-to-pin isolation capability. pin-to-ground isolation capability. pin-to-pin isolation capability. (Notes 5,6) pin-to-ground isolation capability. (Notes 5,6)

Alarms provide flagging for: Ammeter over-range/blown fuse Guard current alarm Instrument Protection Overcurrent protection- protected for 500 mA overrange. Fused at 1 A Generates system shutdown for fuse blown or overrange. (Note 5) Self-test capability using only the System Calibration Standard. Access to System Measure Bus for Ammeter calibration.

1.0

AMMETER ACCURACY (note 1) RANGE ---------------100 mA 10 mA 1 mA 100 uA 10 uA 1 uA ACCURACY --------------+/-0.2% +/- 120 uA +/-0.2% +/- 12 uA +/-0.2% +/- 1.2 uA +/-0.2% +/- 120 nA +/-0.2% +/- 30 nA +/-0.5% +/- 20 nA

1.1 1.2 1.3 1.4 1.5 1.6

2.0 2.1 2.2

AMMETER VOLTAGE DROP Current under-range Current over-range > +/-[(Iprog. * 5 ohms) +/- 10 mV] typical > +/- [(Iprog. * 5 ohms) +/- 800 mV] typical

3.0

GUARD ALARM

> 1.5 mA source or sink typical

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High Voltage Ammeter 4.0 AMMETER SETTLING TIME TO 1% OF RANGE (Note 3) RANGE ---------------100 mA 10 mA 1 mA 100 uA 10 uA 1 uA SETTLING TIME (nominal) --------------<1 ms <1 ms <1 ms <5 ms <10 ms <50 ms

4.1 4.2 4.3 4.4 4.5 4.6

5.0 5.1 5.2 5.3 5.4

MAXIMUM FLOATABILITY, nominal 1000 V any input/output to ground 1400 V pin-to-pin 2040 V any input/output to ground (Notes 5,6) 2040 V pin-to-pin (Notes 5,6)

6.0 6.1 6.2 6.3

LEAKAGE CURRENT (Notes 3 and 4) Any input/output to ground, guard on Any input/output to ground, guard off Ammeter guards to ground

<50 nA typical <10 uA typical <10 uA typical

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17

High Voltage Digital Card (HVDC)

The HVDC is high voltage digital version of the A5 HSD digital. It is compatible with the existing A5 HSD channel cards but contains a rider board which allows a high voltage digital mode. For the HSD equivalent specifications, consult the HSD-50. The specifications listed below cover the additional specifications of the HV Digital Card in used through the high voltage rider board.

0.1

High Voltage Digital Card Key Features

High Voltage Digital channel card is equivalent to the A5 HSD channel cards but contains a HV digital rider which can provide up to eight channels of 27 V digital drive and 48 V digital compare capability. Each HV Digital Card pin can be used as either a HV pin or a standard HSD pin. Each HV Digital Card pin is provides high voltage I/O.

No change in DIB Pogo pin assignments for HSD digital pins in normal or extended mode No extra relays on the DIB - all switching is done on the HV Digital Card rider card. Up to 64 HV Digital Card pins on the A565 or A567 Simple, familiar programming in the IMAGE environment. The HV digital card has three high voltage modes of operation: HV voltage drive only mode (hv_drv) HV drive-receive mode (hv_drv_rcv) mode for I/O HV receive only mode (hv_rcv) note below that this mode has higher bandwidth and short circuit protection.

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High Voltage Digital Card (HVDC) 1 1.1 General Specifications Max number of HV channels by system type: High Voltage Digital Card Key Features

1.1.1 A565 system64 channels x 2 heads 1.1.2 A567 system64 channels x 2 heads 1.2 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 Number of HV channels/board: 8 channels (8 drive + 8 receive) Driver Specifications Max data rate at 27 V drive: 10 MHz NRZ (Clock rate 5 MHz) Driver edge placement accuracy with autocalibration: < 10 ns Drive voltage resolution: 5 mV Drive level accuracy: < (1.25% +150 mV) Driver output impedance: 50 ohms 10% Minimum drive pulse width: 100 ns at 50% points Driver rise time: < 30 ns 20%-80% at 27 V swing Driver fall time: < 30 ns 20%-80% at 27 V swing VIH, VIL range: -0.5 to 27 V

2.10 Max driver current at 27 V: 15 mA 2.11 Short circuit protection range in drive or drive-receive mode: -3 to +30 V (maximum HVDC input voltage beyond which damage may occur) 2.12 Maximum driver settling time: 75ns after 80% point to 5% of spec 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 HV Comparator Specifications Max Compare Rate: 10 MHz Comparator voltage resolution: 8 mV Worst case compare timing accuracy after autocalibration: 5 ns Maximum compare Input Impedance: 1Mohm 5% Compare input capacitance: 30 pF lumped capacitance - typical Minimum pulse detection: 50 ns at 50% points Compare voltage accuracy: < (1.25%+100 mV) Maximum compare voltage settling time: 25 ns from 80% point to 5% of spec Compare Levels Range for VOH VOL for each high voltage digital mode:

3.9.1 Mode: hv_drv_rcv: 0 to 27 V 3.9.2 Mode: hv_drv: Not applicable 3.9.3 Mode: hv_rcv: 0 to 48 V 3.10 Short circuit protection in Receive mode: -24 to +64 V (maximum voltage at HVDC input beyond which damage may occur) 3.11 Maximum comparator receive bandwidth in high voltage receive mode: 25 MHz typical 3.12 Maximum compare receive bandwidth in high voltage drive receive mode: 10 MHz typical 4 Version Date 9906 I/O specifications 172

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High Voltage Digital Card (HVDC) 4.1 4.2 4.3 4.4 High Voltage Digital Card Key Features Worst case D0, D3 timing accuracy with autocalibration: 30 ns Minimum tristate settling time: 20 ns typical, Voltage during settling time is programmable using VHiz Minimum tristate input resistance: 100 kohms

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NOTES:

18

IF Modulated Source

1) All Specifications apply at the DIB "blind mate" RF connector. 2) All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms. 3) Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). 4) Level Accuracy < 10 dBm = Absolute Accuracy @ 10 dBm + Step Attenuator Relative Accuracy + Fine Attenuator Relative Accuracy + Mismatch Errors @ DUT. - Only count error sources that are used, @ 10 dBm do not count either Step or Fine Attenuator errors, at 1 dB Step increments do not count Fine Attenuator, and so on. Level Accuracy > 10 dBm = Absolute Accuracy @ 10 dBm + >10 dBm Relative Accuracy + Mismatch Errors @ DUT. 5) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 6) TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. 7) NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed. 8) Section 3 applies when the optional IF Modulated Source capability is present. This requires the use of the VHFAWG as the fundamental modulated signal source. See the VHFAWG ESSD for detailed specifications covering the conditions applicable to the IF Modulated Source as noted in this ESSD. 9) Items 3.6-3.9 are measured at output carrier frequencies of 5 MHz, 45 MHz, 90 MHz, 110 MHz, 150 MHz, and 180 MHz. 10) Items 3.6.3, 3.7.1, and 3.7.2 above have no limitations other than waveform resolution (12 bits) and sampling criteria outlined in sections 2.0, 3.0, 4.0, and 5.0 of the VHFAWG ESSD. 11) Digital modulation types measured for 5 MHz output frequency. are calculated from 256 symbols. Results

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IF Modulated Source 1.0 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.2 1.2.1 1.2.2 1.3 1.4 1.4.1 1.5 FEATURES Frequency Ranges (CW Mode) 4.5 - 500 MHz 500 - 1000 MHz 1000 - 2000 MHz 2000 - 4000 MHz Level Range 4.5 - 3500 MHz 3500 MHz - 4000 MHz Level Resolution Test Head Level Control Step Attenuators Level Compensation for Load Impedance Resolution 1 Hz steps 2 Hz steps 4 Hz steps 8 Hz steps

+13 dBm to -50 dBm +10 dBm to -50 dBm <0.1 dB

1, 2, 4, 8, 16, 32 dB

1.6 Modulation Modes 1.6.1 Analog Modes 1.6.2 Digital Modes Arbitrary 1.7 1.7.1 1.7.2 Modulation Mode Frequency Ranges 5 - 68 MHz 68 - 180 MHz

CW, AM, FM, Phase, Pulse, Arbitrary 0.3 GMSK, 0.5 GMSK, DECT, CT2,

Resolution 1 Hz steps 2 Hz steps

2.0 2.1

CW SPECIFICATIONS Frequency Accuracy Directly derived from the LA302 system Frequency Reference Module.

2.2 Level Accuracy 2.2.1 Absolute Accuracy @ 10 dBm 2.2.1.1 4.5 MHz - 50MHz +/-0.35 dB 2.2.1.2 50 MHz - 1300 MHz +/-0.25 dB 2.2.1.3 1300 - 3000 MHz +/-0.35 dB 2.2.1.4 3000 - 4000 MHz +/-0.45 dB 2.2.2 Step Attenuator Relative Accuracy <10 dBm 2.2.2.1 4.5 - 2000 MHz (These limits are typical from 4.5 MHz-50 MHz) 2.2.2.1.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.1.2 (8,16,32 dB Att. selected) +/-0.30 dB 2.2.2.1.3 Additional error if 2 Att. sel. +/-0.15 dB 2.2.2.1.4 Additional error if 3-6 Att. sel.+/-0.25 dB 2.2.2.2 2000 - 2999 MHz 2.2.2.2.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.2.2 (8,16,32 dB Att. selected) +/-0.35 dB 2.2.2.2.3 Additional error if 2 Att. sel. +/-0.10 dB 2.2.2.2.4 Additional error if 3 Att. sel. +/-0.20 dB 2.2.2.2.5 Additional error if 4-6 Att. sel.+/-0.30 dB 2.2.2.3 3000 - 4000 MHz 2.2.2.3.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.3.2 (8,16,32 dB Att. selected) +/-0.45 dB 2.2.2.3.3 Additional error if 2 Att. sel. +/-0.25 dB

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IF Modulated Source 2.2.2.3.4 Additional error if 3 Att. sel. +/-0.60 dB 2.2.2.3.5 Additional error if 4-6 Att. sel.+/-0.95 dB 2.2.3 Fine Attenuator Relative Accuracy < 10 dBm 2.2.3.1 4.5 to 300 MHz +/-0.15 dB 2.2.3.2 300 to 3000 MHz +/-0.10 dB 2.2.3.3 3000 to 4000 MHz +/-0.15 dB 2.2.4 Relative Accuracy > 10 dBm 2.2.4.1 4.5 to 3000 MHz 2.2.4.1.1 10 - 11 dBm +/-0.3 dB 2.2.4.1.2 11 - 12 dBm +/-0.4 dB 2.2.4.1.3 12 - 13 dBm +/-0.5 dB 2.2.4.2 3000 to 4000 MHz 2.2.4.2.1 10 - 11 dBm +/-0.5 dB 2.2.4.2.2 11 - 12 dBm +/-0.6 dB 2.2.4.2.3 12 - 13 dBm +/-0.7 dB 2.3 Settling Time (includes software overhead) 2.3.1 Frequency Settling Time <500 us to 0.1 rad. 2.3.2 Level Settling Time 2.3.2.1 0.06 dB/Attenuator Bit up to 0.12 dB of final value in <2 ms 2.3.2.2 0.03 dB/Attenuator Bit up to 0.06 dB of final value in <10 ms (NOTE: The 32 dB Attenuator Bit is actually two 16 dB pads, so the limit is 0.12 dB @ 2 ms and 0.06 dB @ 10 ms) (NOTE: When crossing either 1000 MHz and 2000 MHz, the level settling time is 10 ms to 0.1 dB) 2.4 2.4.1 Spectral Purity SSB Phase noise (+13 to -10 dBm and -22 to -40 dBm output levels) Frequency Offset from carrier 1 kHz 10 kHz 10 MHz --------------------------------------------------------------4.5 - 500 MHz -110 dBc -118 dBc -122 dBc 500 - 1000 MHz -104 dBc -114 dBc -118 dBc 1000 - 2000 MHz -98 dBc -108 dBc -113 dBc 2000 - 4000 MHz -92 dBc -102 dBc -108 dBc SSB Phase noise (-10 to -21 dBm and -40 to -50 dBm output levels) Frequency Offset from carrier 1 kHz 10 kHz 10 MHz --------------------------------------------------------------4.5 - 500 MHz -108 dBc -112 dBc -113 dBc 500 - 1000 MHz -104 dBc -110 dBc -112 dBc 1000 - 2000 MHz -98 dBc -106 dBc -110 dBc 2000 - 4000 MHz -92 dBc -101 dBc -106 dBc Harmonic Spurious vs. Output Power Level Freq Range 12 - 13dBm 11 - 12dBm 10 - 11dBm --------------------------------------------------------------4.5- 50 MHz (Typ.) -25 dBc -25 dBc -25 dBc 50 - 1000 MHz -25 dBc -25 dBc -25 dBc 1000 - 1100 MHz -25 dBc -25 dBc -24 dBc 1100 - 2000 MHz -25 dBc -27 dBc -28 dBc 2000 - 2500 MHz -26 dBc -26 dBc -27 dBc 2500 - 4000 MHz -30 dBc -31 dBc -32 dBc

2.4.2

2.4.3

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IF Modulated Source Freq Range 5 - 10dBm 0 - 5dBm <0 dBm ----------- ---------------------------------------------------4.5 - 50 MHz (Typ.) -25 dBc -29 dBc -30 dBc 50 - 1000 MHz -25 dBc -29 dBc -30 dBc 1000 - 1100 MHz -25 dBc -28 dBc -30 dBc 1100 - 2000 MHz -29 dBc -32 dBc -35 dBc 2000 - 2500 MHz -28 dBc -32 dBc -33 dBc 2500 - 4000 MHz -33 dBc -35 dBc -35 dBc 2.4.4 Non-Harmonic Spurious 4.5 - 500 MHz 500 - 1000 MHz 1000 - 2000 MHz 2000 - 4000 MHz 1/2 & 3/2 FO 4.5 - 250 MHz 250 - 3000 MHz 3000 - 4000 MHz Residual FM (in 300 Hz - 15 kHz BW) 4.5 - 500 MHz 500 - 1000 MHz 1000 - 2000 MHz 2000 - 4000 MHz

-58 -54 -50 -46

dBc dBc dBc dBc

2.4.5

-66 dBc -55 dBc -50 dBc <3 Hz <7 Hz <13 Hz <25 Hz

2.4.6

2.5 Output Impedance 2.5.1 Impedance 2.5.2 VSWR 2.5.2.1 4.5 - 1000 MHz 2.5.2.2 1000 - 2000 MHz 2.5.2.3 2000 - 3000 MHz 2.5.2.4 3000 - 4000 MHz

50 Ohm nominal <1.5:1 <1.7:1 <2.0:1 <2.2:1 output output output output typ. typ. typ. typ.

3.0 3.1

MODULATION SPECIFICATION Sample Rate Restrictions for VHFAWG Mod. Input Freq (Fo) --------------------1.9 MHz - 2.1 MHz 1.9 MHz - 2.1 MHz 11.5 MHz - 12.5 MHz 29.5 MHz - 34.5 MHz Frequency Range Resolution Settling Time RF Output Spectral Purity Non-Harmonic Spurious Harmonic Spurious VHFAWG Filter ------------4 MHz 5.5 MHz Bypass Bypass Min. Sample Rate ---------------4.5 MHz + Fo 4.5 MHz + Fo 32 MHz + Fo 16 MHz + 3xFo

3.1.1 3.1.2 3.1.3 3.1.4 3.2 3.2.1 3.2.2 3.2.3 3.3 3.4 3.4.1 3.4.2

5.0 MHz to 180.0 MHz 1 Hz for 5.0 - 68.0 MHz, 2 Hz for 68.0 - 180.0 MHz 500 us max. to 0.1 radian (same as CW mode)

-58 dBc max. (same as CW Mode)

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IF Modulated Source 3.5 3.5.1 3.5.2 3.5.3 3.5.4 3.6 3.6.1 3.6.2 3.6.3 3.6.4 Modulation Frequency Response 2 MHz Mod. Input Freq. 12 MHz Mod. Input Freq. 32 MHz Mod. Input Freq. Group Delay +/-0.5 dB BW (min.) ---------------300 kHz 1.0 MHz 5.0 MHz 50 ns max. +/-1 dB Bandwidth (min.) --------------1.0 MHz 1.5 MHz 8.0 MHz 50 ns max.

Amplitude Modulation (see note 9) Output Level Range Accuracy Distortion + Noise

<=0 dBm (carrier power level) 0 - 100% (see note 10) 1.0% for 90% AM, 1 kHz mod., 300 Hz to 15 kHz bandwidth.

3.7 3.7.1 3.7.2 3.7.3

Frequency Modulation (see note 9) Deviation Range Deviation Accuracy Distortion + Noise

(see note 10) (see note 10) 0.1% max. for 1 kHz mod., 12 kHz and 25 kHz dev. measured in 300 Hz - 15 kHz BW, 75 us deemph. (see note 9) 2 deg. (0.035 rad.) max. for 0.5 rad. peak dev. (10 kHz peak dev. at 20 kHz rate.). (see note 9) 2 deg. (0.035 rad.) max. for 0.5 rad. peak dev. (288 kHz peak. dev. at 576 kHz rate)

3.8 3.8.1

Phase Modulation Deviation Error

3.9 3.9.1

Wideband Frequency/Phase Modulation Deviation Error

3.10 Digital Modulation (see note 11) 3.10.1 PI/4-DQPSK (Pi/4-shifted Differential Phase Shift Keying) 3.10.1.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.1.2 Error Vector Magnitude 2% rms, 4% peak 3.10.1.3 Magnitude Error 1% rms, 2% peak 3.10.1.4 Phase Error 1 deg. rms, 2 deg. peak 3.10.2 0.3GMSK/GSM (0.3-Gaussian Minimum Shift Keying, GSM Standard) 3.10.2.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.2.2 Magnitude error 1% rms, 2% peak 3.10.2.3 Phase error 1 deg. rms, 2 deg. peak 3.10.3 0.5GMSK/CT-2 (0.5-Gaussian Minimum Shift Keying, CT-2 Standard) 3.10.3.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.3.2 Magnitude error 1% rms, 2% peak 3.10.3.3 Phase error 1 deg. rms, 2 deg. peak 3.10.4 0.5GMSK/DECT (0.5-Gaussian Minimum Shift Keying, DECT Standard) 3.10.4.1 Modulation Input Freq. 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.4.2 Magnitude error 2% rms, 4% peak 3.10.4.3 Phase error 2 deg. rms, 4 deg. peak

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NOTES:

19

LA302 System Frequency Reference

1) ACCURACY VS. CALIBRATION INTERVAL The following are some examples of the worst case accuracy based on four different calibration intervals. These examples assume adjustment to +/-1 x 10e-8 with a calibration standard accurate to +/-3 x 10e-8. Calibration Interval -------------------30 Days 90 Days 180 Days 1 Yr. Accuracy -------+/- 8 x 10e-8 +/- 1.4 x 10e-7 +/- 2.3 x 10e-7 +/- 3.5 x 10e-7

Accuracy = +/-(Settability + Temp. Stab. + cal std. + Aging)

SYSTEM 10 MHz FREQUENCY REFERENCE SPECIFICATIONS

1 1.1 1.2 1.3 1.4 1.4.1 1.4.2 1.5

Frequency Accuracy Initial Accuracy Adjustability Temperature Stability (0 - 50 deg. C) Aging Rate Per Day Per Year Warm-up

+/-1 x 10e-7 +/-1 x 10e-8 +/-1 x 10e-8

+/-1 x 10e-9 +/-3 x 10e-7 <2 hours

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Notes: 1.

20

Low Current Ammeter

Instrument specifications are valid at the system isopins on A5 systems with AL or AMS test heads. For systems with PATH test heads, the specifications are valid at the configuration board. Certain tests require the connection of external equipment or the use of wired paths between the instrument I/O and the DUT site. The use of Teflon isolated isopads (Teradyne p/n 464-533-00 or equivalent), low noise triaxial cable (Coaxco p/n 33-1009 Yellow or equivalent) and low current/low noise wiring techniques is mandatory on all fixturing external to the board on A5 systems. In general, the signal node must be surrounded by driven shield and guarded where necessary to prevent leakage and noise. The term PLC refers to one power line cycle of 1/60 Hz (16.67 ms) or 1/50 Hz (20.00 ms) duration depending on line frequency. Low current measurements are significantly influenced by fixturing and measurement methodology. Fixturing must employ low current/ low noise wiring techniques to limit the influence of external electrical and mechanical perturbations on the signal. Certain measurement techniques make possible the removal of offsets and systematic fixturing effects. Consult the appropriate Teradyne applications note for a discussion of low current fixturing and measurement techniques. When used as an extension, insertion accuracy (IA) of the LCA must be combined with the accuracy of the instrument serving as the source or measurement device. The Low Current Ammeter is usable in the following versions of IMAGE and Solaris operating systems on A5 systems: IMAGE V5.0 to IMAGE V6.2.ir1 - SunOS 4.4.1 and earlier IMAGE V6.3 and IMAGE V6.3.y2k - SunOS 4.4.1 and earlier and Solaris 2.5.1 IMAGE V6.4 - SunOS 4.4.1 and Solaris 2.5.1

2.

3.

4.

5.

6.

7.

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Low Current Ammeter VARIANCES The following variances have been applied against the specifications: 3.1.3 Ranges and Measurement Accuracy for A5 systems Level nPLC Type Accuracy (%rdg + offset) --------------------------------3.1.3.6 100 pA 8 INT +/-3.5% +/- 5 pA + f.e.* 3.1.3.7 10 pA 15 INT +/-3.5% +/- 5 pA + f.e.*

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Low Current Ammeter I. Low Current Ammeter Instrumentation Specifications

1. 1.1

LCA Channels Expandability Minimum of 8 channels, expandable in 8 channel increments.

2. 2.1 2.1.1

LCA Basic Functions

Connectivity Matrix, THADS, User Clock, Grounds - Two internal channel card (cc) busses, each LCA channel connects to either internal bus. - Two matrix pins per card, each to one cc bus - Two THADS connections per card, each to one cc bus - One user clock per card, connects to both cc busses 2.1.2 Pogo Block I/O 2.1.2.1 A5 systems - DUT signal - Triax connection to instrument input with dual shields 2.1.3 Trigger Bus - Accepts trig bus 1-6 to drive commutation selector 2.1.4 Measure Bus - Driven differentially, channel selectable either statically or via commutation selector 2.1.5 Calibration Bus - Used to transfer system reference to on-board calibration standard 2.2 2.2.1 2.2.2 2.1.2.1 2.2.3 2.3 Force and Measure Functions Current Measurement Via Resistive I/V Mode 10 uA to 100 nA full scale Current Measurement Via Integrate I/V Mode A5 systems 10 nA to 10 pA full scale Current Measurement Via Resistive Extension Mode 10 uA to 100 nA full scale Commutation Selector - 256 possible timeslots - Selects one of 8 channels for presentation to measure bus - Modulo-n operation (repeats) - Driven by trigger lines 1-6 - May be driven by CPU

3. 3.1 3.1.1 3.1.2

LCA Electrical Specifications (within operating environment) Electrical Specifications, Measurement in ITOV Mode Common Mode Voltage Range Voltage Offset

+/-60 V +/-1.05 mV

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Low Current Ammeter 3.1.3 Ranges and Measurement Accuracy for A5 systems (at 0 V common mode & for specified measurement interval) Level nPLC Type Accuracy (%rdg + offset) --------------------------------10 uA n/a RES +/-1.5% +/- 50 nA 1 uA n/a RES +/-1.5% +/- 5 nA 100 nA n/a RES +/-2.0% +/- 500 pA 10 nA 1 INT +/-2.0% +/- 50 pA 1 nA 4 INT +/-2.5% +/- 5 pA + f.e.* 100 pA 8 INT +/-3.5% +/- 2 pA + f.e.* 10 pA 15 INT +/-3.5% +/- 2 pA + f.e.* * = Fixture Error, see Notes 3 & 5. Electrical Specifications, Force in Extension Mode (all given specifications are typical) Common Mode Voltage Range +/-60 V (typ.) Voltage Offset +/-1.05 mV (typ.) Ranges and Forcing Accuracy for A5 systems (at 0 V common mode) Range Type Insertion Accuracy (1PLC) (% rdg + offset) ----------------------10 uA RES +/-2.0% +/- 50 nA + s.m.a.* 1 uA RES +/-2.0% +/- 5 nA + s.m.a.* 100 nA RES +/-2.5% +/- 500 pA + s.m.a.* * = Source/Measurement Accuracy, see Note 6.

3.1.3.1 3.1.3.2 3.1.3.3 3.1.3.4 3.1.3.5 3.1.3.6 3.1.3.7

3.2 3.2.1 3.2.2 3.2.3

3.2.3.1 3.2.3.2 3.2.3.3

4. 4.1 4.2 4.3 4.4 4.5

Absolute Maximum Ratings (exceeding these ratings may damage the channel) Maximum Input Drive Voltage Maximum Drive Voltage With Shorted Output Maximum Short Circuit Output Current Maximum Sustained Current Maximum Output With Input Drive Removed Users should take precautions against shorting the LCA output and against leaving the input drive open. +/-65 V +/-40 V +/-10 mA +/-1 mA +/-73 V

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Notes:

21

Low Frequency AC 100 Digitizer

1) Notation Notes: + = arithmetic sum or = greater value of ++ = rms sum Vin = peak input voltage applied Vrng = voltage range of digitizer Vbl = programmed dc baseline 2) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 3) TYPICAL specifications are sample tested, are NOT 100% tested, and are NOT guaranteed. 4) NOMINAL specifications are generally calculated values, are NOT 100% tested, and are NOT guaranteed. 5) Total Noise Specifications exclude THD. 6) DC Offset and Absolute Accuracy specifications do not include errors due to DC Baseline Accuracy, which is specified separately. 7) Low Frequency Noise and Drift are guaranteed after system warmup, at least 20 minutes after power is applied to the test head containing the channel card.

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Low Frequency AC 100 Digitizer 1 1.1 1.1.1 1.1.2 GENERAL SPECIFICATIONS (frequency range independent) Input Voltage Range Signal +/-11.0 V peak Blocked DC (AC coupling on: 949-658-00 Dual Channel card Only) +/-150 Vdc, nominal Differential Signal Input Voltage Waveform Range and Resolution Resolution Ranges +/-11.0 V peak

1.2 1.3 1.3.1 1.3.2

16 bits/range 14.48 V peak (max Vin 11.0 V peak) 10.24 V peak 7.24 V peak 5.12 V peak 3.62 V peak 2.56 V peak 1.81 V peak 1.28 V peak 0.905 V peak 0.640 V peak 0.452 V peak 0.320 V peak 0.226 V peak 0.160 V peak 0.113 V peak

1.4 1.4.1 1.4.2 1.4.3 1.4.4 1.5 1.6 1.7 1.7.1 1.7.1.1 1.7.1.2 1.7.1.3 1.7.1.4 1.7.2 1.7.2.1 1.7.2.2 1.7.2.3 1.7.2.4 1.7.2.5 1.7.3 1.7.3.1 1.7.3.2 1.7.3.3 1.7.3.4 1.7.3.5

DC Baseline Removal Range Resolution (17 bits) Accuracy Long Term DNL Input Impedance Input Capacitance Common Mode Rejection DC - 100 Hz, Amplitude Range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 226 mV 160 mV - 113 mV 100 Hz - 1 kHz, Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV 160 mV - 113 mV 1 kHz - 20 kHz, Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV 160 mV - 113 mV

+/-11.0 V peak 168 uV +/-(Vbl*6 + 0.5) mV 14 bits >9.8 MOhm nominal <200 pF nominal

>80 dB >85 dB >90 dB >105 dB >65 >70 >70 >75 >85 >35 >40 >45 >50 >60 dB dB dB dB dB dB dB dB dB dB

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Low Frequency AC 100 Digitizer 1.7.4 20 kHz - 100 kHz, Amplitude range: 1.7.4.1 14.48 V - 7.24 V 1.7.4.2 5.12 V - 3.62 V 1.7.4.3 2.56 V - 905 mV 1.7.4.4 640 mV - 226 mV 1.7.4.5 160 mV - 113 mV 1.8 1.8.1 1.8.2 1.8.3 1.8.3.1 1.8.3.2 1.8.4 1.9 1.10 1.10.1 1.10.2 1.11 1.12 1.12.1 1.12.2 Settling Time (after change in -) DC Baseline Voltage Range "bandwidth" 2,5 kHz 20, 100 kHz "connect" DC Offset Time Measurement Access Path Length Error (after autocalibration) Input Capacitance Capture Memory Depth AC coupling (949-658-00 Dual Chan Card Only) LF cutoff, precharge off LF cutoff, precharge on

>25 >30 >30 >35 >50

dB dB dB dB dB

<2 ms <5 ms <10 ms <4.5 ms <4.5 ms <(Vrng*1.5 + 1.0) mV

+/-5 ns nominal <500 pF nominal 256k samples

3.5 Hz nominal 17 kHz nominal

FREQUENCY RANGE 1: 0.1 Hz - 100 Hz (static linearity parameters)

2.0 Operating Conditions: 2.0.1 Anti-aliasing Filter (bandwidth) 2.0.2 Sample Rate Range 2.0.2.1 Minimum 2.0.2.2 Maximum 2.1 2.2 2.3 2.4 2.4.1 2.4.2 2.5 2.6 Waveform Linearity Error Input Linearity Error Absolute Accuracy

2 kHz 8 kHz 125 kHz +/-30 ppm +/-5 ppm +/-(Vin*5 + 5) mV

Low Frequency Noise (<10 Hz) and Drift Baseline off <(10 + (Vrng*seconds)) uV peak typical Baseline on <(38 + (Vrng*seconds) + (Vbl*1.25*seconds)) uV peak Spectral Impurities (85 dB) Total noise (50 Hz - 2 kHz) (85 dB) <(Vrng*40 or 5) uVrms <(Vrng*40 ++ 5) uVrms

3 3.0 3.0.1

FREQUENCY RANGE 2: 50 Hz - 2 kHz Operating Conditions: Anti-aliasing Filter (bandwidth)

2 kHz

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Low Frequency AC 100 Digitizer 3.0.2 Sample Rate Range 3.0.2.1 Minimum 3.0.2.2 Maximum 3.1 3.2 3.3 3.4 Sine Wave Amplitude Accuracy (0.05 dB) Total Harmonic Distortion (85 dB) Non-harmonic Spurious (85 dB) Total Noise (50 Hz - 2 kHz) (85 dB)

8 kHz 125 kHz +/-(Vin*6.9 + 1) mV <(Vin*40 or 5) uVrms <(Vrng*40 or 5) uVrms <(Vrng*40 ++ 5) uVrms

FREQUENCY RANGE 3: 50 Hz - 5 kHz

4.0 Operating Conditions: 4.0.1 Anti-aliasing Filter (bandwidth) 4.0.2 Sample Rate Range 4.0.2.1 Minimum 4.0.2.2 Maximum 4.1 4.2 4.3 4.4 Sine Wave Amplitude Accuracy Total Harmonic Distortion (85 dB) Non-harmonic Spurious (85 dB) Total Noise (50 Hz - 5 kHz) (85 dB)

5 kHz 16 kHz 125 kHz (0.06 dB +/-(Vin*6.9 + 1) mV typical +/-(Vin*38 + 1) mV worst case <(Vin*40 or 5) uVrms <(Vrng*40 or 5) uVrms <(Vrng*40 ++ 5) uVrms

FREQUENCY RANGE 4: 50 Hz - 20 kHz

5.0 Operating Conditions: 5.0.1 Anti-aliasing Filter (bandwidth) 5.0.2 Sample Rate Range 5.0.2.1 Minimum 5.0.2.2 Maximum 5.1 Sine Wave Amplitude Accuracy (0.06 dB)

20 kHz 64 kHz 500 kHz +/-(Vin*6.9 + 1) mV typical +/-(Vin*38 + 1) mV worst case <(Vin*40 or 5) uVrms <(Vrng*40 or 5) uVrms <(Vrng*40 ++ 10) uVrms

5.2 5.3 5.4

Total Harmonic Distortion (85 dB) Non-harmonic Spurious (85 dB) Total Noise (50 Hz - 20 kHz) (85dB)

FREQUENCY RANGE 5: 50 Hz - 100 kHz

6.0 Operating Conditions: 6.0.1 Anti-aliasing Filter (bandwidth) 6.0.2 Sample Rate Range 6.0.2.1 Minimum 6.0.2.2 Maximum

100 kHz 320 kHz 781.25 kHz

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Low Frequency AC 100 Digitizer 6.1 Sine Wave Amplitude Accuracy (0.6 dB) +/-(Vin*72 + 1) mV typical +/-(Vin*778 + 1) mV worst case <(Vin*130 or 5) uVrms <(Vrng*130 or 5) uVrms <(Vrng*130 ++ 15) uVrms

6.2 6.3 6.4

Total Harmonic Distortion (75 dB) Non-harmonic Spurious (75 dB) Total Noise (50 Hz - 100 kHz) (75 dB)

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Notes: 1)

22

Low Frequency AC 100 Source

Spectral impurities include only non-harmonically related spectral components. Notation Notes: + = arithmetic sum or = greater value of ++ = rms sum Vpk = programmed amplitude Vbl = programmed dc baseline Total Noise Specifications exclude THD.

2)

3)

4) TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. 5) NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed. 6) Total Noise Specifications exclude THD. 7) DC Offset and Absolute Accuracy specifications do not include errors due to DC Baseline Accuracy, which is specified separately. 8) Low Frequency Noise and Drift are guaranteed after system warmup, at least 20 minutes after power is applied to the test head containing the channel card.

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Low Frequency AC 100 Source I. 1 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.4 1.4.1 1.4.2 1.5 1.6 1.7 1.7.1 1.7.2 LFAC-100 SOURCE INSTRUMENTATION SPECIFICATIONS General Specifications (frequency range independent) Peak Output Voltage (AC + DC) Waveform Resolution DC Baseline Range Resolution Accuracy Long Term DNL Waveform Amplitude Range & Resolution DC to 100 kHz Resolution Output Current Compliance Limit Maximum Short Circuit Current Overcurrent Alarm Detection Threshold (879-858-45 CC only) (949-658-00 Dual CC) +/-11.0 Vpk 16 bits

+/-11.0 V (17 bits) 168 uV +/-(Vbl*6 + 0.5) mV 14 Bits

<10.24 Vpk <1 mdB >20 mA <65 mA

<45 mA <65 mA

1.8 Output Impedance (DC - 100 kHz) 1.8.1 25 Ohms (879-858-45 CC only) 1.8.1.1 Accuracy 1.8.1.2 Max. Capacitive Load 1.8.2 Low Z 1.8.2.1 Zout 1.8.2.1.1 (879-858-45 CC) 1.8.2.1.2 (949-658-00 Dual CC) 1.8.2.2 Max. Capacitive Load 1.8.2.2.1 (879-858-45 CC) 1.8.2.2.2 (949-658-00 Dual CC) 1.8.3 Remote Kelvin (C pin, 879-858-45 CC only) 1.8.3.1 Zout 1.8.3.2 Max. Capacitive Load 1.9 Slew Rate

+/-1 Ohm >1 nF nominal

<1 Ohm <2 Ohm >100 pF nominal >1 nF nominal <0.1 Ohm >100 pF nominal >8 V/us nominal

1.10 Settling Time (after change in -) 1.10.1 DC Baseline 1.10.2 Waveform Amplitude (attenuator change) 1.10.3 Waveform Amplitude (same attenuator) 1.10.4 "lpfilt" 1.10.4.1 2 kHz 1.10.4.2 20, 100 kHz 1.10.5 "connect" 1.11 1.12 1.12.1 DC Offset Time Measurement Access Path Length Error (after autocalibration)

<2 ms <5 ms <1 ms <10 ms <4.5 ms <4 ms <(Vpk*2 + 2) mV

+/-5 ns nominal

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Low Frequency AC 100 Source 1.12.2 Input Capacitance <500 pF nominal

2 2.0 2.0.1 2.1 2.2 2.3 2.4 2.4.1 2.4.2 2.5 2.5.1 2.6 2.6.2

Frequency Range 1: 0.1 Hz - 100 Hz (static linearity parameters) Operating Conditions Smoothing Filter (lpfilt) Waveform Linearity Error Output Linearity Error Absolute Accuracy

2 kHz +/-30 ppm +/-5 ppm +/-(Vpk*5 + 5) mV

Low Frequency Noise (<10 Hz) and Drift Baseline off <(10 + (Vpk * seconds)) uVpeak typical Baseline on <(25 + (Vpk*seconds) + (Vbl*1.25*seconds)) uVpeak Spectral Impurities 50 Hz - 1 MHz (85 dB) Total Noise (BW) 50 Hz - 1 MHz (85 dB)

<(Vpk*40 or 40) uVrms

<(Vpk*40 ++ 40) uVrms

3 3.0 3.0.1 3.1 3.1.1

Frequency Range 2: 50 Hz - 2 kHz Operating Conditions Smoothing Filter (lpfilt) Sine Wave Amplitude Accuracy (+0.1 dB, -0.5 dB)

2 kHz

+(Vpk*12 + 1) mV -(Vpk*59 + 1) mV <(Vpk*40 or 40) uVrms

3.2 3.3 3.3.1 3.4 3.4.1

Total Harmonic Distortion (85 dB) Spectral Impurities 50 Hz - 1 MHz (85 dB) Total Noise (BW) 50 Hz - 1 MHz (85 dB)

<(Vpk*40 or 40) uVrms

<(Vpk*40 ++ 40) uVrms

4 4.0 4.0.1 4.1 4.1.1

Frequency Range 3: 50 Hz - 20 kHz Operating Conditions Smoothing Filter (lpfilt) Sine Wave Amplitude Accuracy (+0.1 dB, -0.5 dB)

20 kHz

+(Vpk*12 + 1) mV -(Vpk*59 + 1) mV <(Vpk*40 or 40) uVrms

4.2 4.3 4.3.1

Total Harmonic Distortion (85 dB) Spectral Impurities 50 Hz - 1 MHz (85 dB)

<(Vpk*40 or 40) uVrms

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Low Frequency AC 100 Source

4.4 4.4.1

Total Noise (BW) 50 Hz - 1 MHz (85 dB)

<(Vpk*40 ++ 40) uVrms

5 5.0 5.0.1 5.1 5.1.1

Frequency Range 4: 50 Hz - 100 kHz Operating Conditions Smoothing Filter (lpfilt) Sine Wave Amplitude Accuracy (+0.5 dB, - 1.0 dB)

100 kHz

+(Vpk*59 + 1) mV -(Vpk*120 + 1) mV

5.2 5.2.1 5.3 5.3.1 5.4 5.4.1 5.4.2

Total Harmonic Distortion 50 kHz - 100 kHz (75 dB) Spectral Impurities 100 kHz - 1 MHz (75 dB) Total Noise (BW) 50 Hz - 100 kHz (75 dB) 50 Hz - 1 MHz (65 dB)

<(Vpk*130 or 40) uVrms

<(Vpk*130 or 40) uVrms

<(Vpk*130 ++ 40) uVrms <(Vpk*400 ++ 40) uVrms

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23

Microwave Source

1) All Specifications apply at the DIB "blind mate" RF connector. 2) All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms. 3) Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). 4) Level Accuracy < 10 dBm = Absolute Accuracy @ 10 dBm + Step Attenuator Relative Accuracy + Fine Attenuator Relative Accuracy + Mismatch Errors @ DUT. - Only count error sources that are used, @ 10 dBm do not count either Step or Fine Attenuator errors, at 1 dB Step increments do not count Fine Attenuator, and so on. Level Accuracy > 10 dBm = Absolute Accuracy @ 10 dBm + >10 dBm Relative Accuracy + Mismatch Errors @ DUT. 5) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 6) TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. 7) NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed. 8) Section 3 applies when the optional IF Modulated Source capability is present. This requires the use of the VHFAWG as the fundamental modulated signal source. See the VHFAWG ESSD for detailed specifications covering the conditions applicable to the IF Modulated Source as noted in this ESSD. 9) Items 3.6-3.9 are measured at output carrier frequencies of 5 MHz, 45 MHz, 90 MHz, 110 MHz, 150 MHz and 180 MHz. 10) Items 3.6.3, 3.7.1, and 3.7.2 above have no limitations other than waveform resolution (12 bits) and sampling criteria outlined in sections 2.0, 3.0, 4.0, and 5.0 of the VHFAWG ESSD. 11) Digital modulation types measured for 5 MHz output frequency. are calculated from 256 symbols. Results

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Microwave Source 1.0 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.2 1.2.1 1.2.2 1.2.3 1.3 1.4 1.4.1 1.5 1.6 1.6.1 1.6.2 FEATURES Frequency Ranges 4.5-500 MHz 500-1000 MHz 1000-2000 MHz 2000-4000 MHz Level Range CW mode without IF Modulated Source 4.5 - 4000 MHz CW mode with IF Modulated Source 4.5 - 3500 MHz 3500 MHz - 4000 MHz Level Resolution Test Head Level Control Step Attenuators Level Compensation for Load Impedance Modulation Modes (with optional IF Modulated Source capability) Analog Modes CW, AM, FM, Phase, Pulse, Arbitrary Digital Modes 0.3GMSK, 0.5GMSK, DECT, CT2, Arbitrary, Pi/4-DQPSK Modulation Mode Frequency Ranges (with optional IF Modulated Source capability) Resolution 5 - 68 MHz 1 Hz Steps 68 - 180 MHz 2 Hz Steps Resolution 1 Hz steps 2 Hz steps 4 Hz steps 8 Hz steps

+13 dBm to -50 dBm +13 dBm to -50 dBm +10 dBm to -50 dBm <0.1 dB

1, 2, 4, 8, 16, 32 dB

1.7

1.7.1 1.7.2

2.0 2.1

SPECIFICATIONS Frequency Accuracy Directly derived from the LA302 system Frequency Reference Module

2.2 Level Accuracy 2.2.1 Absolute Accuracy @ 10 dBm 2.2.1.1 4.5 MHz - 50MHz +/-0.35 dB 2.2.1.2 50 MHz - 1300 MHz +/-0.25 dB 2.2.1.3 1300 - 3000 MHz +/-0.35 dB 2.2.1.4 3000 - 4000 MHz +/-0.45 dB 2.2.2 Step Attenuator Relative Accuracy < 10 dBm 2.2.2.1 4.5 - 2000 MHz (These limits are typical from 4.5 MHz-50 MHz) 2.2.2.1.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.1.2 (8,16,32 dB Att. selected) +/-0.30 dB 2.2.2.1.3 Additional error if 2 Att. sel. +/-0.15 dB 2.2.2.1.4 Additional error if 3-6 Att. sel.+/-0.25 dB 2.2.2.2 2000 - 2999 MHz 2.2.2.2.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.2.2 (8,16,32 dB Att. selected) +/-0.35 dB 2.2.2.2.3 Additional error if 2 Att. sel. +/-0.10 dB 2.2.2.2.4 Additional error if 3 Att. sel. +/-0.20 dB

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Microwave Source 2.2.2.2.5 Additional error if 4-6 Att. sel.+/-0.30 dB 2.2.2.3 3000 - 4000 MHz 2.2.2.3.1 (1,2,4 dB Att. selected) +/-0.25 dB 2.2.2.3.2 (8,16,32 dB Att. selected) +/-0.45 dB 2.2.2.3.3 Additional error if 2 Att. sel. +/-0.25 dB 2.2.2.3.4 Additional error if 3 Att. sel. +/-0.60 dB 2.2.2.3.5 Additional error if 4-6 Att. sel.+/-0.95 dB 2.2.3 Fine Attenuator Relative Accuracy < 10 dBm 2.2.3.1 4.5 to 300 MHz +/-0.15 dB 2.2.3.2 300 to 3000 MHz +/-0.10 dB 2.2.3.3 3000 to 4000 MHz +/-0.15 dB 2.2.4 Relative Accuracy > 10 dBm 2.2.4.1 4.5 to 3000 MHz 2.2.4.1.1 10 - 11 dBm +/-0.3 dB 2.2.4.1.2 11 - 12 dBm +/-0.4 dB 2.2.4.1.3 12 - 13 dBm +/-0.5 dB 2.2.4.2 3000 to 4000 MHz 2.2.4.2.1 10 - 11 dBm +/-0.5 dB 2.2.4.2.2 11 - 12 dBm +/-0.6 dB 2.2.4.2.3 12 - 13 dBm +/-0.7 dB 2.3 Settling Time (includes software overhead) 2.3.1 Frequency Settling Time <500 us to 0.1 rad. 2.3.2 Level Settling Time 2.3.2.1 0.06 dB/Attenuator Bit up to 0.12 dB of final value in <2 ms 2.3.2.2 0.03 dB/Attenuator Bit up to 0.06 dB of final value in <10 ms (NOTE: The 32 dB/Attenuator Bit is actually two 16 dB pads, so the limit is 0.12 dB @ 2 ms and 0.06 dB @ 10 ms.) (NOTE: When crossing either 1000 MHz and 2000 MHz, the level settling time is 10 ms to 0.1 dB.) 2.4 2.4.1 Spectral Purity SSB Phase noise (+13 to -10 dBm and -22 to -40 dBm output levels) Frequency Offset from carrier 1 kHz 10 kHz 10 MHz --------------------------------------------------------------4.5 - 500 MHz -110 dBc -118 dBc -122 dBc 500 - 100 MHz -104 dBc -114 dBc -118 dBc 1000 - 2000 MHz -98 dBc -108 dBc -113 dBc 2000 - 4000 MHz -92 dBc -102 dBc -108 dBc SSB Phase noise (-10 to -21 dBm and -40 to -50 dBm output levels) Frequency Offset from carrier 1 kHz 10 kHz 10 MHz --------------------------------------------------------------4.5 - 500 MHz -108 dBc -112 dBc -113 dBc 500 - 1000 MHz -104 dBc -110 dBc -112 dBc 1000 - 2000 MHz -98 dBc -106 dBc -110 dBc 2000 - 4000 MHz -92 dBc -101 dBc -106 dBc

2.4.2

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Microwave Source 2.4.3 Harmonic Spurious vs. Output Power Level Freq Range 12 - 13 dBm 11 - 12 dBm 10 - 11 dBm --------------------------------------------------------------4.5 - 50 MHz (Typ.) -25 dBc -25 dBc -25 dBc 50 - 1000 MHz -25 dBc -25 dBc -25 dBc 1000-1100 MHz -25 dBc -25 dBc -24 dBc 1100-2000 MHz -25 dBc -27 dBc -28 dBc 2000-2500 MHz -26 dBc -26 dBc -27 dBc 2500-4000 MHz -30 dBc -31 dBc -32 dBc Freq Range 5 - 10 dBm 0 - 5 dBm <0 dBm --------------------------------------------------------------4.5- 50 MHz (Typ.) -25 dBc -29 dBc -30 dBc 50 - 1000 MHz -25 dBc -29 dBc -30 dBc 1000-1100 MHz -25 dBc -28 dBc -30 dBc 1100-2000 MHz -29 dBc -32 dBc -35 dBc 2000-2500 MHz -28 dBc -32 dBc -33 dBc 2500-4000 MHz -33 dBc -35 dBc -35 dBc 2.4.4 Non-Harmonic Spurious 4.5 - 500 MHz 500 - 1000 MHz 1000 - 2000 MHz 2000 - 4000 MHz 1/2 & 3/2 FO 4.5 - 250 MHz 250 - 3000 MHz 3000 - 4000 MHz Residual FM (in 300 Hz - 15 kHz BW) 4.5 - 500 MHz 500 - 1000 MHz 1000 - 2000 MHz 2000 - 4000 MHz

-58 -54 -50 -46

dBc dBc dBc dBc

2.4.5

-66 dBc -55 dBc -50 dBc <3 Hz <7 Hz <13 Hz <25 Hz

2.4.6

2.5 Output Impedance 2.5.1 Impedance 2.5.2 VSWR 2.5.2.1 4.5 - 1000 MHz 2.5.2.2 1000 - 2000 MHz 2.5.2.3 2000 - 3000 MHz 2.5.2.4 3000 - 4000 MHz

50 ohm nominal <1.5:1 <1.7:1 <2.0:1 <2.2:1 output output output output typ. typ. typ. typ.

3.0

MODULATION SPECIFICATIONS (with optional IF Modulated Source capability) (see note 8) Sample Rate Restrictions for VHFAWG Mod. Input Freq (Fo) --------------------1.9 MHz - 2.1 MHz 1.9 MHz - 2.1 MHz 11.5 MHz - 12.5 MHz 29.5 MHz - 34.5 MHz VHFAWG Filter ------------4 MHz 5.5 MHz Bypass Bypass Min. Sample Rate ---------------4.5 MHz + Fo 4.5 MHz + Fo 32 MHz + Fo 16 MHz + 3xFo

3.1

3.1.1 3.1.2 3.1.3 3.1.4

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Microwave Source 3.2 3.2.1 3.2.2 3.2.3 3.3 3.4 3.4.1 3.4.2 3.5 Frequency Range Resolution Settling Time RF Output Spectral Purity Non-Harmonic Spurious Harmonic Spurious

5.0 MHz to 180.0 MHz 1 Hz for 5.0 - 68.0 MHz, 2 Hz for 68.0 - 180.0 MHz 500 us max. to 0.1 radian. (same as CW mode)

-58 dBc max. (same as CW Mode)

3.5.1 3.5.2 3.5.3 3.5.4 3.6 3.6.1 3.6.2 3.6.3 3.6.4

Modulation Frequency Response +/-0.5 dB BW (min.) ---------------2 MHz Mod. Input Freq. 300 kHz 12 MHz Mod. Input Freq. 1.0 MHz 32 MHz Mod. Input Freq. 5.0 MHz Group Delay 50 ns max. Amplitude Modulation (see note 9) Output Level Range Accuracy Distortion + Noise

+/-1 dB Bandwidth (min.) --------------1.0 MHz 1.5 MHz 8.0 MHz 50 ns max.

<=0 dBm (carrier power level) 0 - 100% (see note 10) 1.0% for 90% AM, 1 kHz mod., 300 Hz to 15 kHz bandwidth

3.7 3.7.1 3.7.2 3.7.3

Frequency Modulation (see note 9) Deviation Range Deviation Accuracy Distortion + Noise

(see note 10) (see note 10) 0.1% max. for 1 kHz mod., 12 kHz and 25 kHz dev. measured in 300 Hz-15 kHz BW, 75 us deemph.

3.8 3.8.1

Phase Modulation (see note 9) Deviation Error

2 deg. (0.035 rad.) max. for 0.5 rad. peak dev. (10 kHz peak dev. at 20 kHz rate)

3.9 3.9.1

Wideband Frequency/Phase Modulation (see note 9) Deviation Error 3 deg. (0.052 rad.) max. for 0.5 rad. peak dev. (288 kHz peak. dev. at 576 kHz rate)

3.10 Digital Modulation (see note 11) 3.10.1 PI/4-DQPSK (Pi/4-shifted Differential Phase Shift Keying) 3.10.1.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.1.2 Error Vector Magnitude 2% rms, 4% peak 3.10.1.3 Magnitude Error 1% rms, 2% peak 3.10.1.4 Phase Error 1 deg. rms., 2 deg. peak 3.10.2 0.3 GMSK/GSM (0.3-Gaussian Minimum Shift Keying, GSM Standard) 3.10.2.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.2.2 Magnitude error 1% rms, 2% peak 3.10.2.3 Phase error 1 deg. rms., 2 deg. peak 3.10.3 0.5 GMSK/CT-2 (0.5-Gaussian Minimum Shift Keying, CT-2 Standard) 3.10.3.1 Modulation Input Freq. 2 MHz, 12 MHz, 32 MHz (+/-0.5 dB BW)

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Microwave Source 3.10.3.2 Magnitude error 1% rms, 2% peak 3.10.3.3 Phase error 1 deg. rms, 2 deg. peak 3.10.4 0.5 GMSK/DECT (0.5-Gaussian Minimum Shift Keying, DECT Standard) 3.10.4.1 Modulation Input Freq. 12 MHz, 32 MHz (+/-0.5 dB BW) 3.10.4.2 Magnitude error 2% rms, 4% peak 3.10.4.3 Phase error 2 deg. rms, 4 deg. peak

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Specs
NOTES: 1 2

24

Octal V/I Source

All system metering specifications apply with the system meter filter on. All specifications for voltage accuracy apply at the point the Kelvin (force to sense) connections are made. Voltage accuracy only applies when there is only one point of connection for each OVI channel High and Low Sense. All specifications for current accuracy apply to the current flow from the OVI High Force signal. V/I = Voltage Forcing / Current Forcing Vprog = Programmed Voltage of Source Vrange = Voltage Range of Source Iprog = Programmed Current Clamp of Source Irange = Current Range of Source VCM = Common-mode voltage, absolute voltage between Low Sense and Analog Ground, measured in volts Vhigh = absolute maximum of either VCM or (the High Force voltage with respect to either the Low Force voltage OR the Analog Ground voltage), measured in volts Rload = Resistance of the Load, measured from High Sense to Low Sense Modulation accuracy does not include errors due to modulation source. The net DC accuracy while modulating is found by summing the modulation accuracy of the OVI and the appropriate forcing accuracy specification of the source of modulation. Area of specified performance is defined by: *Range* = extent of programmability for forced or metered parameter *Maximum Output* = boundary condition for specified operation of instrument *Maximum Allowable* = absolute maximum rating to which instrument can be subjected; specifications are not applicable at this operating point. Scaled output slew rate is the output of the THADS buffer divided by the attenuation. Instrument shutdown is a hardware protection feature. Repeatedly driving the instrument into shutdown will reduce reliability. Current forcing accuracy specifications apply when the actual instrument current flow is the same sign as the programmed current. When sourcing currents from the instrument, Iprog >= 0.0 When sinking currents into the instrument, Iprog < 0.0 Maximum allowable resistance includes the interface to the device up to

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Octal V/I Source the Kelvin point.

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Octal V/I Source I. 0. 0.1 0.1.1 0.1.2 0.1.3 OCTAL V/I SOURCE INSTRUMENTATION SPECIFICATIONS OCTAL V/I FEATURES GENERAL Ability to force voltage or current with automatic crossover Full four quadrant operation (source or sink, positive or negative) Selectable slew/settling for the following combinations of current ranges and slew settings: 10A range - any slew setting 5A range - any slew setting 1A range - any slew setting 200uA range - any slew setting other than fast Force and Sense outputs for Hi and Lo leads of each channel Configurable in either 4 or 8 channels All channels independently floating Sources can be paralleled for higher current capability 4 selectable voltage ranges 4 selectable current ranges Ability to modulate either Voltage or Current from the Wave Bus, whichever parameter is being forced Current or Voltage Metering through the DC System Meter Current or Voltage Metering through Local Meters Ability to control sampling of Local Meters from Trigger Bus Ability to gate individual channels from Trigger Bus CONNECTIONS Voltmeter and ammeter connected to backplane measure busses Trigger bus connection for source gate (any 1 of 8 trigger lines) Trigger bus connection for Local Meter sampling (any 1 of 8 trigger lines) Wave bus connection for modulation (voltage or current) Relay disconnection in the test head to the device under test Each channel has independent relay 2 to 1 MUX for High or Low DUT pins Connections to THADS busses in the test head Connections to DC xpts through the channel card SAFETY/ALARMS Shutdown signal listener and driver Shutdown for Power Supply Module fan failure Shutdown for Heatsink Module fan failure Shutdown for Power Supply Module transformer overtemperature condition Shutdown for thermal junction (output stage) Alarm for mode error (in constant I mode when force:v programmed, or in constant V mode when force:i programmed) Alarm for sense overcurrent detection Alarm for open kelvin Alarm for open loop condition Alarm for overrange condition on Local Meters Channel alarms are captured for each Local Meter strobe and reported as run-time errors Run-time error for overwriting Local Meter data Run-time error for reading back data from Local Meters prior to generating a strobe

0.1.4 0.1.5 0.1.6 0.1.7 0.1.8 0.1.9 0.1.10 0.1.11 0.1.12 0.1.13 0.1.14 0.2 0.2.1 0.2.2 0.2.3 0.2.4 0.2.5 0.2.6 0.2.7 0.2.8 0.3 0.3.1 0.3.2 0.3.3 0.3.4 0.3.5 0.3.6 0.3.7 0.3.8 0.3.9 0.3.10 0.3.11 0.3.12 0.3.13

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Octal V/I Source 0.3.14 0.3.15 0.3.16 0.3.17 Run-time error to report a missed Local Meter strobe System safety signal required for external connections Interlock of cables for mapping and instrument protection Software runtime error generated for disconnecting relays with more than specified current flowing

1. 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.4 1.4.1 1.4.2

VOLTAGE FORCING Range, Note 5 Ranges DC Accuracy, Calibrated Vrange = 2 V Vrange = 10 V Vrange = 50 V Vrange = 100 V 0 to +/-100 V 2 V, 10 V, 50 V, 100 V Full Scale

0.25% 0.25% 0.25% 0.25%

+ + + +

3 mV + VCM*(0.01 mV/V) 7.5 mV + VCM*(0.05 mV/V) 37 mV + VCM*(0.25 mV/V) 75 mV + VCM*(0.5 mV/V)

Maximum Output Current, Note 5 DC minimum of (applicable compliance current limit) or (100 W/Vprog) Pulsed, <=5 ms, 10% duty cycle minimum of (applicable compliance current limit) or (150 W/Vprog) Maximum Allowable Voltage, Note 5 Differential Hi to Lo Single Channel Hi or Lo to Gnd

1.5 1.5.1 1.5.2

+/-100 V, nominal +/-200 V, nominal

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Octal V/I Source Table 1: 1.6 Voltage Forcing Settling Time 0-100 V transition, Full Scale Current programmed on 1 A, 5 A, 10 A range, Resistive Load > 500 ohms 3% of Final Value 1.6.1.1 1.6.1.2 1.6.1.3 Slow Norm Fast 9.0 6.5 900 625 200 130 ms ms, typical us us, typical us us, typical To Specification 23 ms 8 ms, typical 2.3 ms 800 us, typical 500 us 160 us, typical

Programmed Slew Rate

Programmed Slew Rate 1.6.2.1 1.6.2.2 1.6.2.3 Slow Norm Fast Programmed Slew Rate 1.6.3.1 1.6.3.2 1.6.3.3 Slow Norm Fast Programmed Slew Rate 1.6.4.1 1.6.4.2 1.6.4.3 Slow Norm Fast

0-40 V transition, Full Scale Current programmed on 1 A, 5 A, 10 A range, Resistive Load = 25 ohms 3% of Final Value 13 ms 1.3 ms 290 us To Specification 32 ms 3.2 ms 710 us

0-140 mV transition, Full Scale Current programmed on 1 A, 5 A, 10 A range, Resistive Load = 0.15 ohms 3% of Final Value 18 ms, typical 6.0 ms 1.3 ms To Specification 45 ms, typical 8.0 ms 3.2 ms

0-100 V transition, 20% of Full Scale Current programmed on 1 A, 5 A, 10 A range, Resistive Load > 500 ohms 3% of Final Value 30 ms, typical 3.5 ms, typical 750 us, typical To Specification 35 ms, typical 4.0 ms, typical 1.5 ms, typical

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Octal V/I Source

1.7 1.7.1 1.7.1.1 1.7.1.2 1.7.1.3 1.7.2 1.7.2.1 1.7.2.2 1.7.2.3 1.7.3 1.7.3.1 1.7.3.2 1.7.3.3 1.7.4 1.7.4.1 1.7.4.2 1.7.4.3

Voltage Forcing Slew Rate, Resistive Load > 500 ohms Full Scale current programmed on 1A, 10A range Slew slow 35 V/ms, typical Slew norm 350 V/ms, typical Slew fast 1600 V/ms, typical Full Scale current programmed on 5A range Slew slow 17.5 V/ms, typical Slew norm 175 V/ms, typical Slew fast 800 V/ms, typical Variable current programmed on 1A, 10A range Slew slow (35 * Iprog / Irange) V/ms, typical Slew norm (350 * Iprog / Irange) V/ms, typical Slew fast (1600 * Iprog / Irange) V/ms, typical Variable current programmed on 5A range Slew slow (17.5 * Iprog / Irange) V/ms, typical Slew norm (175 * Iprog / Irange) V/ms, typical Slew fast (800 * Iprog / Irange) V/ms, typical

2. 2.1 2.2 2.3 2.3.1 2.3.2 2.3.3 2.3.4 2.4 2.4.1 2.4.2

SYSTEM VOLTAGE METERING Range, Note 5 Ranges Accuracy, Vrange Vrange Vrange Vrange Calibrated, Note 1 = 2 V = 10 V = 50 V = 100 V 0 to +/-100 V 2 V, 1 0V, 50 V, 100 V Full Scale

0.25% 0.25% 0.25% 0.25%

+ + + +

3 mV + VCM *(0.01 mV/V) 7.5 mV + VCM *(0.05 mV/V) 37 mV + VCM *(0.25 mV/V) 75 mV + VCM *(0.5 mV/V)

Maximum Allowable Voltage, Note 5 Differential Hi to Lo Single Channel Hi or Lo to Gnd

+/-100 V, nominal +/-200 V, nominal

3. 3.1 3.2 3.3 3.3.1 3.3.1.1 3.3.1.2 3.3.1.3 3.3.1.4 3.3.2 3.3.2.1 3.3.2.2 3.3.2.3 3.3.2.4 3.4

LOCAL VOLTAGE METERING Range, Note 5 Ranges 0 to +/-100 V 2 V, 10 V, 50 V, 100 V Full Scale

Accuracy, Calibrated Voltmeter Filter Low (vm_filt:low) Vrange = 2 V, vm_filt:low 0.25% + 3 mV + VCM *(0.01 mV/V) Vrange = 10 V, vm_filt:low 0.25% + 7.5 mV + VCM *(0.05 mV/V) Vrange = 50 V, vm_filt:low 0.25% + 37 mV + VCM *(0.25 mV/V) Vrange = 100 V, vm_filt:low 0.25% + 75 mV + VCM *(0.5 mV/V) Voltmeter Filter Medium or Bypass (vm_filt: medium or bypass) Vrange = 2 V, vm_filt:medium or bypass 0.25% + 8 mV + VCM *(0.01mV/V) Vrange = 10 V, vm_filt:medium or bypass 0.25% + 25 mV + VCM *(0.05mV/V) Vrange = 50 V, vm_filt:medium or bypass 0.25% + 125 mV + VCM *(0.25 mV/V) Vrange = 100 V, vm_filt:medium or bypass 0.25% + 250 mV + VCM *(0.5 mV/V) Maximum Allowable Voltage, Note 5

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Octal V/I Source 3.4.1 3.4.2 3.5 3.5.1 3.5.1.1 3.5.1.2 3.5.1.3 3.5.2 3.5.2.1 3.5.2.2 3.5.2.3 3.6 3.6.1 3.6.2 3.6.3 4. 4.1 4.1.1 4.1.2 4.2 4.3 4.3.1 Differential Hi to Lo Single Channel Hi or Lo to Gnd Local Voltage Metering Bandwidth 2V range vm_filt: low vm_filt: medium vm_filt: bypass 10V, 50V, 100V ranges vm_filt: low vm_filt: medium vm_filt: bypass +/-100 V, nominal +/-200 V, nominal

510 Hz, typical 29 kHz, typical 72 kHz, typical 510 Hz, typical 28 kHz, typical 58 kHz, typical

Local Voltage Metering Settling Time to within 3% of Final Value vm_filt: low 1.2 ms, typical vm_filt: medium 21 us, typical vm_filt: bypass 11 us, typical CURRENT FORCING Range, Note 5 DC Pulsed (<=5ms, 10% duty cycle) Ranges

0 to +/-4 A 0 to +/-10 A 200 uA, 1 A, 5 A, 10 A Full Scale

4.3.2 4.3.3 4.3.4 4.4 4.4.1 4.4.2

Accuracy, Calibrated Irange = 200uA 0.4% + 1.5 uA + 10 nA/Vhigh where Vhigh = maximum of the High Force voltage with respect to either the Low Force voltage OR the System Ground voltage Irange = 1 A 0.4% + 2.5 mA Irange = 5 A 0.5% + 6 mA Irange = 10 A 0.5% + 12.5 mA Maximum Allowable Voltage, Note 5 DC minimum of (applicable compliance voltage limit) or (100 W/Iprog) Pulsed, <=5 ms, 10% duty cycle minimum of (applicable compliance voltage limit) or (150 W/Iprog) Maximum Output Voltage, Note 5 +/-100 V

4.5

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Octal V/I Source Table 2: 4.6 Current Forcing Settling Time 0-Fullscale transition on the 1 A range, |Vprog - Iprog*Rload| > 12 V, Resistive Load <= 2.0 ohms 3% of Final Value 4.6.1.1 4.6.1.2 4.6.1.3 Slow Norm Fast 9.0 ms 750 us, typical 900 us 75 us, typical 200 us 20 us, typical To Specification 23 ms 1.7 ms, typical 2.3 ms 170 us, typical 500 us 35 us, typical

Programmed Slew Rate

Programmed Slew Rate 4.6.2.1 4.6.2.2 4.6.2.3 Slow Norm Fast

0-Fullscale transition on the 5 A, 10 A range, |Vprog - Iprog*Rload| > 12 V, Resistive Load <= 2.0 ohms 3% of Final Value 9.0 ms 3.5 ms, typical 900 us 350 us, typical 200 us 75 us, typical To Specification 23 ms 7.5 ms, typical 2.3 ms 700 us, typical 500 us 130 us, typical

Programmed Slew Rate 4.6.3.1 4.6.3.2 4.6.3.3 Slow Norm Fast

0-1 A transition on the 1 A, 5 A, 10 A range, |Vprog - Iprog*Rload| > 12 V, Resistive Load = 25 ohms 3% of Final Value 35.0 ms 29.0 ms, typical 3.5 ms 2.9 ms, typical 900 us 650 us, typical To Specification 75.0 ms 60.0 ms, typical 7.5 ms 6 ms, typical 2.25 ms 1 ms, typical

Programmed Slew Rate 4.6.4.1 4.6.4.2 4.6.4.3 Slow Norm Fast Programmed Slew Rate 4.6.5.1 4.6.5.2 4.6.5.3 Slow Norm Fast

0-400 mA transition on the 1 A, 5 A, 10 A range, |Vprog - Iprog*Rload| > 12 V, Resistive Load = 466 ohms 3% of Final Value 510 ms, typical 48 ms, typical 10 ms, typical To Specification 1350 ms, typical 120 ms, typical 23 ms, typical

0-Fullscale transition on the 1 A, 5 A, 10 A range, |Vprog - Iprog*Rload| = 2 V, Resistive Load = 0.15 ohms 3% of Final Value 2.3 ms, typical 230 us, typical 100 us, typical To Specification 4.5 ms, typical 450 us, typical 120 us, typical

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Octal V/I Source 5. 5.1 5.2 5.2.1 5.2.2 5.3 5.3.1 5.3.2 5.3.3 5.3.4 5.3.5 5.3.6 5.4 5.5 5.5.1 SYSTEM CURRENT METERING Range, Note 5 Ranging Ranges (Irange) Ammeter Gains (amm_gain) DC Accuracy, Calibrated, Notes 1, 3 Irange = 200 uA amm_gain=1 Irange = 200 uA amm_gain=10 Irange = 1 A amm_gain=1 Irange = 1 A amm_gain=10 Irange = 5 A amm_gain=1,10 Irange = 10 A amm_gain=1,10 Maximum Output Voltage, Note 5 Maximum Allowable Voltage, Note 5 Single Channel Hi or Lo to Gnd 0 to +/-10 A

200 uA, 1 A, 5 A, 10 A 1, 10

0.4% 0.4% 0.4% 0.4% 0.5% 0.5%

+ + + + + +

0.5 uA + Vhigh*(10 nA/V) 750 nA + Vhigh*(10 nA/V) 2.5 mA + VCM *(5 uA/V) 1.25 mA + VCM *(5 uA/V) 6 mA + VCM *(25 uA/V) 12.5 mA + VCM *(50 uA/V) +/-100 V

+/-200 V, nominal

6. 6.1 6.2 6.2.1 6.2.2

LOCAL CURRENT METERING Range, Note 5 Ranging Ranges (Irange) Ammeter Gains (amm_gain) 0 to +/-10 A

200 uA, 1 A, 5 A, 10 A 1, 10

6.3 DC Accuracy, Calibrated, Notes 3,8 6.3.1 Ammeter Filter Low (amm_filt:low) 6.3.1.1 Irange = 200 uA amm_gain=1, amm_filt:low 6.3.1.2 Irange = 200 uA amm_gain=10,amm_filt:low 6.3.1.3 Irange = 1 A amm_gain=1, amm_filt:low 6.3.1.4 Irange = 1 A amm_gain=10,amm_filt:low 6.3.1.5 Irange = 5 A amm_gain=1,10 amm_filt:low 6.3.1.6 Irange = 10 A amm_gain=1,10 amm_filt:low 6.3.2 6.3.2.1 6.3.2.2 6.3.2.3 6.3.2.4

0.4% 0.4% 0.4% 0.4% 0.5% 0.5%

+ + + + + +

1.5 uA + Vhigh*(10 nA/V) 750 nA + Vhigh*(10 nA/V) 2.5 mA + VCM*(5 uA/V) 1.25 mA + VCM*(5 uA/V) 6 mA + VCM*(25 uA/V) 12.5 mA + VCM*(50 uA/V) bypass) 2.5 uA + Vhigh*(10 nA/V) 5 mA + VCM*(5 uA/V) 12.5 mA + VCM*(25 uA/V) 25mA + VCM*(50 uA/V) +/-100 V

Ammeter Filter Medium or Bypass (amm_filt:medium or Irange = 200 uA amm_gain=1,10 amm_filt:medium or bypass 0.4% + Irange = 1 A amm_gain=1,10 amm_filt:medium or bypass 0.4% + Irange = 5 A amm_gain=1,10 amm_filt:medium or bypass 0.5% + Irange = 10 A amm_gain=1,10 amm_filt:medium or bypass 0.5% + Maximum Output Voltage, Note 5 Maximum Allowable Voltage, Note 5 Single Channel Hi or Lo to Gnd Local Current Metering Bandwidth amm_filt: low

6.4 6.5 6.5.1 6.6 6.6.1

+/-200 V, nominal

500 Hz, typical

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Octal V/I Source 6.6.2 6.6.3 6.6.4 6.6.4 6.7 6.7.1 6.7.2 6.7.3 amm_filt: amm_filt: amm_filt: amm_filt: medium, medium, bypass, bypass, amm_gain=1 amm_gain=10 amm_gain=1 amm_gain=10 28 26 65 50 kHz, kHz, kHz, kHz, typical typical typical typical

Local Current Metering Settling Time to within 3% of Final Value amm_filt: low 1.1 ms, typical amm_filt: medium 21 us, typical amm_filt: bypass 8.5 us, typical

7. 7.1 7.1.1 7.1.2 7.1.3 7.2 7.2.1 7.2.2 7.2.3

COMPLIANCE RANGES DC Range 25 V Compliance 50 V Compliance 100 V Compliance Pulsed Range, <=5ms, 10% duty cycle 25 V Compliance 50 V Compliance 100 V Compliance Maximum V/Maximum I/Maximum Power 25 V/4 A/100 W 50 V/2 A/100 W 100 V/1 A/100 W

25 V/10 A/150 W 50 V/5 A/150 W 100 V/2 A/150 W

7.3 Maximum Allowable Power, Note 5 7.3.1 Single Channel 7.3.1.1 DC 7.3.1.2 Pulsed, <=5 ms, 10% duty cycle 7.3.2 Octal V/I 7.3.2.1 DC 7.3.2.2 Pulsed, <=5 ms, 10% duty cycle 7.4 7.4.1 7.4.2 7.4.3 Switching Time between Compliance Range changes Compliance ranges may not be switched under load To 25 V Compliance range To 50 V Compliance range To 100 V Compliance range

100 W 150 W 800 W 1200 W

5 ms, typical 16 ms, typical 16 ms, typical

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Octal V/I Source

7. Graphical Summary of Octal V/I Single Channel Power Curves

8. 8.1 8.1.1 8.1.1.1 8.1.1.2 8.1.1.3 8.1.2 8.1.3 8.1.3.1 8.1.3.2 8.1.3.3 8.1.4

MODULATION Voltage Modulation Ranging Full Scale Range with wave_gain = 0.1 Full Scale Range with wave_gain = 1.0 Full Scale Range with wave_gain = 10.0

400 mV 4 V 40 V

Resolution depends on modulation source; reference modulation source ESSD DC Accuracy, wave_gain wave_gain wave_gain Note 4 = 0.1 = 1.0 = 10.0

0.5% + 4 mV, typical 0.5% + 7 mV, typical 0.5% + 35 mV, typical

Bandwidth 20 kHz, typical 1 V volt pp, 2 V range, 4 A programmed on 5 A range fast slew 50 kohm load relative to measurement made at 1 kHz Current Modulation Ranging Full Scale Range with wave_gain = 0.1, Irange = 1A, 5A, 10A

8.2 8.2.1 8.2.1.1

40 mA

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Octal V/I Source 8.2.1.2 8.2.1.3 8.2.2 8.2.3 8.2.3.1 8.2.3.2 8.2.3.3 8.2.3.4 8.2.3.5 8.2.4 Full Scale Range with wave_gain = 1.0, Irange = 1A, 5A,10A Full Scale Range with wave_gain = 10.0, Irange = 1A, 5A,10A 400 mA 4.0 A

Resolution depends on modulation source; reference modulation source ESSD DC Accuracy, wave_gain wave_gain wave_gain wave_gain wave_gain Note 4 = 0.1, Irange = 1 A = 0.1, Irange = 5 A, 10 A = 1.0, Irange = 1 A = 1.0, Irange = 5 A, 10 A = 10.0, Irange = 1 A, 5 A, 10 A

0.5% 1.0% 0.5% 0.5% 0.5%

+ + + + +

0.2 mA, typical 1 mA, typical 1 mA, typical 2 mA, typical 10 mA, typical

Bandwidth 20 kHz, typical 100 mA pp, 15 V programmed, 1 A programmed on 5 A range fast slew 1.0 ohm load relative to measurement made at 1 kHz

9. 9.1 9.1.1 9.2 9.2.1

CONNECTIONS Total Connect Time, High and Low, including 9.1.1 Settling Time required by the user after a connect statement to close relays Total Disconnect Time, High and Low, including 9.2.1 Settling Time required by the user after a disconnect statement to open relays 5.1 ms, typical 2.6 ms, typical 4.3 ms, typical 2.2 ms, typical

10. 10.1 10.2 10.2.1 10.2.2 10.2.3 10.2.4 10.3 10.4 10.5 10.5.1 10.5.1.1 10.5.1.2 10.5.1.3 10.5.2 10.5.2.1 10.5.2.2 10.5.2.3 10.5.3 10.5.3.1 10.5.3.2 10.5.3.3 10.5.4

THADS BUFFERS Ranges 25 V, 100 V, 200 V, AC Attenuation 25 V Range 100 V Range 200 V Range AC Range, midband Absolute maximum input voltage, Output DC Accuracy

0.240, 0.060, 0.030, 0.97,

nominal nominal nominal typical

AC range 200 V 5% of Signal + 100 mV, typical

Dynamics 25 V Range Output Rise Time, 10 V input transition, 10% to 90% <55 ns, typical Bandwidth 1 MHz, typical Scaled Output Slew Rate, 10 V input, Note 6 >270 V/us, typical 100V Range Output Rise Time, 10 V input transition, 10% to 90% <55 ns, typical Bandwidth 1 MHz, typical Scaled Output Slew Rate, 10 V input, Note 6 >320 V/us, typical 200 V Range Output Rise Time, 10V input transition, 10% to 90% <55 ns, typical Bandwidth 1MHz, typical Scaled Output Slew Rate, 10V input, Note 6 >500 V/us, typical AC Range

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Octal V/I Source 10.5.4.1 10.5.4.2 10.5.4.3 10.5.4.4 10.6 10.6.1 10.6.2 10.6.3 10.6.4 Output Rise Time, 10 V input transition, 10% to 90% <400 ns, typical Low Frequency Cutoff, -3 dB from midband 5 Hz, typical High Frequency Bandwidth, -3 dB from midband 1 MHz, typical Output Slew Rate, 10 V input >35 V/us, typical Attenuator Input Resistance to system ground 25 V Range 100 V Range 200 V Range AC Range

12 9.7 9.4 >500

Mohms, Mohms, Mohms, Mohms,

typical typical typical typical

11. 11.1 11.1.1 11.1.2 11.2

MISCELLANEOUS Floating Performance Average Low Side Leakage Current to Ground, Low Side Resistance to Ground Maximum Allowable Series Resistance in Force lead for maximum voltage and current simultaneously, Note 9 Shutdown/Alarm Conditions, Note 7 Sense Current threshold Overtemperature Shutdown Junction temperature prediction threshold

0 V 10 uA, typical 40 kohm, typical

0.10 ohm, nominal

11.3 11.3.1 11.3.2 11.3.2.1

200 uA, typical 110 deg C, nominal

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Octal V/I Source 11.3.2.2 Pulse Current threshold time for |Output Current|>5 A -0.014*ln((Output Current - 5 A)/Output Current), nominal

Typical Octal V/I Pulse Current Shutdown Time, Note 7

(seconds)

(Amps)

11.3.2.3 11.3.3

Heatsink temperature threshold Relay Overcurrent Detect absolute threshold

60 deg C, nominal 200 mA +/- 40 mA, typical

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Specs
NOTES:

25

Power AL Disconnect Card

NOTE 1 This specification covers the PALDCC itself, the cable to the system, the connector from that cable to the PALDCC and the Pogo pin connections between the PALDCC and the Configuration board. NOTE 2 Resistance numbers apply from the bulkhead connector (but not including the contact resistance itself) to the Pogo pad on the configuration board. NOTE 3 Holdoff voltage applied with force, sense, and guard for a pin connected together. If multiple force connections are present, they are all connected together. All other pins are tied to ground. NOTE 4 Throughout this document PALDCC is an acronym for Power Advanced Linear Disconnect Card. NOTE 5 The term non-switching is used in this document to refer to a state in which the relays are closed and no instantaneous power is dissipated in the relay; hot-switching the relays is damaging and reduces the lifetime of the instrument. NOTE 6 This specification or feature does not apply to the PVIDCC.

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Power AL Disconnect Card I. 0. 0.1 0.1.1 0.1.2 0.1.3 0.2 0.2.1 0.2.2 POWER ADVANCED LINEAR DISCONNECT CARD SPECIFICATIONS PALDCC Features Disconnect Pins Quantity Disconnect pin current Disconnect pin voltage TMS buffers (Note 6) Quantity Input ranges

6 9 A Max, non-switching, nominal 1000 V, non-switching, nominal

2 800 V FS 100 V FS 20 V FS

0.2.3 0.2.3.1 0.2.3.2 0.2.4 0.2.4.1 0.2.4.2 0.3

Input Connections Any one of 6 pins, multiplexed Cal strobe signal, multiplexed Output Connections Output, buffer A THADS A Output, buffer B THADS B The PALDCC passes the following signals from the system to the configuration board (Note 6): System safety (SAFETY*) SPS safety Shutdown (shutdown*)

1. 1.1 1.2 1.3 1.4 1.5 1.6

Disconnect Pins (Note 5) Disconnect pin current Disconnect pin current Disconnect pin voltage Maximum Maximum Holdoff two of 9 A Max DC, non-switching, nominal 12 Amps Max pulsed, non-switching, nominal 1000 V holdoff, non-switching, nominal (Note 3) pulse width 1 ms for 12 A rating, nominal pulse duty cycle 50% for 12 A rating, nominal voltage between any 125 V Max, nominal force/sense/guard

1.7 1.7.1 1.7.2 1.7.3

Maximum switched voltage/current cannot exceed any of the following: 50 V, nominal 10 mA, nominal 500 mW, nominal (open circuit voltage multiplied by closed circuit current)

1.8 (Note 6) Path resistance, for any pin force connection, between connector on Bulkhead and Config. Measured with all force connections for each pin in parallel. Path R, per pin 0.12 ohms nominal

2. 2.1

THADS Buffers/Attenuators (Note 6) Gain ranges +/-800 V FS +/-100 V FS +/-20 V FS

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Power AL Disconnect Card 2.2 2.3 Output of attenuator Gain accuracy, measured at DC Range Gain (Nom.) -----------800 V x0.0075 100 V x0.06 20 V x0.30 +/-6 V full scale, nominal

2.3.1 2.3.2 2.3.3 2.4

Gain Error -------+/-5% +/-5% +/-5%

Offset (referred to input) -------------+/-1.3 V nominal +/-160 mV nominal +/-33 mV nominal

Maximum input voltage: 1000 V on any range, nominal

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Specs
Notes Note 1. Note 2.

26

Power V/I Source

DC Subsystem voltmeter resolution. Vo = Io = Ps = Duty Power V/I actual output voltage expressed in volts. Power V/I actual output current expressed in amperes. Source power dissipation expressed in Watts. Cycle ranges from 0-100%.

Note 3. Note 4.

F.S. signifies full scale on the programmed range. Operating characteristics of quadrant I are equivalent to those of quadrant III. Operating characteristics of quadrant II are equivalent to those of quadrant IV. All four quadrants are shown for clarity. Voltage forcing accuracy term Ci is related to the current range setting as follows: Ci Ci Ci Ci Ci = = = = = 12.5 mV/A 10.0 mV/A 0.7 mV/A 0.3 mV/A 0.2 mV/A on on on on on 40 mA range 200 mA range 1 A range 5 A range 30 A range

Note 5.

Note 6.

DC Subsystem Delta Source resolution.

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Power V/I Source 0. 0.1 0.2 Power V/I Features The Power V/I can be multiplexed up to 4 stations. The A510 Mainframe can support up to two POWER V/I's consisting of two power V/I card sets, associated support cards, and power supply modules. The Power V/I can be connected to the AC Sub-System and the Delta Bus and modulated for ripple rejection tests on high-power devices. The Power V/I is completely electrically isolated from the A510 test system. All voltages and currents are generated with respect to the POWER V/I chassis and signal ground, and are floated from the A510 system ground. (Power V/I signal ground is connected to common floating power return). The Power V/I is a "pseudo" four-quadrant supply operating in quadrants I and IV. Operation in quadrants II and III is achieved by output polarity switching using relays. The Power V/I incorporates four alarms per POWER V/I source. are monitored by the A510 system software. Clamp Alarm - real time output monitor alarm Thermal Alarm - latched Setup Alarm - latched relay hot-switching prevention alarm Rail Fail Alarm - real time raw DC supply failure alarm All alarms

0.3

0.4

0.5

0.6 0.6.1 0.6.2 0.6.3 0.6.4 0.7

The Power V/I has three user-selectable loop speeds; fast, normal, and slow. The Power V/I's can be parallel connected or serial connected. The Power V/I has two modes of operation; high compliance mode and low compliance mode. Low compliance mode is used for high current at low voltages and high compliance mode is used for low current at high voltages. The Power V/I has user-selectable output impedance when the pwrsrc is gated off. The user can specify either ZOUT = high to force zero amps, or ZOUT = low to force zero volts.

0.8 0.9

0.10

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Power V/I Source I. Power V/I Specification List

1. 1.1 1.2 1.3 1.4

Voltage Forcing Ranges Resolution Maximum Operating Voltage Accuracy (Notes 2, 3, 5) 2 V, 10 V, 50 V 11 bits plus sign +/-51.2 V +/-(0.5% + 0.2% F.S. + (Ci*Io)), Max

2. 2.1 2.2 2.3

Voltage Metering Ranges Resolution (1) Accuracy (Notes 2, 3, 5) 2 V, 10 V, 50 V 13 bits plus sign +/-(1.6% + 0.3% F.S. + (Ci*Io)), Max

3. 3.1 3.2 3.3 3.4

Current Forcing Ranges Resolution Maximum Operating Current Accuracy (Note 3) 40 mA, 200 mA, 1 A, 5 A, 30 A 11 bits plus sign See Section 7 below +/-(1.1% + 0.3% F.S.), Maximum

4. 4.1 4.2 4.3

Current Metering Ranges Resolution (Note 1) Accuracy (Note 3) 40 mA, 200 mA, 1 A, 5 A, 30 A 13 bits plus sign +/-(1.6% + 0.4% F.S.), Maximum

5. 5.1 5.2

Isolation Max Voltage to Ground Max Leakage to Ground +/-300 V, Nominal +/-50 uA

6. 6.1 6.2

Delta Bus Connections Ranges Resolution (Note 6) 2 V, 20 V, 200 V 11 bits plus sign

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Power V/I Source 6.3 6.3.1 6.3.2 6.3.3 Gain (Delta Bus to Power V/I output) Delta Source 2 V range: x0.2 Nominal Delta Source 20 V range: x2 Nominal Delta Source 200 V range: x20 Nominal

7.

Operating Region Allowable regions of operation: (Note 4) The attached graphs depict the allowable areas of operation of the source. Note that in some regions the Power V/I's output must be pulsed to limit power dissipation of the source. (See Figures 1 thru 18.)

7.1

Duty cycle and pulse width limitations The duty cycle and pulse width limits indicated are typical maximums. Exceeding these limits may cause the thermal protection circuitry to shut down the source. DC operation DC operation is guaranteed for -1 A < Io < 1 A and -50 V < Vo < 50 V. This particular operating region is not shown on the plots. Nominal power dissipation limits (Note 2) The attached graphs (Figures 1 thru 18) apply for operation of a single Power V/I source. In cases where two Power V/I sources are active, the power dissipation of both sources together must not exceed 265 Watts. In mathematical terms: [Ps (pwrsrc 1) + Ps (pwrsrc 2)] <= 375 W

7.2

7.3

7.3.1

Case 1

For operation in quadrant I, high compliance mode Ps = [84.5 - (0.4)(Io) - Vo](Io)(duty cycle in %)(1/100%) For operation in quadrant III, high compliance mode Ps = [84.5 + (0.4)(Io) + Vo](-Io)(duty cycle in %)(1/100%) For operation in quadrant IV, either compliance mode Ps = [19.0 + (0.4)(Io) + Vo](-Io)(duty cycle in %)(1/100%) For operation in quadrant II, either compliance mode Ps = [19.0 - (0.4)(Io) - Vo](Io)(duty cycle in %)(1/100%) For operation in quadrant I, low compliance mode Ps = [42.7 - (0.4)(Io) - Vo](Io)(duty cycle in %)(1/100%) For operation in quadrant III, low compliance mode Ps = [42.7 + (0.4)(Io) + Vo](-Io)(duty cycle in %)(1/100%) Ps = [Volts + (Ohms)(Amps) + Volts](Amps)(D.C. in %)(1/100%)

7.3.2

Case 2

7.3.3

Case 3

7.3.4

Case 4

7.3.5

Case 5

7.3.6

Case 6

Note:

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Notes:

27

Precision Low Frequency Digitizer

1) The keyword "lpfilt" selects both the analog anti-aliasing filter and the DDF bank. In the case of the 2 kHz range, the analog anti-aliasing filter is the same as for the 5 kHz range. 2) Notation Notes: + = arithmetic sum or = greater value of ++ = rms sum Vpk = programmed amplitude Vbl = programmed dc baseline DDF = digital decimation filter 3) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 4) TYPICAL specifications are sample tested, are NOT 100% tested, and are NOT guaranteed. 5) NOMINAL specifications are generally calculated values, are NOT 100% tested, and are NOT guaranteed. 6) There are two complete sets of Digital Decimation Filters that may be selected. One set is optimized for Frequency Domain Performance and one for Time Domain Performance. All specifications in frequency ranges 2 -> 500 kHz that refer to DDF apply when using the Frequency Domain DDF's. 7) Total Harmonic Distortion Specifications for all frequency ranges except the 500 kHz range apply only when operating in DDF mode, NOT DDF bypass mode. 8) Total Noise Specifications exclude THD. For help interpreting some of the specifications in this document, see Amplitude Error, Total Harmonic Distortion, and Total Noise in the Interpreting Specifications document.

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Precision Low Frequency Digitizer I. 1 1.1 1.2 1.3 1.3.1 1.3.2 PRECISION LOW FREQUENCY DIGITIZER GENERAL SPECIFICATIONS (frequency range independent) Input Voltage Range Differential Input Voltage Waveform Range & Resolution Resolution Ranges +/-11.0 Vpk +/-11.0 Vpk

>20 bits/range 14.48 V peak 10.24 V peak 7.24 V peak 5.12 V peak 3.62 V peak 2.56 V peak 1.81 V peak 1.28 V peak 0.905 V peak 0.640 V peak 0.452 V peak 0.320 V peak 0.226 V peak 0.160 V peak 0.113 V peak

1.4 1.4.1 1.4.2 1.4.3 1.4.4 1.5 1.6 1.7 1.7.1 1.7.1.1 1.7.1.2 1.7.1.3 1.7.1.4 1.7.2 1.7.2.1 1.7.2.2 1.7.2.3 1.7.2.4 1.7.2.5 1.7.3 1.7.3.1 1.7.3.2 1.7.3.3 1.7.3.4

DC Baseline Removal Range Resolution Accuracy Long Term DNL Input Impedance Input Capacitance Common Mode Rejection dc - 100 Hz Amplitude Range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 226 mV 160 mV - 113 mV 100 Hz - 1 kHz Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV 160 mV - 113 mV 1 kHz - 20 kHz Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV

+/-11.0 Vpk (17 bits) 168 uV +/-(Vbl*6 + 0.5) mV 14 bits >10 Mohm <200 pF

>80 dB >100 dB >90 dB >105 dB

>65 >80 >70 >75 >85

dB dB dB dB dB

>35 >55 >45 >50

dB dB dB dB

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Precision Low Frequency Digitizer 1.7.3.5 1.7.4 1.7.4.1 1.7.4.2 1.7.4.3 1.7.4.4 1.7.4.5 1.7.5 1.7.5.1 1.7.5.2 1.7.5.3 1.7.5.4 1.7.5.5 160 mV - 113 mV 20 kHz - 100 kHz Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV 160 mV - 113 mV 100 kHz - 500 kHz Amplitude range: 14.48 V - 7.24 V 5.12 V - 3.62 V 2.56 V - 905 mV 640 mV - 226 mV 160 mV - 113 mV >60 dB

>25 >40 >30 >35 >50

dB dB dB dB dB

>10 >30 >15 >20 >35

dB dB dB dB dB

typical typical typical typical typical

1.8 Settling Time (after change in -) 1.8.1 dc Baseline 1.8.2 Voltage Range 1.8.3 "lpfilt" 1.8.3.1 2 kHz 1.8.3.2 20, 100, 500 kHz 1.8.4 "connect" 1.8.5 digital filter 1.8.5.1 2 kHz range 1.8.5.2 5 kHz range 1.8.5.3 20 kHz range 1.8.5.4 100 kHz range 1.9 1.10 1.10.1 1.10.2 1.11 DC Offset

<2 ms <5 ms <10 ms <4.5 ms <4.5 ms <517/sample_rate <517/sample_rate <365/sample_rate <117/sample_rate <(vrng*1.5 + 1.0) mV

Time Measurement Access Path Length Error (after autocalibration) +/-5 ns Input Capacitance <500 pF Capture Memory Depth 256k samples

FREQUENCY RANGE 1: 0.1 Hz - 100 Hz (static linearity parameters)

2.0 Operating Conditions: 2.0.1 Anti-aliasing Filter (lpfilt) 2.0.2 Modulator clock = aclock/N 2.0.2.1 Minimum 2.0.2.2 Maximum 2.0.3 DDFs (excl. prime #'s) 2.1 2.1.1 2.1.2 2.1.3 2.2 2.3 Waveform Linearity Error DDFs 8-16 (frequency domain) DDFs 11-16 (time domain) DDFs w/ prime factors < 17 DDFs w/ prime factors > 17 Input Linearity Error Absolute Accuracy

2 kHz 0.5 MHz 1 MHz 8-64

+/-2 ppm +/-3 ppm +/-15 ppm +/-1.0 ppm +/-(Vin*5 + 5) mV

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Precision Low Frequency Digitizer 2.4 2.4.1 2.4.2 2.5 DC Offset Drift Rate - sum of: Waveform Drift Baseline Drift Rate Spectral Impurities (115 dB)

<(vrng*0.5)(time) uV/s <10 uV + (0.2 + 0.0011(Vbl**3.5))(time) uV/s <(vrng*1.3 or 3) uVrms

2.6 Noise 2.6.1 2.6.1.1 2.6.1.2 2.6.1.2.1 2.6.1.2.2 2.6.1.2.3 2.6.2 2.6.2.1 2.6.2.2 2.6.2.2.1 2.6.2.2.2 2.6.2.2.3

Total Noise(BW), dcbase off 01. HZ - 10 Hz <(vrng*2.0++0.351) uVrms 50 Hz - 2 kHz DDFs 8-16 (110 dB) <(vrng*2.2 ++ 5) uVrms DDFs 18-64 w/prime factors<17(100 dB) <(vrng*7.1 ++ 5) uVrms DDFs with prime factors >17 (90 dB) <(vrng*22 ++ 5) uVrms Total Noise(BW), dcbase on 01. HZ - 10 Hz <(vrng*2.0 ++18) uVrms 50 Hz - 2 kHz DDFs 8-16 <(vrng*2.2 ++20) uVrms DDFs 18-64 w/prime factors<17 <(vrng*7.1 ++20) uVrms DDFs with prime factors >17 <(vrng*22 ++ 20) uVrms

FREQUENCY RANGE 2: 50 Hz - 2 kHz

3.0 Operating Conditions: 3.0.1 Anti-aliasing Filter (lpfilt) 3.0.2 Modulator Clock = aclock/N 3.0.2.1 Minimum 3.0.2.2 Maximum 3.0.3 DDFs (excl. prime #'s > 13) 3.1 3.1.1 3.1.1 3.1.1 Sine Wave Amplitude Accuracy DDF bypass (0.02 dB) DDFs w/ prime factors <= 13 (0.06 dB) DDFs w/ prime factors >= 17 (1.2 dB)

2 kHz 0.5 MHz 1 MHz 8-64

+/-(Vpk*2.3 + 1) mV +/-(Vpk*6.9 + 1) mV +/-(Vpk*148 + 1) mV

3.2 Total Harmonic Distortion 3.2.1 DDFs 8 - 16 3.2.1.1 Fundamental <= 400 Hz (115 dB) 3.2.1.2 Fundamental > 400 Hz (110 dB) 3.2.2 DDFs 18 - 64 (105 dB) 3.3 Non-harmonic Spurious (115 dB)

<(Vpk*1.3 or 1.3) uVrms <(Vpk*2.2 or 2.1) uVrms <(Vpk*4.0 or 4.1) uVrms <(vrng*1.3 or 3) uVrms

3.4 Noise 3.4.1 3.4.1.1 3.4.1.2 3.4.1.3 3.4.2 3.4.2.1 3.4.2.2 3.4.2.3

Total Noise(50 Hz - 2 kHz), dcbase off DDFs 8 - 16 (105 dB) <(vrng*4.0 ++ 5) uVrms DDFs 18-64 w/prime factors<17 (100 dB) <(vrng*7.1 ++ 5) uVrms DDFs with prime factors >17 (90 dB) <(vrng*22 ++ 5) uVrms Total Noise(50 Hz - 2 kHz), dcbase on DDFs 8 - 16 <(vrng*4.0 ++20) uVrms DDFs 18-64 w/prime factors<17 <(vrng*7.1 ++20) uVrms DDFs with prime factors >17 <(vrng*22 ++ 20) uVrms

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Precision Low Frequency Digitizer 4 FREQUENCY RANGE 3: 50 Hz - 5 kHz

4.0 Operating Conditions: 4.0.1 Anti-aliasing Filter (lpfilt) 4.0.2 Modulator Clock = aclock/N 4.0.2.1 Minimum 4.0.2.2 Maximum 4.0.3 DDFs (excl. prime #'s > 13 & 34,38) 4.1 4.1.1 4.1.2 Sine Wave Amplitude Accuracy DDF bypass (0.02 dB) with DDF (0.3 dB)

5 kHz 0.5 MHz 1 MHz 8-42

+/-(Vpk*2.3 + 1) mV +/-(Vpk*35 + 1) mV

4.2 Total Harmonic Distortion 4.2.1 DDFs 8 - 16 4.2.1.1 Fundamental <= 1 kHz (110 dB) 4.2.1.2 Fundamental > 1 kHz (105 dB) 4.2.2 DDFs 18 - 42 (105 dB) 4.3 Non-harmonic Spurious (110 dB)

<(Vpk*2.2 or 2.2) uVrms <(Vpk*4.0 or 4.0) uVrms <(Vpk*4.0 or 4.0) uVrms <(vrng*2.2 or 5) uVrms

4.4 Noise 4.4.1 4.4.1.1 4.4.1.2 4.4.2 4.4.2.1 4.4.2.2

Total Noise(50 Hz - 5 kHz), dcbase off DDFs 8 - 16 (105 dB) DDFs 18-42 (95 dB) Total Noise(50 Hz - 5 kHz), dcbase on DDFs 8 - 16 DDFs 18 - 42

<(vrng*4.0 ++ 5) uVrms <(vrng*13 ++ 5) uVrms <(vrng*4.0 ++20) uVrms <(vrng*13 ++20) uVrms

FREQUENCY RANGE 4: 50 Hz - 20 kHz

5.0 Operating Conditions: 5.0.1 Anti-aliasing Filter (lpfilt) 5.0.2 Modulator clock = aclock/N 5.0.2.1 Minimum 5.0.2.2 Maximum 5.0.3 DDFs 5.1 5.1.1 5.1.1 5.2 5.2.1 5.2.2 5.3 5.4 5.4.1 5.4.2 Sine Wave Amplitude Accuracy DDF bypass (0.06 dB) with DDF (0.3 dB) Total Harmonic Distortion Fundamental <= 5 kHz (100 dB) Fundamental > 5 kHz (95 dB) Non-harmonic Spurious (105 dB)

20 kHz 2 MHz 4 MHz 8-32 (excl. prime #'s)

+/-(Vpk*6.9 + 1) mV +/-(Vpk*35 + 1) mV

<(Vpk*7.1 or 5) uVrms <(Vpk*13.0 or 5) uVrms <(vrng*4.0 or 5) uVrms

Noise Total Noise (50 Hz - 20 kHz) dcbase off(95 dB) <(vrng*13 ++ 10) uVrms Total Noise (50 Hz - 20 kHz) dcbase on <(vrng*13 ++ 22) uVrms

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Precision Low Frequency Digitizer 6 FREQUENCY RANGE 5: 50 Hz - 100 kHz

6.0 Operating Conditions: 6.0.1 Anti-aliasing Filter (lpfilt) 6.0.2 Modulator clock = aclock/N 6.0.2.1 Minimum 6.0.2.2 Maximum 6.0.3 DDFs 6.1 6.1.1 6.1.1 6.2 6.3 6.4 6.4.1 6.4.2 Sine Wave Amplitude Accuracy DDF bypass (0.6 dB) with DDF (5 dB) Total Harmonic Distortion (80 dB) Non-harmonic Spurious (90 dB) Noise Total Noise (50 Hz-100 kHz) dcbase off (80 dB) Total Noise (50 Hz-100 kHz) dcbase on

100 kHz 5 MHz 10 MHz 8-16 (excl. prime #'s)

+/-(Vpk*72 + 1) mV +/-(Vpk*778 + 1) mV <(Vpk*71 or 5) uVrms <(vrng*21 or 5) uVrms

<(vrng*71 ++ 15) uVrms <(vrng*71 ++ 27) uVrms

FREQUENCY RANGE 6: 500 Hz - 500 kHz

7.0 Operating Conditions: 7.0.1 Anti-aliasing Filter (lpfilt) 7.0.2 Modulator clock = aclock/N 7.0.2.1 Minimum 7.0.2.2 Maximum 7.0.3 DDFs 7.1 7.2 7.3 7.4 Sine Wave Amplitude Accuracy (2.5 dB) Total Harmonic Distortion (60 dB) Non-harmonic Spurious (65 dB) Total Noise (50 Hz - 500 kHz) (60 dB)

500 kHz 20 MHz 25 MHz none +/-(Vpk*334 + 1) mV <(Vpk*710 or 45) uVrms <(vrng*400) uVrms <(vrng*710) uVrms

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Specs
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Precision Low Frequency Source

1) Extended calibration must be enabled to achieve the stated specifications for THD. If extended calibration is off, the THD specifications are degraded by 10 dB. 2) The tl_plfs_get_amp_filt() function is only valid for amplitude < 7.24 Vpk. Therefore, for amplitude > 7.24 Vpk, only the wider amplitude specifications apply. 3) Spectral Impurities include only non-harmonically related spectral components. 4) Notation Notes: + = arithmetic sum or = greater value of ++ = rms sum Vpk = programmed amplitude Vbl = programmed dc baseline 5) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 6) TYPICAL specifications are sample tested, are NOT 100% tested, and are NOT guaranteed. 7) NOMINAL specifications are generally calculated values, are NOT 100% tested, and are NOT guaranteed.

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Precision Low Frequency Source I. 1 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.4 1.4.1 1.4.2 1.4.2 1.4.3 1.5 1.6 1.7 PRECISION LOW FREQUENCY SOURCE INSTRUMENTATION SPECIFICATIONS GENERAL SPECIFICATIONS (frequency range independent) Peak Output Voltage (ac + dc) Waveform Resolution DC Baseline Range Resolution Accuracy Long Term DNL Waveform Amplitude Range & Resolution dc to 100 kHz 100 kHz to 250 kHz 250 kHz to 500 kHz Resolution Output Current Compliance Limit Maximum Short Circuit Current Overcurrent Alarm Detection Threshold +/-11.0 Vpk 20 bits

+/-11.0 V (17 bits) 168 uV +/-(Vbl*6 + 0.5) mV 14 Bits

<10.24 Vpk <5.12 Vpk <2.56 Vpk <1 mdB >20 mA <65 mA <45 mA

1.8 Output Impedance (DC - 500 kHz) 1.8.1 25 Ohms 1.8.1.1 Accuracy 1.8.1.2 Max. Capacitive Load 1.8.2 Low Z 1.8.2.1 Zout 1.8.2.2 Max. Capacitive Load 1.8.3 Remote Kelvin (C pin only) 1.8.3.1 Zout 1.8.3.2 Max. Capacitive Load 1.9 Slew Rate

+/-1 Ohm >1 nF <1 Ohm >100 pF <0.1 Ohm >100 pF >8 V/us, nominal

1.10 Settling Time (after change in -) 1.10.1 DC Baseline 1.10.2 Waveform Amplitude (attenuator change) 1.10.3 Waveform Amplitude (same attenuator) 1.10.4 "lpfilt" 1.10.4.1 2 kHz 1.10.4.2 20, 100, 500 kHz 1.10.5 "connect" 1.11 1.12 1.12.1 1.13 1.13.1 1.13.2 DC Offset Waveform integrator Sample rate

<2 ms <5 ms <1 ms <10 ms <4.5 ms <4 ms <(Vpk*1 + 2) mV

<20 MHz

Time Measurement Access Path Length Error (after autocalibration) +/-5 ns Input Capacitance <500 pF

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Precision Low Frequency Source 1.14 1.14.1 1.14.2 Sample Memory Depth Standard Optional

64K samples 1M samples

FREQUENCY RANGE 1: 0.1 Hz - 100 Hz (static linearity parameters)

2.0 Operating Conditions: 2.0.1 Smoothing Filter 2.0.2 Sample Rate 2.0.2.1 Minimum 2.0.2.2 Maximum 2.1 2.2 2.3 2.4 2.4.1 2.4.2 2.5 2.5.1 2.5.2 Waveform Linearity Error Output Linearity Error Absolute Accuracy DC Offset Drift Rate - (sum of:) Waveform Drift DC Baseline Drift Rate Spectral Impurities 50 Hz - 100 kHz (120 dB) 100 kHz - 1 MHz(110 dB)

2 kHz 400 kHz 500 kHz +/-2 ppm +/-1.0 ppm +/-(Vpk*5 + 5) mV

<(Vpk*500) nV/s <(10 uV+(0.2+0.0011(Vbl**3.5))(time) uV/s

<(Vpk*0.71 or 10) uVrms <(Vpk*2.2 or 30) uVrms

2.6 Noise 2.6.1 2.6.1.1 2.6.1.2 2.6.1.3 2.6.1.4 2.6.2 2.6.2.1 2.6.2.2 2.6.2.3 2.6.2.4

Total Noise (BW), dcbase off 0.1Hz - 10 Hz 50 Hz - 20 kHz (110 dB) 50 Hz - 100 kHz (105 dB) 50 Hz - 1 MHz (95 dB) Total Noise (BW), dcbase on 0.1Hz - 10 Hz 50 Hz - 20 kHz 50 Hz - 100 kHz 50 Hz - 1 MHz

<(Vpk*2.0 <(Vpk*2.2 <(Vpk*4.0 <(Vpk*13 <(Vpk*2.0 <(Vpk*2.2 <(Vpk*4.0 <(Vpk*13

++ ++ ++ ++ ++ ++ ++ ++

0.351) uVrms 3.5) uVrms 9.0) uVrms 40.0) uVrms 18) 20) 22) 40) uVrms uVrms uVrms uVrms

FREQUENCY RANGE 2: 50 Hz - 2 kHz

3.0 Operating Conditions: 3.0.1 Smoothing Filter 3.0.2 Sample Rate 3.0.2.1 Minimum 3.0.2.2 Maximum 3.1 3.1.1 3.1.2 3.2 3.2.1 3.2.2 Sine Wave Amplitude Accuracy Uncorrected (+0.1 dB, -0.5 dB) w/tl_plfs_get_amp_filt (0.1 dB) Total Harmonic Distortion amp < 5.12 Vpk (115 dB) amp > 5.12 Vpk (105 dB)

2 kHz 400 kHz 500 kHz

+(Vpk*12 + 1) mV, -(Vpk*59 + 1) mV +/-(Vpk*12 + 1) mV

<(Vpk*1.3 or 2.2) uVrms <(Vpk*4.0 or 2.2) uVrms

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Precision Low Frequency Source

3.3 3.3.1 3.3.2

Spectral Impurities 50 Hz - 100 kHz (115 dB) 100 kHz - 1 MHz (110 dB)

<(Vpk*1.3 or 10) uVrms <(Vpk*2.2 or 30) uVrms

3.4 Noise 3.4.1 3.4.1.1 3.4.1.2 3.4.1.3 3.4.2 3.4.2.1 3.4.2.2 3.4.2.3

Total Noise (BW), dcbase off 50 Hz - 20 kHz (110 dB) 50 Hz - 100 kHz (105 dB) 50 Hz - 1 MHz (95 dB) Total Noise (BW), dcbase on 50 Hz - 20 kHz 50 Hz - 100 kHz 50 Hz - 1 MHz

<(Vpk*2.2 ++ 3.5) uVrms <(Vpk*4.0 ++ 9.0) uVrms <(Vpk*13 ++ 40.0) uVrms <(Vpk*2.2 ++ 20) uVrms <(Vpk*4.0 ++ 22) uVrms <(Vpk*13 ++ 40) uVrms

FREQUENCY RANGE 3: 50 Hz - 20 kHz

4.0 Operating Conditions: 4.0.1 Smoothing Filter 4.0.2 Sample Rate 4.0.2.1 Minimum 4.0.2.2 Maximum 4.1 4.1.1 4.1.2 4.2 4.2.1 4.2.2 4.3 4.3.1 4.3.2 Sine Wave Amplitude Accuracy Uncorrected (+-0.1 dB, -0.5 dB) w/tl_plfs_get_amp_filt (0.1 dB) Total Harmonic Distortion amp < 5.12 Vpk (110 dB) amp > 5.12 Vpk (100 dB) Spectral Impurities 50 Hz - 100 kHz (115 dB) 100 kHz - 1 MHz (110 dB)

20 kHz 2 MHz 3 MHz

+(Vpk*12 + 1) mV, -(Vpk*59 + 1) mV +/-(Vpk*12 + 1) mV

<(Vpk*2.2 or 2.2) uVrms <(Vpk*7.1 or 2.2) uVrms

<(Vpk*1.3 or 10) uVrms <(Vpk*2.2 or 30) uVrms

4.4 Noise 4.4.1 4.4.1.1 4.4.1.2 4.4.1.3 4.4.2 4.4.2.1 4.4.2.2 4.4.2.3

Total Noise (BW), dcbase off 50 Hz - 20 kHz (95 dB) 50 Hz - 100 kHz (95 dB) 50 Hz - 1 MHz (90 dB) Total Noise (BW), dcbase on 50 Hz - 20 kHz 50 Hz - 100 kHz 50 Hz - 1 MHz

<(Vpk*13 ++ 3.5) uVrms <(Vpk*13 ++ 9.0) uVrms <(Vpk*22 ++ 40.0) uVrms <(Vpk*13 ++ 20) uVrms <(Vpk*13 ++ 22) uVrms <(Vpk*22 ++ 40) uVrms

FREQUENCY RANGE 4: 50 Hz - 100 kHz

5.0 Operating Conditions: 5.0.1 Smoothing Filter 5.0.2 Sample Rate 5.0.2.1 Minimum 5.0.2.2 Maximum

100 kHz 6.5 MHz 8 MHz

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Precision Low Frequency Source 5.1 5.1.1 5.1.2 Sine Wave Amplitude Accuracy Uncorrected (+0.5 dB, - 1.0 dB) w/tl_plfs_get_amp_filt (0.5 dB)

+(Vpk*59 + 1) mV -(Vpk*120 + 1) mV +/-(Vpk*59 + 1) mV

5.2 Total Harmonic Distortion 5.2.1 50 Hz - 50 kHz 5.2.1.1 amp < 5.12 Vpk (95 dB) 5.2.1.2 amp > 5.12 Vpk (85 dB) 5.2.2 50 kHz - 100 kHz 5.2.2.1 amp < 1.28 Vpk (95 dB) 5.2.2.2 amp 1.28 - 5.12 Vpk (90 dB) 5.2.2.3 amp > 5.12 Vpk (75 dB) 5.3 5.3.1 Spectral Impurities 100 kHz - 1 MHz (100 dB)

<(Vpk*13 or 6.7) uVrms <(Vpk*40 or 6.7) uVrms <(Vpk*13 or 6.7) uVrms <(Vpk*22 or 6.7) uVrms <(Vpk*130 or 6.7) uVrms

<(Vpk*7.1 or 30) uVrms

5.4 Noise 5.4.1 5.4.1.1 5.4.1.2 5.4.2 5.4.2.1 5.4.2.2

Total Noise (BW), dcbase off 50 Hz - 100 kHz (80 dB) 50 Hz - 1 MHz (70 dB) Total Noise (BW), dcbase on 50 Hz - 100 kHz 50 Hz - 1 MHz

<(Vpk*71 ++ 9.0) uVrms <(Vpk*220 ++ 40.0) uVrms <(Vpk*71 ++ 22) uVrms <(Vpk*220 ++ 40) uVrms

FREQUENCY RANGE 5: 500 Hz - 500 kHz

6.0 Operating Conditions: 6.0.1 Smoothing Filter 6.0.2 Sample Rate 6.0.2.1 Minimum 6.0.2.2 Maximum 6.1 6.1.1 6.1.2 Sine Wave Amplitude Accuracy Uncorrected (+1.0 dB, - 1.5 dB) w/tl_plfs_get_amp_filt (1.0 dB)

500 kHz 20 MHz 25 MHz

+(Vpk*120 + 1) mV -(Vpk*190 + 1) mV +/-(Vpk*120 + 1) mV

6.2 Total Harmonic Distortion 6.2.1 500 Hz - 250 kHz 6.2.1.1 amp < 1.28 Vpk (75 dB) 6.2.1.2 amp > 1.28 Vpk (70 dB) 6.2.2 250 - 500 kHz (55 dB) 6.3 6.4 6.4.1 6.4.2 Spectral Impurities 100 kHz - 1 MHz (100 dB) Total Noise (BW = 50 Hz - 1 MHz) 500 Hz - 250 kHz (60 dB) 250 - 500 kHz (55 dB)

<(Vpk*130 or 6.7) uVrms <(Vpk*220 or 6.7) uVrms <(Vpk*1300 or 6.7) uVrms <(Vpk*7.1 or 30) uVrms

<(Vpk*710 ++ 40.0) uVrms <(Vpk*1300 ++ 40.0) uVrms

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Specs
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Precision Multimeter

1) Voltages at the DIB may not exceed +/-200 V peak and currents may not exceed +/-1 A or test system damage may occur. 2) For safety reasons, the 1000 V DCV and ACV meter ranges are not supported by the IMAGE test language and their use is specifically locked out. They are not tested. MEASUREMENT OF VOLTAGES GREATER THAN 200 V MAY RESULT IN TEST SYSTEM DAMAGE. 3) Accuracy Specifications are a function of the quantity being measured and the selected meter range. DC accuracy specifications are therefore expressed as <ppm of reading> + <ppm of range>. AC accuracy specifications are expressed as <% of reading> + <% of range>. Accuracy specifications may be degraded depending on the meter's temperature when making a measurement relative to its temperature when last externally calibrated. Further degradation may occur as noted for each measurement mode; e.g., when using a 2-wire configuration instead of a 4-wire configuration for resistance measurements or when measuring non-sinusoidal AC signals. 4) Guaranteeing Meter Accuracy Meter accuracy depends heavily on three items: (1) The time elapsed since the meter's internal standards were calibrated against external references (a process known as external calibration), (2) The time elapsed since the meter was autocalibrated, (3) The internal temperature of the meter relative to its internal temperature when last externally calibrated (TXCAL), and when last autocalibrated (TACAL). (The meter may be interrogated for these temperatures.) 4.1) Elapsed Time Since Last External Calibration Specifications for DC Volts, DC Current, and Resistance all assume that no more than 90 days have elapsed since the last external calibration. Specifications for AC Volts assume that no more than 2 years have elapsed since the last external calibration. Elapsed Time Since Last Autocalibration All specifications assume that no more than 24 hours have elapsed since the last autocalibration. Meter Temperature For Basic Accuracy Specifications Basic meter accuracy specifications for DCV, DCI, and OHMS modes assume

4.2)

4.3)

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Precision Multimeter that the meter temperature at time of measurement is within 1 degree C of TACAL and within 5 degrees C of TXCAL. Basic meter accuracy specifications for ACV and ACDCV modes assume that the meter temperature at time of measurement is within 1 degree C of TACAL. 4.4) "With ACAL" Temperature Coefficients For DCV, DCI, and OHMS modes, a set of "with ACAL" tempco's is provided. They apply only when the meter's operating temperature is still within 1C of TACAL but more than 5C away from TXCAL. To use the "with ACAL" tempco's, determine the absolute difference between TXCAL and the meter's operating temperature, subtract 5C, multiply the tempco by that number, and add the result to the PMM's basic accuracy specification. "Without ACAL" Temperature Coefficients For DCV, DCI, and OHMS modes, a set of "without ACAL" tempco's is provided. They apply only when the meter's operating temperature is not within 1C of TACAL and not within 1C of TXCAL. To use the "without ACAL" tempco's, determine the absolute difference between TXCAL and the meter's operating temperature, multiply the tempco by that number, and add the result to the basic PMM accuracy specification. ACV and ACDCV Mode Temperature Coefficients For ACV and ACDCV modes, the tempco's given apply only when the meter's operating temperature is beyond 1C of TACAL but within 5C of TACAL; TXCAL is irrelevant. To use them, determine the difference between the meter's operating temperature and TACAL, multiply the tempco by that number, and add the result to the PMM's basic accuracy specification. Operation beyond 5C of TACAL is not specified.

4.5)

4.6)

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Precision Multimeter 1.0 DC VOLTS

1.1 ACCURACY [a] Specifications are for PRESET; NPLC 100. Units are ppm of reading + ppm of range. Range 24 Hour [b] 90 Day [c] 1 Year [c] 100 mV 2.5 + 85 5.0 + 90 9 + 90 1 V 1.5 + 8.5 4.6 + 9 8 + 9 10 V 0.5 + 0.85 4.1 + 1 8 + 1 100 V 2.5 + 0.38 6.0 + 0.38 10 + 0.38 Notes: [a] These specifications apply for readings corrected by an autozero measurement taken immediately before each reading. [b] 24 Hour specifications for fixed range and Tcal +/-1C. Valid over full range. For 24 hour accuracy without fixed range, add 0.05 ppm of Range to 10 V, 0.5 ppm of Range to 1 V, and 5 ppm of Range to 0.1 V specifications. [c] 90-day and 1-year specifications are within 24 hours of last autocalibration and +/-1C of last TACAL and within +/-5C of TXCAL. 1.1.1 PMM INPUT OFFSET VOLTAGE DRIFT When only a single autozero measurement is taken before a series of readings, add to the above specifications this offset voltage drift: +/-300 nV/s per input pin, from initial autozero offset measurement 1.2 TEMPERATURE COEFFICIENT Units are ppm of reading + ppm of range. Range 100 mV 1 V 10 V 100 V With 0.15 0.15 0.15 0.15 ACAL [a] + 1 + 0.1 + 0.01 + 0.1 Without ACAL [b] 1.2 + 1 1.2 + 0.1 0.5 + 0.01 2 + 0.4

[a] Additional error from TXCAL +/-5C, but still within +/-1C of last TACAL. [b] Additional error from TXCAL +/-1C, not within +/-1C of last TACAL. 1.3 SETTLING CHARACTERISTICS For first reading or range change error, add 0.0001% of input voltage step additional error. 1.4 Range 100 mV 1 V 10 V 100 V GENERAL Full Scale 120.00000 1.20000000 12.0000000 120.000000 Maximum Resolution 10 nV 10 nV 100 nV 1 uV Input Impedance >10 G >10 G >10 G 10 M +/- 1%

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Precision Multimeter 1.5 MAXIMUM Terminals HI to LO LO to GUARD GUARD to EARTH INPUT AT DUT +/-200 Vpk +/-200 Vpk +/ 200 Vpk

2.0

DC CURRENT

2.1 ACCURACY [a] Specifications are for PRESET; NPLC 100. Units are ppm of reading + ppm of range, unless otherwise noted. Range [b] 100 nA 1 uA 10 uA 100 uA 1 mA 10 mA 100 mA 1 A Notes: [a] These specifications include the per-pin leakage current shown in section 6.3 (+/-3 nA). [b] Specifications for the 100 nA, 1 uA, and 10 uA ranges are typical. [c] 24 Hour specifications for TXCAL +/-1C. [d] 90-day and 1-year specifications are within 24 hours of last autocalibration and +/-1C of last TACAL and within +/-5C of TXCAL. 2.2 TEMPERATURE COEFFICIENT 24 Hour [c] 10 + 3% 10 + 0.3% 10 + 300 10 + 35 10 + 6 10 + 3.3 25 + 3 100 + 10 90 Day [d] 30 + 3% 15 + 0.3% 15 + 310 15 + 38 15 + 8 15 + 5.3 30 + 5 100 + 10 1 Year [d] 30 + 3% 20 + 0.3% 20 + 310 20 + 38 20 + 8 20 + 5.3 35 + 5 110 + 10

Units are ppm of reading + ppm of range. Range 100 nA 1 uA 10 uA 100 uA 1 mA 10 mA 100 mA 1 A With ACAL [a] 2 + 50 2 + 5 2 + 1 2 + 1 2 + 1 2 + 1 2 + 1 2 + 2 Without ACAL [b] 10 + 200 2 + 20 10 + 4 10 + 3 10 + 2 10 + 2 25 + 2 25 + 3

[a] Additional error from TXCAL +/-5C, but still within +/-1C of last TACAL. [b] Additional error from TXCAL +/-1C, not within +/-1C of last TACAL. 2.3 SETTLING CHARACTERISTICS For first reading or range change error, add 0.001% of input current step additional error.

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Precision Multimeter 2.4 Range 100 nA 1 uA 10 uA 100 uA 1 mA 10 mA 100 mA 1 A GENERAL Full Scale 120.000 1.200000 12.000000 120.00000 1.2000000 12.000000 120.00000 1.0500000 Maximum Resolution 1 pA 1 pA 1 pA 10 pA 100 pA 1 nA 10 nA 100 nA Shunt Impedance [a] 545.2 k 45.2 k 5.2 k 737 107 17 8 7.1 Burden Voltage 0.055 V 0.045 V 0.055 V 0.075 V 0.100 V 0.100 V 0.250 V <1.5 V

[a] The shunt impedance value includes the resistance of the cables between the meter and the test head. 2.5 MAXIMUM Terminals I to LO LO to GUARD GUARD to EARTH INPUT AT DUT +/-1 Apk +/-200 Vpk +/-200 Vpk

3.0

RESISTANCE

3.1 ACCURACY FOR 4-WIRE MODE (OHMF) [a] [b] Specifications are for PRESET; NPLC 100; OCOMP ON, OHMF (four-wire configuration). Units are ppm of reading + ppm of range, unless otherwise noted. Range 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G Notes: [a] These specifications include the per-pin leakage current shown in section 6.3 (+/-3 nA). The leakage current adds uncertainty to the range's current source and thus increases the ppm of reading figure. [b] Four-wire ohms mode is typical for ranges above 100K. [c] 24-hour specifications for TCAL +/-1C. [d] 90-day and 1-year specifications are within 24 hours of last autocalibration and +/-1C of last TACAL and within +/-5C of TXCAL. 24 Hour [c] 6 + 3 9 + 3 8 + 0.2 62 + 0.2 120 + 0.2 0.12% + 1 1.2% + 5 1.25% + 10 1.7% + 10 90 Day [d] 16 + 5 16 + 5 14 + 0.5 68 + 0.5 130 + 0.5 0.12% + 2 1.2% + 10 1.25% + 10 1.7% + 10 1 Year [d] 16 + 5 18 + 5 16 + 0.5 70 + 0.5 130 + 0.5 0.12% + 2 1.2% + 10 1.25% + 10 1.7% + 10

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Precision Multimeter 3.1.1 ACCURACY FOR 2-WIRE MODE (OHM) [a] [b] Specifications are for PRESET; NPLC 100; OCOMP ON, OHM (two-wire configuration). Units are ppm of reading + ppm of range, unless otherwise noted. Range 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G 24 Hour [b] 5.3 + 71% 6 + 7.1% 5 + 0.71% 32 + 710 62 + 71 610 + 8 0.6% + 5.7 0.65% + 10 1.1% + 10 90 Day [c] 15.3 + 72% 13 + 7.2% 11 + 0.72% 38 + 720 68 + 72 610 + 9 0.6% + 11 0.65% + 10 1.1% + 10 1 Year [c] 15.3 + 73% 15 + 7.3% 13 + 0.73% 40 + 730 70 + 73 620 + 9 0.6% + 11 0.65% + 10 1.1% + 10

[a] Two-wire ohms mode is typical for ranges below 1M. [b] These specifications include the per-pin leakage current shown in section 6.3 (+/-3 nA) and the loop resistance shown in section 6.2 (7 ohms). The leakage current adds uncertainty to the range's current source and thus increases the ppm of reading figure; the loop resistance contributes an offset and thus increases the ppm of range figure. 3.2 TEMPERATURE COEFFICIENT Units are ppm of reading + ppm of range. Range With ACAL [a] Without ACAL [b] 10 1 + 1 3 + 1 100 1 + 1 3 + 1 1000 1 + 0.1 3 + 0.1 10 k 1 + 0.1 3 + 0.1 100 k 1 + 0.1 3 + 0.1 1 M 1 + 1 3 + 1 10 M 5 + 2 20 + 20 100 M 25 + 2 100 + 20 1 G 250 + 2 1000 + 20

AZERO OFF [c] 50 50 5 5 1 1 1 10 100

[a] Additional error from TXCAL +/-5C, but still within +/-1C of last TACAL. [b] Additional error from TXCAL +/-1C, not within +/-1C of last TACAL. [c] For a stable environment +/-1C add this error for AZERO OFF. (ppm of range)/C 3.3 SETTLING CHARACTERISTICS For first reading error following range change, add the total 90 day measurement error for the current range. Preprogrammed settling delay times are for <200 pF external circuit capacitance.

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Precision Multimeter 3.4 Range 10 100 1000 10 k 100 k 1 M 10 M 100 M 1 G GENERAL Full Scale 12.00000 120.00000 1200.0000 12.000000 120.00000 1.2000000 12.000000 120.00000 1.2000000 Maximum Lead Res. 20 ohm 200 ohm 150 ohm 1.5 k 1.5 k 1.5 k 1.5 k 1.5 k 1.5 k Maximum Resolution 10 u 10 u 100 u 1 m 10 m 100 m 1 10 100 Maximum Series Offset 0.01 V 0.01 V 0.1 V 0.1 V 0.5 V Current Source 10 mA 1 mA 1 mA 100 uA 50 uA 5 uA 500 nA 500 nA 500 nA Test Voltage 0.1 V 0.1 V 1.0 V 1.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V Open Circuit 12 V 12 V 12 V 12 V 12 V 12 V 12 V 12 V 12 V

Range 10 100 1000 10 k 100 k 1 M 10 M 100 M 1 G

3.5 MAXIMUM INPUT Terminals HI to LO HI & LO Sense to LO LO to GUARD GUARD to EARTH

+/-200 +/-200 +/-200 +/-200

Vpk Vpk Vpk Vpk

4.0

AC VOLTS

4.1 ACV ACCURACY (ACV Function) Specifications are good for up to 2 years after last external calibration. Specifications apply for within 24 hours of last autocalibration and +/-1C of last TACAL. Specifications apply for PRESET settings and for sinewave inputs (crest factor = 1.4). Specifications do not apply for inputs below 100 mV RMS; the 10 mV and 100 mV AC range are not specified. Otherwise, specifications apply for inputs between 1/20 full-scale and full-scale RMS. Units are % of Reading + % of Range. 10 Hz 20 Hz 0.117 + 0.024 0.117 + 0.024 0.13 + 0.024 20 Hz 40 Hz 0.041 0.041 0.054 + 0.01 + 0.01 + 0.01 40 Hz 1 kHz 0.022 0.022 0.036 + 0.0034 + 0.0034 + 0.004 1 kHz 20 kHz 0.029 + 0.0034 0.029 + 0.0034 0.036 + 0.015

Range 1 V 10 V 100 V

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Precision Multimeter 20 kHz 50 kHz 0.1 + 0.004 0.1 + 0.004 0.12 + 0.025 300 400 5.5 5.5 5.5 kHz kHz + 0.05 + 0.06 + 0.12 50 kHz 100 kHz 0.5 + 0.01 0.5 + 0.006 0.56 + 0.012 400 500 8.5 8.5 8.5 kHz kHz + 0.05 + 0.06 + 0.12 100 200 2 + 2 + 2 + kHz kHz 0.03 0.03 0.12 200 300 3.5 3.5 3.5 kHz kHz + 0.05 + 0.06 + 0.12

Range 1 V 10 V 100 V

Range 1 V 10 V 100 V

TEMPERATURE COEFFICIENT Additional error beyond +/-1C, but still within +/-5C of last TACAL. Units are % of Reading + % of Range. Range Temp. Co. 1 V - 100V 0.001 + 0.0001 4.1.1 ACDCV ACCURACY (ACDCV Function) For ACDCV accuracy add the following additional error to the ACV accuracy and temperature coefficient. Units are % of Reading + % of Range. DC < 10% of AC Voltage Accuracy Temp. Co. 0.0 + 0.008 0 + 0.0025 DC > 10% of AC Voltage Accuracy Temp. Co. 0.0 + 0.07 0 + 0.025

Range 1 V - 100 V

Accuracy figures apply for temperatures within +/-1C of last TACAL. Temperature coefficient figures apply for temperatures beyond +/-1C, but still within +/-5C of last TACAL.

4.2 ADDITIONAL ERRORS Add the following additional errors to the ACV accuracy and temperature coefficient if applicable. 4.2.1 LOW FREQUENCY ERROR (% of reading) ACBAND LOW _________________________________________ 10 Hz - 1 kHz 1 - 10 kHz >10 kHz NPLC > 10 NPLC > 1 NPLC > 0.1 0 0.15 0 0.015 0.9 0 0 0.2 0 0 0.05 0 0 0.01

Signal Frequency 200 - 500 Hz 500 - 1 kHz 1 - 2 kHz 2 - 5 kHz 5 - 10 kHz 4.2.2 Crest Factor 1 - 2 2 - 3 3 - 4 4 - 5

CREST FACTOR ERROR (% of reading) Additional Error 0 0.15 0.25 0.40

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Precision Multimeter 4.3 SETTLING CHARACTERISTICS For first reading or range change error using default delays, add 0.01% of input voltage step additional error. The following applies for DELAY 0. Function ACV ACDCV ACBAND LOW >=10 Hz 10 Hz - 1 kHz 1 kHz - 10 kHz >=10 kHz GENERAL Full Scale 1.20000000 12.0000000 120.000000 Maximum Resolution 1 uV 10 uV 100 uV Input 1 Meg 1 Meg 1 Meg Impedance [a] +/- 15% shunted with <140 pF +/- 2% shunted with <140 pF +/- 2% shunted with <140 pF DC Component DC < 10% AC DC > 10% AC Settling Time to 0.01% 0.5 s 0.9 s 0.5 s 0.08 s 0.015 s

4.4 Range 1 V 10 V 100 V

[a] Add capacitance shown in section 6.1 to these figures. 4.5 COMMON MODE REJECTION For 1000 ohm imbalance in LO lead, >90 dB for DC to 60 Hz 4.6 MAXIMUM Terminals HI to LO LO to GUARD GUARD to EARTH Volt-Hz Product INPUT AT DUT +/-200 Vpk +/-200 Vpk +/-200 Vpk 100,000,000

5.0 NOTE:

GUARD DRIVERS Guard drivers are not present in the A510 Standard Linear test system. The specifications given in sections 5.1 and 5.2 do not apply for the A510 Standard Linear test system.

5.1 Maximum Maximum Maximum

INPUT CHARACTERISTICS Input Current: 50 pA (typical) Input Voltage: +/-11.5 V peak min. Non-Damaging Input: +/-200 V (typical) Input Alarm Threshold: 12 V 5.2 OUTPUT CHARACTERISTICS (typical) Maximum Load Capacitance: 3 nF without slew rate degradation (typical) Slew Rate: 20 V/us with load capacitance <3 nF (typical) Full Power Bandwidth: 500 kHz (typical) Small Signal (1V p-p) Bandwidth: 5 MHz (typical) Maximum Output Voltage: +/-11.5 V peak Maximum Output Current: +/-40 mA Overcurrent Protection: sustained short-circuit to ground without damage Output Alarm Threshold: 40 mA steady-state output current

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Precision Multimeter 6.0 PMM INPUT CHARACTERISTICS

6.1 PMM INPUT CAPACITANCE (typical) PMM Mode Input Capacitance config:v guard:off 1200 pF [a] config:v guard:on 400 pF [b] config:v_low_c guard:off config:v_low_c guard:on 800 pF [a] 160 pF [b]

[a] In the A510 standard linear test system, this figure applies only for capacitance at the bulkhead connector; it does not include capacitance due to user's external cables. [b] Guard drivers are not present in the A510 Standard Linear test system; this mode of operation is not supported in the A510 Standard Linear test system. 6.2 PMM LOOP RESISTANCE <7 ohm total resistance for either pair of input pins 6.3 PMM INPUT LEAKAGE CURRENT +/-3 nA per input pin

7.0 PMM FEATURES The PMM supports the measurements shown below. language keywords are shown in parentheses. NOTE:

Applicable PMM programming

Guard drivers are not present in the A510 Standard Linear test system. The user must ground or drive the guards in the A510 Standard Linear test system.

2:1 Multiplexed Voltage Measurements (config:v) source may be single-ended or differential guards may be grounded or driven from high-side 2:1 Multiplexed Low-Capacitance Voltage Measurements (config:v_low_c) source may be single-ended or differential guards may be grounded or driven from high-side 4-Wire Voltage Ratio Measurements (config:ratio_ab) guards may be grounded or driven from high-sides 2:1 Multiplexed I Measure (config:i) guards may be grounded, connected to low-side, or driven from low-side 2:1 Multiplexed 2-wire Resistance Measurements (config:r_2w) guards may be grounded or driven from high-side 4-wire Resistance Measurements (config:r_4w) guards may be grounded or driven from high-side Voltage Measurements over THADS Bus Voltage Measurements over DC Matrix

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Specs
Note:

30

Pulse Driver

** Specifications apply at the top of DIB card.

I. 1. 1.1 1.1.1 1.1.2 1.2 1.2.1 1.2.1.1 1.2.1.2 1.2.2 1.2.3

PULSE DRIVER INSTRUMENTATION SPECIFICATIONS General Specifications Inputs Trigger bus - 1 of 6 trigger bus inputs can be used to start a pulse output. CPU write - a CPU write can be used to start a pulse output. Outputs Pulse Source Pogo path - thru relay mux to 1 of 4 Pogo pins RF path - thru blind mate RF connector Differential ECL control signal - thru Pogo block Time bus - all pulse outputs can be connected to time bus trigger 7 or trigger 8 thru a local comparator. Modes Single pulse Toggle Clocked Active high/active low

1.3 1.3.1 1.3.2 1.3.3 1.3.4

2.0 2.1 2.1.1 2.1.1.1 2.1.2 2.1.3 2.1.3.1 2.1.3.2 2.1.3.3 2.1.3.4 2.1.4

DC Specifications Pulse out - Pogo pin Pulse output voltage swing(unterminated) max +/- 11 V Output impedance 95 Ohm typical Pulse Amplitude ranges (full scale-Vpp, unterminated) Attenuate by 1 22.0 Vpp Attenuate by 2 11.0 Vpp Attenuate by 4 5.5 Vpp Attenuate by 8 2.75 Vpp Pulse amplitude resolution 0.03% (12B FS)

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Pulse Driver 2.1.5 2.1.5.1 2.1.5.2 2.1.6 2.1.7 2.2 2.2.1 2.2.1.1 2.2.2 2.2.3 2.2.4 2.2.5 2.2.5.1 2.2.5.2 2.2.6 2.2.7 Pulse amplitude accuracy VOH VOL DC offset range (full scale, unterminated) Output current (short circuit)

0.4% of range +/-3 mV 0.4% of range +/-4 mV +/-11 V +110 mA,-220 mA nominal

Pulse out - RF path Pulse output voltage swing(unterminated) Max Output impedance Pulse amplitude ranges (full scale, unterminated) Pulse amplitude resolution Pulse amplitude accuracy VOH VOL DC offset range (full scale) Output current (short circuit)

+/-5.50 V 50 Ohm typical +/-5.50 V 0.03% (12B FS) 0.3% of range +/-3 mV 0.3% of range +/-4 mV +5.5 V/-2.75 V +110 mA,-220 mA

2.3 Differential ECL control signal 2.3.1 Output termination

330 Ohms to -5 V with 47 Ohms in series

3.0 AC SPECIFICATIONS 3.1 3.1.1 3.1.1.1 3.1.1.2 3.1.2 3.1.2.1 3.1.2.2 3.1.3 3.1.3.1 3.1.3.2 3.2 3.2.1 3.2.3 3.2.4 Pulse out - Pogo pin Rise/fall time (10% to 90% - 20 V swing) Ro = 95 Ohms, fast slew mode Ro = 95 Ohms, slow slew mode Overshoot Fast slew mode Slow slew mode Settling time - 20 V to 1% Fast slew mode Slow slew mode Pulse out - RF path Rise/fall time (10% to 90% - 10 V swing) Overshoot Settling time-10 V swing to 1%

<35 ns <85 ns <5% Typical <1% Typical <100 ns <250 ns

<20 ns <5% Typical <50 ns

4.0 TIMING SPECIFICATIONS 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 Delay/width ranges (full scale) 100 400 1.6 6.4 25 100 400 ns ns us us us us us

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Pulse Driver 4.1.8 4.1.9 4.2 4.3 4.4 Delay/width insertion delay in bypass mode from trigger Delay/width resolution Delay/width accuracy (ranges 100 ns-1.6 ms) 4 ms range 1.6 ms 4 ms 20 ns Nominal 0.03% (12B FS) +/-0.5% FS +/-2 ns +/-1.0% FS

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Notes: Note 1

31

Quad Opamp Channel Card

Instrument specifications are valid at the top of the DIB.

Quad Opamp Channel Card Features 1. Quad Opamp Channel Card Loops 1.1 Test Head Hardware This channel card requires a single slot, and may be operated in Advanced Linear, PATH and Advanced Mixed Signal test heads in any of the linear slots. 1.2 Expandability Four loops allow the testing of up to four opamps in parallel. Up to four quad opamp channel cards can be employed in parallel per test head for a total of 16 opamps to be tested in parallel.

2.

Quad Opamp Channel Card Basic Functions

2.1 Modes - Continuity Employs fixed low value, constant current, variable voltage sources to be connected to DUT inputs and output. Subsequent compliance voltage readings are used to detect device pin continuity. - Internal The DUT is placed in a closed loop fixed gain configuration with programmable frequency compensation to allow the onboard measurement of input Vos and Output voltage. No loop components external to the quad opamp channel card are required in this mode. - External The user employs feedback divider resistors external to the quad opamp channel card, and close to the DUT, to place the DUT in a closed loop fixed gain configuration, with programmable frequency compensation, to allow the onboard measurement of input Vos and Output voltage. This mode accommodates devices that would otherwise be unstable due to the lead length between the DUT inputs and the feedback divider. Compensation is programmed as in the Internal mode and Vos measurements are performed in the same manner as with the Internal Mode. Open Loop and Oscillation Alarms are detected as in the Internal Mode, but Continuity Mode can only be employed on those DUT pins that are directly connected to the Quad Opamp Channel Card. Typically only the DUT output

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Quad Opamp Channel Card would be directly connected in this mode. 2.2 Connectivity 2.2.1 Matrix, THADS, User Clock, Grounds - Two internal channel card (cc) busses - two matrix pins per card, each to one cc bus - two THADS connections per card, each to one cc bus - one user clock per card, connects to both cc busses 2.2.2 Pogo Block I/O 2.2.2.1 Channel Card Input Signals (DUT Output) - DUT Output voltage - 10 Megohm input impedance in LOW voltage mode - 120K ohm input impedance in HIGH voltage mode 2.2.2.2 Channel Card Output Signals - Loop output signal for use with external feedback networks 2.2.2.3 DUT Input Signals, Internal Mode - INP, 50 Ohms impedance typically connected to DUT non-inverting input - INM, 50 Ohms impedance typically connected to DUT inverting input 2.2.3 Trigger Bus - Accepts trigger bus 1-6 to drive commutation selector 2.2.4 Measure Bus - Driven differentially, measurable selectable either statically or via commutation selector _ A Programmable Gain Instrumentation Amplifier (PGIA) is employed to provide 11 binary gain ranges from 1 to 1024, between the channel card measurement points and the Measure Bus. 2.2.5 Calibration Bus - Used to transfer system reference to on-board calibration standard 2.3 Force and Measure Functions 2.3.1 DUT Output Drive - (+/-) 80 V full scale in the HIGH voltage mode - (+/-) 20 V full scale in the LOW voltage mode 2.3.2 DUT Offset Null Mode - (+/-) 20.25 mV full scale, referred to DUT input For use in delta-Vos tests, to maximize resolution - equivalent voltage resolution 13 bits 2.3.3 DUT Input Drive - +/-10 V full scale with input 'rsource:off' and input 'protection:off' - voltage resolution 14 bits 2.3.4 Continuity Mode - (+/-) 9.5 V full scale force voltage compliance - 220 uA source/sink current - 10 V to 9.76 mv full scale measurement on DUT input and output pins, in eleven binary ranges - voltage forcing resolution at DUT inputs, 8 bits - voltage forcing resolution at DUT outputs, 14 bits 2.3.5 DUT Output Loads - Loads connect to the DUT output and are driven from the internal channel card bus by ccgnd, dc matrix or THADS

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Quad Opamp Channel Card - selectable 10K, 2K, 600 Ohm loads - 12 Ohm solid state switch - shorting relay 2.3.5.1 Low Voltage Mode - 10 Mohm to ground is always present, in parallel with any selected loads. 2.3.5.2 High Voltage Mode - 120 Kohm to ground is always present, in parallel with any selected loads. 2.3.7 VOS Measurement Internal Mode - X100 Closed Loop Gain: 99.0 mV to 97.0 uV full scale in eleven binary ranges - X1000 Closed Loop Gain: 9.9 mV to 9.7 uV full scale in eleven binary ranges - X10000 Closed Loop Gain: 990.0 uV to 970.0 nV full scale in eleven binary ranges 2.3.8 VOS Measurement Rolloff Internal Mode - X100 Closed Loop Gain: 0.10 ms time constant - X1000 Closed Loop Gain: 0.55 ms time constant - X10000 Closed Loop Gain: 5.05 ms time constant 2.3.9 VOS Measurement External Mode - Closed Loop Gain is determined by a user specified external loop feedback divider - Programmable Gain for Measure Bus 1 to 1024 in eleven binary ranges 2.3.10 DUT Output Voltage Measurement - 20 V to 19.5 mV full scale in low voltage mode employing 11 binary ranges - 80 V to 78 mV full scale in high voltage mode employing 11 binary ranges 2.4 Alarms 2.4.1 Oscillation Detector - 20 mV to 3.32 V oscillation threshold voltage setting - threshold voltage resolution 8 bits - AC coupled input, zero located at 1 kHz Oscillation amplitude detection threshold must be derated at input frequencies below 10 kHz 2.4.2 Open Loop Detector - Open loop alarm employs a fixed window threshold to detect railed loop integrator. 2.5 Frequency Compensation - Loop Frequency response is programmable to allow a wide variety of opamps to be stabilized. - Nominal DUT GBW Ranges: 1 MHz, 5 MHz, 25 MHz, 125 MHz - Nominal Zfreq Ranges: 10 Hz, 100 Hz, 1 kHz, 10 kHz 2.6 Commutation Selector - 256 possible timeslots - connects one of 8 measurables to measure bus - modulo-n operation (programmable repeats) - driven by one of trigger lines 1 - 6

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Quad Opamp Channel Card QUAD OP AMP CHANNEL CARD SPECIFICATIONS 3. Quad Opamp Channel Card Electrical Specifications (within operating environment)

3.1 Electrical Specifications, Force Voltage/Current 3.1.1 Continuity DACs 3.1.2.1 Sink/Source Current 220.0 uA Nominal 3.1.2.2 Input Compliance Setting +/-240 mV 3.1.2.3 Output Compliance Setting +/-95 mV 3.1.2 Output Drive 3.1.1.1 LOW Voltage Mode, +/-20.0V +/-0.30% 3.1.1.2 HIGH Voltage Mode, +/-80.0V +/-0.35% 3.1.3 Offset Null +/-116 uv 3.1.4 DUT Input Drive +/-0.3% 3.1.5 External Loop Compensation Output 3.1.5.1 Range +/-10.0 V Nominal 3.1.5.2 Output Impedance 100.0 Ohms Nominal 3.1.5.3 Minimum External Load to Ground 900.0 Ohms Nominal 3.2 Electrical Specifications, Measure Voltage 3.2.1 Measure VOS Internal or External Mode 3.2.1.1 Closed Loop Gain = 100 +/-0.25% of setting 3.2.1.2 Closed Loop Gain = 1000 +/-0.25% of setting 3.2.1.3 Closed Loop Gain = 10000 +/-0.50% of setting 3.2.2 Measure DUT Output Voltage Internal or External Mode 3.2.2.1 Low Voltage Mode (20 V) +/-0.5% rdg +/-2.8 mV tag n3.2.2.1 High Voltage Mode (80 V) +/-0.5% rdg +/-11.2 mV tag 3.2.3 Measure Continuity Compliance Voltage 3.2.3.1 DUT Inputs +/-0.5% rdg Nominal +/-2.8 mV tag Nominal 3.2.3.2 DUT Output +/-0.5% rdg Nominal +/-2.8 mV tag Nominal 3.3 Electrical Specifications, Other 3.3.1 Loads: 3.3.1.1 10K Load Accuracy 3.3.1.2 2K Load Accuracy 3.3.1.3 600 Ohm Load Accuracy 3.3.1.4 Solid State Relay Resistance 3.3.1.5 Shorting Relay Resistance 3.3.2 Frequency Compensation 3.3.2.1 GBW Range, 1 MHz 3.3.2.2 GBW Range, 5 MHz 3.3.2.3 GBW Range, 25 MHz 3.3.2.4 GBW Range, 125 MHz 3.3.2.5 Zfreq Range, 10 Hz 3.3.2.6 Zfreq Range, 100 Hz 3.3.2.7 Zfreq Range, 1 kHz 3.3.2.8 Zfreq Range, 10 kHz 3.3.3 Oscillation Detector Threshold 0.02 to 3.32 (Input Signal > 10 kHz)

+/-0.3% +/-0.3% +/-0.3% <24.0 Ohms <1.0 Ohms +/-20% of setting +/-13% of setting +/-12% of setting +/-12% of setting +/-2.3% of setting +/-2.3% of setting +/-3.3% of setting +/-18% of setting V Nominal

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Quad Opamp Channel Card 4. Absolute Maximum Ratings (exceeding these ratings may damage the board)

4.1 Input Pin Ratings 4.1.1 Maximum Voltage 4.1.2 Maximum Current 4.2 Output Pin Ratings 4.2.1 Maximum Voltage 4.2.2 Maximum Voltage 4.2.3 Maximum Voltage 4.2.4 Maximum Current 4.2.5 Maximum Current 4.2.6 Maximum Current 4.2.7 Maximum Current 4.2.8 Maximum Current

+/-15.0 V +/-75.0 mA

(Low Voltage Mode) (High Voltage Mode) (Continuity Mode) 10K Load 2K Load 600 Ohm Load Solid State Relay Shorting Relay

+/-75.0 V +/-100.0 V +/-90.0 V +/-3.0 mA +/-12.0 mA +/-30.0 mA +/-200.0 mA +/-200.0 mA

4.3 External Feedback Pin Ratings 4.3.1 Maximum Voltage 4.3.2 Maximum Current

+/-15.5 V +/-25.0 mA

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Serial Bus Channel Card

I. SERIAL BUS CHANNEL CARD SPECIFICATIONS

1. CHANNEL COUNT FOR EACH BOARD There can be a maximum of two boards in each test head. Clock Channel 1 Drive/Receive 2 Event/Trigger Bus 8 Multiple Level 2 Note: One of the multiple level channels uses two of the event/trigger bus channels as inputs and the other multiple level channel uses three other event/trigger bus inputs.

2. VECTOR RATE Range ----X1 X2 X4 X8 X16 Vector Rate ----------39.1 kHz to 1.67 MHz 19.5 kHz to 833 kHz 9.8 kHz to 417 kHz 4.9 kHz to 208 kHz 2.4 kHz to 104 kHz

3. DRIVER SPECIFICATIONS 3.1 VIH/VIL DC Voltage Levels (No load) 3.1.1 Voltage levels -4.0 V to +10.0 V 3.1.2 Voltage resolution 1.5 mV nominal 3.1.3 Voltage Accuracy +/-(0.25% + 15 mV) CONDITION: VIH must be 0.5 V greater than VIL 3.2 VIH/VIL DC Output Current Excluding Multiple Level Channels 3.2.1 DC Output Current Hi Source 3.2.2 DC Output Current Low Sink 3.2.3 Current Alarm Multiple Level Channels 3.2.4 DC Output Current HI Source 3.2.5 DC Output Current Low Sink

8.0 mA < I < 13.8 mA 8.0 mA < I < 13.8 mA Current > 8.0 mA for Duration > 2.4 us nominal 10 mA < I < 60 mA nominal 10 mA < I < 60 mA nominal

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Serial Bus Channel Card 3.3 Output Impedance 3.3.1 Resistance, DC 3.3.2 Impedance 3.4 Rise/Fall Time Excluding Multiple Level Channels 3.4.1 3 V swing (20%-80%) 3.4.2 5 V swing (20%-80%) 3.4.3 9 V swing (20%-80%) Multiple Level Channels 3.4.4 3 V swing (20%-80%) 3.4.5 5 V swing (20%-80%) 3.4.6 9 V swing (20%-80%) The rise and fall measurements for all channels are verified with the internal measurement bus.

100 ohms, +/-5 ohms, nominal 100 ohms, nominal

25 ns +/- 10 ns 25 ns +/- 10 ns 28 ns +/- 12 ns 43 ns +/- 10 ns 45 ns +/- 15 ns 62 ns +/- 25 ns 130 pF typical

4. COMPARATOR SPECIFICATIONS 4.1 VOH/VOL DC Voltage Levels 4.1.1 Voltage levels 4.1.2 Voltage resolution 4.1.3 Voltage Accuracy 4.2 Input Impedance 4.2.1 Leakage 4.3 Lumped capacitance on the path 4.4 Receiver Hysteresis

-4.0 V to +10.0 V 1.5 mV nominal +/-(0.25% + 30 mV)

+/-120 uA nominal 100 pF typical 60 mV nominal

5. TIMING GENERATION 5.1 Period Timing Range ----X1 X2 X4 X8 X16 Period Delay -----------600 ns to 25.6 us 1.2 us to 51.2 us 2.4 us to 102 us 4.8 us to 204 us 9.6 us to 409 us Resolution ---------100 ns 200 ns 400 ns 800 ns 1.6 us

5.2 Clock Channel Leading Edge Placement (clk_ld_edge) Range ----X1 X2 X4 X8 X16 Delay Value ----------clk_tr_edge minus clk_tr_edge minus clk_tr_edge minus clk_tr_edge minus clk_tr_edge minus Resolution ---------100 ns 200 ns 400 ns 800 ns 1.6 us

0ns 0ns 0ns 0ns 0ns

to to to to to

100 200 400 800 1.6

ns ns ns ns us

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Serial Bus Channel Card 5.3 Clock Channel Trailing Edge Placement (clk_tr_edge) Range ----X1 X1 X1 X1 X1 Delay Value -----------plus 100 ns to plus 200 ns to plus 400 ns to plus 800 ns to plus 1.6 us to Resolution ---------100 ns 200 ns 400 ns 800 ns 1.6 us

clk_ld_edge clk_ld_edge clk_ld_edge clk_ld_edge clk_ld_edge

Period Period Period Period Period

minus minus minus minus minus

100 100 100 100 100

ns ns ns ns ns

The clock leading and trailing edge placement is programmed from the beginning of the period boundary. 5.4 Data Delay The data edge for the two drive/receive channels may be programmed at the period boundary or to this data delay. Range ----X1 X2 X4 X8 X16 Delay Value -----------Period minus 100 Period minus 200 Period minus 400 Period minus 800 Period minus 1.6 Resolution ---------100 ns 200 ns 400 ns 800 ns 1.6 us

0 0 0 0 0

ns ns ns ns ns

to to to to to

ns ns ns ns us

5.5 Receive Timing Strobe Type The receive strobe for both drive/receive channels together can be connected to either the clock channel leading or trailing edge. 5.6 Clock Channel Time-out Delay Range ----X1 X2 X4 X8 X16 Time-out Delay -------------200 ns to 51.2 us 400 ns to 102 us 800 ns to 204 us 1.6 us to 409 us 3.2 us to 25.6 us Resolution ---------200 ns 400 ns 800 ns 1.6 us 3.2 us

6. PATTERN DATA 6.1 Clock Channel Edge Pattern Programming (leading and trailing) Repeat HIZ Low High The clock leading and trailing edges have independent programming. 6.2 Drive/Receive Channel Drive Pattern Programming Repeat HIZ Low High

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Serial Bus Channel Card 6.3 Drive/Receive Channel Receive Pattern Programming Mask Expect Valid Expect Low Expect High 6.4 Pattern Data Memory 64 k Locations

6.5 Channel Preset Conditions The initial state for the clock and drive/receive channels may be set to the following conditions. drive low drive high off

7. SEQUENCE CONTROL 7.1 Microcode Memory Depth 64 k Locations

7.2 Pattern Execution Control 7.2.1 Opcodes <blank> Continue to next vector. HALT Stop pattern execution unconditionally. 7.3 Debug Features 7.3.1 History RAM 64 k Locations The pass/fail condition for each vector of the two I/O channels is saved in a RAM. 7.4 System Pipelines 1 pipeline There is one pipeline in the formatter. The pattern may be restarted after a HLT opcode without pipeline priming. 7.5 Pattern Start Source Computer Command Event Bus Line 1 Trigger Bus Line 1 through 6

8. EVENT CHANNELS 8.1 Event Channel Data Source The event channels may receive waveform data from one of the following sources. Static Data Register Trigger Bus Lines 1 through 6 Event Bus with the following restrictions: Event channel 4 from Event Bus 1 Event channel 5 from Event Bus 2 Event channel 6 from Event Bus 3 Event channel 7 from Event Bus 4 Event channel 8 from Event Bus 5 Event channel 9 from Event Bus 6 Event channel 10 from Event Bus 7 Event channel 11 from Event Bus 8

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Serial Bus Channel Card 9. MULTIPLE LEVEL CHANNELS 9.1 Data Inputs Multiple Level Channel 12 Event channels 7, 8, and 9 Multiple Level Channel 13 Event channels 10 and 11

10. EDGE PLACEMENT ACCURACY 10.1 Clock and Drive/Receive Channels This is the time displacement between two channels programmed to the same point in time. 10.2 Event/Trigger bus Channels This is the time displacement between two channels connected to the same trigger bus input. Edge accuracy applies at the end of two feet of 100 ohm coax cable connected to the configuration board.

30 ns

50 ns

11. DC MATRIX FRONT END 11.1 DC Path Series Resistance From Kelvin Point <=5.0 ohms

12. RELAYS Each channel has three relays. There is a DUT relay to connect the channel to test device. A Functional relay to connect the channel driver to the test device through the DUT relay and a measurement relay to connect the test device through the DUT relay to the system matrix.

13. TIME MEASUREMENT INTERFACE TO SERIAL BUS CHANNELS 13.1 Time Measurement (TMS) access on the clock channel 13.1.1 Start and/or Stop from clock channel comparator (vol, voh) or drive/receive channels comparator (vol, voh) or from within the driver of the event/trigger bus channels 13.1.2 Enable channel access from clock channel comparator (vol, voh) or drive/receive channels comparator (vol, voh) or from within the driver of the event/trigger bus channels 13.2 Time Measurement Interface Accuracy 13.2.1 Relative to Clock or Drive/Receive channel

20 ns

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Notes: Note 3

33

Stored Data Performance Bits

Checker Circuitry for all SDB Input/Output Tests conducted in STATIONMI consists of a DIODE connected in series with the SYSTEM MATRIX. The Maximum current sink allowed per station is 500 mA.

Note 4

0.1 0.1.1

Stored Data(Performance) Bit Features 48 Stored Data Bits per Station Non-Multiplexed Readback Mode is Low True Logic

0.1.2

Two Readback Modes: Latched Readback from registers (data programmed) or True Readback from Test Head Hardware Overload Alarms in both readback modes which can be enabled/disabled via software. INPUT/OUTPUT diode clamp protected between +12 V and Ground

0.1.3

0.1.4

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Stored Data Performance Bits 1. 1.1 1.1.1 STORED DATA PERFORMANCE BIT SPECIFICATIONS OUTPUT SPECIFICATIONS HIGH Output: (Vout-Hi, bit set to 0) Vout > 4.4 @ Isource = 0 uA Vout > 4.0 @ Isource = 50 uA Vout > 2.5 @ Isource = 500 uA LOW Output: (Vout-Lo, bit set to 1) (see Note 4) VoL < 0.4 @ Isink = 16 mA VoL < 0.7 @ Isink = 60 mA VoL < 1.4 @ Isink = 120 mA Maximum Voltage out (SDB OFF) is Less Than or Equal to 5 V. INPUT SPECIFICATIONS Maximum Input Voltage = +12.6 V Minimum Input Voltage = -0.6 V Logic State Voltage 0 < 1.0 V 1 > 1.3 V SDB Input Current Input Voltage 0.8 V 2.0 V

1.1.2

1.1.3 1.2 1.2.1 1.2.2 1.2.3

1.2.4

Input Current 2 mA max, 1.6 mA typical 1 mA max, 600 uA typical

1.3 1.3.1 1.3.2

ALARM THRESHOLD SPECIFICATIONS HIGH Output (SDB OFF, Bit set to 0) 1.2 mA minimum Isource required to trip overload alarm circuit. LOW Output (SDB ON, Bit set to 1) Isink range for tripping overload alarm circuit. Isink: minimum typical guaranteed 200 mA 250 mA 300 mA

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NOTE

34

Superclock

The instrument has not been characterized or specified for the extended isoblock option.

I.

SUPERCLOCK INSTRUMENTATION SPECIFICATIONS

1.

FREQUENCY Note: Frequency synthesizer connected to system 10 MHz reference. 50 MHz to 400 MHz Frequency is programmable down to 10 MHz, but specifications are guaranteed only to 50 MHz.

1.1

Range Note:

1.2 Resolution 1.2.1 50 MHz <= Frequency <= 250 MHz 1.2.2 250 MHz < Frequency <= 400 MHz 1.3 Accuracy

1 Hz, nominal 2 Hz, nominal 1 ppm + 1 ppm/year

2.

DRIVER SPECIFICATIONS Drive Only Differential Outputs Note: All specifications for Superclock are for single-ended and nonterminated (at the DUT) cases. Although termination does not improve the quality of the signal significantly, it may be desired, in which case the following considerations are suggested. Termination should be to Vih NOT to ground, as this may damage the hardware. The terminator must be able to be switched out if edge skew calibration to HSD is desired. The maximum voltage swing will be halved. Calibration does not support termination.

2.1 2.1.1 2.1.2

VIH/VIL DC Voltage Levels (No load) Voltage levels Voltage resolution

-2.0 V to +5.0 V 1.22 mV nominal

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Superclock 2.1.3 Maximum voltage swing 5 V p-p to 100 MHz 3.3 V p-p to 400 MHz 0.5 V p-p

2.1.4 Minimum voltage swing 2.1.5 Voltage accuracy vs. programmed value 2.1.5.1 Vih

< 225 mV + 15% of swing > -125 mV - 10% of swing 2.1.5.1 Vil < 125 mV + 10% of swing > -225 mV - 15% of swing Voltages are calibrated at the user specified voltages and frequency using the midpoints of the high and low pulses. 2.2 2.3 2.3.1 2.3.2 2.4 2.4.1 2.4.2 Output Impedance Rise/Fall Time 20%-80% voltage p-p, all voltage levels. Standard isoblocks Extended isoblock option Overshoot/Undershoot Standard isoblocks Extended isoblock option 50 ohms, nominal

<500 ps <600 ps

<20 % <23 %

3.

TIMING

3.1 Edge Accuracy 3.1.1 Alignment to HSD 3.1.1.1 D1 to HSD Note:

+/-600 ps

Typical settling times required after frequency change (to within 50 ps of final position) | New Frequency |------------------| 100 MHz | 50 MHz | 50 MHz | 200-400 MHz | 100-400 MHz | Settling Time |----------------| 250 ms | 550 ms | 350 ms | 20 us | 20 us

Original Frequency -------------------200-400 MHz 200-400 MHz 100 MHz 100 MHz 50 MHz 3.1.1.2 Timing resolution 3.1.2 Duty cycle 3.1.2.1 D1 to D2 Accuracy At 50% duty cycle 3.1.2.2 Programing range

+/-20 ps nominal +/-200 ps 40% to 60%, guaranteed accuracy 5% to 95%, reduced accuracy 0% / 100% to force low/high 10 ps typical

3.1.3 Edge Jitter 3.1.3.1 RMS 3.2

Pattern Resynchronization Time 2-3 ms typical When the Superclock must be aligned to the HSD, resynchronization vectors must be appended to the beginning of the user pattern. Resynchronization will generally occur at the beginning of every pattern start.

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Superclock

4.0

SCL xtalk into adjacent HSD channels Superclock programmed to largest voltage swing

<128 mV p-p, nominal

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Specs
Notes: Note 1

35

Synchronized Power Subsystem Base

Measurement resolution is determined by the system resource used for analog-to-digital conversion of the measurement bus signal. The standard system VM is the default converter used to capture a measurement. Its specifications can be found in the standard DC subsystem ESSD. In general, measurement accuracy is limited by gain and offset errors. Meter resolution is not a significant portion of the measurement uncertainty. Depending on system type, the backplane connects to either AABUSII or M601 analog accessory bus, for measure bus or mod/wave/delta connections. Applies only to system types that include AABUSII. Applies only to system types that include M601 and its analog accessory bus. Buffer gains convert AABUSII Wave bus full scale of 4 V to backplane mod bus full scale of 10 V.

Note 2

Note 3 Note 4

Note 5

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Synchronized Power Subsystem Base 0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.1.5.1 0.1.5.2 0.1.5.3 0.1.5.4 0.1.5.5 0.1.5.6 0.1.5.7 0.2 0.2.1 0.2.1.5 0.2.2 0.2.3 0.2.4 0.2.5 0.2.6 SPS base features Card cage General purpose slots Dedicated interface slots Backplanes per system Card connectors DC power available (nominal, as a design Voltage Total Available +5 V 20 A -5.2 V 10 A -2 V 1.5 A +12 V 8 A +15 V 4 A -15 V 4 A

20 2 4 3 96-pin Inverse DIN guideline only) Per Slot 3 A 1 A 0.2 A 1 A 0.5 A 0.5 A

System Interfaces Low Speed TERABUS data interface Maximum address space per board M601 Accessory Bus Interface Reference Card direct connection to AD412 Global Trigger Bus interface Analog Accessory Bus Interface (internal only) Shutdown interface

64 words

0.3 Local Trigger Bus 0.3.1 Trigger Bus lines per backplane/card cage 8 0.3.2 Local Timers 0.3.2.1 Per backplane 4 0.3.2.2 Output select 1 to 8 demux 0.3.2.3 Input select 8 to 1 mux 0.3.2.4 Independent programmable delay and width intervals 0.3.3 10 MHz Clock reference selectable: local or global 0.3.3.1 10 MHz Clock can drive trigger bus clock line (note 3) 0.3.4 CPU interface 0.3.4.1 CPU Event Input to Trigger Bus 0.3.4.1.1 Pulsed 0.3.4.1.2 Latched 0.3.4.2 CPU Event Readback from Trigger Bus 0.3.4.2.1 Strobed 0.3.4.2.2 Latched 0.3.5 Global Trigger Bus interface: enable per line 0.3.6 Local drive/receive interface 0.3.6.1 Multiple simultaneous drivers allowed 0.3.6.2 Multiple simultaneous receivers allowed 0.4 0.4.1 0.4.2 0.4.3 0.4.3.1 0.4.3.2 0.4.4 0.5 0.5.1 Local Measure Bus Buses per backplane 2 Bus Type: unbalanced differential Output to external bus select, 2 to 1 mux M601 Accessory Bus (note 4) AABUSII Measure Bus (note 3) Input from AABUSII Measure Bus, drive local bus (either) (note 3) Local Modulation Bus Buses per backplane

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Synchronized Power Subsystem Base 0.5.2 Bus Type: unbalanced differential 0.5.3 Input from external bus select, 1 to 2 demux 0.5.3.1 M601 Accessory Bus (Delta Bus) (note 4) 0.5.3.2 AABUSII Wave Bus (note 3) 0.6 0.6.1 0.6.2 Local Analog Bus (not during calibration) Buses per backplane Bus type: 2 wire, relay isolated, fully floating

0.7 Local Analog Bus (during calibration) 0.7.1 Buses per backplane 0.7.2 Resistance Bus type 0.7.2.1 Voltage Bus type

2 4 wire, relay isolated, fully floating 3 wire, relay isolated, ground referenced to Local Bus 1 (note 4) to Local Bus 4 (note 4) to Local Bus 2 (note 4) to Local Bus 3 (note 4) to Local Bus 1 (note 3) to Local Bus 4 (note 3) to Local Bus 2 (note 3) to Local Bus 3 (note 3)

0.7.3 Input/Output to AD412 Cal bus select: 0.7.3.1 AD412 Calibration Bus: V high 0.7.3.2 AD412 Calibration Bus: V low sense 0.7.3.3 low force is tied to local ground 0.7.3.4 AD412 Calibration bus: R high 0.7.3.5 AD412 Calibration bus: R low 0.7.4 Input/Output to AABUSII Cal bus select: 0.7.4.1 AABUSII Calibration Bus 2 high F/S 0.7.4.2 AABUSII Calibration Bus 2 low sense 0.7.4.3 low force is tied to local ground 0.7.4.4 AABUSII Calibration bus 1 high F/S 0.7.4.5 AABUSII Calibration bus 1 low F/S

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Synchronized Power Subsystem Base I. 1. 1.1 SPS Base Specifications Local Timers Ranges and accuracy (delay or width) range 1.1.1 1.1.2 1.1.3 1.1.4 1.1.5 1.1.6 1.1.7 1.1.8 1.2 1.2.1 1.2.2 1.3 1.3.1 1.3.2 13,107 26,214 52,428 104,856 209,712 419,424 838,848 1,677,696 us us us us us us us us resolution 200 400 800 1.6 3.2 6.4 12.8 25.6 ns ns ns us us us us us accuracy (nominal) delay 600 ns + clk accuracy 800 ns + clk accuracy 1.2 us + clk accuracy 2.0 us + clk accuracy 3.6 us + clk accuracy 6.8 us + clk accuracy 13.2 us + clk accuracy 26.0 us + clk accuracy accuracy (nominal) width 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy 100 ns + clk accuracy

Clock accuracy Clock accuracy using local clock +/-0.01% Clock accuracy using system master clock, see system ESSD Jitter Width jitter Delay jitter

2 ns RMS maximum nominal (2 ns plus resolution) RMS max nominal

2. 2.1 2.2 2.3

Local trigger bus CPU pulse width Jitter Pulse width

315 ns (+/-55 ns) nominal, as generated by SPS card cage 300 ps nominal maximum RMS 40 ns minimum, i.e., pulses less than this will not operate reliably.

3. 3.1 3.1.1 3.1.2 3.1.3 3.1.4 3.1.5

Local measure buses Backplane measure buses (1 and 2) Full scale Signal type Driver output Res Receiver leakage PARD

3.1.6 3.1.7 3.2 3.2.1 3.2.2 3.2.3

Maximum allowable voltage Client leakage to bus

+/-10.24 V nominal unbalanced differential <100 ohms nominal <30 nA nominal < 0.5 mV rms nominal (when driven by SPS card cage) buffer inputs shorted with 100 ohms to ground, measure bandwidth 0.1 Hz to 1 MHz +/-15 V maximum, either signal to ground 30 nA maximum

Buffer from backplane (either bus) to system AABUSII measure bus or to system M601 measure bus (note 2) Gain 1.0 +/-0.02% typical Offset +/-1 mV typical maximum Settling 1 us to 1% typical maximum

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Synchronized Power Subsystem Base 3.2.4 3.3 3.3.1 3.3.2 3.3.3 3.3.4 180 kHz for amplitude +/-1% typical minimum Buffer to backplane (either bus) from system AABUSII measure bus (note 3) Gain 1 +/-0.02% typical Offset +/-1 mV typical maximum Settling 1 us to 1% typical maximum Bandwidth 180 kHz for amplitude +/-1% typical minimum Bandwidth

4. 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.1.5

Local modulation buses Backplane modulation buses (1 and 2) Full scale Signal type Driver output Res Receiver leakage PARD

4.1.6 4.1.7 4.2

Max allowable voltage Client leakage to bus

+/-10.24 V nominal unbalanced differential <100 ohms nominal <100 nA nominal <1 mV rms nominal (when driven by SPS card cage) gain set to 2.5, buffer inputs shorted with 100 ohms, measure bandwidth 0.1 Hz to 1 MHz +/-15 V maximum, either signal to ground 30 nA maximum

Buffer to backplane (either bus) from system M601 delta bus (note 4) 4.2.1 Settling time 1 us to 1% nominal as driven by SPS card cage from system 4.2.2 Gain values and accuracy 4.2.2.1 Gain Accuracy Offset 4.2.2.2 1 +/-0.15% max +/-4 mV maximum 4.2.2.3 2.5 +/-0.15% max +/-7 mV maximum 4.3 Buffer to backplane (either bus) from system AABUSII wave bus (note 3) 4.3.1 Settling time 1 us to 1% nominal as driven by SPS card cage from system 4.3.2 Gain values and accuracy 4.3.2.1 Gain Accuracy Offset 4.3.2.3 2.5 +/-0.15% max +/-7 mV maximum (note 5) 4.4 Buffer from backplane (either bus) to system AABUSII wave bus (note 3) 4.4.1 Settling time 1 us to 1% nominal as driven by SPS card cage from system 4.4.2 Gain values and accuracy 4.4.2.1 Gain Accuracy Offset 4.4.2.3 0.4 +/-0.15% max +/-4 mV maximum (note 5)

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Synchronized Power Subsystem Base 5. 5.1 5.1.1 5.1.2 5.2 5.2.1 5.2.2 5.3 5.3.1 5.3.2 Local Analog buses (as used for calibration) Resistance high and low (force and sense) Maximum allowable voltage +/-100 V maximum, either signal to ground Client leakage to bus 1 nA max Voltage high (force and sense) Maximum allowable voltage Client leakage to bus

+/-100 V maximum, either signal to ground 30 nA max

Voltage low (sense, force is power return) Maximum allowable voltage +/-2 V maximum, either signal to ground Client leakage to bus 30 nA max

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Notes:

36

THADS24 Channel Card

Note 1: Throughout this document THADS is an acronym for Test Head Analog Distribution System, a coaxial connection network which is local to the test head. Note 2: THADS to pin path is from backplane connector on the channel card to the end of the Iso-pin (Advanced Mixed-Signal or Advanced Linear Test Head) or the end of a 24 inch 50 Ohm coaxial cable (Production Analog Test Head). Note 3: Pin to pin path is from one pin to another via the internal channel card bus. The pin is at the end of the Iso-pin (Advanced Mixed-Signal or Advanced Linear Test Head) or the end of a 24 inch 50 Ohm coaxial cable (Production Analog Test Head). Note 4: Relative path length error valid only after autocalibration. Note 5: *typical* specifications are sample tested, NOT 100% tested and are NOT guaranteed. Note 6: *nominal* specifications are generally calculated values and are NOT guaranteed. Note 7: Specifications are based on measurements and calculations for the following paths: 1) Advanced Mixed-Signal (AMS) or Advanced Linear (AL) Test Head From the backplane connector to the Iso-pins. 2) Production Analog Test Head (PATH) From the backplane connector to the end of 24 inch 50 Ohm coaxial cables connected to a PATH configuration board. Refer to the system specification for contributions of the THADS itself.

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THADS24 Channel Card I. 0. 0.1 0.2 0.3 0.4 0.5 THADS24 INSTRUMENTATION SPECIFICATIONS THADS24 Features 24 output pins Connections between any THADS24 pin and THADS 1 or 2 Connections between any THADS24 pin and local ground Connections between any number of THADS24 pins Connections between user clock signal and any THADS24 pin

1. 1.1 1.1.1 1.1.2 1.1.3 1.1.4 1.1.4.1 1.1.4.2 1.2 1.2.1

THADS24 SPECIFICATIONS DC SPECIFICATIONS Max DC resistance THADS to pin Max DC resistance pin to pin Max DC resistance pin to local ground Max capacitance AMS or AL Test Head PATH TIME ACCESS SPECIFICATIONS Relative Path Length Error

2.1 ohms nominal (Note 2) 3.0 ohms nominal (Note 3) 2.0 ohms nominal 150 pF typical (Note 7) 125 pF typical (Note 7)

+/-25 ns (Note 4)

1.3 AC SPECIFICATIONS 1.3.1 Crosstalk 1.3.1.1 Crosstalk to quiet channel, AMS or AL Test Head, maximum, (Note 7) 1.3.1.1.1 at 1 kHz -103 dB typical 1.3.1.1.2 at 10 kHz -82 dB typical 1.3.1.1.3 at 100 kHz -64 dB typical 1.3.1.1.4 at 1 MHz -35 dB typical 1.3.1.1.5 at 10 MHz -8 dB typical 1.3.1.2 Crosstalk to quiet channel, PATH, maximum, (Note 7) 1.3.1.2.1 at 1 kHz -103 dB typical 1.3.1.2.2 at 10 kHz -84 dB typical 1.3.1.2.3 at 100 kHz -65 dB typical 1.3.1.2.4 at 1 MHz -40 dB typical 1.3.1.2.5 at 10 MHz -10 dB typical 1.3.2 Insertion Loss 1.3.2.1 Insertion Loss, AMS or AL Test Head (Note 7) 1.3.2.1.1 1 dB 1.5 MHz typical 1.3.2.1.2 2 dB 2 MHz typical 1.3.2.1.3 3 dB 3 MHz typical 1.3.2.1.4 10 dB 5 MHz typical 1.3.2.2 Insertion Loss, PATH (Note 7) 1.3.2.2.1 1 dB 6 MHz typical 1.3.2.2.2 2 dB 7 MHz typical 1.3.2.2.3 3 dB 9 MHz typical 1.3.2.2.4 10 dB 12 MHz typical

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Notes: 1 2

37

Universal Backplane V/I Source

All measurement specifications apply with the system meter filter on. All specifications for voltage accuracy apply at the point the Kelvin connection is made. In cases where the Kelvin connection is made on the channel card rather than at the Device Under Test (DUT), there will be an additional voltage error term which is proportional to the current flowing. The resistance is specified for the path between the channel card internal Kelvin point and the Iso-Pin(TM). UB = Universal Backplane FV = Forcing Voltage V/I = Voltage Forcing/Current Forcing Vprog = Programmed Voltage of Source Vrange = Voltage Range of Source Vmeas = Measured Voltage Iprog = Programmed Current Clamp of Source Imeas = Measured Current FS = Full Scale TBD = To Be Determined Modulation accuracy does not include errors due to modulation source. Calibrated performance holds for 1 week or a temperature drift of 5 degrees Celsius, whichever happens first. Area of specified performance is defined by: *Range* = extent of calibration for forced or metered parameter *Maximum Output* = boundary condition for calibrated operation of instrument *Maximum Allowable* = absolute maximum rating to which instrument can be subjected; specifications are not applicable at this operating point

4 5

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Universal Backplane V/I Source I. 0. 0.1 0.1.1 0.1.2 0.1.3 0.1.4 0.1.5 0.1.6 0.1.7 UNIVERSAL BACKPLANE V/I SOURCE INSTRUMENTATION SPECIFICATIONS, Note 3 UB V/I FEATURES GENERAL Ability to force voltage or current with automatic crossover Full four quadrant operation (source or sink, positive or negative) Three ranges of slew/settling Force, Sense, and Guard outputs One PC board, plugs into UB backplane Sources can be paralleled for higher current capability, up to backplane and wiring limits Source functions as a matrix source (Lines 1-5) or as a DUT source. When used as a matrix source, a jumper set selects source output to be connected to lines 1 through 5. When used as a DUT source, output is connected to a multiplexer tied to J3, and a cable is connected between J3 and the bulkhead/test head Software readback indicates which matrix or DUT source number is configured. Ground referenced operation only, with a low sense input (DGS) which is tied to ground at the DUT CONNECTIONS Voltmeter and ammeter connected to backplane measure buses Trigger bus connection for source gate (any 1 of 8 trigger lines) Wave bus connection for modulation (voltage only) SAFETY/ALARMS Shutdown signal will gate source off Overvoltage protected, with overvoltage driving system shutdown and causing an alarm Alarm for guard current Alarm for open loop Alarm for mode error (in constant I mode when constant V expected, or in constant V mode when constant I expected) Thermal sensor to measure the heat sink temperature, or the ambient temperature Alarm for thermal overload (heat sink too hot)

0.1.8 0.1.9

0.2 0.2.1 0.2.2 0.2.3 0.3 0.3.1 0.3.2 0.3.3 0.3.4 0.3.5 0.3.6 0.3.7

1. 1.1 1.2

VOLTAGE FORCING, Note 2, 5 Range, Note 6 Ranges 0 to +/-60 V 0.5 V, 1 V, 2 V, 5 V, 10 V, 20 V, 50 V, 100 V, 200 V Full Scale 16 bits including sign

1.3 1.4 1.4.1 1.4.2 1.4.3 1.4.4 1.4.5 1.4.6

Resolution Accuracy, Calibrated Vrange = 0.5 V Vrange = 1 V Vrange = 2 V Vrange = 5 V Vrange = 10 V Vrange = 20 V

+/-1 +/-1 +/-1 +-(0.05% of Vprog or +-(0.05% of Vprog or +-(0.05% of Vprog or

mV mV mV 1 mV), whichever is greater 2.5 mV), whichever is greater 5 mV), whichever is greater

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Universal Backplane V/I Source 1.4.7 1.4.8 1.4.9 1.5 1.6 Vrange = 50 V Vrange = 100 V Vrange = 200 V +-(0.05% of Vprog or 10 mV), whichever is greater +-(0.1% of Vprog or 50 mV), whichever is greater +-(0.1% of Vprog or 100 mV), whichever is greater +/-200 mA +/-65 V, nominal

Maximum Output Current, Note 6 Maximum Allowable Voltage, Note 6

2. 2.1 2.2

VOLTAGE METERING, Note 2, 5 Range, Note 6 Ranges 0 to +/-60 V 0.5 V, 1 V, 2 V, 5 V, 10 V, 20 V, 50 V, 100 V, 200 V Full Scale depends on system meter; reference system meter ESSD

2.3

Resolution

2.4 2.4.1 2.4.2 2.4.3 2.4.4 2.4.5 2.4.6 2.4.7 2.4.8 2.4.9 2.5 2.6

Accuracy, Calibrated Vrange = 0.5 V Vrange = 1 V Vrange = 2 V Vrange = 5 V Vrange = 10 V Vrange = 20 V Vrange = 50 V Vrange = 100 V Vrange = 200 V

+/-1 mV +/-1 mV +/-1 mV +-(0.05% of Vmeas or 1 mV), whichever is greater +-(0.05% of Vmeas or 2.5 mV), whichever is greater +-(0.05% of Vmeas or 5 mV), whichever is greater +-(0.05% of Vmeas or 10 mV), whichever is greater +-(0.1% of Vmeas or 50 mV), whichever is greater +-(0.1% of Vmeas or 100 mV), whichever is greater +/-200 mA +/-65 V, nominal

Maximum Output Current, Note 6 Maximum Allowable Voltage, Note 6

3. 3.1 3.2

CURRENT FORCING, Note 5 Range, Note 6 Ranges +/-200 mA 20 uA, 200 uA, 2 mA, 20 mA, 200 mA Full Scale 16 bits including sign +-(0.1% of Iprog + 0.05% of FS + 100 nA) +/-60 V +/-65 V, nominal

3.3 3.4

Resolution Accuracy, Calibrated

3.5 3.6

Maximum Output Voltage, Note 6 Maximum Allowable Voltage, Note 6

4. 4.1

CURRENT METERING, Note 5 Range, Note 6 +/-200 mA

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Universal Backplane V/I Source 4.2 Ranges 5 uA, 10 uA, 20 uA, 50 uA, 100 uA, 200 uA, 500 uA, 1 mA, 2 mA, 5 mA, 10 mA, 20 mA, 50 mA, 100 mA, 200 mA Full Scale depends on system meter; reference system meter ESSD +-(0.1% of Imeas + 0.05% of FS + 100 nA) +/-60 V +/-65 V, nominal

4.3

Resolution

4.4

Accuracy, Calibrated

4.5 4.6

Maximum Output Voltage, Note 6 Maximum Allowable Voltage, Note 6

5. 5.1 5.2

MODULATION Ranges Resolution 2 V, 20 V, 200 V depends on modulation source; reference mod. source ESSD +/-(0.5% + 0.5% of FS), typical

5.3

Accuracy, Note 4

6. 6.1

STABILITY Maximum Capacitive Load with Stability 100 uF, typical

7. 7.1

PROTECTION Overvoltage trip point +/-(72.4 V +/- 1.4 V), nominal

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Notes: 1 2

38

Universal Backplane 100 V V/I Source

All measurement specifications apply with the system meter filter on. All specifications for voltage accuracy apply at the point the Kelvin connection is made. In cases where the Kelvin connection is made on the channel card rather than at the device under test (DUT), there will be an additional voltage error term which is proportional to the current flowing. The resistance is specified for the path between the channel card internal Kelvin point and the Iso-Pin(TM). UB = Universal Backplane FV = Forcing Voltage V/I = Voltage Forcing/Current Forcing Vprog = Programmed Voltage of Source Vrange = Voltage Range of Source Vmeas = Measured Voltage Iprog = Programmed Current Clamp of Source Imeas = Measured Current FS = Full Scale TBD = To Be Determined Modulation accuracy does not include errors due to modulation source. Calibrated performance holds for 1 week or a temperature drift of 5 degrees Celsius, whichever happens first. Area of specified performance is defined by: *Range* = extent of calibration for forced or measured parameter *Maximum Output* = boundary condition for calibrated operation of the instrument *Maximum Allowable* = absolute maximum rating to which this instrument can be subjected; specifications are not applicable at this operating point. Exceeding the maximum capacitive load specification may cause alarms and shutdown when transitioning from High Voltage to Standard Mode.

4 5

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Universal Backplane 100 V V/I Source I. 0. 0.1 0.1.1 0.1.2 UNIVERSAL BACKPLANE 100V VI SOURCE INSTRUMENTATION SPECIFICATIONS, Note 5 UB 100V VI FEATURES GENERAL Ability to force voltage or current with automatic crossover Two modes allow higher voltage capability: Standard Mode equivalent to UB 60 V V/I; High-Voltage Mode for up to 100 V compliance Full four quadrant operation (source or sink, positive or negative) Three ranges of slew/settling Force, Sense, and Guard outputs One PC board, plugs into UB backplane Sources can be paralleled for higher current capability, up to backplane and wiring limits. Source functions as a matrix source (Lines 1-5) or as a DUT source. When used as a matrix source, a jumper set selects source output to be connected to lines 1 through 5. When used as a DUT source, output is connected to a multiplexer tied to J3, and a cable is connected between J3 and the bulkhead/test head Ground referenced operation only, with a low sense input (DGS) which is tied to ground at the DUT Software readback indicates which matrix or DUT source number is configured. CONNECTIONS Voltmeter and ammeter connected to backplane measure buses Trigger bus connection for source gate (any 1 of 8 trigger lines) Wave bus connection for modulation (voltage only) Relay to close force-sense connection for test purposes SAFETY/ALARMS Shutdown signal will gate source off Overvoltage protected, with overvoltage driving system shutdown and causing an alarm Alarm for guard current Alarm for open loop Alarm for mode error (in constant I mode when constant V expected, or in constant V mode when constant I expected) Thermal sensor to measure the heat sink temperature, or the ambient temperature Alarm for thermal overload (heat sink too hot)

0.1.3 0.1.4 0.1.5 0.1.6 0.1.7 0.1.8

0.1.9 0.1.10

0.2 0.2.1 0.2.2 0.2.3 0.2.5 0.3 0.3.1 0.3.2 0.3.3 0.3.4 0.3.5 0.3.6 0.3.7

1. 1.1 1.1.1 1.1.2 1.2

VOLTAGE FORCING (Notes 2, 5) Range (Note 6) Standard Mode High-Voltage Mode Ranges

-60 V to +60 V -100 V to +100 V 0.5 V, 1 V, 2 V, 5 V, 10 V, 20 V, 50 V, 100 V, 200 V Full Scale 16 bits including sign

1.3

Resolution

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Universal Backplane 100 V V/I Source 1.4 1.4.1 1.4.2 1.4.3 1.4.4 1.4.5 1.4.6 1.4.7 1.4.8 1.4.9 1.5 1.6 1.6.1 1.6.2 Accuracy, Calibrated Vrange = 0.5 V Vrange = 1 V Vrange = 2 V Vrange = 5 V Vrange = 10 V Vrange = 20 V Vrange = 50 V Vrange = 100 V Vrange = 200 V

+/-1 mV +/-1 mV +/-1 mV +-(0.05% of Vprog or 1 mV), whichever is greater +-(0.05% of Vprog or 2.5 mV), whichever is greater +-(0.05% of Vprog or 5 mV), whichever is greater +-(0.05% of Vprog or 10 mV), whichever is greater +-(0.1% of Vprog or 50 mV), whichever is greater +-(0.1% of Vprog or 100 mV), whichever is greater +/-200 mA

Maximum Output Current (Note 6)

Maximum Allowable Voltage, nominal (Note 6) Standard Mode +/-65 V High Voltage Mode +/-105 V

2. 2.1 2.1.1 2.1.2 2.2

VOLTAGE METERING Note 1,5 Range (Note 6) Standard Mode High Voltage Mode Ranges

0 to +/-60 V 0 to +/-100 V 0.5V, 1V, 2V, 5V, 10V, 20V, 50V, 100V, 200V Full Scale depends on system meter; reference system meter ESSD

2.3

Resolution

2.4 2.4.1 2.4.2 2.4.3 2.4.4 2.4.5 2.4.6 2.4.7 2.4.8 2.4.9

Accuracy, Calibrated Vrange = 0.5 V Vrange = 1 V Vrange = 2 V Vrange = 5 V Vrange = 10 V Vrange = 20 V Vrange = 50 V Vrange = 100 V Vrange = 200 V

+/-1 mV +/-1 mV +/-1 mV +-(0.05% of Vmeas or 1 mV), whichever is greater +-(0.05% of Vmeas or 2.5 mV), whichever is greater +-(0.05% of Vmeas or 5 mV), whichever is greater +-(0.05% of Vmeas or 10 mV), whichever is greater +-(0.1% of Vmeas or 50 mV), whichever is greater +-(0.1% of Vmeas or 100 mV), whichever is greater

3. 3.1 3.2

CURRENT FORCING (Note 5) Range (Note 6) Ranges +/-200 mA 20 uA, 200 uA, 2 mA, 20 mA, 200 mA Full Scale 16 bits including sign +-(0.1% of Iprog + 0.05% of FS + 100 nA)

3.3 3.4

Resolution Accuracy, Calibrated

3.5 3.5.1

Maximum Output Voltage, nominal (Note 6) Standard Mode +/-60 V, up to 200 mA

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Universal Backplane 100 V V/I Source 3.5.2 3.6 3.6.1 3.6.2 High Voltage Mode +/-100 V, up to 200 mA

Maximum Allowable Voltage, nominal (Note 6) Standard Mode +/-65 V, up to 200 mA High Voltage Mode +/-105 V, up to 200 mA

4. 4.1 4.2

CURRENT METERING (Note 1, 5) Range (Note 6) Range +/-200 mA Full Scale 5 uA, 10 uA, 20 uA, 50 uA, 100 uA, 200 uA, 500 uA, 1 mA, 2 mA, 5 mA, 10mA, 20 mA, 50 mA, 100 mA, 200 mA depends on system meter; reference system meter ESSD +-(0.1% of Imeas + 0.05% of FS + 100 nA) +/-100 V +/-105 V

4.3

Resolution

4.4

Accuracy, Calibrated

4.5 4.6

Maximum Output Voltage (Note 6)) Maximum Allowable Voltage (Note 6)

5. 5.1 5.2

MODULATION Ranges Resolution 2 V, 20 V, 200 V depends on modulation source; reference mod. source ESSD +/-(0.5% + 0.5% of FS), typical

5.3

Accuracy (Note 8)

6. 6.1 6.2 7. 7.1 7.1.1 7.1.2 7.2 7.2.1 7.3.2

STABILITY Maximum Capacitive Load with Stability 100 uF, typical 100 uF, typical

Maximum Capacitive Load High-Voltage modes PROTECTION Overvoltage trip point Standard Mode High-Voltage Mode

+/-(71.8 V +/- 0.8 V) typical +/-(114.6 V +/- 1.2 V) typical

Mode Change Delay Standard mode to High Voltage mode transition High Voltage mode to Standard mode transition

1.5 ms 25 ms

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Specs
Notes:

39

VHF Arbitrary Waveform Generator

1) All specifications apply at the DIB "blind mate" RF connector. The VHFAWG may also interface to the DIB via the channel card Pogo pin path. Specifications may be degraded when using the Pogo pin path. 2) All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any resistive load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms when filters higher than 10 MHz are selected, include the 80 - 200 MHz frequency range. 3) Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). 4) Amplitude Accuracy = Absolute Accuracy @ 10 dBm + Step Attenuator Accuracy + Fine Amplitude Accuracy + Mismatch Errors The error terms listed above are specified for each Frequency Range. The Absolute Accuracy applies only when next highest frequency filter from the frequency being sourced is selected. Also, the Absolute Accuracy applies only to the Frequency Domain 80 MHz Filter, not the Time Domain 80 MHz Filter. 5) When sourcing a frequency of less than 100 kHz, the user should use LEVEL:SINE mode of level calibration and specify LEVEL_FREQ = 100kHz. 6) All specifications including those that are Frequency Range specific assume that the waveform is stored in memory normalized to 12 bits full scale. 7) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 8) TYPICAL specifications are sample tested, are NOT 100% tested and are NOT guaranteed. 9) NOMINAL specifications are generally calculated values, are NOT 100% tested, and are NOT guaranteed. 10) F(hfc) = Highest Frequency Component being sourced. 11) Sine Wave Spurious Responses are specified relative to the full scale sine wave signal in dBc down to levels of -10 dBm. Below -10 dBm, the spurious level is specified as a fixed power in dBm.

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VHF Arbitrary Waveform Generator I 1 1.1 1.1.1 1.1.2 1.2 1.2.1 1.2.2 1.3 1.4 1.4.1 1.4.2 1.5 1.5.1 1.5.2 1.6 1.7 1.8 VHFAWG SPECIFICATIONS GENERAL SPECIFICATIONS (Apply to all Frequency Ranges) Peak Output Voltage (AC + DC Baseline) Load = 50 ohms Load = Open Circuit AC p-p Output Voltage Load = 50 ohms Load = Open Circuit Output Current Compliance Limit Output Short Circuit AWG Mode to 80 MHz CW Mode 80 - 200 MHz AC Waveform Amplitude Control Step Attenuators Fine Amplitude Resolution DC Offset without autocal DC Offset with autocal Offset Drift

+/-2.0 V max. +/-4.0 V max.

4.0 V max. 8.0 V max. +/-40 mA typical

+/-80 mA. typical +/-70 mA. typical

1, 2, 4, 8, 16, 16 dB <0.01 dB +/-50 mV +/-5 mV +/-800 uV/C nominal

1.9 Programmable DC Baseline 1.9.1 Range 1.9.2 Resolution 1.9.3 Accuracy: 1.9.3.1 Uncalibrated (dccal:off) 1.9.3.2 Calibrated (dccal:on) 1.9.4 Linearity: 1.9.4.1 Uncalibrated (dccal:off) 1.9.4.2 Calibrated (dccal:on) 1.9.5 Settling Time for 4.0 V Step

+/-2.0 V (12 Bits) +/-(5% + 50) mV +/-(1% + 6) mV +/-1% +/-0.5% <2 ms to 1% of final value 2000 V/us typical 12 bits 15 ms max. 200 MHz 1.5625 MHz 256k, (1 M Optional) 8

1.10 1.11 1.12 1.13 1.14 1.15 1.16

Slew Rate (filter bypass) Waveform Resolution Sample Clock Settling time Maximum Sample Rate Minimum Sample Rate Waveform Memory Depth Maximum Level of Subroutines

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VHF Arbitrary Waveform Generator 1.17 1.17.1 1.17.2 1.17.3 Waveform Segment Modulus F(s) = 1.5625 MHz - 50 MHz F(s) = 50 MHz - 100 MHz F(s) = 100 MHz - 200 MHz

Modulo = 1 Modulo = 2 Modulo = 4

1.18 Waveform Controller 1.18.1 Maximum number of waveform segments 1.18.2 Minimum number of samples/segment 1.18.2.1 1.18.2.2 1.18.2.3

4096 2*S.R.L. + 4 (1:1 Mode) 2*S.R.L. + 8 (2:1 Mode) 2*S.R.L. + 12 (4:1 Mode) (S.R.L. = Subroutine Level)

1.19 1.19.1 1.19.2

Event Lines (synchronized with waveform memory) 8 (Optional) Event Line Start Sample Resolution Modulo 4 (1,5,9...). Event Line Stop Sample Resolution Modulo 4 or = segment size.

2 2.0 2.0.1 2.0.2 2.0.3 2.1 2.1.1 2.1.2 2.1.3 2.1.4

FREQUENCY RANGE I

DC - 1 MHz

Operating Conditions Minimum Sample Rate (F(s) = 0.5 MHz Filter Min. F(s) 1.0 MHz Filter Min. F(s) Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Accuracy Output VSWR

4 * F(hfc) 1.5 MHz + F(hfc) 3.0 MHz + F(hfc)

+/-0.25 dB +/-((0.15 dB + 0.01 dB/dB change) up to 0.5 dB max.) +/-0.1 dB <1.2:1 typical

2.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 2.2.1 Load = 50 - 600 ohms 2.2.1.1 Level = 10 - 16 dBm -45 dBc 2.2.1.2 Level = 0 - 10 dBm -55 dBc 2.2.1.3 Level = -30 - 0 dBm -60 dBc 2.2.2 Load > 600 ohms -60 dBc 2.3 2.3.1 2.3.2 2.4 Sine Wave Spurious Responses (BW = 100 Hz - 10 MHz) Level = -10 - 16 dBm -60 dBc Level = -30 -> -10 dBm -70 dBm Noise (BW = 100 Hz - 30 MHz) <20 uVrms (30 kHz BW)

2.5 Step Response Characteristics 2.5.1 0.5 MHz Filter 2.5.1.1 Risetime 2.5.1.2 Overshoot/Undershoot 2.5.2 1.0 MHz Filter 2.5.2.1 Risetime 2.5.2.2 Overshoot/Undershoot

<750 ns typical <2% typical <400 ns typical <2% typical

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VHF Arbitrary Waveform Generator 3 3.0 3.0.1 3.0.2 3.0.3 3.0.4 3.0.5 3.0.6 3.1 3.1.1 3.1.2 3.1.3 3.1.4 FREQUENCY RANGE II DC - 10 MHz

Operating Conditions Minimum Sample Rate (F(s) = 2.0 MHz Filter Min. F(s) = 4.0 MHz Filter Min. F(s) = 5.5 MHz Filter Min. F(s) = 6.0 MHz Filter Min. F(s) = 10.0 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Accuracy Output VSWR

4 * F(hfc) 6.0 MHz + F(hfc) 12.0 MHz + F(hfc) 11.0 MHz + F(hfc) 18.0 MHz + F(hfc) 30.0 MHz ++ F(hfc)

+/-0.25 dB +/-(0.15 dB + 0.01 dB/dB change up to 0.5 dB max.) +/-0.1 dB <1.2:1 typical

3.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 3.2.1 Frequency = 1 - 4 MHz 3.2.1.1 Load = 50 - 600 ohms 3.2.1.1.1 Level = 10 - 16 dBm -45 dBc 3.2.1.1.2 Level = 0 - 10 dBm -55 dBc 3.2.1.1.3 Level = -30 - 0 dBm -60 dBc 3.2.1.2 Load > 600 ohms 3.2.1.2.1 Level = 10 - 16 dBm -50 dBc 3.2.1.2.2 Level = -30 - 10 dBm -60 dBc 3.2.2 Frequency = 4 - 10 MHz 3.2.2.1 Level = 10 - 16 dBm -45 dBc 3.2.2.2 Level = 0 - 10 dBm -50 dBc 3.2.2.3 Level = -30 - 0 dBm -55 dBc 3.3 3.3.1 3.3.2 3.4 Sine Wave Spurious Responses (BW = 100 Hz - 100 MHz) Level = -10 - 16 dBm -55 dBc Level = -30 -> -10 dBm -65 dBm Noise (BW = 100 Hz - 100 MHz) <20 uVrms (30 kHz BW)

3.5 Step Response Characteristics 3.5.1 2.0 MHz Filter 3.5.1.1 Risetime 3.5.1.2 Overshoot/Undershoot 3.5.2 4.0 MHz Filter 3.5.2.1 Risetime 3.5.2.2 Overshoot/Undershoot 3.5.3 5.5 MHz Filter 3.5.3.1 Risetime 3.5.3.2 Overshoot/Undershoot 3.5.4 6.0 MHz Filter 3.5.4.1 Risetime 3.5.4.2 Overshoot/Undershoot 3.5.5 10.0 MHz Filter 3.5.5.1 Risetime 3.5.5.2 Overshoot/Undershoot 3.6 Group Delay of 5.5 MHz Filter

<200 ns typical <2% typical <100 ns typical <2% typical <80 ns typical <8% typical <70 ns typical <2% typical <45 ns typical <2% typical <20 ns to 4.4 MHz typical

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VHF Arbitrary Waveform Generator 3.7 3.7.1 3.7.2 NTSC Video Waveform Specifications Differential Gain Differential Phase

+/-0.5% max. +/-0.5 degrees max.

4 4.0 4.0.1 4.0.2 4.0.3 4.0.4 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.2 4.2.1 4.2.2 4.3 4.3.1 4.3.2 4.4

FREQUENCY RANGE III

DC - 30 MHz

Operating Conditions Minimum Sample Rate (F(s) = 15.0 MHz Filter Min. F(s) = 20.0 MHz Filter Min. F(s) = 30 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Accuracy Output VSWR

4 * F(hfc) 45.0 MHz + F(hfc) 60.0 MHz + F(hfc) 90.0 MHz + F(hfc)

+/-0.25 dB +/-((0.25 dB + 0.01 dB/dB change) up to 0.5 dB max.) +/-0.1 dB <1.2:1 typical

Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 120 MHz) Level = 10 - 16 dBm -40 dBc Level = -30 - 10 dBm -45 dBc Sine Wave Spurious Responses (BW = 100 Hz - 150 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 150 MHz) <20 uVrms (30 kHz BW)

4.5 Step Response Characteristics 4.5.1 15.0 MHz Filter 4.5.1.1 Risetime 4.5.1.2 Overshoot/Undershoot 4.5.2 20.0 MHz Filter 4 5.2.1 Risetime 4.5.2.2 Overshoot/Undershoot 4.5.3 30 MHz Filter 4.5.3.1 Risetime 4.5.3.2 Overshoot/Undershoot

<32 ns typical <2% typical <30 ns typical <2% typical <22 ns typical <2% typical

5 5.0 5.0.1 5.0.2 5.0.3 5.0.4 5.0.5 5.0.6

FREQUENCY RANGE IV

DC - 80 MHz

Operating Conditions Minimum Sample Rate DC - 45 MHz

3 * (highest frequency component being sourced) Minimum Sample Rate 45 - 80 MHz 2.5 * (highest frequency component being sourced) 45.0 MHz Filter Min. F(s) = 135.0 MHz + F(hfc) 65.0 MHz Filter Min. F(s) = 130.0 MHz + F(hfc) 80 MHz Filter (Time Domain) Min. F(s) = 160.0 MHz + F(hfc) 80 MHz Filter (Freq Domain) Min. F(s) = 160.0 MHz + F(hfc)

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VHF Arbitrary Waveform Generator 5.1 Sine Wave Amplitude Accuracy 5.1.1 Absolute Accuracy @ 10 dBm 5.1.1.1 AL & AMS Test Heads 5.1.1.2 PATH Test Head 5.1.2 Step Attenuator Relative Accuracy 5.1.3 5.1.4 5.2 5.2.1 5.3 5.3.1 5.3.2 5.4 Fine Amplitude Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

+/-0.25 dB +/-0.35 dB +/-((0.3 dB +0.05 dB/dB change) up to 1.0 dB max.) +/-0.1 dB <1.2:1 typical

-40 dBc

Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 200 MHz) <20 uVrms (30 kHz BW)

5.5 Step Response Characteristics 5.5.1 45.0 MHz Filter 5.5.1.1 Risetime 5.5.1.2 Overshoot/Undershoot 5.5.2 65.0 MHz Filter 5.5.2.1 Risetime 5.5.2.2 Overshoot/Undershoot 5.5.3 80 MHz Time Domain Filter 5.5.3.1 Risetime 5.5.3.2 Overshoot/Undershoot 5.5.3 80 MHz Frequency Domain Filter 5.5.3.1 Risetime 5.5.3.2 Overshoot/Undershoot 5.5.3 NO Filter 5.5.3.1 Risetime 5.5.3.2 Overshoot/Undershoot

<18 ns typical <2% typical <9.5 ns typical <8% typical <8 ns typical <8% typical <8 ns typical <15% typical <4 ns typical <12% typical

6 6.0

FREQUENCY RANGE V

80 MHz - 200 MHz This Frequency Range does not use the Waveform Memory, Waveform Controller, or the Waveform DAC. In this operating mode, the VHFAWG's sample rate clock is buffered to the VHFAWG's channel card.

Operating Conditions

6.1 Sine Wave Amplitude Accuracy 6.1.1 Absolute Accuracy @ 10 dBm 6.1.1.1 AL & AMS Test Heads 6.1.1.2 PATH Test Head 6.1.2 Step Attenuator Relative Accuracy 6.1.3 6.1.4 6.2 6.2.1 Fine Amplitude Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

+/-0.25 dB +/-0.45 dB +/-((0.25 dB + 0.03 dB/dB change) up to 1.25 dB max.) +/-0.15 dB <1.2:1 typical

-40 dBc

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VHF Arbitrary Waveform Generator 6.3 6.3.1 6.3.2 6.4 Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) Level = -10 - 16 dBm -40 dBc Level = -30 -> -10 dBm -50 dBm Noise (BW = 100 Hz - 500 MHz) <65 uVrms (300 kHz BW)

7 7.0 7.0.1 7.0.2 7.1 7.1.1 7.2.2 7.3.3 7.3.4 7.3.5 7.2 7.3

Event Line Timing Operating Conditions Valid only for presence of Consumer Digital Channel Card (AD754). Measured with self-test checker using Time Measurement System. VIFAWG Channel Card Event Line to Analog Output Delay 5.5 MHz Filter 65 +/- 35 ns 45 MHz Filter -18 +/- 20 ns 65 MHz Filter -22 +/- 20 ns 80 MHz Filter (time domain) -22 +/- 20 ns 80 MHz Filter (freq. domain) -22 +/- 20 ns Event/Event Skew Event Rise/Fall Times 20 ns max. (see ESSD for Consumer Digital Channel Card)

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Specs
Notes: 1)

40

VHF Arbitrary Waveform Generator, 1 Meg

All specifications apply at the DIB "blind mate" RF connector. The VHFAWG may also interface to the DIB via the channel card Pogo pin path. Specifications may be degraded when using the Pogo pin path. All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any resistive load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms when filters higher than 10 MHz are selected, include the 80 - 200 MHz frequency range. Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). Amplitude Accuracy = Absolute Accuracy @ 10 dBm + Step Attenuator Accuracy + Fine Amplitude Accuracy + Mismatch Errors. The error terms listed above are specified for each Frequency Range. The Absolute Accuracy applies only when next highest frequency filter from the frequency being sourced is selected. Also, the Absolute Accuracy applies only to the Frequency Domain 80 MHz Filter, not the Time Domain 80 MHz Filter.

2)

3)

4)

5)

When sourcing a frequency of less than 100 kHz, the user should use LEVEL:SINE mode of level calibration and specify LEVEL_FREQ = 100kHz. All specifications including those that are Frequency Range specific assume that the waveform is stored in memory normalized to 12 bits full scale. All specifications are guaranteed unless noted as TYPICAL or NOMINAL. TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed. F(hfc) = Highest Frequency Component being sourced. Sine Wave Spurious Responses are specified relative to the full scale sine wave signal in dBc down to levels of -10 dBm. Below -10 dBm, the spurious level is specified as a fixed power in dBm.

6)

7) 8)

9)

10) 11)

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VHF Arbitrary Waveform Generator, 1 Meg 12) This revision of the VHFAWG Specification applies to the following revision of the hardware: LA608A or later Mainframe AND AD906-04 Channel Card AND AD754 Channel Card (for event lines only).

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VHF Arbitrary Waveform Generator, 1 Meg I 1 1.1 1.1.1 1.1.2 1.2 1.2.1 1.2.2 1.3 1.4 1.4.1 1.4.2 1.5 1.5.1 1.5.2 1.6 1.7 1.8 1.9 1.9.1 1.9.2 1.9.3 1.9.3.1 1.9.3.2 1.9.4 1.9.4.1 1.9.4.2 1.9.5 VHFAWG 1M SPECIFICATIONS GENERAL SPECIFICATIONS (Apply to all Frequency Ranges) Peak Output Voltage (AC + DC Baseline) Load = 50 ohms Load = Open Circuit AC p-p Output Voltage Load = 50 ohms Load = Open Circuit Output Current Compliance Limit Output Short Circuit AWG Mode to 80 MHz CW Mode 80 - 200 MHz AC Waveform Amplitude Control Step Attenuators Fine Amplitude Resolution DC Offset without autocal DC Offset with autocal Offset Drift Programmable DC Baseline Range Resolution Accuracy: Uncalibrated(dccal:off) Calibrated(dccal:on) Linearity: Uncalibrated(dccal:off) Calibrated(dccal:on) Settling Time for 4.0 V Step

+/-2.0 V max. +/-4.0 V max.

4.0 V max. 8.0 V max. +/-40 mA typ.

+/-80 mA typ. +/-70 mA typ.

1,2,4,8,16,16 dB <0.01 dB +/-50 mV +/-5 mV +/-800 uV/C nominal

+/-2.0 V (12 Bits) +/-(5% + 50) mV +/-(1% + 6) mV +/-1% +/-0.5% <2 ms to 1% of final value 2000 V/us typ. 12 bits 15 ms max. 200 MHz 1.5625 MHz 1 Meg. samples 8

1.10 1.11 1.12 1.13 1.14 1.15 1.16

Slew Rate (filter bypass) Waveform Resolution Sample Clock Settling time Maximum Sample Rate Minimum Sample Rate Waveform Memory Depth Maximum Level of Subroutines

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VHF Arbitrary Waveform Generator, 1 Meg 1.17 1.17.1 1.17.2 1.17.3 Waveform Segment Modulus F(s) = 1.5625 MHz - 50 MHz F(s) = 50 MHz - 100 MHz F(s) = 100 MHz - 200 MHz

Modulo = 1 Modulo = 2 Modulo = 4

1.18 Waveform Controller 1.18.1 Maximum number of waveform segments 1.18.2 Minimum number of samples/segment 1.18.2.1 1.18.2.2 1.18.2.3

2048 2*S.R.L. + 4 (1:1 Mode) 4*S.R.L. + 6 (2:1 Mode) 8*S.R.L. + 12 (4:1 Mode) (S.R.L. = Subroutine Level)

1.19 1.19.1 1.19.2

Event Lines (synchronized with waveform memory) 8 Event Line Start Sample Resolution Modulo 4 (1,5,9...). Event Line Stop Sample Resolution Modulo 4 or = segment size

2 2.0 2.0.1 2.0.2 2.0.3 2.1 2.1.1 2.1.2 2.1.3 2.1.4

FREQUENCY RANGE I

DC - 1 MHz

Operating Conditions Minimum Sample Rate (F(s) = 0.5 MHz Filter Min. F(s) 1.0 MHz Filter Min. F(s) Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Relative Accuracy Output VSWR

4 * F(hfc) 1.5 MHz + F(hfc) 3.0 MHz + F(hfc)

+/-0.25 dB +/-((0.15 dB + 0.01 dB/dB change) up to 0.5 dB max.) +/-0.1 dB <1.2:1 typical

2.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 2.2.1 Load = 50 - 600 ohms 2.2.1.1 Level = 10 - 16 dBm -45 dBc 2.2.1.2 Level = 0 - 10 dBm -55 dBc 2.2.1.3 Level = -30 - 0 dBm -60 dBc 2.2.2 Load > 600 ohms -60 dBc 2.3 2.3.1 2.3.2 2.4 Sine Wave Spurious Responses (BW = 100 Hz - 10 MHz) Level = -10 - 16 dBm -60 dBc Level = -30 -> -10 dBm -70 dBm Noise (BW = 100 Hz - 30 MHz) <20 uVrms (30 kHz BW)

2.5 Step Response Characteristics 2.5.1 0.5 MHz Filter 2.5.1.1 Risetime 2.5.1.2 Overshoot/Undershoot 2.5.2 1.0 MHz Filter 2.5.2.1 Risetime 2.5.2.2 Overshoot/Undershoot

<750 ns typical <2% typical <400 ns typical <2% typical

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VHF Arbitrary Waveform Generator, 1 Meg 3 3.0 3.0.1 3.0.2 3.0.3 3.0.4 3.0.5 3.0.6 3.1 3.1.1 3.1.2 3.1.3 3.1.4 FREQUENCY RANGE II DC - 10 MHz

Operating Conditions Minimum Sample Rate (F(s) = 2.0 MHz Filter Min. F(s) = 4.0 MHz Filter Min. F(s) = 5.5 MHz Filter Min. F(s) = 6.0 MHz Filter Min. F(s) = 10.0 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Relative Accuracy Output VSWR

4 * F(hfc) 6.0 MHz + F(hfc) 12.0 MHz + F(hfc) 11.0 MHz + F(hfc) 18.0 MHz + F(hfc) 30.0 MHz ++ F(hfc)

+/-0.25 dB +/- (0.15 dB + 0.01 dB/dB change up to 0.5 dB max.) +/-0.1 dB <1.2:1 typical

3.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 3.2.1 Frequency = 1 - 4 MHz 3.2.1.1 Load = 50 - 600 ohms 3.2.1.1.1 Level = 10 - 16 dBm -45 dBc 3.2.1.1.2 Level = 0 - 10 dBm -55 dBc 3.2.1.1.3 Level = -30 - 0 dBm -60 dBc 3.2.1.2 Load > 600 ohms 3.2.1.2.1 Level = 10 - 16 dBm -50 dBc 3.2.1.2.2 Level = -30 - 10 dBm -60 dBc 3.2.2 Frequency = 4 - 10 MHz 3.2.2.1 Level = 10 - 16 dBm -45 dBc 3.2.2.2 Level = 0 - 10 dBm -50 dBc 3.2.2.3 Level = -30 - 0 dBm -55 dBc 3.3 3.3.1 3.3.2 3.4 3.5 3.5.1 3.5.1.1 3.5.1.2 3.5.2 3.5.2.1 3.5.2.2 3.5.3 3.5.3.1 3.5.3.2 3.5.4 3.5.4.1 3.5.4.2 3.5.5 3.5.5.1 3.5.5.2 3.6 Sine Wave Spurious Responses (BW = 100 Hz - 100 MHz) Level = -10 - 16 dBm -55 dBc Level = -30 -> -10 dBm -65 dBm Noise (BW = 100 Hz - 100 MHz) Step Response Characteristics 2.0 MHz Filter Risetime Overshoot/Undershoot 4.0 MHz Filter Risetime Overshoot/Undershoot 5.5 MHz Filter Risetime Overshoot/Undershoot 6.0 MHz Filter Risetime Overshoot/Undershoot 10.0 MHz Filter Risetime Overshoot/Undershoot Group Delay of 5.5 MHz Filter <20 uVrms (30 kHz BW)

<200 ns typical <2% typical <100 ns typical <2% typical <80 ns typical <8% typical <70 ns typical <2% typical <45 ns typical <2% typical <20 ns to 4.4 MHz typ.

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VHF Arbitrary Waveform Generator, 1 Meg 3.7 3.7.1 3.7.2 NTSC Video Waveform Specifications Differential Gain Differential Phase

+/-0.5% max. +/-0.5 degrees max.

4 4.0 4.0.1 4.0.2 4.0.3 4.0.4 4.1 4.1.1 4.1.2 4.1.3 4.1.4 4.2 4.2.1 4.2.2 4.3 4.3.1 4.3.2 4.4 4.5 4.5.1 4.5.1.1 4.5.1.2 4.5.2 4 5.2.1 4.5.2.2 4.5.3 4.5.3.1 4.5.3.2

FREQUENCY RANGE III

DC - 30 MHz

Operating Conditions Minimum Sample Rate (F(s) = 15.0 MHz Filter Min. F(s) = 20.0 MHz Filter Min. F(s) = 30 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy Absolute Accuracy @ 10 dBm Step Attenuator Relative Accuracy Fine Amplitude Relative Accuracy Output VSWR

4 * F(hfc) 45.0 MHz + F(hfc) 60.0 MHz + F(hfc) 90.0 MHz + F(hfc)

+/-0.25 dB +/-((0.25 dB + 0.01 dB/dB change) up to 0.5 dB max.) +/-0.1 dB <1.5:1 typical

Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 120 MHz) Level = 10 - 16 dBm -40 dBc Level = -30 - 10 dBm -45 dBc Sine Wave Spurious Responses (BW = 100 Hz - 150 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 150 MHz) Step Response Characteristics 15.0 MHz Filter Risetime Overshoot/Undershoot 20.0 MHz Filter Risetime Overshoot/Undershoot 30 MHz Filter Risetime Overshoot/Undershoot <20 uVrms (30 kHz BW)

<32 ns typical <2% typical <30 ns typical <2% typical <22 ns typical <2% typical

5 5.0 5.0.1 5.0.2 5.0.3 5.0.4 5.0.5 5.0.6

FREQUENCY RANGE IV

DC - 80 MHz

Operating Conditions Minimum Sample Rate DC - 45 MHz Minimum Sample Rate 45 - 80 MHz 45.0 MHz Filter Min. F(s) = 65.0 MHz Filter Min. F(s) = 80 MHz Filter (Time Domain) Min. F(s) = 80 MHz Filter (Freq Domain) Min. F(s) =

3 * (highest frequency component being sourced) 2.5 * (highest frequency component being sourced) 135.0 MHz + F(hfc) 130.0 MHz + F(hfc) 160.0 MHz + F(hfc) 160.0 MHz + F(hfc)

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VHF Arbitrary Waveform Generator, 1 Meg 5.1 Sine Wave Amplitude Accuracy 5.1.1 Absolute Accuracy @ 10 dBm 5.1.1.1 AL & AMS Test Heads 5.1.1.2 PATH Test Head 5.1.2 Step Attenuator Relative Accuracy 5.1.3 5.1.4 5.2 5.2.1 5.3 5.3.1 5.3.2 5.4 5.5 5.5.1 5.5.1.1 5.5.1.2 5.5.2 5.5.2.1 5.5.2.2 5.5.3 5.5.3.1 5.5.3.2 5.5.4 5.5.4.1 5.5.4.2 5.5.5 5.5.5.1 5.5.5.2 Fine Amplitude Relative Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

+/-0.25 dB +/-0.35 dB +/-((0.3 dB +0.05 dB/dB change) up to 1.0 dB max.) +/-0.1 dB <1.5:1 typical

-40 dBc

Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 200 MHz) Step Response Characteristics 45.0 MHz Filter Risetime Overshoot/Undershoot 65.0 MHz Filter Risetime Overshoot/Undershoot 80 MHz Time Domain Filter Risetime Overshoot/Undershoot 80 MHz Frequency Domain Filter Risetime Overshoot/Undershoot NO Filter Risetime Overshoot/Undershoot <20 uVrms (30 kHz BW)

<18 ns typical <2% typical <9.5 ns typical <8% typical <8 ns typical <8% typical <8 ns typical <15% typical <4 ns typical <12% typical

6 6.0

FREQUENCY RANGE V

80 MHz - 200 MHz This Frequency Range does not use the Waveform Memory, Waveform Controller or the Waveform DAC. In this operating mode, the VHFAWG 1M's sample rate clock is buffered to the VHFAWG 1M's channel card.

Operating Conditions

6.1 Sine Wave Amplitude Accuracy 6.1.1 Absolute Accuracy @ 10 dBm 6.1.1.1 AL & AMS Test Heads 6.1.1.2 PATH Test Head 6.1.2 Step Attenuator Relative Accuracy 6.1.3 6.1.4 6.2 6.2.1 Fine Amplitude Relative Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

+/-0.25 dB +/-0.45 dB +/-((0.25 dB + 0.03 dB/dB change) up to 1.25 dB max.) +/-0.15 dB <1.5:1 typical

-40 dBc

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VHF Arbitrary Waveform Generator, 1 Meg 6.3 6.3.1 6.3.2 6.4 Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) Level = -10 - 16 dBm -40 dBc Level = -30 -> -10 dBm -50 dBm Noise (BW = 100 Hz - 500 MHz) <65 uVrms (300 kHz BW)

7 7.0 7.0.1 7.0.2 7.1 7.1.1 7.2.2 7.3.3 7.3.4 7.3.5 7.2 7.2.1 7.3

Event Line Timing Operating Conditions Valid only for presence of Consumer Digital Channel Card (AD754). Measured with self-test checker using Time Measurement System. VHFAWG Channel Card Event Line to Analog Output Delay 5.5 MHz Filter 65 +/- 35 ns 45 MHz Filter -18 +/- 20 ns 65 MHz Filter -22 +/- 20 ns 80 MHz Filter (time domain) -22 +/- 20 ns 80 MHz Filter (freq. domain) -22 +/- 20 ns Event/Event Skew Event/Event Skew Event Rise/Fall Times

20 ns max. (see ESSD for Consumer Digital Channel Card)

8 8.0 8.0.1 8.0.2

VIDEO IF GENERATION Operating Conditions B/G Standard, Picture Carrier = 38.9 MHz, Sound Carrier = 33.4 MHz, using 45 MHz filter, sample rate = 155.6 MHz Incidental carrier phase modulation is measured by demodulating a B/G Standard test signal consisting of a vision carrier modulated with 7.8125 kHz sine-wave vision information, black-to-white level modulation (73% to 10% carrier amplitude) plus an unmodulated sound carrier at -13 dB. Noise is measured in accordance with DIN 45 405 with 50 us de-emphasis applied and weighted according to CCIR 468-3. Signal reference is output level for 1 kHz sound modulation at 50 kHz peak deviation. Signal level is such that horizontal sync. pulse period has a carrier amplitude of 100 mVrms. Incidental Carrier Phase Modulation (measured for conditions of 8.02) Sound Signal-to-Noise Ratio 55 dB min.

8.1 8.1.1

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Specs
Notes: 1)

41

VHF Arbitrary Waveform Generator 400

All specifications apply at the DIB "blind mate" RF connector. The VHFAWG may also interface to the DIB via the channel card Pogo pin path. Specifications may be degraded when using the Pogo pin path. All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any resistive load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms when filters higher than 10 MHz are selected, include the 80 - 200 MHz frequency range. Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). Amplitude Accuracy = Absolute Accuracy @ 10 dBm + Step Attenuator Accuracy + Fine Amplitude Accuracy + Mismatch Errors. The error terms listed above are specified for each Frequency Range. The Absolute Accuracy applies only when next highest frequency filter from the frequency being sourced is selected. For the 80 MHz filters, the Absolute Accuracy specification only applies to the Frequency Domain Filter, not the Time Domain Filter.

2)

3)

4)

5)

When sourcing a frequency of less than 100 kHz, use LEVEL:SINE mode of level calibration and specify LEVEL_FREQ = 100kHz. All specifications including those that are Frequency Range specific assume that the waveform is stored in memory normalized to 12 bits full scale. F(hfc) = Highest Frequency Component being sourced. Sine Wave Spurious Responses are specified relative to the full scale sine wave signal in dBc down to levels of -10 dBm. Below -10 dBm, the spurious level is specified as a fixed power in dBBm. The VHFAWG 400 supports three different operating modes: AWG DC, AWG AC, and CW (sine). Specifications in sections 1 through 5 apply to the AWG DC mode. Specifications in sections 1 and 6 apply to the AWG AC mode and sections 1 and 7 apply to the CW (sine) mode. Both the AWG AC and CW modes are AC coupled signal paths from the waveform DAC with DC offset capability. The peak AC voltage is independent of the peak DC offset.

6)

7) 8)

9)

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VHF Arbitrary Waveform Generator 400 This revision of the VHFAWG Specification applies to the following revision of the hardware: LA654A or later Mainframe AND LA677A or later Channel Card.

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VHF Arbitrary Waveform Generator 400 I 1 1.1 1.1.1 1.1.1.1 1.1.1.2 1.1.2 1.1.2.1 1.1.3 1.1.3.1 1.2 1.2.1 1.2.1.1 1.2.1.2 1.2.2 1.2.2.1 1.2.2.2 1.2.3 1.2.3.1 1.2.3.2 1.3 1.4 1.4.1 1.4.2 1.4.3 1.5 1.5.1 1.5.2 1.6 1.7 1.8 1.9 1.9.1 1.9.2 1.9.3 1.9.3.1 1.9.3.2 1.9.4 1.9.4.1 1.9.4.2 1.9.5 1.10 1.11 VHFAWG 400 Specifications General Specifications (Apply to all Frequency Ranges except where noted.) Peak Output Voltage (AC + DC Baseline) AWG DC Mode Load = 50 ohms Load = Open Circuit CW Mode Load = 50 ohms AWG AC Mode Load = 50 ohms AC p-p Output Voltage AWG DC Mode Load = 50 ohms Load = Open Circuit CW Mode Load = 50 ohms Load = Open Circuit AWG AC Mode Load = 50 ohms Load = Open Circuit Output Current Compliance Limit Output Short Circuit AWG DC Mode to 80 MHz AWG AC Mode to 80 MHz CW Mode 80 - 200 MHz AC Waveform Amplitude Control Step Attenuators Fine Amplitude Resolution DC Offset without autocal DC Offset with autocal Offset Drift Programmable DC Baseline Range Resolution Accuracy Uncalibrated (dccal:off) Calibrated (dccal:on) Linearity Uncalibrated (dccal:off) Calibrated (dccal:on) Settling Time for 4.0 V Step Slew Rate (filter bypass) Waveform Resolution

+/-2.0 V max. +/-4.0 V max. +/-4.0 V max. +/-3.0 V max.

4.0 V max. 8.0 V max. 4.0 V max. 8.0 V max. 2.0 V max. 4.0 V max. +/-40 mA typ.

+/-80 mA typ. +/-70 mA typ. +/-70 mA typ.

1,2,4,8,16,16 dB <0.01 dB +/-50 mV +/-5 mV +/-800 uV/C nominal

+/-2.0 V (12 Bits) +/-(5% + 50) mV +/-(1% + 6) mV +/-1% +/-0.5% <2 ms to 1% of final value 2000 V/us typ. 12 bits

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VHF Arbitrary Waveform Generator 400 1.12 1.13 1.14 1.15 1.16 1.17 1.17.1 1.17.2 1.17.3 1.17.4 Sample Clock Settling Time Maximum Sample Rate Minimum Sample Rate Waveform Memory Depth Maximum Level of Subroutines Waveform Segment Modulus F(s) = 1.5625 MHz F(s) = 1.5625 MHz F(s) = 1.5625 MHz F(s) = 3.1250 MHz 15 ms max. 400 MHz 1.5625 MHz 1M 8

50 MHz 100 MHz 200 MHz 400 MHz

Modulo Modulo Modulo Modulo

= = = =

1 2 4 8

1.18 Waveform Controller 1.18.1 Maximum number of waveform segments 1.18.2 Minimum number of samples/segment 1.18.2.1 1.18.2.2 1.18.2.3 1.18.2.4

2048 2*S.R.L. + 4 (1:1 Mode) 4*S.R.L. + 6 (2:1 Mode) 8*S.R.L. + 12 (4:1 Mode) 16*S.R.L. + 24 (8:1 Mode) (S.R.L. = Subroutine Level)

2 2.0 2.0.1 2.0.2

Frequency Range I

DC - 1 MHz (Applies only to AWG DC Mode)

Operating Conditions 0.5 MHz Filter Min. F(s) 1.0 MHz Filter Min. F(s)

1.5 MHz + F(hfc) 3.0 MHz + F(hfc)

2.1 Sine Wave Amplitude Accuracy 2.1.1 Absolute Accuracy @ 10 dBm 2.1.1.1 AL and AMS Test Heads +/-0.25 dB 2.1.1.2 PATH Test Head +/-0.25 dB 2.1.2 Step Attenuator Relative Accuracy +/-((0.15 dB + 0.01 dB/dB change) up to 0.5 dB max.) 2.1.3 Fine Amplitude Relative Accuracy +/-0.1 dB 2.1.4 Output VSWR <1.2:1 typical 2.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 2.2.1 Load = 50 - 600 ohms 2.2.1.1 Level = 10 - 16 dBm -45 dBc 2.2.1.2 Level = 0 - 10 dBm -55 dBc 2.2.1.3 Level = -30 - 0 dBm -60 dBc 2.2.2 Load > 600 ohms -60 dBc 2.3 2.3.1 2.3.2 2.4 Sine Wave Spurious Responses (BW = 100 Hz - 10 MHz) Level = -10 - 16 dBm -60 dBc Level = -30 -> -10 dBm -70 dBm Noise (BW = 100 Hz - 30 MHz) <20 uVrms (30 kHz BW)

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VHF Arbitrary Waveform Generator 400 2.5 Step Response Characteristics 2.5.1 0.5 MHz Filter 2.5.1.1 Rise Time 2.5.1.2 Overshoot/Undershoot 2.5.2 1.0 MHz Filter 2.5.2.1 Rise Time 2.5.2.2 Overshoot/Undershoot

<750 ns typical <2% typical <400 ns typical <2% typical

3 3.0 3.0.1 3.0.2 3.0.3 3.0.4 3.0.5

Frequency Range II

DC - 10 MHz (Applies only to AWG DC Mode)

Operating Conditions 2.0 MHz Filter Min. F(s) 4.0 MHz Filter Min. F(s) 5.5 MHz Filter Min. F(s) 6.0 MHz Filter Min. F(s) 10.0 MHz Filter Min. F(s)

6.0 MHz + F(hfc) 12.0 MHz + F(hfc) 11.0 MHz + F(hfc) 18.0 MHz + F(hfc) 30.0 MHz + F(hfc)

3.1 Sine Wave Amplitude Accuracy 3.1.1.1 AL and AMS Test Heads +/-0.25 dB 3.1.1.2 PATH Test Head +/-0.25 dB 3.1.2 Step Attenuator Relative Accuracy +/-(0.15 dB + 0.01 dB/dB change up to 0.5 dB max.) 3.1.3 Fine Amplitude Relative Accuracy +/-0.1 dB 3.1.4 Output VSWR <1.2:1 typical 3.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 50 MHz) 3.2.1 Frequency = 1 - 4 MHz 3.2.1.1 Load = 50 - 600 ohms 3.2.1.1.1 Level = 10 - 16 dBm -45 dBc 3.2.1.1.2 Level = 0 - 10 dBm -55 dBc 3.2.1.1.3 Level = -30 - 0 dBm -60 dBc 3.2.1.2 Load > 600 ohms 3.2.1.2.1 Level = 10 - 16 dBm -50 dBc 3.2.1.2.2 Level = -30 - 10 dBm -60 dBc 3.2.2 Frequency = 4 - 10 MHz 3.2.2.1 Level = 10 - 16 dBm -45 dBc 3.2.2.2 Level = 0 - 10 dBm -50 dBc 3.2.2.3 Level = -30 - 0 dBm -55 dBc 3.3 3.3.1 3.3.2 3.4 3.5 3.5.1 3.5.1.1 3.5.1.2 3.5.2 3.5.2.1 3.5.2.2 3.5.3 3.5.3.1 3.5.3.2 Sine Wave Spurious Responses (BW = 100 Hz - 100 MHz) Level = -10 - 16 dBm -55 dBc Level = -30 -> -10 dBm -65 dBm Noise (BW = 100 Hz - 100 MHz) Step Response Characteristics 2.0 MHz Filter Rise Time Overshoot/Undershoot 4.0 MHz Filter Rise Time Overshoot/Undershoot 5.5 MHz Filter Rise Time Overshoot/Undershoot <20 uVrms (30 kHz BW)

<200 ns typical <2% typical <100 ns typical <2% typical <80 ns typical <8% typical

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VHF Arbitrary Waveform Generator 400 3.5.4 6.0 MHz Filter 3.5.4.1 Rise Time 3.5.4.2 Overshoot/Undershoot 3.5.5 10.0 MHz Filter 3.5.5.1 Rise Time 3.5.5.2 Overshoot/Undershoot 3.6 3.7 3.7.1 3.7.2 Group Delay of 5.5 MHz Filter NTSC Video Waveform Specifications Differential Gain Differential Phase

<70 ns typical <2% typical <45 ns typical <2% typical <20 ns to 4.4 MHz typical

+/-0.5% max. +/-0.5 degrees max.

4 4.0 4.0.1 4.0.2 4.0.3

Frequency Range III

DC - 30 MHz (Applies only to AWG DC Mode.)

Operating Conditions 15.0 MHz Filter Min. F(s) 20.0 MHz Filter Min. F(s) 30 MHz Filter Min. F(s)

45.0 MHz + F(hfc) 60.0 MHz + F(hfc) 90.0 MHz + F(hfc)

4.1 Sine Wave Amplitude Accuracy 4.1.1.1 AL and AMS Test Heads +/-0.25 dB 4.1.1.2 PATH Test Head +/-0.25 dB 4.1.2 Step Attenuator Relative Accuracy +/-((0.25 dB + 0.01 dB/dB change) up to 0.5 dB max.) 4.1.3 Fine Amplitude Relative Accuracy +/-0.1 dB 4.1.4 Output VSWR <1.5:1 typical 4.2 4.2.1 4.2.2 4.3 4.3.1 4.3.2 4.4 4.5 4.5.1 4.5.1.1 4.5.1.2 4.5.2 4 5.2.1 4.5.2.2 4.5.3 4.5.3.1 4.5.3.2 Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Frequency = 120 MHz) Level = 10 - 16 dBm -40 dBc Level = -30 - 10 dBm -45 dBc Sine Wave Spurious Responses (BW = 100 Hz - 150 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 150 MHz) Step Response Characteristics 15.0 MHz Filter Rise Time Overshoot/Undershoot 20.0 MHz Filter Rise Time Overshoot/Undershoot 30 MHz Filter Rise Time Overshoot/Undershoot <20 uVrms (30 kHz BW)

<32 ns typical <2% typical <30 ns typical <2% typical <22 ns typical <2% typical

5 5.0 5.0.1 5.0.2

Frequency Range IV Operating Conditions 45.0 MHz Filter Min. 65.0 MHz Filter Min.

DC - 80 MHz (Applies only to AWG DC Mode)

F(s) = 135.0 MHz + F(hfc) F(s) = 130.0 MHz + F(hfc)

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VHF Arbitrary Waveform Generator 400 5.0.3 5.0.4 80 MHz Filter (Time Domain) Min. F(s) = 160.0 MHz + F(hfc) 80 MHz Filter (Freq Domain) Min. F(s) = 160.0 MHz + F(hfc)

5.1 Sine Wave Amplitude Accuracy 5.1.1 Absolute Accuracy @ 10 dBm 5.1.1.1 AL & AMS Test Heads +/-0.25 dB 5.1.1.2 PATH Test Head +/-0.35 dB 5.1.2 Step Attenuator Relative Accuracy +/-((0.3 dB +0.05 dB/dB change) up to 1.0 dB max.) 5.1.3 Fine Amplitude Relative Accuracy +/-0.1 dB 5.1.4 Output VSWR <1.5:1 typical 5.2 5.2.1 5.3 5.3.1 5.3.2 5.4 5.5 5.5.1 5.5.1.1 5.5.1.2 5.5.2 5.5.2.1 5.5.2.2 5.5.3 5.5.3.1 5.5.3.2 5.5.4 5.5.4.1 5.5.4.2 5.5.5 5.5.5.1 5.5.5.2 Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

-40 dBc

Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) Level = -10 - 16 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 100 Hz - 200 MHz) Step Response Characteristics 45.0 MHz Filter Rise Time Overshoot/Undershoot 65.0 MHz Filter Rise Time Overshoot/Undershoot 80 MHz Time Domain Filter Rise Time Overshoot/Undershoot 80 MHz Frequency Domain Filter Rise Time Overshoot/Undershoot NO Filter Rise Time Overshoot/Undershoot <20 uVrms (30 kHz BW)

<18 ns typical <2% typical <9.5 ns typical <8% typical <8 ns typical <8% typical <8 ns typical <15% typical <4 ns typical <12% typical

Frequency Range V 5 - 160 MHz (Applies only to AWG AC Mode.) Note: This frequency range is an AC coupled path with a lower cut off of 5 MHz. The lower -3 db frequency is 1 MHz typical. Operating 100.0 MHz 130.0 MHz 160.0 MHz Conditions Filter Min. F(s) Filter Min. F(s) Filter Min. F(s)

6.0 6.0.1 6.0.2 6.0.3

200.0 MHz + F(hfc) 200.0 MHz + F(hfc) 240.0 MHz + F(hfc)

6.1 Sine Wave Amplitude Accuracy 6.1.1 Absolute Accuracy @ 10 dBm 6.1.1.1 AL & AMS Test Heads +/-0.25 dB 6.1.1.2 PATH Test Head +/-0.45 dB 6.1.2 Step Attenuator Relative Accuracy +/-((0.3 dB +0.05 dB/dB change) up to 1.0 dB max.) 6.1.3 Fine Amplitude Relative Accuracy +/-0.15 dB 6.1.4 Output VSWR <1.5:1 typical

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VHF Arbitrary Waveform Generator 400

6.2 6.2.1 6.3 6.3.1 6.3.2 6.4 6.5 6.5.1 6.5.1.1 6.5.1.2 6.5.2 6.5.2.1 6.5.2.2 6.5.3 6.5.3.1 6.5.3.2 6.5.4 6.5.4.1 6.5.4.2

Sine Wave Harmonics (2nd & 3rd) Level = -30 - +10 dBm

-40 dBc

Sine Wave Spurious Responses (BW = 5 MHz - 400 MHz) Level = -10 -> +10 dBm -45 dBc Level = -30 -> -10 dBm -55 dBm Noise (BW = 10 MHz - 400 MHz) Square Wave Response Characteristics 100.0 MHz Filter Rise Time Overshoot/Undershoot 130.0 MHz Filter Rise Time Overshoot/Undershoot 160 MHz Time Domain Filter Rise Time Overshoot/Undershoot NO Filter Rise Time Overshoot/Undershoot <30 uVrms (30 kHz BW)

<8 ns <8% typical <7 ns <8% typical <5 ns <8% typical <4 ns typical <12% typical

7 7.0

Frequency Range VI

80 MHz - 200 MHz (Applies only to CW Mode)

Operating Conditions This Frequency Range uses the Waveform Memory, Waveform Controller, and the Waveform DAC to generate a square wave. In this operating mode, the square wave is buffered to the VHFAWG's channel card where it is filtered to eliminate the higher order frequency components.

7.1 Sine Wave Amplitude Accuracy 7.1.1 Absolute Accuracy @ 10 dBm 7.1.1.1 AL & AMS Test Heads +/-0.25 dB 7.1.1.2 PATH Test Head +/-0.45 dB 7.1.2 Step Attenuator Relative Accuracy +/-((0.25 dB + 0.03 dB/dB change) up to 1.25 dB max.) 7.1.3 Fine Amplitude Relative Accuracy +/-0.15 dB 7.1.4 Output VSWR <1.5:1 typical 7.2 7.2.1 Sine Wave Harmonics (2nd & 3rd) Level = -30 - 16 dBm

-40 dBc

7.3 Sine Wave Spurious Responses (BW = 100 Hz - 200 MHz) 7.3.1 Level = -10 -> +16 dBm -40 dBc 7.3.2 Level = -30 -> -10 dBm -50 dBm 7.4 Noise (BW = 100 Hz - 500 MHz) <65 uVrms (300 kHz BW)

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Specs
Notes:

VHF Arbitrary Waveform Generator 400 Differential

1. All guaranteed specifications apply at the DIB blind mate RF connectors. The amplitude accuracy specifications are typical specifications when using the Pogo pin path. See the frequency range sections (2 through 8) for the amplitude accuracy specifications for the Pogo pin path. The Sine Wave Harmonic, Sine Wave Spurious, Noise, and Step Response Characteristics are all typical specifications, not guaranteed, when the Pogo pin path is used. 2. All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any resistive load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms when filters higher than 10 MHz are selected, include the 80 -200 MHz frequency range. 3. Level Accuracy specifications assume that software calibration is not disabled (level:none is not selected). 4. Amplitude Accuracy = Absolute Accuracy @ 10 dBm + Step Attenuator Accuracy + Fine Amplitude Accuracy + Mismatch Errors The error terms listed above are specified for each Frequency Range. The Absolute Accuracy applies only when next highest frequency filter from the frequency being sourced is selected. Also, the Absolute Accuracy applies only to the Frequency Domain 80 MHz Filter, not the Time Domain 80 MHz Filter. 5. When sourcing a frequency of less than 150 kHz, the user should use LEVEL:SINE mode of level calibration and specify LEVEL_FREQ = 150 kHz. 6. All specifications including those that are Frequency Range specific assume that the waveform is stored in memory normalized to 12 bits full scale. 7. All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 8. TYPICAL specifications are sample tested, NOT 100% tested and are NOT guaranteed. 9. NOMINAL specifications are generally calculated values, are NOT 100% tested and are NOT guaranteed. 10. F(hfc) = Highest Frequency Component being sourced. 11. Sine Wave Spurious Responses are specified relative to the full scale sine wave signal in dBc down to levels of -10 dBm. Below -10 dBm, the spurious level is specified as a fixed power in dBm.

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VHF Arbitrary Waveform Generator 400 Differential 12. The VHFAWG 400 supports three different operating modes: AWG DC, AWG AC, and CW (Sine). The restrictions are defined below: Specifications in section 1 apply to all three operating modes. Specifications in sections 2 - 5 apply to the AWG DC Differential mode (DC to 80 MHz). Specifications in sections 2 - 6 apply to the AWG DC Single Ended mode (DC to 160 MHz). Specifications in section 7 apply to the AWG AC mode (5 MHz to 160 MHz). Specifications in section 8 apply to the sine mode (80 MHz to 200 MHz). Both the AWG AC and CW modes are AC coupled signal paths from the waveform DAC with DC offset capability. The peak AC voltage is independent of the peak DC offset. LA654 (mainframe card) LA681 (channel card)

13. This revision of the VHFAWG Specification applies to the following boards:

14. In differential mode (both DC and AC) the amplitude programming syntax specifies the amplitude with respect to the load connected to ground. If the load is connected differentially (between the A and C outputs) the power or voltage delivered to the load is doubled to what was specified in the syntax. To deliver a +10 dBm signal into a differential load the programming statement should specify +4 dBm. 15. The spectral purity specifications are all specified with the load connected to ground. 16. All sine wave spectral purity specifications (Harmonic, Non Harmonic, and Noise) are valid only when next highest filter from the frequency being sourced is selected.

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VHF Arbitrary Waveform Generator 400 Differential 5 5.1 5.2 5.2.1 5.2.1.1 5.2.1.2 5.2.1.3 5.2.1.4 5.2.1.5 5.2.1.6 5.2.1.7 5.2.2 5.2.2.1 5.2.2.2 5.2.2.3 5.2.2.4 5.2.2.5 5.2.2.6 5.2.2.7 5.3 5.3.1 5.3.1.1 5.3.1.2 5.3.1.3 5.3.1.4 5.3.1.5 5.3.1.6 5.3.1.7 5.3.1.8 5.3.1.9 5.3.2 5.3.2.1 5.3.2.2 5.3.2.3 5.3.2.4 5.3.2.5 5.3.2.6 5.3.2.7 5.3.2.8 5.3.2.9 5.4 5.5 5.5.1 5.5.2 5.5.3 5.6 5.6.1 5.6.2 VHFAWG 400 DIFFERENTIAL SPECIFICATIONS General Specifications (Apply to all Frequency Ranges) Peak Output Voltage (AC + DC Baseline) Peak Output Voltage Single-ended Output A: AWG DC: Load = 50 ohms Load = Open Circuit CW Mode (80 MHz to 200 MHz): Load = 50 ohms AWG AC (5 MHz to 160 MHz): Load = 50 ohms Peak Output Voltage Differential Outputs A or C. AWG DC: Load = 50 ohms Load = Open Circuit CW Mode (80 MHz to 200 MHz): Load = 50 ohms AWG AC (5 MHz to 160 MHz): Load = 50 ohms AC p-p Output Voltage AC p-p Output Voltage Single-ended Output A AWG DC: Load = 50 ohms Load = Open Circuit CW Mode: Load = 50 ohms Load = Open Circuit AWG AC: Load = 50 ohms Load = Open Circuit AC p-p Output Voltage Differential Outputs A or C AWG DC: Load = 50 ohms Load = Open Circuit CW Mode: Load = 50 ohms Load = Open Circuit AWG AC: Load = 50 ohms Load = Open Circuit Output Current Compliance Limit Output Short Circuit AWG DC Mode: AWG AC Mode (5 to 160 MHz) CW Mode (80 - 200 MHz) AC Waveform Amplitude Control Step Attenuators Fine Amplitude Resolution 1, 2, 4, 8, 16, 16 dB <0.01 dB +/-80 mA. typ. +/-70 mA. typ. +/-70 mA. typ. 2.0 V max. 4.0 V max. 2.0 V max. 4.0 V max. 2.0 V max. 4.0 V max. +/-40 mA typical. 4.0 V max. 8.0 V max. 4.0 V max. 8.0 V max. 2.0 V max. 4.0 V max. +/-2.0 V max. +/-4.0 V max. +/-4.0 V max. +/-3.0 V max. +/-2.0 V max. +/-4.0 V max. +/-4.0 V max. +/-3.0 V max.

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VHF Arbitrary Waveform Generator 400 Differential 5.7 5.7.1 5.7.2 5.7.3 5.8 5.8.1 5.8.2 5.8.3 5.8.3.1 5.8.3.2 5.8.3.3 5.8.3.4 5.8.3.5 5.8.3.6 5.8.4 5.8.4.1 5.8.4.2 5.8.5 5.9 5.10 5.11 5.12 5.13 5.14 5.15 5.16 5.16.1 5.16.2 5.16.3 5.16.4 5.17 5.17.1 5.17.2 5.17.2.1 5.17.2.2 5.17.2.3 5.17.2.4 5.17.2.5 6 6.1 DC Offset Without autocal With autocal Offset Drift Programmable DC Baseline Range Resolution Accuracy Single Ended Output A:Uncalibrated (dccal:off) Single Ended Output A:Calibrated (dccal:on) Differential Output A:Uncalibrated (dccal:off) Differential Output A:Calibrated (dccal:on) Differential Output C:Uncalibrated (dccal:off) Differential Output C:Calibrated (dccal:on) Linearity Uncalibrated (dccal:off) Calibrated (dccal:on) Settling Time for 4.0 V Step Slew Rate (filter bypass) Waveform Resolution Sample Clock Settling time Maximum Sample Rate Minimum Sample Rate Waveform Memory Depth Maximum Level of Subroutines Waveform Segment Modulus F(s) = 1.5625 MHz - 50 MHz F(s) = 1.5625 MHz - 100 MHz F(s) = 1.5625 MHz - 200 MHz F(s) = 3.1250MHz - 400 MHz Waveform Controller Maximum number of waveform segments Minimum number of samples/segment 2048 2*S.R.L. + 4 (1:1 Mode) 4*S.R.L. + 6(2:1 Mode) 8*S.R.L. + 12 (4:1 Mode) 16*S.R.L. + 24(8:1 Mode) (S.R.L. = Subroutine Level) FREQUENCY RANGE I DC - 1 MHz Operating Conditions Note: Specifications in this section apply to AWG DC mode both Single Ended and Differential. 6.1.0.1 6.1.0.2 6.1.0.3 AWG DC Mode: 0.5 MHz Filter Min. F(s) = 1.0 MHz Filter Min. F(s) = 1.5 MHz + F(hfc) 3.0 MHz + F(hfc) Modulo = 1 Modulo = 2 Modulo = 4 Modulo = 8 +/-2.0 V 12 bits +/-(5% + 50) mV nominal +/-(1% + 6) mV +/-(5% + 50) mV nominal +/-(1.5% + 10) mV +/-(5% + 50) mV nominal +/-(1.5% + 10) mV +/-1% nominal +/-0.5% <2 ms nominal to 1% of final value 2000 V/us typ. 12 bits 15 ms max. 400 MHz 1.5625 MHz 1 Meg Samples 8 +/-50 mV +/-5 mV +/-800 uV/C nominal

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VHF Arbitrary Waveform Generator 400 Differential 6.2 6.2.1 6.2.1.1 6.2.1.1.1 6.2.1.1.2 6.2.1.2 6.2.1.2.1 6.2.1.2.2 6.2.1.3 6.2.1.3.1 6.2.1.3.2 6.2.2 6.2.2.1 6.2.2.1.1 6.2.2.2 6.2.2.2.1 6.2.2.3 6.2.2.3.1 6.2.3 6.2.4 6.2.5 6.3 6.3.1 6.3.1.1 6.3.1.2 6.3.1.3 6.3.2 6.3.2.1 6.3.2.2 6.3.3 6.3.3.1 6.3.3.2 6.4 6.4.1 6.4.2 6.4.3 6.4.4 6.4.5 6.4.6 6.5 6.5.1 6.5.2 6.5.3 6.6 6.6.1 6.6.1.1 6.6.1.2 6.6.2 6.6.2.1 6.6.2.2 Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output C: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.25 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.25 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.45 dB typical Step Attenuator Relative Accuracy +/-((0.15 dB + 0.01 dB/dB change) up to 0.5 dB max.) Fine Amplitude Relative Accuracy Output VSWR Single Ended Output A Level = 10 to 16 dBm Level = 0 to 10 dBm Level = -30 to 0 dBm Differential Output A Level = -6 to 4 dBm Level = -30 to -6 dBm Differential Output C Level = -6 to 4 dBm Level = -30 to -6 dBm Single Ended Output A:Level = -10 to +16 dBm Single Ended Output A:Level = -30 to -10 dBm Differential Output A: Level = -10 to +10 dBm Differential Output A: Level = -30 to -10 dBm Differential Output C: Level = -10 to +10 dBm Differential Output C: Level = -30 to -10 dBm Noise (BW = 100 Hz - 30 MHz) Single Ended Output A Differential Output A Differential Output C Step Response Characteristics 0.5 MHz Filter Risetime Overshoot/Undershoot 1.0 MHz Filter Risetime Overshoot/Undershoot <750 ns typical <2% typical <400 ns typical <2% typical <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) typical +/-0.1 dB <1.2:1 typical +/-0.25 dB +/-0.25 dB +/-0.25 dB +/-0.25 dB +/-0.75 dB +/-0.75 dB

Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Freq. = 50 MHz) -45 dBc -55 dBc -60 dBc -40 dBc -50 dBc -40 dBc typical -50 dBc typical -60 dBc -70 dBm -50 dBc -60 dBm -50 dBc typical -60 dBm typical

Sine Wave Spurious Responses (BW = 10 kHz - 10 MHz)

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VHF Arbitrary Waveform Generator 400 Differential 7 7.1 FREQUENCY RANGE II DC - 10 MHz Operating Conditions Note: Specifications in this section apply to AWG DC mode both Single Ended and Differential. 7.1.1 7.1.1.1 7.1.1.2 7.1.1.3 7.1.1.4 7.1.1.5 7.2 7.2.1 7.2.1.1 7.2.1.1.1 7.2.1.1.2 7.2.1.2 7.2.1.2.1 7.2.1.2.2 7.2.1.3 7.2.1.3.1 7.2.1.3.2 7.2.2 7.2.2.1 7.2.2.1.1 7.2.2.2 7.2.2.2.1 7.2.2.3 7.2.2.3.1 7.2.3 7.2.4 7.2.5 7.3 7.3.1 7.3.1.1 7.3.1.2 7.3.1.3 7.3.2 7.3.2.1 7.3.2.2 7.3.2.3 7.3.3 7.3.3.1 7.3.3.2 7.3.4 7.3.4.1 7.3.4.2 7.3.5 7.3.5.1 7.3.5.2 7.3.6 7.3.6.1 7.3.6.2 AWG DC Mode: 2.0 MHz Filter Min. F(s) = 4.0 MHz Filter Min. F(s) = 5.5 MHz Filter Min. F(s) = 6.0 MHz Filter Min. F(s) = 10.0 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output C: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.25 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.25 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.45 dB typical Step Attenuator Relative Accuracy +/-(0.15 dB + 0.01 dB/dB change up to 0.5 dB max.) Fine Amplitude Relative Accuracy Output VSWR Single Ended Output A: Frequency = 1 - 4 MHz Level = 10 to 16 dBm Level = 0 to 10 dBm Level = -30 to 0 dBm Single Ended Output A: Frequency = 4 - 10 MHz Level = 10 to 16 dBm Level = 0 to 10 dBm Level = -30 to 0 dBm Differential Output A: Frequency = 1 - 4 MHz Level = -6 to 4 dBm Level = -30 to -6 dBm Differential Output A: Frequency = 4 - 10 MHz Level = -6 to 4 dBm Level = -30 to -6 dBm Differential Output C: Frequency = 1 - 4 MHz Level = -6 to 4 dBm Level = -30 to -6 dBm Differential Output C: Frequency = 4 - 10 MHz Level = -6 to 4 dBm Level = -30 to -6 dBm +/-0.1 dB <1.2:1 typical +/-0.25 dB +/-0.25 dB +/-0.25 dB +/-0.25 dB +/-0.75 dB +/-0.75 dB 6.0 MHz + F(hfc) 12.0 MHz + F(hfc) 11.0 MHz + F(hfc) 18.0 MHz + F(hfc) 30.0 MHz + F(hfc)

Sine Wave Harmonics (2nd & 3rd) (Note: Max. Sample Freq. = 50 MHz) -45 dBc -55 dBc -60 dBc -45 dBc -50 dBc -55 dBc -40 dBc -50 dBc -40 dBc -50 dBc -40 dBc typical -50 dBc typical -40 dBc typical -50 dBc typical 426

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VHF Arbitrary Waveform Generator 400 Differential 7.4 7.4.1 7.4.1.1 7.4.1.2 7.4.2 7.4.2.1 7.4.2.2 7.4.3 7.4.3.1 7.4.3.2 7.5 7.5.1 7.5.2 7.5.3 7.6 7.6.1 7.6.1.1 7.6.1.2 7.6.2 7.6.2.1 7.6.2.2 7.6.3 7.6.3.1 7.6.3.2 7.6.4 7.6.4.1 7.6.4.2 7.6.5 7.6.5.1 7.6.5.2 7.6.6 7.7 7.7.1 7.7.2 8 8.1 Sine Wave Spurious Responses (BW = 10 kHz - 100 MHz) Single Ended Output A Level = -10 to +16 dBm Level = -30 to -10 dBm Differential Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output C Level = -10 to +10 dBm Level = -30 to -10 dBm Noise (BW = 100 Hz - 100 MHz) Single Ended Output A Differential Output A Differential Output C Step Response Characteristics 2.0 MHz Filter Risetime Overshoot/Undershoot 4.0 MHz Filter Risetime Overshoot/Undershoot 5.5 MHz Filter Risetime Overshoot/Undershoot 6.0 MHz Filter Risetime Overshoot/Undershoot 10.0 MHz Filter Risetime Overshoot/Undershoot Group Delay of 5.5 MHz Filter NTSC Video Waveform Specifications Differential Gain Differential Phase FREQUENCY RANGE III DC - 30 MHz Operating Conditions Note: Specifications in this section apply to AWG DC mode both Single Ended and Differential. 8.1.1 8.1.1.1 8.1.1.2 8.1.1.3 8.2 8.2.1 8.2.1.1 8.2.1.1.1 8.2.1.1.2 8.2.1.2 8.2.1.2.1 8.2.1.2.2 AWG DC Mode: 15.0 MHz Filter Min. F(s) = 20.0 MHz Filter Min. F(s) = 30 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head +/-0.25 dB +/-0.25 dB +/-0.25 dB +/-0.25 dB 427 45.0 MHz + F(hfc) 60.0 MHz + F(hfc) 90.0 MHz + F(hfc) +/-0.5% max. +/-0.5 degrees max. <200 ns typical <2% typical <100 ns typical <2% typical <80 ns typical <8% typical <70 ns typical <2% typical <45 ns typical <2% typical <20 ns to 4.4 MHz typ. <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) typical -55 dBc -65 dBm -50 dBc -60 dBm -50 dBc typical -60 dBm typical

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VHF Arbitrary Waveform Generator 400 Differential 8.2.1.3 8.2.1.3.1 8.2.1.3.2 8.2.2 8.2.2.1 8.2.2.1.1 8.2.2.2 8.2.2.2.1 8.2.2.3 8.2.2.3.1 8.2.3 8.2.4 8.2.5 8.3 8.3.1 8.3.1.1 8.3.1.2 8.3.2 8.3.2.1 8.3.3 8.3.3.1 8.4 8.4.1 8.4.1.1 8.4.1.2 8.4.2 8.4.2.1 8.4.2.2 8.4.3 8.4.3.1 8.4.3.2 8.5 8.5.1 8.5.2 8.5.3 8.6 8.6.1 8.6.1.1 8.6.1.2 8.6.2 8.6.2.1 8.6.2.2 8.6.3 8.6.3.1 8.6.3.2 Differential Output C: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.35 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.35 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +/-0.50 dB typical Step Attenuator Relative Accuracy +/-((0.25 dB + 0.01 dB/dB change) up to 0.5 dB max.) Fine Amplitude Relative Accuracy Output VSWR Single Ended Output A Level = 10 to 16 dBm Level = -30 to +10 dBm Differential Output A Level = -30 to +4 dBm Differential Output C Level = -30 to +4 dBm Single ended Output A Level = -10 to +16 dBm Level = -30 to -10 dBm Differential Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output C Level = -10 to +10 dBm Level = -30 to -10 dBm Noise (BW = 100 Hz - 150 MHz) Single Ended Output A Differential Output A Differential Output C Step Response Characteristics 15.0 MHz Filter Risetime Overshoot/Undershoot 20.0 MHz Filter Risetime Overshoot/Undershoot 30 MHz Filter Risetime Overshoot/Undershoot <32 ns typical <2% typical <30 ns typical <2% typical <22 ns typical <2% typical <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) typical +/-0.1 dB <1.5:1 typical

+/-0.75 dB +/-0.75 dB

Sine Wave Harmonics(2nd & 3rd) (Note: Max. Sample Freq. = 120 MHz) -40 dBc -45 dBc -40 dBc -40 dBc typical

Sine Wave Spurious Responses (BW = 10 KHz - 150 MHz) -45 dBc -55 dBm -45 dBc -55 dBm -45 dBc typical -55 dBm typical

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VHF Arbitrary Waveform Generator 400 Differential 9 9.1 FREQUENCY RANGE IV DC - 80 MHz (Applies only to AWG DC Mode) Operating Conditions Note: Specifications in this section apply to AWG DC mode both Single Ended and Differential. 9.1.1 9.1.1.1 9.1.1.2 9.1.1.3 9.1.1.4 9.2 9.2.1 9.2.1.1 9.2.1.1.1 9.2.1.1.2 9.2.1.2 9.2.1.2.1 9.2.1.2.2 9.2.1.3 9.2.1.3.1 9.2.1.3.2 9.2.2 9.2.2.1 9.2.2.1.1 9.2.2.2 9.2.2.2.1 9.2.2.3 9.2.2.3.1 9.2.3 9.2.4 9.2.5 9.3 9.3.1 9.3.1.1 9.3.2 9.3.2.1 9.3.2.2 9.3.3 9.3.3.1 9.3.3.2 9.4 9.4.1 9.4.1.1 9.4.1.2 9.4.2 9.4.2.1 9.4.2.2 9.4.3 9.4.3.1 9.4.3.2 9.5 AWG DC Mode 45.0 MHz Filter Min. F(s) = 65.0 MHz Filter Min. F(s) = 80 MHz Filter (Time Domain) Min. F(s) = 80 MHz Filter (Freq Domain) Min. F(s) = Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output C: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.35/-0.60 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.35/-0.50 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.50/-0.75 dB typical Step Attenuator Relative Accuracy +/-((0.3 dB + 0.05 dB/dB change) up to 1.0 dB max.) Fine Amplitude Relative Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Single Ended Output A Level = -30 to +16 dBm Differential Output A Level = -6 to +4 dBm Level = -30 to -6 dBm Differential Output C Level = -6 to +4 dBm Level = -30 to -6 dBm Single ended Output A Level = -10 to +16 dBm Level = -30 to -10 dBm Differential Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output C Level = -10 to +10 dBm Level = -30 to -10 dBm Noise (BW = 100 Hz - 200 MHz) -40 dBc -33 dBc -35 dBc -33 dBc typical -35 dBc typical +/-0.1 dB <1.5:1 typical +/-0.25 dB +/-0.35 dB +/-0.25 dB +/-0.35 dB +/-1.00 dB +/-1.10 dB 135.0 MHz + F(hfc) 130.0 MHz + F(hfc) 160.0 MHz + F(hfc) 160.0 MHz + F(hfc)

Sine Wave Spurious Responses (BW = 10 KHz - 200 MHz) -45 dBc -55 dBm -40 dBc -50 dBm -40 dBc typical -50 dBm typical

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VHF Arbitrary Waveform Generator 400 Differential 9.5.1 9.5.2 9.5.3 9.6 9.6.1 9.6.1.1 9.6.1.2 9.6.2 9.6.2.1 9.6.2.2 9.6.3 9.6.3.1 9.6.3.2 9.6.4 9.6.4.1 9.6.4.2 9.6.5 9.6.5.1 9.6.5.2 10 10.1 Single Ended Output A Differential Output A Differential Output C Step Response Characteristics 45.0 MHz Filter Risetime Overshoot/Undershoot 65.0 MHz Filter Risetime Overshoot/Undershoot 80 MHz Time Domain Filter Risetime Overshoot/Undershoot 80 MHz Frequency Domain Filter Risetime Overshoot/Undershoot No Filter Risetime Overshoot/Undershoot <18 ns typical <2% typical <9.5 ns typical <8% typical <8 ns typical <8% typical <8 ns typical <15% typical <4 ns typical <12% typical <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) <20 uVrms (30 kHz BW) typical

FREQUENCY RANGE V DC - 160 MHz (AWG DC SE Only) Operating Conditions Note: Specifications in this section apply to AWG DC mode in Single Ended operation only.

10.1.1 10.1.1.1 10.1.1.2 10.1.1.3 10.2 10.2.1 10.2.1.1 10.2.1.1.1 10.2.1.1.2 10.2.2 10.2.2.1 10.2.2.1.1 10.2.3 10.2.4 10.2.5 10.3 10.3.1 10.3.1.1 10.4 10.4.1 10.4.1.1 10.4.1.2 10.5 10.5.1

AWG DC Mode: 100.0 MHz Filter Min. F(s) = 130.0 MHz Filter Min. F(s) = 160.0 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy RF Pipe Output

200.0 MHz + F(hfc) 200.0 MHz + F(hfc) 240.0 MHz + F(hfc)

Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads +/-0.35 dB PATH Test Head +/-0.45 dB Pogo Pin Output Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.45/-1.00 dB typical Step Attenuator Relative Accuracy +/-((0.3 dB + 0.05 dB/dB change) up to 1.25 dB max.) Fine Amplitude Relative Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Single Ended Output A Level = -30 to +16 dBm Single ended Output A Level = -10 to +16 dBm Level = -30 to -10 dBm Noise (BW = 100 Hz - 400 MHz) Single Ended Output A <30 uVrms (30 kHz BW) -40 dBc +/-0.15dB <1.5:1 typical

Sine Wave Spurious Responses (BW = 10 KHz - 400 MHz) -40 dBc -50 dBm

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VHF Arbitrary Waveform Generator 400 Differential 10.6 10.6.1 10.6.1.1 10.6.1.2 10.6.2 10.6.2.1 10.6.2.2 10.6.3 10.6.3.1 10.6.3.2 10.6.4 10.6.4.1 10.6.4.2 11 11.1 11.1.1 11.1.1.1 11.1.1.2 11.1.1.3 11.1.1.4 11.1.1.5 11.1.1.6 11.1.1.7 11.1.1.8 11.1.1.9 11.1.1.10 11.2 11.2.1 11.2.1.1 11.2.1.1.1 11.2.1.1.2 11.2.1.2 11.2.1.2.1 11.2.1.2.2 11.2.1.3 11.2.1.3.1 11.2.1.3.2 11.2.2 11.2.2.1 11.2.2.1.1 11.2.2.2 11.2.2.2.1 11.2.2.3 11.2.2.3.1 11.2.3 11.2.4 11.2.5 Step Response Characteristics 100.0 MHz Filter Risetime Overshoot/Undershoot 130.0 MHz Filter Risetime Overshoot/Undershoot 160 MHz Filter Risetime Overshoot/Undershoot No Filter Risetime Overshoot/Undershoot <8 ns <8% typical <7 ns <8% typical <5 ns <8% typical <4 ns typical <12% typical

FREQUENCY RANGE VI 5 - 160 MHz (Applies only to AWG AC Mode) Operating Conditions Note: The lower -3 dB frequency of the AWG AC path is 1 MHz typical. AWG AC Mode (5 to 160 MHz): 15.0 MHz Filter Min. F(s) = 20.0 MHz Filter Min. F(s) = 30 MHz Filter Min. F(s) = 45.0 MHz Filter Min. F(s) = 65.0 MHz Filter Min. F(s) = 80 MHz Filter (Time Domain) Min. F(s) = 80 MHz Filter (Freq Domain) Min. F(s) = 100 MHz Filter Min. F(s) = 130 MHz Filter Min. F(s) = 160 MHz Filter Min. F(s) = Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output C: Absolute Accuracy @ 10 dBm AL & AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.45/-1.00 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.45/-1.00 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.50/-1.25 dB typical Step Attenuator Relative Accuracy +/-((0.3 dB + 0.05 dB/dB change) up to 1.0 dB max.) Fine Amplitude Relative Accuracy Output VSWR +/-0.15dB <1.5:1 typical +/-0.25 dB +/-0.45 dB +/-0.25 dB +/-0.45 dB +/-1.00 dB +/-1.20 dB 45.0 MHz + F(hfc) 60.0 MHz + F(hfc) 90.0 MHz + F(hfc) 135.0 MHz + F(hfc) 130.0 MHz + F(hfc) 160.0 MHz + F(hfc) 160.0 MHz + F(hfc) 200.0 MHz + F(hfc) 200.0 MHz + F(hfc) 240.0 MHz + F(hfc)

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VHF Arbitrary Waveform Generator 400 Differential 11.3 11.3.1 11.3.1.1 11.3.2 11.3.2.1 11.3.3 11.3.3.1 11.4 11.4.1 11.4.1.1 11.4.1.2 11.4.2 11.4.2.1 11.4.2.2 11.4.3 11.4.3.1 11.4.3.2 11.5 11.5.1 11.5.2 11.5.3 11.6 11.6.1 11.6.1.1 11.6.1.2 11.6.2 11.6.2.1 11.6.2.2 11.6.3 11.6.3.1 11.6.3.2 11.6.4 11.6.4.1 11.6.4.2 11.6.5 11.6.5.1 11.6.5.2 11.6.6 11.6.6.1 11.6.6.2 11.6.7 11.6.7.1 11.6.7.2 11.6.8 11.6.8.1 11.6.8.2 11.6.9 11.6.9.1 11.6.9.2 11.6.10 11.6.10.1 11.6.10.2 Sine Wave Harmonics (2nd & 3rd) Single Ended Output A Level = -30 to +10 dBm Differential Output A Level = -30 to +10 dBm Differential Output C Level = -30 to +10 dBm Single ended Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output C Level = -10 to +10 dBm Level = -30 to -10 dBm Noise (BW = 10 MHz - 400 MHz) Single Ended Output A Differential Output A Differential Output C Square Wave Response Characteristics 15.0 MHz Filter Risetime Overshoot/Undershoot 20.0 MHz Filter Risetime Overshoot/Undershoot 30 MHz Filter Risetime Overshoot/Undershoot 45.0 MHz Filter Risetime Overshoot/Undershoot 65.0 MHz Filter Risetime Overshoot/Undershoot 80 MHz Time Domain Filter Risetime Overshoot/Undershoot 80 MHz Frequency Domain Filter Risetime Overshoot/Undershoot 100.0 MHz Filter Risetime Overshoot/Undershoot 130.0 MHz Filter Risetime Overshoot/Undershoot 160 MHz Filter Risetime Overshoot/Undershoot <32 ns typical <2% typical <30 ns typical <2% typical <22 ns typical <2% typical <18 ns typical <2% typical <9.5 ns typical <8% typical <8 ns typical <8% typical <8 ns typical <15% typical <8 ns <8% typical <7 ns <8% typical <5 ns <8% typical <30 uVrms (30 kHz BW) <30 uVrms (30 kHz BW) <30 uVrms (30 kHz BW) typical -40 dBc -40 dBc -40 dBc typical

Sine Wave Spurious Responses (BW = 5 MHz - 400 MHz) -40 dBc -50 dBm -40 dBc -50 dBm -40 dBc typical -50 dBm typical

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VHF Arbitrary Waveform Generator 400 Differential 11.6.11 11.6.11.1 11.6.11.2 12 12.1 No Filter Risetime Overshoot/Undershoot

<4 ns typical <12% typical

FREQUENCY RANGE VII 80 MHz - 200 MHz (Sine Wave Only) Operating Conditions This frequency range uses the Waveform Memory, Waveform Controller and the Waveform DAC to generate a square wave. In this operating mode, the square wave sample is buffered to the VHFAWGs channel card where it is filtered to eliminate the higher order frequency components.

12.2 12.2.1 12.2.1.1 12.2.1.1.1 12.2.1.1.2 12.2.1.2 12.2.1.2.1 12.2.1.2.2 12.2.1.3 12.2.1.3.1 12.2.1.3.2 12.2.2 12.2.2.1 12.2.2.1.1 12.2.2.2 12.2.2.2.1 12.2.2.3 12.2.2.3.1 12.2.3 12.2.4 12.2.5 12.3 12.3.1 12.3.1.1 12.3.2 12.3.2.1 12.3.3 12.3.3.1 12.4 12.4.1 12.4.1.1 12.4.1.2 12.4.2 12.4.2.1 12.4.2.2 12.4.3 12.4.3.1 12.4.3.2

Sine Wave Amplitude Accuracy RF Pipe Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output A: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Differential Output C: Absolute Accuracy @ 10 dBm AL and AMS Test Heads PATH Test Head Pogo Pin Outputs Single Ended Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.45/-1.25 dB typical Differential Output A: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.45/-1.25 dB typical Differential Output C: Absolute Accuracy @ 10 dBm AL, AMS and PATH Test Heads +0.50/-1.50 dB typical Step Attenuator Relative Accuracy +/-((0.25 dB + 0.03 dB/dB change) up to 1.25 dB max.) Fine Amplitude Relative Accuracy Output VSWR Sine Wave Harmonics (2nd & 3rd) Single Ended Output A Level = -30 to +16 dBm Differential Output A Level = -30 to +10 dBm Differential Output C Level = -30 to +10 dBm Single ended Output A Level = -10 to +16 dBm Level = -30 to -10 dBm Differential Output A Level = -10 to +10 dBm Level = -30 to -10 dBm Differential Output C Level = -10 to +10 dBm Level = -30 to -10 dBm -40 dBc -40 dBc -40 dBc typical +/-0.15 dB <1.5:1 typical +/-0.25 dB +/-0.45 dB +/-0.25 dB +/-0.45 dB +/-1.00 dB +/-1.20 dB

Sine Wave Spurious Responses (BW = 5 MHz - 200 MHz) -40 dBc -50 dBm -40 dBc -50 dBm -40 dBc typical -50 dBm typical

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VHF Arbitrary Waveform Generator 400 Differential 12.5 12.5.1 12.5.2 12.5.3 Noise (BW = 5 MHz - 500 MHz) Single Ended Output A Differential Output A Differential Output C < 65 uVrms (300 kHz BW) < 65 uVrms (300 kHz BW) < 65 uVrms (300 kHz BW) typical

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Specs
Notes:

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VHF Continuous Wave Source

1) For A5 type systems, all specifications apply at the DIB "blind mate" RF connector. The VHFCW may also interface to the DIB via the channel card Pogo pin path. Specifications may be degraded when using the Pogo pin path. For Catalyst systems, all specifications apply at the VHFCW_DIR Pogo pin. The VHFCW also interfaces to the DIB via the VHFCW_ALT Pogo pin. Specifications may be degraded when using the VHFCW_ALT Pogo pin. 2) All specifications assume a 50 ohm load. The software leveling calibration allows the user to specify any load and will compensate the output level to achieve the programmed level at the programmed load. Spectral purity specifications may vary as the load varies from 50 ohms. 3) Level Accuracy specifications assume that software calibration is NOT disabled (level:none is NOT selected). 4) Amplitude Accuracy = Absolute Accuracy @ 10 dBm + Step Attenuator Accuracy + Fine Amplitude Accuracy + Mismatch Errors. 5) All specifications are guaranteed unless noted as TYPICAL or NOMINAL. 6) TYPICAL specifications are sample tested, are NOT 100% tested, and are NOT guaranteed. 7) NOMINAL specifications are generally calculated values, are NOT 100% tested, and are NOT guaranteed.

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VHF Continuous Wave Source I VHF CW SPECIFICATIONS

1 1.1 1.1.1 1.1.2 1.2 1.3 1.4 1.5 1.5.1 1.5.2

GENERAL SPECIFICATIONS (Apply to all Frequency Ranges) Frequency Range Resolution Peak Output Voltage (AC + DC Baseline) AC p-p Output Voltage Output Current Compliance Limit Output Short Circuit Current 1 - 5.477 MHz 5.477 MHz - 250 MHz

1 to 249.999 999 MHz 1 Hz +/-2.0 V max. 4.0 V max. +/-40 mA typical

+/-80 mA typical +/-70 mA typical

1.6 AC Amplitude 1.6.1 Level Range +16 to -31 dBm 1.6.2 Step Attenuators 1, 2, 4, 8, 16, 16 dB 1.6.3 Fine Amplitude Resolution <0.01 dB 1.6.4 Absolute Accuracy @ 10 dBm +/-0.25 dB 1.6.5 Step Attenuator Relative Accuracy 1.6.5.1 1 - 100 MHz +/-((0.15 dB + 0.01 dB/dB change) up to 0.5 dB max.) 1.6.5.2 100 - 185 MHz +/-((0.25 dB + 0.01 dB/dB change) up to 0.75 dB max.) 1.6.5.3 185 - 250 MHz +/-((0.25 dB + 0.03 dB/dB change) up to 1.25 dB max.) 1.6.6 Fine Attenuator Accuracy 1.6.6.1 1 - 185 MHz +/-0.1 dB 1.6.6.2 185 - 250 MHz +/-0.2 dB 1.6.7 Output VSWR 1.6.7.1 1 - 30 MHz <1.2:1 typical 1.6.7.2 30 - 250 MHz <1.3:1 typical 1.7 Harmonic Spurious (2nd through 5th) 1.7.1 1 - 185 MHz 1.7.1.1 Level = 10 - 16 dBm 1.7.1.2 Level = -31 - 10 dBm 1.7.2 185 - 250 MHz 1.8 1.8.1 1.8.2 Non Harmonic Spurious 1 - 185 MHz 185 - 250 MHz

-65 dBc -70 dBc -30 dBc

-65 dBc -60 dBc

1.9 Programmable DC Baseline 1.9.1 Range 1.9.2 Resolution 1.9.3 Accuracy 1.9.3.1 Uncalibrated (dccal:off) 1.9.3.2 Calibrated (dccal:on)

+/-2.0 V (12 bits) +/-(5% + 50) mV +/-(1% + 6) mV

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VHF Continuous Wave Source 1.9.4 1.9.4.1 1.9.4.2 1.9.5 Linearity Uncalibrated (dccal:off) Calibrated (dccal:on) Settling Time for 4.0 V step

+/-1% +/-0.5% <2 ms to 1% of final value

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Specs
Notes: 1 2

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VHF Measure Module

All specifications apply at the DIB blind mate RF connector. To calculate the incremental error of the IF output when moving from one input level to another, include a 0.2 dB error for any input level change, and 0.05 dB for each dB away from the original input level. For example, the down-converter input power is -5 dBm. It is decreased by 3 dB. The output will decrease by 3 dB +/-(0.2 + 3*0.05 dB), or 3 dB +/-0.35 dB, from whatever level it was at. To calculate the total error at the output for any input level, add 0.2 dB and then 0.05 dB for each dB below 10 dBm. For example, the input power is 0 dBm. The output power will be 0 dBm + VHFMM Down-conv. gain +/- (frequency response errors, see note 8) +/-(0.2 dB + (10-0)*0.05 dB)

The second harmonic distortion specification of the VHFMM can be found nominally by using the following formula: Second Harmonic Dist. < -(Value of 2nd Order Intercept - DUT Output Power + 9.5) dBc To measure distortion lower than calculated above, add an attenuator on the DIB before the VHFMM input. This lowers the signal level into the VHFMM. The new formula is < -(Value of 2nd Order Intercept - (DUT Output Power - atten) + 9.5) dBc where atten = loss of added attenuator These formulas are only valid until the spurious and noise floors are reached. See 4.2.4 below.

The third harmonic distortion specification of the VHFMM can be found nominally by using the following formula: Third Harmonic Dist. < -((Value of 3rd Order Intercept - DUT Output Power)*2 + 6) dBc

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VHF Measure Module To measure distortion lower than calculated above, add an attenuator on the DIB before the VHFMM input. This lowers the signal level into the VHFMM. The new formula is < -((Value of 3rd Order Intercept - (DUT Output Power - atten))*2 + 6) dBc where atten = loss of an attenuator These formulas are only valid until the spurious and noise floors are reached. See 4.2.4 below. 5 These specifications are useful when an entire spectrum is captured from the IF filter with a digitizer. Signals with two tones can intermodulate in the IF amp as well as at the RF of the mixer. This specification separates out the IF contribution. IF harmonics included are 2nd through 5th or 900 kHz, whichever is lower. If spurious products interfere with measurement, tune input signals one at a time to one IF frequency or retune to a new IF frequency. Assuming Pi is the input power to the Down-converter, then Po, expressed below for different circumstances, is the value of the output power of the Down-converter including error introduced by the VHFMM. Generally: Po = Pi + Nom. Gain +/- (Flatness + IF flatness + Rel. acc.) (When IF=500 kHz then IF flatness = 0 dB) RF freq. is varied between 5 MHz & 250 MHz. IF freq. = 500KHz: Po = Pi + 2.7 +/- (1.5 dB + 0.0 dB + [0.2 dB + 0.05 dB/dB*(10 dBm - Pi)]) RF is constant at 70 MHz. IF frequency is varied between 100 kHz & 900 kHz: Po = Pi + 3.2 +/- (1.0 dB + 1.2 dB + [0.2 dB + 0.05 dB/dB*(10 dBm - Pi)]) RF is constant at 120 MHz. IF frequency is varied between 400 kHz & 600 kHz: Po = Pi + 2.4 +/- (1.4 dB + 0.75 dB + [0.2 dB + 0.05 dB/dB*(10 dBm - Pi)]) Please note that the above expressions do not include all error contributions in a source and measure setup. For example, if the HFDIG is being used for measurement, its relevant specifications must be included in the above error expressions.

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VHF Measure Module VHF MEASURE MODULE SPECIFICATIONS 0. 0.1 0.2 1. 1.1 1.2 1.3 2. 2.1 2.1.1 2.1.2 2.1.2.1 2.1.2.2 2.1.2.3 2.1.3 2.1.3.1 2.1.3.2 2.1.3.3 2.1.4 2.2 2.2.1 2.3 2.4 3. 3.1 3.2 3.3 3.4 3.5 Spectrum 2nd Order Intercept 3rd Order Intercept LO-IF Leakage LO-RF Leakage Image Rejection +50 dBm (Note 3) +60 dBm, typical +23 dBm (Note 4) +30 dBm, typical <-70 dBm <-34 dBm 0 dB (Note 5) 500 kHz 100 kHz to 900 kHz <+/-1.2 dB <+/-0.75 dB <-42 dBc (Note 6) <-50 dBm (Note 7) for input signals < 2.0 dBm <-56 dBc for input signals > 2.0 dBm Features Modes Connections Measurement Frequency Range Resolution Accuracy Input Signal Down-converter Mode Input Amplitude Passband Gain at IF = 500 kHz 5 MHz to 100 MHz 100 MHz to 250 MHz 5 MHz to 250 MHz Amplitude Flatness at +10 dBm 5 MHz to 100 MHz 100 MHz to 250 MHz 5 MHz to 250 MHz Down-converter, Sampler THADS, MAT A

5 MHz to 250 MHz 1 Hz see LA302 System Frequency Reference

+10 dBm to -75 dBm +10 dBm to -90 dBm, typical 3.2 dB, nominal 2.4 dB, nominal 2.7 dB, nominal +/-1.0 dB +/-1.4 dB +/-1.5 dB +/-1.0 dB, typical +/-(0.2 dB + 0.05 dB/dB change) (Note2)

Relative Amplitude Accuracy Sampler Mode See High Frequency Sampler specifications. Input Impedance 50 Ohms nominal Input VSWR <2:1, typical

4. IF Output 4.1 IF Nominal Center Frequency 4.2 IF Passband 4.2.1 Frequency Range 4.2.2 IF Flatness 4.2.2.1 100 kHz to 900 kHz 4.2.2.2 400 kHz to 600 kHz 4.2.3 IF Distortion 4.2.4 IF Spurious

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