Linux Part 1

Kumar Singh( BU ETC, GN)

Debugging under
Arun

Tech Flyer #01

Overview & Motivation:

With the recent spurt in Linux and Linux based OS platforms, its imperative to understand the development and debug processes under Linux. It could be real pain for developers moving from other OS or GUI based debuggers to Linux and understanding various Kernel features & facilities supporting debugging ,could be quite handy. In Part 1 of this flyer, I will focus on kernel features for debugging and how they could be used with various tools and applications in user space for debugging. In Part 2, I will try to cover debugging facilities with Android and how best they could be used especially on our development platforms such as U8500. The various design options & key care-abouts in the different integration points. In Part 3 we address the future of Smartphones. What goes in-between the Application Engine (APE) & Modem Processor? Discrete 2-processor based contemporary smartphones typically have an APE Centric Architecture where the APE runs on a HighLevel/OpenOS & Modem runs on a Closed/Low Level OS( RTK, Nucleus, OSE etc).For the purpose of this paper we consider a generic design involving a True SLIM modem(modems which function primarily as a data pump to the network with no flash hardware and no audio codec) with a standard stand-alone APE (eg. TIs OMAP4). The different platform integration points are: Inter-Processor Communication System Control & Boot Audio Integration Telephony Integration

Storage / Flashless Modem Trace Integration Power Mgt Others Production testing, Charging etc

Interprocessor Communication:
Connecting the APE and Modem Processor using an appropriate Inter-processor communication(IPC) mechanism is one the key design choices in making a discrete 2-processor based smartphone. Key factors considered in choosing an interprocessor communication HW include modem throughput requirements, latency, power consumption, design flexibility and cost. Contemporary APE-Modem interprocessor communication HW choice includes MIPI-HSI Interface SPI SDRAM-DDR etc. I2C Inter-chip USB UART

In 2G and 2.5G handsets, the two processors are generally interconnected by a serial interface such as UART or I2C. However, these serial standards provide a low-bandwidth solution, typically not exceeding 1 Mbit/s in throughput and are just enough for the next generation 3G & 4G modems (See table below). Interfaced Modem (Peak Network DL Speeds)
GSM, GPRS( 115kbps); EDGE(473kbps)

Speed
UART I2C Hs-UART SPI FS-USB SDRAMDDR Max 1.5 Mbps

Max 3.4Mbps; typically 400Kbps- GSM, GPRS( 115kbps); 1Mbps EDGE(473kbps) GSM, GPRS( 115kbps); 5 Mbps EDGE(473kbps) Max 20Mbps, typically 16Mbps Max 12Mbps;Typically 6Mbps WCDMA( 2Mbps); HSPA(14Mbps) GSM, GPRS( 115kbps); EDGE(473kbps)

6400MByte/sec(@400Mhz for 64bit bus) HSPA(14Mbps), LTE(100Mbps)

Table 1: To solve the inter-processor communication requirements of HSPA, LTE category modems low-power SDRAM-DDR and MIPI-HSI are favored in contemporary platforms. These IPC HWs maximize throughput, minimize power consumption and provide seamless connectivity to most of the contemporary modem and application processors.

Figure 1: IPC using dual-port RAMs

Modem Boot & Control:

The control of the modem and the booting sequence is key issue to be dealt with in designing these discrete 2-processor smartphones. The boot options include: Option #1: APE, Modem Boot-in Parallel 1. An APE boot-loader copies necessary data (TOC, IPL) into Modem memory and releases Modem processor from reset 2. APE and Modem complete their boot sequences in parallel Option #2: APE Boot first, then Modem 1. APE SW is entirely booted (till UI idle screen) 2. Modem is entirely booted Option #3: Modem boot first, then APE 1. Minimal SW on APE to enable Modem boot 2. Modem is entirely booted 3. APE completes its boot sequence Contemporary smartphones built using Symbian based APE typically tend to use option 1 due to performance benefits.

Figure 2: Generic (flashless) modem boot process

Telephony Integration:
In case of a discrete smartphone architecture, the user-interface(UI) or MMI along with the telephony applications run in the APE while the modem processor runs the underlying telephony stack. The integration of the APE with modem on the telephony domain can happen thru proprietary messages( eg. Nokia ISI) or thru AT commands. The integration of the UI/MMI software typically involves development of the servers along with the message exchanges across the IPC framework.

Figure 3 : Telephony Integration in 2 processor systems

Flashless Modem Filesystem Integration:

Increasingly modems are getting designed as Thin/SLIM modems where the modem processor does have a flash attached to it and uses the flash residing on the APE chasis for all its storage needs. The modems storage requirements in this case are serviced using Network File System Protocol Specification (RFC 1094) and Remote Procedure Call concept as shown below. The RPC messages are XDR(eXternal Data Representation) encoded which provides a common way of representing a set of data types over a network.

Figure 4 : Flashless Modem - FileSystem Integration in 2 processor systems ------------------------------------------------------------------------------------END OF PART1----------------------------------------------------------------------------------------------------