Electronics for Telecommunications

A.Y. 2010-2011 Examination rules

The written examination test of Electronics for Telecommunications will consist of 1 or 2 open theoretical questions (returning up to 8 points each, possibly split into subquestions), 1 or 2 exercises (returning up to 8 points each) and 5-10 multiple-choice short questions (returning 1 point each, when correct). In any case, the maximum possible score will be 32. The examination grade will mostly depend on the total score of the written test, but it might be slightly modulated by a factor (common to all students), which will keep into consideration the average performance of the attendees in a specific examination session. Students may accept the proposed grade as it is (this is the recommended procedure in most cases) or they may opt for a grade refinement interview or viva. The viva will consist of 2-4 additional questions and it is supposed to be taken within a few days after the written test. The viva will change the proposed grade by no more than 3 points. The viva will be compulsory for students with a borderline score in the written test. During the written test, only simple scientific calculators will be allowed. Using books, notes of any kind, programmable calculators, as well as notepads, i-pads, laptops, smartphones or similar is strictly prohibited. Students that will be surprised in reading any type of not allowed media during the test will be invited to leave the classroom immediately and will not be able to take the exam of Electronics for Telecommunications for 1 session. In the following some examples of examination questions are reported.

Examples of open theoretical questions1

1. TX and RX architectures
Describe the structure and the differences of a single IF supertherodyne receiver and a direct conversion receiver. Explain the image frequency issue and describe the criteria for the design of a receiver. Advantages of double intermediate frequency architectures. Describe the differences between the design of superheterodyne receivers and the design of image-reject receivers. Types and performances of duplexers.

2. Selectivity, matching and filtering

Prove the maximum power transfer theorem. Describe the structure and the performance parameters/limitations of integrated resistor and capacitors. Describe the structure and the performance parameters/limitations of monolithic inductors and transformers. Describe the structure and the relevant parameters of series and parallel resonant circuits. Describe the main steps of LC filter design based on the Insertion Loss Method (ILM). Illustrate in particular the criteria for choosing the parameters of the low-pass prototype network in the case of Butterworth and Chebychev filters. Describe and prove the main frequency transforms for analog filter design (i.e. low-pass to high-pass and low-pass to band-pass).

All questions shown in this document are just examples and could be different from real examination questions.

Provide a definition of phase distortion and of group delay. Provide an example where the phase distortion is critical. Crystal-based resonators: circuital model and its performances. Explain the qualitative behaviour of SAW filters.

3. The sensitivity problem: attenuation, noise and distortion

Describe the mechanisms of radio propagation/attenuation in ideal and real conditions: the link budget problem. Describe shortly the most common types of noise in IC design. Quantify the output noise of a two doors network, due to both input noise and internal noise of the devices. Noise figure, noise factor, and equivalent noise temperature: definitions and differences. Prove the Friis formula and explain its importance referring to a real-world example. Intermodulation products and third-order intercept point: definitions and meaning. Explain the effect of the cascade connection of several systems having different IIP3. Prove the relation between attenuation (power loss) and noise figure of a passive two doors network at a generic T. What happens when T0=290 K?

4. RF power amplifiers

Estimate the maximum efficiency of an amplifier in class A, B and C. Explain the differences between classic and switching power amplifiers. Describe in details a class D amplifier, highlighting the differences compared to a class B amplifier. Describe the structure of switching amplifiers with special emphasis on type E amplifiers. Provide the design criteria for a type F amplifier. Describe the main large-signal linearization techniques for Pas.

5. Electronic devices for telecommunications

Compare and explain shortly the differences between a p-n diode, a Schottky diode and a PIN diode. Describe and compare the large signal I/O characteristic of CE, CB and CC amplifiers. Describe the operation of a bipolar transistor according to the Ebers-Moll model. Explain shortly the structure and the advantages of HBT transistors. Describe the high-frequency model of a bipolar transistor. Describe the behaviour of a MeSFET transistor and its limitations.

6. Oscillators and VCOs

Definition, performance parameters general structure and basic principle of operation of sine wave oscillators. Starting from the general scheme of a sine wave oscillator, prove the five basic design conditions. Describe the structure and the operation principle of a VCO. Starting from the general scheme of a sine wave oscillator, describe the structure and the operation principle of a negative-resistance oscillator. Provide an example of an oscillator of this type. Describe the structure of three-point oscillators compared to the general scheme of a sine wave oscillator. Provide an example of an oscillator of this type.

7. Mixers

Single diode, balanced and double balanced mixers: schematic and circuital analysis. Which of these schemes can be used only as AM modulator? Justify your answer. Show how a differential amplifier stage can become a 2-quadrant analog multiplier. Describe the structure and the operation of a Gilbert-cell based on BJT devices.

8. Phase-Locked Loop (PLL) and synthesizers

Structure and operation of a PLL: qualitative analysis and butterfly diagram. Analysis of a PLL in locked condition: linear model and criteria for loop filter design.

Describe with practical examples the main application scenarios in which PLLs are used. Define the main performance parameters of a PLL, with particular emphasis on lock range and capture range. Describe the structural and functional differences between the phase comparators used in analogue PLLs and in digital PLLs. Describe the main types of indirect frequency synthesizers.

Examples of multiple-choice short questions2

1. Given a series resonant circuit with R=1 k, L=93 nH and C=21 nF, the resonance frequency is equal to: 42.0 kHz 79.5 kHz 22.6 MHz 3.6 MHz 2. A PIN diode is an electronic device having: a barrier capacitance greater than a normal semiconductor diode; a junction capacitance approximately linear, and a resistance smaller than a normal semiconductor diode; a junction capacitance approximately linear, but a resistance larger than a normal semiconductor diode; a junction capacitance smaller than a normal semiconductor diode, but described by a nonlinear relationship. 3. A Colpitts oscillator: requires a RC resonator; requires a resonant circuit made of two inductors and a capacitor; requires a resonant circuit made of two capacitors and an inductor; requires the use of a quartz crystal. 4. A double-balanced switching mixer: can be used only as an AM modulator; has no offset at all; is equivalent to a 4 quadrant analog multiplier cell; has the advantage of removing the baseband replica of the input from the output. 5. In a class C amplifier: the current flows in the amplifier for half period of the input waveform; we have more efficiency compared to a class A amplifier, but also larger distortion; we have more efficiency compared to a class D amplifier, but also larger distortion; we have less efficiency compared to a class B amplifier, but also smaller distortion.
All questions shown in this document are just examples and will generally be different from real examination questions. In the exam, a correct questions will be marked 1 point, a blank one will be marked 0 points and a wrong one will be marked -0.25.
2

6. Given an integer frequency synthesizer with a reference frequency fr=50 kHz, a 4-bit binary counter and a prescaler with K=10. What is the maximum frequency generated by the synthesizer? 75 MHz 7.5 MHz 75 kHz 750 kHz 7. In an oscillator based on the negative resistance principle: the nonlinear part is a 2-port circuit with N or S I/O characteristic; the nonlinear part is a 1-port circuit with N or S I/V characteristic; the nonlinear part is a 2-port circuit with N or S I/V characteristic; the nonlinear part is a 1-port circuit with N or S I/O characteristic. 8. The time of storage: is responsible for the junction capacitance of a pn diode; is responsible for the barrier capacitance of a pn diode; is larger in Schottky diodes; is independent from the junction capacitance. 9. A HBT transistor: is similar to a BJT, but with an emitter region which is more doped than a BJT; is similar to a MOSFET, but has a larger current gain ; has a smaller base-emitter junction capacitance; has a smaller base-collector junction capacitance. 10. An FDD duplexer: is used only in transmission systems; is used only in receiving systems; works as a switch in periodic mode; attenuates the signal by about 2 or 3 dB. 11. The Flicker noise in the RF stage of a generic receiver: may affect considerably the sensitivity of a DCR; may affect considerably the sensitivity of an image-reject receiver; may affect considerably the sensitivity of a dual-IF superetherodyne receiver; may affect considerably the sensitivity of a single-IF superetherodyne receiver.

12. The lock range of a PLL: increases if the VCO has a narrow range; increases if the loop filter is an active filter; increases if the mixer is a single balanced switching mixer; increases by using a higher-order loop-filter. 13. A big fat inductor (BFL) in a RF power amplifier is used: to change the bias point of the amplifier stage; to improve the filtering of the output waveform; to avoid that large RF signals may damage the voltage supply of the amplifier; to filter the DC current. 14. Consider a low-cost microcontroller running at 4 MHz. What is in your opinion the preferable on-chip clock oscillator for this device among those listed below? A frequency synthesizer clocked by a XO at 50 kHz and M=80; A Pierce oscillator; A Colpitts oscillator; An RC oscillator. 15. A monolithic integrated inductor of known inductance is preferably circular: to reduce the magnetic coupling between the coils and the substrate; to reduce the mutual capacitive coupling between the coils and the substrate; to reduce possible manufacturing problems; to reduce the ohmic losses of the metal coil. 16. The capacitance value of a CMOS integrated capacitor of given area A: grows if we use a comb or lateral-flux structure; grows by increasing the distance from the substrate; grows if we use a GaAs substrate; grows if we use metal plates. 17. Compute the minimum order of a Butterworth filter with flatness in-band factor k=0.5, such that the out-of-band attenuation at the frequency Fx=2*Fc (Fc being the cutoff frequency) is 40 dB. 6; 7; 8; 10.

18. A Gunn oscillator relies on a special negative-resistance diode which is coupled with: an LC resonator; a quartz resonator; a RC resonator with a varicap; a microwave resonator (e.g. a resonant cavity). 19. Calculate the noise figure of a passive filter with attenuation equal to 1 dB when the environmental temperature is 40 Celsius. 1 dB; 0.93 dB; 1.07 dB; 3 dB. 20. A Gilbert cell works as a switching mixer when, by applying a large periodic sinewave to one of the inputs, we have that: T1 and T2 behave as switches and T3,T4,T5,T6 work in DAR; T3 and T4 behave as switches and T1,T2,T5,T6 work in DAR; T5 and T6 behave as switches and T1,T2,T3,T4 work in DAR; T1 and T5 behave as switches and T2,T3,T4,T6 work in DAR. 21. The efficiency of a class C amplifier: tends to reach 100%, but at expense of the power actually delivered to the load; tends to reach 78.6%, regardless of the power actually delivered to the load; tends to reach 100%, regardless of the power actually delivered to the load; tends to reach 90%, but at expense of the power actually delivered to the load. 22. The image frequency of an input signal detected by a supertherodyne receiver is symmetric to the IF with respect to the input RF signal; to the IF with respect to the frequency of the LO; to the frequency of the input RF signal with respect to IF; to the frequency of the input RF signal with respect to the frequency of the LO. 23. Which are the typical dimensions of the SMD standard size 1206 ? Length = 1.0 mm ; Width = 0.5 mm ; Thickness = 0.5 mm Length = 1.6 mm ; Width = 0.8 mm ; Thickness = 0.8 mm Length = 2.0 mm ; Width = 1.25 mm ; Thickness = 0.8 mm Length = 3.2 mm ; Width = 1.6 mm ; Thickness = 1.1 mm

Answers
1.D, 2.C, 3.C, 4.D, 5.B, 6.B, 7.B, 8.A, 9.C, 10.D, 11.A, 12.B, 13.C, 14.D, 15.D, 16.A, 17.C, 18.D, 19.C, 20.A, 21.A, 22.D, 23.D

Examples of exercises3
1. Compute the sensitivity of the following receiver, assuming that its equivalent noise bandwidth is 1 MHz and that the system works at T=300 K
SNRd = 45 dB

LNA
G=20 dB F=2 dB

BPF
G=-1 dB

x
G=2 dB F=4 dB

BPF
G=-1 dB

IF
G=30 dB F=6 dB

2. Choose the values of the parameters of R1, R2 R and C in the following circuit so that the signal X is a sine wave oscillator running at 100 kHz. How should you change the parameters of the circuit in order to improve the selectivity of the resonant circuit?
R2

R1 -

X
C C R

3. Given the RF common emitter amplifier stage shown below where R1=100 , R2=50 , rBB= 2 , rBE= 400 , gm=0.3 1/, Ct= 20 pF, Rc=100 , find the gain and the 3-dB cutoff frequency of the considered amplifier.

B
R1 vIN R2

rBB

iB B

C
Rc vOUT

rBE Ct gmvBE

E
4. Consider an RFID reader/writer working at 868 MHz. If the transmission power is equal to PT=1 dBm and the TX antenna gain is 2 dB, how large should approximately the sensitivity of some passive tags (whose antenna gain is 0 dB) be in order to cover a range of 1 m? What happens at 2.4 GHz? And what about 433 MHz? Please justify your answers.
3 All questions shown in this document are just examples and will generally be different from real examination questions. Exercises on different topics are also possible.

5. Consider a basic PLL with the loop filter shown in the picture. Assume that R1 R2 o the VCO gain Kc=10000; o the loop filter has a pole at fp=10 MHz; C o the closed loop bandwidth of the PLL is approximately n=6.28109 rad/s; o the wanted damping factor is =1/2 (critical damping). If R1=1 k, determine the values of R2, C as well as the ideal gain Kd of the phase comparator, in order to meet the design conditions stated above. Are the obtained values feasible using standard integrated technologies? Would you replace the passive filter with an active filter? Why? 6. Using the LPP table shown in the picture, design a 3rd order bandpass Chebychev filter with f0=1.8 GHz and bandwidth B=60 MHz assuming that both the input impedance and the load are ZI=ZL=50 . Do you think that such a filter can be built using discrete components? Please justify your answer. What are the (qualitative) differences in terms of selectivity and phase linearity between the designed filter and a Butterworth filter of the same order?