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I. INTRODUCTION
T'"
The three-level VIENNA 1 rectifier in Fig. la is a very
suitable topology for three-phase rectification when only
unidirectional power flow is needed. It has better efficiency,
smaller AC filter size and only three active switches
compared to the conventional six-switch active PWM full-
bridge rectifier [ I]. In many articles, the VIENNA 1 rectifier
has been designed to operate at a small output power of a Fig. 1. T h e VIENNA I rectifier. a) Main circuit, h) steady-state vector
few kilowatts, while the average switching frequency is diagram of the rectifier operating at a unity displacement power factor in
dozens of kilohertz [2,3,4]. Such applications require very the mains volcagc oriented (synchronous) reference frame.
fast computation for the duty cycle of the switching device
because of the short pulse period. It is therefore reasonable
to implement modulation using analogue techniques.
At higher power levels and lower pulse frequencies, the
digital computation of the duty cycles is easy to implement
e.g. by using a microcontroller or DSP. This allows us to use where is the mains voltage vector, I sis the rectifier
space vector modulation instead of analogue modulation. current vector and ss is the rectifier voltage vector. The
A suitable vector modulation method for VIENNA 1 corresponding steady-state vector diagram of the rectifier in
rectifier is presented in [5] and [6]. This paper reports the Fig. l a operating at a unity displacement power factor is
experimental results of vector controlled and modulated shown in Fig. lh in the synchronous reference frame.
rectifier prototype. The preliminary laboratory tests are The rectifier phase voltages ur(,b.c)M can be presented with
reasonably congruent with the simulation results and thus the help of the switching functions S W ( , ~ , ~which
) determine
verify the functioning of the proposed modulation method. the conduction states of the active switches S(B.b,c). If the
The rectifier prototype has been designed to operate at a voltages of the DC link capacitors are equal in Fig. la, the
nominal DC link output power of 10kW. The DC link rectifier phase voltages are
voltage is set at 650V and the applied switching frequency is
5!dz. The digital control system and vector modulator are ur(a,h,c)M =(l-SW(qb,c))udc I 2 for ir(a.b,c) (2)
implemented with Motorola MPC555 microcontroller.
Ur(a,b,c)M = (Sw(a,b,c) - / 2 for k%b.c) < (3)
11. VECTOR MODULATION [5,6] 1
U<a,b,c)N =*r(a,h,c)M -T(ur&4 +'hM +'rcM)' (4)
The space vector voltage equation of a rectifier with an L
filter in the mains voltage oriented, synchronous (denoted by The switching function is SW(,,~.~) = 1 when the active switch
superscript s) reference frame rotating at Q is s(&b.c) is ON, and SW(,b.cJ = 0 when S(%b.c) is OFF.
2004 35th Annual IEEE Power Electronics Specialists Conference Aachen, Germany, 2004
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2004 351h Annual IEEE Power Elecrrunics Specialists Conference Aachen. Germany, 2W4
TABLE 11.
VECTOR AND SWITCHING SEOUENCE OF THE RECTIFIER
(~&&~CIL~~)OR(~&&'~~Z~~),O~~~T.~,
Reference in I Vector sequence Switrhina seguenee
Sub I.: a,...r < d 6 vac - vo - v m - VOI+ (01 I)- (III)- ( I IO) - (100)
sub I; ni6 s &)rr vi - vo,. ii
iooi j - iot I j - IIj - i i ioj
Sub 2 "o,.- v , i - "I - "0,- (01 I)- (010) - (000) -(loo)
Sub 3; %+ d6 VOL.- VIZ- vm+- vow (01 I)- (010) -(I I O ) -(loo)
Sub 3; n/6< q&? v 0 ~ . - - y o ~ ~ - v-Lva+
I (OOl)-(Ol l ) - ( O l O ) - ( l IO)
Sub 4 ",*
"a*. - "* - - "ai+ (001) - (000)- (010)- ( I IO)
switch has to change its state when changing from one
vector to another. This minimises the switching transitions
when continuous modulation is used. If & and g,efare in the
main sector I and the angles are either (q& & ~f < n16) or
(G & 2 d 6 ) , the resulting vector and switching
sequences are listed in Table 11. Only the sequence of the
first half of the switching period i",,& = 1/(2J;J is presented.
Pm
The sequence is reversed during the other half. Similar
sequences can he determined for all main sectors.
The input voltage generation of the VIENNA I rectifier is
dependent on the directions of the input currents because of
the diodes DI...D6 in the main circuit Fig. la. In the middle
of each main sector, e.g. at the angle of 7d6 in sector I, one Re
of the phase currents changes its polarity. This has to he
taken into account when generating the pulse patterns. If the b)
reference vector is in suh-sector 3 (t&t < d6) and the Fig. 4. Averaging of the refcrcnce vector. a) Erroneous average (dashcd
current of the phase B temporarily changes its direction, line) due to thc zcm cmssing of the current in phase B without clamping,
then the switching combination (IOO), which should produce which CBUSCS sw = (100) to pmducc v2, instead of vol.. b) Corrcct average
with clamping method.
vector vol. now produces vector vZ3.This leads to error both
in the amplitude and angle of the modulated average y as
shown by the dashed line in Fig. 4a. Errors due to the zero
crossings of the currents can he avoided by using a special
clamping method, in which the polarity changing phase is
connected to the neutral point M for a certain time period. In
practice this means that r, in ( I 1) and (12), is either 1 or -1,
depending on the main and sub-sectors of the reference
vector. The resulting vector sequence during the clamping
interval is shown in Fig. 4b. Clamping takes only a few
modulation periods so the modulation can be considered to
remain continuous.
111. VECTOR CONTROL SYSTEM Fig. 5. StrucrUrc of the cantrailed rectifier system.
A . Overview
The structure of the controlled rectifier system is
presented in Fig. 5. The simplified block diagram of the
control system is presented in Fig. 6 . The converter control
system has four measured variables: two phase currents are
needed for current control (im + ih + ,i = 0) and both DC
link capacitor voltages are needed for overall and partial DC
link voltage control. In this first evaluation of the control
system we do not measure the mains voltages for control
purposes, but assume it to be ideal. The single phase voltage
measurement in Fig. 5 is needed for synchronisation.
The current control is realised in the synchronous, mains
voltage oriented reference &ame rotating at a,The space 4
vector voltage equation ( I ) of the L filter can be divided into
components (14)-(16), where L = L(.,b,c). Because ideal Fig. 6. The simplified block diagram of the control system and modulator.
mains is assumed, the mains voltage components ud and uSq
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2004 35rh Annual IEEE Power Elecrronics Specialisrs Conference Aachen. Gemmny, 2004
did
uSd=U,,, +R,i, + L - - o , L i ,
dt
di
U
w = U - + R , i , + L dt
~ + W , L ~ , ~
The rectifier voltage reference is then transformed into polar 1V. PROTOTYPE REALISATION
coordinates in the stationary reference frame. The vector
modulator (SVM) in Fig. 6 has five inputs; the DC link The laboratory prototype of the VIENNA I rectifier
voltage (Udc = U,, + U,,), the reference vector amplitude system is shown in Fig. 7a. It is designed to operate at a
(LA) and angle the rectifier current angle (w) and the nominal lOkW output power and 650V DC voltage. The AC
weighting coefficient r. The resulting switching functions filter is chosen so that the total harmonic line current
sw,, swb and sw, are obtained from the modulator logic distortion (THD) is about 4%.
circuit. The main circuit is constructed from three IXYS VUM
E. Microcontroller implementation 25-058 modules shown in Fig. 7b [7], two 680pF(3.4p.u.)
450V electrolytic capacitors and 2200pH(4.3%p.u.) three-
The control system and the modulator are digitally phase AC inductor. Components are connected with copper
implemented with Motorola MPC555 microcontroller (f,,,x bus bars and wires. The two phase currents are measured
= 40MHz). The inbuilt IObit AD converters together with with LEM LA 55-P current transducers. The auxiliary power
the connections for current and voltage measuring result in supplies and the drivers for MOSFETs are located under the
IOOmA and 450mV resolution. shield of the MPC555 card in Fig. 7a.
Because the switching frequency is set at 51;Hz, the
modulation frequency is IOkHz. The current control V. SIMULATED AND EXPERIMENTAL RESULTS
algorithm is executed at I O O p intervals, while the DC
voltage and the partial capacitor voltage control algorithms The steady-state operation of the rectifier is examined at
are executed at 6 0 0 p intervals. The modulator algorithm is nominal operating point Po,,= 10.4kW and U& = 650V.
executed at I O O p intervals. It calculates the relative ON The simulation model of the rectifier is such that the
times of the switches on the basis of (6)-(IO) and Table I. To control system and modulator run in Matlab Simulink while
make arbitrary pulse patterns possible, the final switching the main circuit model runs in Simplorer [6]. Passive
functions are generated with TPU channels and logic circuit. component models are non-ideal, while semiconductor
The protection circuiby (both sofhvare and hardware) models are ideal. The mains phase voltage total harmonic
prevents the modulator operation in case of overcurrent distortion used in simulations is 1.1%
(OC) or overvoltage (OVCl.OVC2). If failure occurs, The prototype mains voltage THD =1.2%. The current
SW(,~.~) is set at 0 and the rectifier operates as six-pulse diode measurement is done with Tektronix TCPA3000 current
bridge. probe, while voltages are measured with Tektronix P5200
The angle of the synchronous reference frame, qbpc = at, HV differential probes. All signals are transferred to Matlah
is obtained from the zero crossings of the phase A voltage through a LeCroy LT364L digital oscilloscope. Figs. 8 and 9
with a phase locked loop. show both simulated and measured waveforms.
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2004 351h A n n u l IEEE Power E/eclronics Specialisrs Conference Aarhen, Germany, 2004
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2004 35rh Annual IEEE Power Eiecrronics Specialists Conference Aachen. Germany. 2004
= :. :. :. .! .I .! .: .: .:
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a)
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M , , , ,
0 10 D 80 m ~ r n ~,I I (a, I- ,
im D)
, ,
h.Irn.l
T"",.,
d) d)
Fig. 9. Transient waveforms, Pw,: 3.4kW + I0.4kW. Fig. 10. Low load wavcfonn, P , = IkW.
a) DC link voltagc (SIM) a) Line current i. (SIM)
b) Line current (SIM) ~ 24.5% (SIM)
b) Line currenl spectrum, T H D I =
c) DC link voltage (MEAS) c) Line current i. (MEAS)
d) Line c ~ m e n (MEAS)
t d) Line cunrnt spcctrum, T H D I w =
~ 26.4% (MEAS)
Fig. 8 shows the steady-state waveforms at the nominal obtained directly from the MPC555.
operating point. The test results are reasonably congruent When there is a 7kW step change in load power from
with simulations, although various delays and dynamics not 3.4kW to 10.4kW. the experimental transient behaviour of
modelled cause some differences. The simulated line current the rectifier system is quite similar to that of the simulation
distortion values are T H D ~ x=H 1.3%
~ and T H D I ~=~3.9%~ ~ z model, as shown in Fig. 9.
while the corresponding measured values are TIIDz~H,= The rectifier operation in low load condition is also
2.8% and THDlWkHz = 5.3%. The partial capacitor voltages examined. Fig. 10 shows the simulated and measured line
in Fig. 8n are AD converted and digitally filtered values current waveforms in case of IkW (10%) output power. The
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2004 351h Annual IEEE Power Electronics Specialists Conference Aarhert, German>,,2W4
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