DISCRETE SEMICONDUCTORS

DATA SHEET

C106D Thyristors logic level

Product specication July 2001

Philips Semiconductors

Product specication

Thyristors logic level

GENERAL DESCRIPTION
Passivated, sensitive gate thyristor in a plastic envelope, intended for use in general purpose switching and phase control applications. This device is intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits.

C106D
QUICK REFERENCE DATA
SYMBOL VDRM VRRM IT(AV) IT(RMS) ITSM PARAMETER Repetitive peak off-state voltages Average on-state current RMS on-state current Non-repetitive peak on-state current MAX. 400 2.5 4 38 UNIT V A A A

PINNING - SOT32
PIN 1 2 3 DESCRIPTION cathode anode gate

PIN CONFIGURATION

SYMBOL

Top view

3
MBC077 - 1

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITSM Average on-state current RMS on-state current Non-repetitive peak on-state current half sine wave; Tmb 113 C all conduction angles half sine wave; Tj = 25 C prior to surge t = 10 ms t = 8.3 ms t = 10 ms ITM = 10 A; IG = 50 mA; dIG/dt = 50 mA/s CONDITIONS MIN. -40 MAX. 400
1

UNIT V A A A A A2s A/s A V V W W C C

2.5 4 35 38 6.1 50 2 5 5 5 0.5 150 1252

I2t dIT/dt IGM VGM VRGM PGM PG(AV) Tstg Tj

I2t for fusing Repetitive rate of rise of on-state current after triggering Peak gate current Peak gate voltage Peak reverse gate voltage Peak gate power Average gate power over any 20 ms period Storage temperature Operating junction temperature

1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/s. 2 Note: Operation above 110C may require the use of a gate to cathode resistor of 1k or less.
July 2001 2 Rev 1.000

Philips Semiconductors

Product specication

Thyristors logic level

C106D

THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-mb Rth j-a CONDITIONS MIN. TYP. MAX. 2.5 95 UNIT K/W K/W Thermal resistance junction to mounting base Thermal resistance in free air junction to ambient

STATIC CHARACTERISTICS
Tj = 25 C unless otherwise stated SYMBOL PARAMETER IGT IL IH VT VGT ID, IR Gate trigger current Latching current Holding current On-state voltage Gate trigger voltage Off-state leakage current CONDITIONS VD = 12 V; IT = 0.1 A VD = 12 V; IGT = 0.1 A VD = 12 V; IGT = 0.1 A IT = 5 A VD = 12 V; IT = 0.1 A VD = VDRM(max); IT = 0.1 A; Tj = 110 C VD = VDRM(max); VR = VRRM(max); Tj = 125 C MIN. 0.1 TYP. 15 0.17 0.10 1.23 0.4 0.2 0.1 MAX. 200 10 6 1.8 1.5 0.5 UNIT A mA mA V V V mA

DYNAMIC CHARACTERISTICS
Tj = 25 C unless otherwise stated SYMBOL PARAMETER dVD/dt tgt tq Critical rate of rise of off-state voltage Gate controlled turn-on time Circuit commutated turn-off time CONDITIONS VDM = 67% VDRM(max); Tj = 125 C; exponential waveform; RGK = 100 ITM = 10 A; VD = VDRM(max); IG = 5 mA; dIG/dt = 0.2 A/s VD = 67% VDRM(max); Tj = 125 C; ITM = 8 A; VR = 10 V; dITM/dt = 10 A/s; dVD/dt = 2 V/s; RGK = 1 k MIN. TYP. 50 2 100 MAX. UNIT V/s s s

July 2001

Rev 1.000

Philips Semiconductors

Product specication

Thyristors logic level

C106D

6 5 4 3 2 1 0

Ptot / W
conduction angle degrees 30 60 90 120 180 form factor

Tmb(max) / C

ITSM / A

110 112.5

40
IT I TSM T time

a
4 2.8 2.2 1.9 1.57

1.9 2.2 2.8 4

a = 1.57 115 117.5 120

30

Tj initial = 25 C max

20

10

122.5 125 3

0.5

1.5 IF(AV) / A

2.5

10 100 Number of half cycles at 50Hz

1000

Fig.1. Maximum on-state dissipation, Ptot, versus average on-state current, IT(AV), where a = form factor = IT(RMS)/ IT(AV).
1000 ITSM / A

Fig.4. Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz.

12 10 8

IT(RMS) / A

dIT /dt limit 100 ITSM

6 4 2 0 0.01

IT

time T Tj initial = 25 C max 10 10us 100us T/s 1ms 10ms

0.1 1 surge duration / s

10

Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp 10ms.

Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb 113C.
VGT(Tj) VGT(25 C)

IT(RMS) / A

BT148

1.6
113 C

1.4 1.2 1

0.8
1

0.6
0 50 Tmb / C 100 150

0 -50

0.4 -50

50 Tj / C

100

150

Fig.3. Maximum permissible rms current IT(RMS) , versus mounting base temperature Tmb.

Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25C), versus junction temperature Tj.

July 2001

Rev 1.000

Philips Semiconductors

Product specication

Thyristors logic level

C106D

3 2.5

IGT(Tj) IGT(25 C)

12 10

IT / A Tj = 125 C Tj = 25 C
Vo = 1.26 V Rs = 0.099 ohms

typ

max

2 1.5 1 0.5 0 -50

6 4 2 0

50 Tj / C

100

150

0.5

1.5 VT / V

2.5

Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25C), versus junction temperature Tj.
IL(Tj) IL(25 C)

Fig.10. Typical and maximum on-state characteristic.

10

Zth j-mb (K/W)

3 2.5

2 1.5 1 0.5 0 -50

0.01 10us 0.1ms 1ms 10ms tp / s 0.1s 1s 0.1
P D tp

50 Tj / C

100

150

10s

Fig.8. Normalised latching current IL(Tj)/ IL(25C), versus junction temperature Tj.
IH(Tj) IH(25 C)

Fig.11. Transient thermal impedance Zth j-mb, versus pulse width tp.
dVD/dt (V/us)

1000

3 2.5 2 1.5 1 0.5

RGK = 100 ohms

100

10

0 -50

50 Tj / C

100

150

50 Tj / C

100

150

Fig.9. Normalised holding current IH(Tj)/ IH(25C), versus junction temperature Tj.

Fig.12. Typical, critical rate of rise of off-state voltage, dVD/dt versus junction temperature Tj.

July 2001

Rev 1.000

Philips Semiconductors

Product specication

Thyristors logic level

C106D

MECHANICAL DATA
Dimensions in mm Net Mass: 0.8 g
Plastic single-ended leaded (through hole) package; mountable to heatsink, 1 mounting hole; 3 leads SOT32

P1 P D

L1

1 bp

2 w M

3 c Q e e1

2.5 scale

5 mm

DIMENSIONS (mm are the original dimensions) UNIT mm A 2.7 2.3 bp 0.88 0.65 c 0.60 0.45 D 11.1 10.5 E 7.8 7.2 e 4.58 e1 2.29 L 16.5 15.3 L1(1) max 2.54 Q 1.5 0.9 P 3.2 3.0 P1 3.9 3.6 w 0.254

Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT32 REFERENCES IEC JEDEC TO-126 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-03-04

Fig.13. SOT32.
Notes 1. Refer to mounting instructions for SOT32 envelopes. 2. Epoxy meets UL94 V0 at 1/8".

July 2001

Rev 1.000

Philips Semiconductors

Product specication

Thyristors logic level

C106D

DEFINITIONS
DATA SHEET STATUS DATA SHEET STATUS3 Objective data PRODUCT STATUS4 Development DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in ordere to improve the design and supply the best possible product This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A

Preliminary data

Qualification

Product data

Production

Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

3 Please consult the most recently issued datasheet before initiating or completing a design. 4 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
July 2001 7 Rev 1.000

Philips Semiconductors a worldwide company

Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales ofces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

Koninklijke Philips Electronics N.V. 2001

SCA73

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

XXXXXX/700/01/pp8

Date of release: July

2001

Document order number:

9397 750 09036

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