BJT DC Biasing

ESE319 Introduction to Microelectronics
1
2009 Kenneth R. Laker, update 24Sep10
BJT Biasing Cont.
Biasing for DC Operating Point Stability
BJT Bias Using Emitter Negative Feedback
Single Supply BJT Bias Scheme
Constant Current BJT Bias Scheme
Rule of Thumb BJT Bias Design

2
Previous Simple Base Biasing
Schemes
What's wrong with these schemes?
3
Biasing for Operating Point Stability
A practical biasing scheme must be insensitive to
changes in transistor and operating temperature!
Negative feedback is one solution.
I
C
I
B
I
E R
E
R
C
V
CC
V
B
4
I
C
I
S
e
V
BE
V
T
V
BE
=V
B
R
E
I
E
=V
B
R
E
I
C
o
Basic relationships:
I
E
=I
B
+I
C
=+1) I
B
I
E
=
+1)
I
C
=
1
o
I
C
Given the (DC bias) equations:
Assume: V
BE
=0.7V.
and V
B
and V
CC
are given. Then
compute R
E
to obtain the desired
collector current I
C
:
R
E
=o
V
B
0.7
I
C
5
Negative feedback makes the collector current insensitive to V

BE
, I
S
, and .
If I
C
increases due to an increase in I
S
then V
BE
will decrease; thus, limit-
ing the magnitude of the change in I
C
.
The equations that must be satisfied simultaneously are:

Negative Feedback via R
E
I
C
=
V
B
V
BE
)
+1) R
E
=o
V
B
V
BE
R
E
V
BE
=V
B
R
E
I
C
o
=V
B
+1
R
E
I
C
I
C
=I
S
e
V
BE
V
T
and
if I
S
=> I
C
when I
C
=> V
BE
I
C
<= V
BE
I
S
insensitivity
insensitivity
if V
B
>> V
BE
V
BE
insensitivity
I
C
o
V
B
R
E
=>
6
Scilab Analysis of I
C
Insensitivity to I
S
Simultaneous equations:
I
C
=I
S
e
V
BE
V
T
I
C
=o
V
B
V
BE
R
E
or: o
V
B
V
BE
R
E
=I
S
e
V
BE
V
T
If we plot the exponential function and the straight line function,
the solution values of I
C
and V
BE
for the circuit occur at their
intersection.
Let R
E
=4k D V
B
=4.7V and
(want V
B
>> V
BE
)
7
Scilab Program
//Calculate and plot npn BJT bias characteristic
beta=100;
alpha=beta/(beta+1);
VsubT=0.025;
VTinv=1/VsubT;
VBB=4.7;
Re=4;
vBE=0.0:0.01:1;
iCline=alpha*(VBB-vBE)/Re;//mA.
plot(vBE,iCline);
iC=0.01:0.01:2; //mA.!
IsubS =1E-16; //mA.
for k= 1:1:8
IsubS=10*IsubS;
vBE2=VsubT*log(iC/IsubS);
plot(vBE2,iC); //Current in mA.
end
I
C
=o
V
B
V
BE
R
E
V
BE
=V
T
ln
I
C
I
S
8
I
C
vs I
S
Results Plot
I
S
=10
11
I
S
=10
18
AI
C
0.1 mA
Insensitive
to I
S
!
I
C
=o
V
B
V
BE
R
E
I
C
=I
S
e
V
BE
V
T
9
R
E
=o
V
B
0.7
I
C
Example: =100
V
B
=4.7V
I
C
=1mA
R
E
=0.99
4.70.7
10
3
o=
100
101
0.99
I
C
=o
V
B
0.7
R
E
=

+1
10
3
A
Writing I
C
as a function of :
Assume:
50200
50
51
10
3
=0.980mAI
C
200
201
10
3
=0.995mA
So I
C
is insensitive to changes in !
R
E
4000D
Insensitivity to Beta

10
Voltage Source With Internal Resistance
I
B
I
C
V
B
=I
B
R
B
++1) R
E
I
B
+V
BE
I
B
=
V
B
V
BE
R
B
++1) R
E
I
E
=+1) I
B
I
C
= I
B
=

R
B
++1) R
E
V
B
V
BE
)
I
C
= I
B

+1
V
B
V
BE
)
R
E
=o
V
B
V
BE
)
R
E
If R
B
+1) R
E
I
E
R
C
R
E
R
B
V
B
V
CC
If R
B
+1) R
E
I
C
= I
B

R
B
V
B
V
BE
)
no feedback!
11
Quick Review
What is the purpose R
E
?
What does R
B
represent?
What is the condition on the
value of V
B
?
What is the condition on the
value of R
E
?
What is our rule of thumb for
achieving x >> y?
12
Observations
Emitter feedback stabilizes base voltage source bias.
To reduce the sensitivity of I

C
to V
BE
, choose .
R
B
= 0 is not possible, but can be approximated quite
well if the voltage source resistance is not too large,
i.e.
R
B
+1) R
E
Ideal rule of thumb (if possible):
R
B
1
10
+1) R
E
100
10
R
E
=10 R
E
V
B
V
BE
13
Emitter-Feedback Bias Design
Voltage bias circuit
Single power supply version
R
1
R
2
V
CC
R
C
R
E
I
C
I
E
I
B
V
B
+
-
14
R
Th
=R
B
=R
1
R
2
R
Th
V
Th
V
Th
=V
B
=
R
2
R
1
+R
2
V
CC
<=>
Thevenin Equivalent
15
Thevenin Equivalent
Use Thevenin's theorem to simplify
base circuit:
R
Th
=R
B
=R
1
R
2
=
R
1
R
2
R
1
+R
2
=
R
1
+1
Since we will specify V
CC
, V
B

and R
B
, the inverse is needed
for design:
1
1+
=
V
B
V
CC
=
R
1
R
2
=
V
CC
V
B
1
R
1
=1+) R
B
V
B
=
1
+1
V
CC
Let:
R
2
=
R
1
Design
Eqs.
I
B
0
V
Th
=V
B
=
R
2
R
1
+R
2
V
CC
determine
determine R
1
R
1
R
2
R
1
+R
2
=
R
1
+1
R
2
=
R
1
determine R
2
16
A Rule of Thumb for Single Supply Biasing
1. Choose R
T
= R
1
+ R
2
so that I
1
<< I
C
, i.e.
I
1
is about 1/10 of the desired collector (or
emitter) current (ignoring I
B
):
R
T
=R
1
+R
2
=10
V
CC
I
C
2. Use a voltage divider to give the desired
base voltage V
B
and solve for R
2
:
R
2
=R
T
V
B
V
CC
R
1
=R
T
R
2
=R
T
1
V
B
V
CC
)
I
1
I
1
=
V
CC
R
T
=
I
C
10
V
B
+
-
V
B
=V
CC
R
2
R
T
I
1
=
V
CC
R
1
+R
2
)
=
V
CC
R
T
3. Solve for R
1
:
I
B
0
R
1
R
2
R
C
R
E
V
CC
I
C
4. Calculate R
B
: R
B
=R
1
R
2
Oops! Ignored I
1

in previous slide.
17
I
C
R
1
R
2
R
C
R
E
V
CC
I
E
V
CB
+
-
V
B
+
-
+
-
V
Rc
Three design goals so far
R
B
+1) R
E
V
B
V
BE
Constraint:
V
CC
=V
Rc
+V
CB
+V
B
TRADEOFF
Increase V
B
=> Reduce V
Rc
+ V
CB

V
Rc
too large => potential for saturation to reduce op-
erating range (i.e. v
C
< v
B
).
V
Rc
too small => potential for cutoff to reduce operat-
ing range (i.e. i
C
-> small or zero).
NEED A COMPROMISE!
An Unavoidable Design Tradeoff
I
1
I
C
also
I
1
I
B
18
Another Useful Rule of Thumb
1/3, 1/3, 1/3 Rule
V
B
=
V
CC
3
V
Rc
=I
C
R
C
=
V
CC
3
V
CB
=V
CC
V
Rc
V
B
=
V
CC
3
V
CC
=V
Rc
+V
CB
+V
B
R
C
=
V
Rc
I
C
=
V
CC
3 I
C
R
E
=
V
B
V
BE
)
I
E
=
V
CC
3
0.7V)
I
E
V
CC
R
2
R
1
+R
2
=V
B
=
V
CC
3
Design Equations
where
I
C
R
1
R
2
R
C
R
E
V
CC
I
E
V
CB
+
-
V
B
+
-
+
-
V
Rc
V
B
=V
BE
+I
E
R
E
I
1
R
2
V
BE
=0.7V
V
B
>> V
BE
V
CE
=V
Rc
V
Re
V
CC
3
V
Re
=I
E
R
E
or
I
1
=
V
CC
R
T
=
I
C
10
R
2
=R
T
V
B
V
CC
=
1
3
R
T
R
1
=R
T
1
V
B
V
CC
)=
2
3
R
T
R
T
= R
1
+ R
2
I
1
19
Quick Review
What is the condition on the value of V
B
?
What is the condition on the value of R
E
?
What is the purpose for R
1
& R
2
?
What happened to R
B
?
What is the constraint on the value of I
1
?
What is the 1/3, 1/3, 1/3 Rule?
I
C
R
1
R
2
R
C
R
E
V
CC
I
E
V
CB
+
-
V
B
+
-
+
-
V
Rc
I
1
I
B
20
Constant Emitter Current Bias
The current mirror is used to create a current source:
1. A BJT collector is the cur-
rent source:
I
C
=I
S
e
V
BE
V
T
I
REF
I
2. A diode-connected transistor sets the
current.
3. Choose R
ref
for the desired
current:
R
ref
V
CC
0.7
I
E1

V
CC
0.7
I
C1
V
BE2
=V
BE1
I
O
I
REF
=I
C1
+I
B1
+I
B2
I
C1
I
E1
I
REF
=
V
CC
V
BE1
R
ref
R
ref
V
CC
I
C1
I
B1
I
B2
V
CE1
=V
BE1
4. If Q1 = Q2 then I
C2
= I
C1
=>
I
O
I
ref
matched
21
Constant Emitter Current
If Q
1
and Q
2
have the same saturation current:
Now: V
BE1
= V
BE2
I
S1
=I
S2
And the transistors are at the same temperature: T
1
=T
2
The two collector currents set primarily by R
ref
are
equal, as long as Q2 is not saturated.
I
O
=I
C2
=I
ref
V
CC
0.7
R
ref
V
CE1
V
CE2
, the Early Effect needs to be included in simulations.
22
Constant Emitter Current Early Voltage
I
C2
=I
O
I
B2
I
B1
I
C1
Assume Q1 = Q2
I
O
=I
C2
=I
S
e
V
BE
/ V
T
1+
V
CE2
V
A
)
Early Effect
Since I
B
is not effected by V
A
, i.e.
I
B2
=
I
S
e
V
BE
/V
T
=
I
C2
F
For Q2:
For Q1: I
B1
= I
B2
I
ref
=I
C1
+I
B1
+I
B2
=I
C1
+2 I
B
V
BE2
=V
BE1
=V
CE1
=V
BE
I
ref
=I
S
e
V
BE
/V
T
1+
V
CE1
V
A
)+2
I
S
e
V
BE
V
T
F
=1+
V
CE2
V
A
)
where
I
S
e
V
BE
/ V
T
1+
V
BE
V
A
)+2
I
S
e
V
BE
V
T
=
Solving for I
S
e
V
BE
/ V
T
I
S
e
V
BE
/ V
T
=
I
ref
1+
V
BE
V
T
+
2
I
O
=I
C2
=I
ref
1+
V
CE2
V
A
1+
V
BE
V
A
+
2
(1)
(2)
Sub (2) into (1)
R
ref
I
ref
V
CC
23
Constant Emitter Current Early Voltage Cont.
I
O
=I
C2
=I
ref
1+
V
CE2
V
A
1+
V
BE
V
A
+
2
=>
I
O
I
ref
=
1+
V
CE2
V
A
1+
V
BE
V
A
+
2
Let V
A
= => Early effect is negligible
I
O
I
ref
=
1
1+
2
1
I
O
=I
ref
=>
Let V
A
= nite and V
A
= 50 V, V
BE
= 0.7 V,
=100
I
O
I
ref
= f V
CE2
)=
1+0.02V
CE2
1.034
=0.971+0.02V
CE2
)
If also
=
24
We thus can use a current mirror
to provide stable control of tran-
sistor collector current. R
ref
sets
the emitter and collector currents
and the collector-ground voltage
for Q
amp
.
v
in
is the ac input voltage source.
R
B
can be any reasonable value
this is not voltage biasing!
R
ref
R
ref
R
B
V
B
V
CC
v
in
I
ref
i
E
Q
amp
Q
1
Q
2
i
E
v
in
V
CC
R
B
R
C
BJT Emitter Current Source Bias
R
C
25
Summary
Two practical methods for achieving stable

bias for a BJT are:
Use a voltage source in the base with a feed-

back resistance in the emitter circuit.
Place a current source directly in the emitter cir-

cuit.
26
Emitter-Feedback Bias Design
1. Use single supply for base bias and collector sources.
2. Use the I
C
/10 rule for the current I
1
through the base bias
network (R
1
and R
2
).
3-1. Try less negative feedback using a smaller emitter
resistor R
E
saving more of the V
CC
supply voltage for the
R
C
voltage drop.
or
3-2. Use the 1/3, 1/3, 1/3 Rule.
27
I
1
=
I
C
10
Let's Try Emitter-Feedback 3-1 Bias Design
V
CC
=12V
Complete the bias design given
the following design values:
I
C
=1mA
V
C
=6V
It follows:
R
C
=
V
Rc
I
C
=
V
CC
V
C
I
C
=6 k D
I
1
=
I
C
10
=0.1mAR
1
+R
2
=
V
CC
I
1
=
12
10
4
=120 k D
V
C
=100
R
C
R
E
R
1
R
2
V
CC
V
Rc
=6V
28
Emitter-Feedback 3-1 Bias Design - Continued
Let's choose a small feedback voltage, say
V
Re
= 1 V. Ignoring the base current:
R
E
=
1V
I
C
=1k D
Then the voltage across R
2
is 1.7 V
R
2
=
1.7V
10
4
A
=17k D
R
1
=120k17k=103k D
R
B
=R
1
R
2
14.5k D>
1
10
+1) R
E
10 k D
I
1
= 0.1 mA
I
C
=1mA
R
1
+R
2
=120k D
R
C
R
1
V
CC R
E
R
B
1
10
+1) R
E
Recall:
V
B
=1.7V
R
C
V
CC
29
3-2 (1/3, 1/3, 1/3 Rule) Bias Design
V
Rc
=V
B
=
V
CC
3
=4V
R
C
=
V
Rc
I
C
=
4V
10
3
A
=4k D
R
E
=
4V0.7V
I
C
=3.3k D
Then the voltage across R
2
is V
B
= 4 V
R
2
=
4V
10
4
A
=40 k D
4
Let's choose
R
1
=120k40k=80 k D
R
B
1
10
+1) R
E
Recall:
R
B
=R
1
R
2
26.7k D
1
10
+1) R
E
33k D
30
RECALL: Bias Stability Condition Argument
I
B
I
C V
B
=I
B
R
B
++1) R
E
I
B
+V
BE
I
B
=
V
B
V
BE
R
B
++1) R
E
I
E
=+1) I
B
I
C
=I
B
=

R
B
++1) R
E
V
B
V
BE
)
I
C
= I
B

+1
V
B
V
BE
)
R
E
=o
V
B
V
BE
)
R
E
R
B
+1) R
E
if
R
C
R
E
R
B
V
B
V
CC
31
I
C
= I
B
=

R
B
++1) R
E
V
B
V
BE
)
R
C
R
E
R
B
V
B
R
E
I
C
I
B
V
CC
= 12V
V
B
= 1.7 V
V
BE
= 0.7 V
I
C
= 1 mA
= 100
R
C
= 6k
R
E
= 1 k
R
B
= 14.5 k
= 50; I
C
= 0.775 mA
= 100; I
C
= 0.873 mA
= 200; I
C
= 0.932 mA
= ; I
C
= 1 mA
= 100 & R
B
= 0 ; I
C
= 0.99 mA
Emitter-Feedback 3-1 Sensitivity
32
Emitter-Feedback 3-1 Bias Scilab Simulation
//Rule of thumb BJT bias sensitivity
Beta=100;
VsubT=0.025;
VB=1.7;
Rb=14.5;
BetaPlusRe=101;
vBE=0.0:0.01:1;
iCline=Beta*(VB-vBE)/(Rb+BetaPlusRe);//mA.
plot(vBE,iCline);
iC=0.01:0.01:2; //mA.!
IsubS =1E-16; //mA.
for k= 1:1:8
IsubS=10*IsubS;
vBE2=VsubT*log(iC/IsubS);
plot(vBE2,iC); //Current in mA.
end
Sensitivity to I
S
//3-1 Bias Scheme with Re=1 K
Re=1;
I
C
=

R
B
+ +1) R
E
V
B
V
BE
)
33
Scilab Plot (Zoomed)
I
S
=10
11
I
S
=10
18
AI
C
0.4 mA
34
Compare with Ideal I
C
vs I
S
Results Plot
I
S
=10
11
I
S
=10
18
AI
C
0.1 mA
R
B
0
or
R
B
+1) R
E
35
Conclusion
1/3, 1/3, 1/3 Rule Provides a Good Compromise Base
Voltage Bias Scheme

BJT DC Biasing

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BJT DC Biasing

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ESE319 Introduction to Microelectronics

Biasing for DC Operating Point Stability

BJT Bias Using Emitter Negative Feedback

Single Supply BJT Bias Scheme

Constant Current BJT Bias Scheme

Rule of Thumb BJT Bias Design

Negative feedback makes the collector current insensitive to V

The equations that must be satisfied simultaneously are:

ESE319 Introduction to Microelectronics

Emitter feedback stabilizes base voltage source bias.

To reduce the sensitivity of I

Two practical methods for achieving stable

Use a voltage source in the base with a feed-

Place a current source directly in the emitter cir-

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