VOL. 6, NO. 1, JAN.-FEB.

1982
AIAA 80-9082R

J. ENERGY

49

Application of a Microprocessor for Aircraft Electrical Generator Control and Protection

Patrick J. Leong,* Ishaque S. Mehdi,t and Teddy R. ThomasJ Boeing Military Airplane Company, Seattle, Wash.
This paper describes the development of a microprocessor generator control unit (GCU) used for the protection and control of an aircraft electrical generator system. The objective of this program is to replace the discrete semiconductor analog logic circuitry of present GCUs with a microcomputer built around the Zilog Z80 microprocessor. The design architecture is based on the use of an internal data bus for handling information transfer between the CPU and the buffer circuits which condition the external signals of the GCU. A modular approach has been used in the software development. A subroutine has been developed for each of the protective and control functions of the GCU. The overall program control is handled by an executive program.

Introduction

HE greater use of electronics for mission aircraft avionics, and with power-by-wire on the horizon, has increased the importance of having a reliable and faulttolerant electrical system. A key factor to achieving such systems is the implementation of power system control units such as the generator control unit (GCU) with microprocessors. This will facilitate the transmission of information into and out of these units by a data bus. Information transfer is essential to the implementation of a fault-tolerant electrical system with automatic load shedding, automatic bus switching, and the capability to be easily programmed for specific mission scenarios. A stable faultrecovery strategy requires extensive coordination among the affected control units. As a first step to achieving an advanced system, this project to replace the discrete logic in an aircraft GCU with a microcomputer built around the Zilog Z80 microprocessor was initiated.

System Configuration and Operation

A one-line diagram of the electrical generation channel and the GCU connections is shown in Fig. 1. The various components provide both analog and 28 V dc discrete logic outputs to the GCU. Some of the components also require discrete inputs from the GCU. Table 1 summarizes the inputs and outputs of each component in relation to the GCU. As can be seen from Fig. 1, a good deal of signal conditioning is required to interface the CPU in the GCU to the electrical system. A 12 bit analog-to-digital (A/D) converter processes the analog signals and 8 bit counters are used to obtain frequency data. Many of the signals are already in discrete form, 28 V dc. These signals are conditioned to 5 V dc levels to be compatible with the microprocessor hardware. The basic functions of the GCU are to provide excitation, control, and protection for an electrical generation channel. The primary function of the GCU is that of voltage regulation. During parallel operation, the voltage regulator will automatically adjust the excitation of the generator to insure that the reactive portion of the load current is divided equally among all of the generators in the parallel system.
Presented as Paper 80-9082 at the 15th Intersociety Energy Conversion Engineering Conference, Seattle, Wash., Aug. 18-22, 1980; submitted Oct. 23, 1980; revision received Sept, 24, 1981. Copyright American Institute of Aeronautics and Astronautics, Inc., 1980., All rights reserved. * Specialist Engineer, Mechanical/Electrical Systems Technology, Advanced Airplane Branch. tSenior Engineering Supervisor, Mechanical/Electrical Systems Technology, Advanced Airplane Branch. ^Senior Specialist Engineer, Mechanical/Electrical Systems Technology, Advanced Airplane Branch.

Another function of the GCU is to provide proper control and coordination for the various contactors and relays in the system. Such control is provided for the generator control relay (GCR) a latching-type relay in the GCU that opens and closes the generator field circuit; the generator circuit breaker (GCB), which connects a generator to its bus; and the bus tie breaker (BTB) which connects the main generator bus to the synchronizing bus. A very important function of the GCU is to protect the generator system in the event of system faults and to protect the load equipment connected to the system from "out-of-limits" electrical power quality. The calibration and operating time delays of the various protective circuits are such as to selectively isolate any fault with a minimum reduction of generating capacity and a minimum interruption of power to the airplane load buses. The GCU; protective functions and their associated time delays are listed in Table 2. All control and protection functions are designed to allow automatic operation of the electrical system with minimum crew action. Crew interaction is provided through several switches. In designing the GCU, all paralleling functions were deleted. Initially the GCU will operate only with a single isolated generator system. The paralleling functions will be added in the next generation of the GCU. The voltage regulation function will not be included as a function of the CPU. It will be done with the addition of a pulse-width modulated integrated circuit regulator. It was decided that voltage regulation would be handled with hardware instead of software because the algorithms involved in voltage regulation required enough CPU time to necessitate the addition of another processor. At the time of the initiation of the program, it was decided to use only one processor. Software voltage regulation will be included in the next generation of the microprocessor GCU.

Microprocessor GCU Hardware

The GCU is built around a Zilog Z80 eight-bit microprocessor. This processor was chosen primarily for its interface simplicity and large instruction set. Memory and input/output functions are provided by a number of peripheral circuit chips interfacing directly to the parallel address, control, and data buses of the Z80 CPU. Memory includes 4096 bytes of EPROM (erasable programmable read only memory) and 16,384 bytes of RAM (random access memory). Parallel input/ouput data is interfaced through four Z80-PIO chips, each having two programmable eight-bit ports, while timing is controlled by a Z80-CTC countertimer chip. Analog voltage inputs are interfaced through a 12-bit A/D converter with 32 multiplexed analog inputs.