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A Novel Suppressed-Link Rectifier-Inverter Topology With Near Unity Power Factor

A. I. Maswood, Senior Member, IEEE, A. Kadir Yusop, and M. Azizur Rahman, Fellow, IEEE
AbstractThis work describes a novel method in improving the input current total harmonic distortion (THD) as well as the power factor of a three-phase suppressed-link rectifier-inverter circuit. This proposed method makes use of only three bi-directional low power static switches with a relatively simple gating circuit. This paper illustrates how the proposed method is superior in reducing the input current THD of a rectifier-inverter set to about 5%, which is in line with the requirements of IEEE standard 5191992. This is accomplished without the use of any filter or complex wave shaping techniques. A delta-modulated (DM) voltage source inverter (VSI) with proportional integrator forms the output stage of the converter. It helps to provide constant volts per hertz operation without the need for additional feedback circuitry and complexity. Moreover, this novel DM technique also helps to provide a smooth transition from the pulse width modulation (PWM) to square wave, hence allowing full utilization of the dc bus voltage. Index TermsDelta modulation, three-phase rectifier, total harmonic distortion (THD), voltage source inverter (VSI).

Fig. 1.

Proposed improved high-power-factor three-phase front-end rectifier.

I. INTRODUCTION N this work, the method of improving the input current total harmonic distortion (THD) and power factor of the front-end rectifier relies on only three bi-directional static switches as shown in Fig. 1. These switches are gated on during a given overlapping duration of the input line voltages. This method includes features like low cost, small size, high-efficiency, and simplicity [1]. The delta modulation (DM) technique with proportional integrator is used for the control of the output stage of the voltage source inverter (VSI) to provide constant volts per hertz operation for ac motor drives without feedback complexity. The novelty of this proposed work is the incorporation of a simple power factor (PF) correction circuit into a complex rectifier inverter structure. It also aims to explore the effect of inverter generated frequency harmonics on the PF corrector, and inverter output voltage boosting capability over a wide power range. II. FRONT-END RECTIFIER ANALYSIS PRINCIPLE OF OPERATION
AND

Fig. 2. Implementation of bi-directional switch ( : active during positive input voltage, active during negative input voltage, : MOSFET switch).

D0

D+

With reference to Fig. 1, , and represents the voltage and are input sources of the three-phase ac system. as load, and inductors (additional to source inductances),
Manuscript received April 13, 2000; revised May 5, 2002. Recommended by Associate Editor L. Xu. A. I. Maswood and A. K. Yusop are with the Power Electronics and Drives Laboratory, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798 (e-mail: eamaswood@ntu.edu.sg). M. A. Rahman is with the Memorial University of Newfoundland, St. Johns, NF, Canada. Publisher Item Identifier 10.1109/TPEL.2002.802172.

through are line-frequency rectifier diodes. Capacitors and help to provide a balanced central node between the positive and negative output terminals. The assembly of and using four diodes and a low-power MOSFET to form a bi-directional switch is illustrated in Fig. 2. Although the power circuit is similar to the high-frequency pulse width modulation (PWM) rectifier presented in [5], the switches operate at low frequency and the gating circuit used is relatively simple. This concept was initiated by Mehl and Barbi in [4] and was meant for only a simple diode rectifier operating at a fixed load and fixed optimal input inductor. Pejovic [11] further enhanced this concept through current injection networks and illustrated the effect of high-order harmonics. The gating scheme used for the three bi-directional switches is depicted in Fig. 3. It also presents the conduction sequences and . The conduction periods of the lower of diodes and , i.e., diodes in similar arms with that of and will be phase shifted by an angle of 180 , respectively, from their upper counterparts. A delay of approximately 30 relative to the line voltage can be seen in the line current of a conventional three-phase diode rectifier. Because of the 120 cur-

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Fig. 4. Equivalent circuit for the traditional two-diode conduction stage.

Fig. 3. Gating scheme and conduction sequences for bi-directional switches and diodes.

Fig. 5.

Equivalent circuit during 30 to 60 interval of the proposed method.

rent pulse width, the overall power factor is low and the input current THD is high [2], [3], [12]. Using the gating scheme and are turned on during a specific shown in Fig. 3, duration of the respective input voltages as shown by gating sigthrough . This provides an alternative path for the nals input current to flow. The gate pulses are generated at every zero crossing instances of the respective phase voltages. It is found that a gate pulse with a duration of 1/12 of the voltage period results in a remarkable improvement of the input current THD and power factor. Due to the low frequency nature of the switching patterns, power losses are reduced and low-cost devices can be used. Moreover, the construction of the input inductors is simple because they can be assembled using ordinary core materials. This results in a significant reduction in cost. The rectifier structure shown in Fig. 1 uses a star-connected three-phase switch network with the star point of the switches connected to the centre-tap of the output dc link capacitors, and is suitable for high-power applications [4], [6]. In a three-phase rectifier only two diodes conduct at any given time. As a result, the current in the third phase is zero. However, in this approach, the switch connecting to the third phase is turned on during that particular duration. Hence, the input current rises and is governed by (1) Equation (1) can be used to construct a simple equivalent circuit as shown in Fig. 4, for the two-diode conduction stage. During this interval, the phase currents follow (2) Equation (2) can be solved by using Laplace transform. The solution yields a set of equations, which describe the line currents as a function of the load voltage [1]. For example, (3) describes the phase A input current. The same approach can be used to determine the currents in phases B and C when all the switches are off. With these equations, an equivalent circuit shown in Fig. 5 for the 30 to 60 interval can be constructed. The two voltage

Fig. 6.

General equivalent circuit for the purpose of analysis.

sources shown in Fig. 5 resemble the dc capacitor and of Fig. 1 and the voltage across

(3) Figs. 4 and 5 can be used to construct [1] the general equivalent circuit as shown in Fig. 6. There exists a particular value of inductance that is termed as the critical inductance of the circuit. During the 180 and 360 intervals, the critical inductance will cause to reach zero together with the zero crossing instances of . The output voltage of the converter can be calculated with (4) by assuming that (3) is zero when (4) Assuming that the input current supplies the load during the 90 to 120 interval, the critical inductance can be determined by using

(5)

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Taking phase A as reference, the peak current through each into (1), since switch can be calculated by substituting the switch connected to phase A is turned on during the 0 30 and 180 210 intervals. Hence, (6) can be used to calculate the switch peak current (6) Since the switch is off during the 30 180 and 210 360 intervals, the switch rms and average currents are given in (7) and (8), respectively (7) (8) When the switches are off, the voltage across them is less than half of the load voltage, hence eliminating any undue voltage stress. III. REAR-END DELTA MODULATED VOLTAGE SOURCE INVERTER A DM VSI is placed across the output of the front-end rectifier to study the improvement in the rectifier input current THD and power factor. Delta modulation technique offers several advantages. First of all, DM inherently gives constant volts per hertz operation as seen in Fig. 7 without the need for any feedback [7]. Hence, the rear-end inverter is more stable as far as constant volts per hertz control is concerned. Moreover, without feedback requirements, the VSI with DM is cheaper, simpler, faster in response and is easier to build. Secondly, DM technique guarantees a minimum value of the on and off time of the inverter switches [8], thus eliminating the possibility of a dc bus short-circuit during commutation failure. In this paper, the delta-modulation with proportional integral (DMPI) technique is used in the rear-end inverter. The circuit schematic of the DMPI is shown in Fig. 8. With reference to Fig. 8, U4 forms the input differential amplifier of the DMPI. U4 compares the signal from the integrator feedback path to the input reference signal and generates an error signal that is injected into the hysteresis comparator, which consists of U5, R5, and R6. Collectively, U1, U2, and U3 form the DMPI feedback path, which has the transfer function as presented in [9] Transfer function of DMPI feedback path (9)
Fig. 7. Variation of normalized fundamental DM output voltage for different integrator feedback gain.

Fig. 8. Schematic diagram of the delta modulator using DMPI technique.

path. It can be seen that there exists an optimal value of that will give the best improvement in the normalized fundamental output voltage. Since a gain of 100 gives the highest normalized fundamental voltage boost, this value will be used throughout this work. Fig. 7 also illustrates the constant volts per hertz characteristic of the delta modulated VSI without the need for any feedback. The complete diagram of the proposed prototype with front end unity PF rectifier and rear-end suppressed dc-link DMPI inverter set is shown in Fig. 9 [9]. IV. DESIGN EXAMPLE AND IMPLEMENTATION For the purpose of illustrating the design procedure, a converter with the following specifications is chosen: 1) Input AC line voltage 220 V; 2) Line frequency 50 Hz; 3) Output power 1.5 kW. Equation (5) is used to evaluate the critical inductance of and at the rectifier input side

With reference to (9), is the time constant of the feedback integrator, which consists of U2, R7, and C1. U1 forms the inverting amplifier with a gain of . The output of the hysteresis comparator is then injected into an interlocking circuit to generate the gating signals for the top and bottom switches of the delta modulated VSI. One of the advantages of using DMPI is its ability to boost the inverter output voltage, especially at low output frequency [8]. The value of the integrator feedback gain is varied to determine an optimal value that will give the best increase in the normalized fundamental output voltage of the delta modulated VSI. The ability of the integrator gain to boost the normalized fundamental voltage is illustrated in Fig. 7. is the overall gain of the integrator feedback In this case,

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Fig. 9. Complete schematic of the proposed suppressed-link rectifier-inverter structure with DMPI.

Fig. 10. Input current and phase voltage of front-end rectifier with bidirectional switches.

Fig. 11. Input current and phase voltage of front-end rectifier without bidirectional switches.

For a nominal output power of 1.5 kW, the dc output voltage of the front-end rectifier can be determined by using (4) as follows:

of the input current before and after the proposed technique is shown in Figs. 12 and 13, respectively. The input current to the induction motor as well as its spectral composition are shown in Figs. 19 and 20, respectively. The input power factor is defined as [4], [10] Input power factor where magnitude of the fundamental component of the rectifier input current; rms value of the rectifier input current; phase difference between the input current and voltage. THD of input current in percentage [2] % where magnitude of the fundamental component of the rectifier input current; (11) (10)

V As for the DM VSI, the values of the various parameters of the DMPI modulator are selected from reference [8] with an aim to boost the VSI output voltage and reduction of low-order harmonics. The chosen parameters are based on a selected base frequency of approximately 100 Hz. The base frequency is chosen characteristic. The following such that DM retains constant values are selected for the experimental DMPI: 1) hysteresis gap 5%; 2) integrator time constant 4.624 ms; 3) Gain of integrator feedback path 100. PSPICE circuit simulator is used to initially realize the proposed circuit shown in Fig. 9. The phase A input current and input are shown in Fig. 10. The same waveforms before voltage improvement are shown in Fig. 11. The spectral composition

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Fig. 15. Fig. 12. Spectral composition of rectifier input current without the bidirectional switches.

Rectifier input power factor with variations in inverter output power.

Fig. 16.

Relationship between input power factor and input inductance.

Fig. 13. Spectral composition of rectifier input current with the bi-directional switches.

Fig. 17.

Output phase voltage of DM VSI.

Fig. 14.

Rectifier input current THD with variations in inverter output power.

magnitude of the th harmonic order of the rectifier input current. The power factor and input current THD of the front-end rectifier are calculated by using (10) and (11), respectively, with and without the improvement scheme. Before improvement, the THD of the rectifier input current was found to be 76.61%, and

the input power factor was 0.59. After the improvement, the input current THD is 5.4%, and the input power factor is 0.98. This results in a 66% improvement in power factor and a 93% improvement in the input current THD. MOSFETs are used to construct the bi-directional switches for the front-end rectifier, because the power requirement of these switches is just a small fraction of the rectifier throughout converter operation. A commercial MOSFET IRF740 is used. Despite the high-rated power of the rectifier-inverter structure, the rms value of the MOSFET drain current is only 0.556 A. The maximum voltage across the bi-directional switch is about 150 V, which is approximately half of the rectifier output voltage. This means that low-power devices can be used to

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Fig. 18.

Spectral composition of DM VSI output phase voltage.

input power factor. It has been found that the capacitances of the output dc link capacitors have negligible effect on the performance of the rectifier, this is because the capacitors are only used to provide a balance dc central node for the power factor correction scheme to work. This simply means that the value of the capacitance is irrelevant in the selection requirement. In fact, the capacitors should be chosen based on their ripple current specifications. The relationship between the input power factor and the load current can easily be seen from Fig. 15. This is because the converter output power is directly proportional to the rms value of its load current. Figs. 14 and 15 reveal that a relatively good input current THD and power factor can be achieved within a given range of the inverter operating interval. The input current THD is about 5% for an output power of 1.52.5 kW. The input power factor was above 0.8, from 500 W to 2 kW range. These results show that the proposed PF improvement scheme is still quite effective even with a large 30% variation in output power. It can also be noticed that both the power factor and THD deteriorate at the low-inverter output power region. This is because the critical inductance is calculated based on the nominal load condition of 1.5 kW. The reason for the low dependence of the critical inductance on the rectifier output power can be esprevents large timated from (5). The constant variation in due to fluctuations in . The output phase voltage of the DM VSI in both the time and frequency domains are shown in Figs. 17 and 18, respectively.

Fig. 19.

Load current of rectifier-inverter structure with DMPI.

V. EXPERIMENTAL RESULTS A prototype of the rectifier-inverter structure depicted as in Fig. 9 was constructed, and its performance while delivering an output power of 1.5 kW was observed. A 1.5 kW three-phase squirrel cage induction motor is employed as load. The hardware prototype is shown in Fig. 21. The rectifier input current and voltage waveforms before and after improvement are shown in Figs. 22 and 23, respectively. Fluke-43 spectrum analyzer with online numerical value illustration was used to monitor the waveforms. The input PF is shown online at the upper right-hand side of Figs. 22 and 23. Prior to improvement, the input current THD and power factor was 79% and 0.60, respectively. The improvement scheme was able to improve the input current THD to 7.1% and the input power factor to 0.99. This translates into a 92% improvement in input current THD and a 61% improvement in power factor. The experimental results agree with the SIPCE predicted ones calculated based on the waveforms in Figs. 1013 and by using (10) and (11). Figs. 24 and 25 show the experimental input current FFT spectra for a commercial and the proposed converters, respectively. The current and drain-source voltage through the bi-directional MOSFETs are shown in Fig. 26. Notice that there were no voltage overshoots during the onoff transition. This allows the MOSFETs to be used without snubber circuits. Hence, these converters are cheaper, simpler and easier to build. The output phase voltage of the DM VSI, as well as the dc-link voltage are shown in Fig. 27. The motor input current is shown in Fig. 28.

Fig. 20. Spectral composition of load current or input current to the induction motor with DMPI.

realize these switches, resulting in a significant reduction in cost. The rectifier input current THD and power factor are then calculated over the entire operating range of the proposed rectifier inverter structure. This is obtained through the variation of one parameter only, i.e., DM reference input signal frequency as per Fig. 8. The results are shown in Figs. 14 and 15, respectively. The relationship between the input power factor and the input is also obtained as shown in Fig. 16. Noline inductance tice that a relatively good input power factor (above 0.8) can still from 10 to 40 mH, be obtained even with large variations of from its rated value of 24.84 mH. Hence, precision control is not required for the input inductance in order to obtain a good

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Fig. 21.

Top view of the hardware prototype without the motor load.

Fig. 22. Input voltage and input current of the commercial converter (experimental), (PF = 0:6).

Fig. 24. Input current fast-Fourier transform (FFT) of the commercial converter (experimental).

Fig. 23. Input voltage and input current of the proposed prototype (experimental), (PF = 0:99).

Fig. 25.

Input current FFT of the proposed prototype (experimental).

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Fig. 26. Switch current and MOSFET drain-source voltage (experimental), voltage scale: 60 V/div, current scale: 2 A/div, time scale: 5 ms/div.

1) Due to the low-frequency operation of the front-end bi-directional MOSFET switches, the gating circuit is simple, and more reliable. The low-frequency operation provides low switching losses. 2) The MOSFET based bi-directional switches conduct only a small fraction of the total cycle (to provide bypass only), yielding a negligible switch kVA rating. 3) Improvement in the input current THD (about 5%) and power factor (about .98) can be achieved over an extended inverter operating range, giving flexibility in operation. 4) Exact dc bus capacitance is irrelevant for proper converter operation. This is different from most power factor correction schemes, which operates on the principle of resonance. A free choice of capacitance reduces implementation cost and simplifies the design process. 5) Absence of series inductor at the dc link ensures fast converter response to any unexpected load changes. 6) The incorporation of the PI into the DM VSI has boosted the fundamental component of the inverter output voltage significantly (about 15%) as compared to the major commercial inverters. With these excellent rectifier power factor and inverter output voltage boosting capabilities, the proposed converter will be an excellent energy saver in a clean power environment. REFERENCES
[1] E. L. M. Mehl and I. Barbi, An improved high-power factor and low-cost three-phase rectifier, IEEE Trans. Indust. Applicat., vol. 33, pp. 485492, Mar./Apr. 1997. [2] S. Kim, P. Enjeti, D. Rendusara, and I. J. Pitel, A new method to improve THD and reduce harmonics generated by a three phase diode rectifier type utility interface, IEEE Trans. Indust. Applicat., vol. 30, pp. 15571564, Nov./Dec. 1994. [3] J. Salmon, E. Nowicki, W. Xu, and D. Koval, Low distortion three-phase rectifiers utilizing harmonic correction circuit topologies with both IGBT and thyristor switches, in Proc. IEEE APEC98. Conf., vol. 2, 1998, pp. 11001106. [4] S. Kim, P. Enjeti, P. Packebush, and I. Pitel, A new approach to improve power factor and reduce harmonics in a three phase diode rectifier type utility interface, IEEE Trans. Indust. Applicat., vol. 30, pp. 15571564, Nov./Dec. 1994. [5] J. W. Kolar and F. C. Zach, A novel three-phase, three-switch, three level unity power factor PWM rectifier, in Proc 28th PCIM Conf., Nurnberg, Germany, 1994. [6] J. C. Salmon, T. Tang, and E. Nowicki, Operation, control and performance of a family of high-power unity power factor rectifiers, in Proc. Elec. Comput. Eng. Conf., vol. 2, 1995, pp. 854857. [7] C. F. Christiansen, M. I. Valla, and C. H. Rivetta, A synchronization technique for static delta-modulated PWM inverters, IEEE Trans. Indust. Applicat., vol. 35, pp. 502507, Nov. 1998. [8] A. I. Maswood, Delta modulation technique with PI controller for voltage source inverterA superior alternative, in Proc. IPEC-99, vol. 2, Singapore, May 1999, pp. 555559. [9] M. A. Rahman, J. E. Quaicoe, and M. A. Choudhury, Performance analysis of delta-modulated inverters, IEEE Trans. Power Electron., vol. PE-2, pp. 227233, July 1987. [10] A. I. Maswood, P. D. Ziogas, and G. Joos, Problems and solutions associated with the operation of phase-controlled rectifiers under unbalanced input voltage conditions, IEEE Trans. Indust. Applicat., vol. 27, pp. 765772, July/Aug. 1991. [11] P. Pejovic, Two three-phase high-power factor rectifiers that apply the third harmonic current injection and passive resistance emulation, IEEE Trans. Power Electron., vol. 15, pp. 12281240, Nov. 2000. [12] S. Kim, P. Enjeti, and D. Rendusara, A new method to improve THD and reduce harmonics generated by 3P diode rectifier type utility interface, in Proc. IAS Annu. Meeting, Denver, CO, Oct. 1994, pp. 10711077.

Fig. 27. DM VSI output phase voltage and dc link voltage (experimental), voltage scale: 100 V/div, time scale: 5 ms/div.

Fig. 28. Induction motor input current (experimental), current scale: 10 A/div, time scale: 5 ms/div.

VI. CONCLUSION A power factor and input current THD improvement scheme for a suppressed-link delta modulated rectifier-inverter structure has been suggested in this paper and is verified to be functional over an extended operating range. A prototype of the converter has also been designed, built, and tested. The converter incorporates the following.

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A. I. Maswood (SM96) received the B.Eng. and M.Eng. degrees (with first class honors) from the Moscow Power Engineering Institute, Moscow, Russia, and the Ph.D. degree from Concordia University, Montreal, QC, Canada. Having taught in Dawson College and Concordia University, Montreal, QC, Canada, for a number of years, he joined Nanyang Technological University, Singapore, in 1991, where he is an Associate Professor. He has authored several international journal and conference publications. He is the chapter-author of Power Electronics, Handbook (San Diego, CA: Academic, 2002). His work in FROSIN switch mode power supply gave rise to several patents. His research interest is in power electronics, particularly in converter generated harmonics, novel inverter topology, advanced PWM switching, and power quality. Dr. Maswood is a member of the IAS/PELS Chapter and the Steering Committee of the IEEE Power Electronics and Drives (PEDS) Conference.

A. Kadir Yusop received the B.Eng. and M.Eng. degrees from Nanyang Technological University, Singapore. His paper A Simple Starting Method for IPMSM using a Delta-Modulated VSI was published in the Electric Machines and Power Systems Journal. His research interest is in the field of power factor correction for high-power converters, methods of harmonic suppression in three-phase static converters, and delta modulation.

M. Azizur Rahman (F88) received the B.Sc.Eng. degree from the Bangladesh University of Engineering and Technology (BUET), Dhaka, in 1962, the M.A.Sc. degree from the University of Toronto, Toronto, ON, Canada, in 1965, and the Ph.D. degree from Carleton University, Ottawa, ON, Canada, in 1968. In 1962, he joined the Department of Electrical Engineering, BUET, as a Lecturer. He was promoted to Assistant Professor in 1999, Associate Professor in 1972, and Professor in 1975. He was a Visiting Research Fellow at the Technische Hogeschool Eindhoven, the Netherlands, in 1973 and 1975, a Nuffield Fellow at the Imperial College, London, U.K., from 1974 to 1975, and a Visiting Fellow at the University of Toronto, in 1975 and 1984 to 1985. From 1975 to 1976, he was with Teshmont Consultants, Winnipeg, and University of Manitoba. In September 1976, he joined the Memorial University of Newfoundland, St. Johns, where he currently holds the rank of Professor of Engineering and University Research Professor. He has worked as Resident Consultant to many companies including the General Electric Company, Schenectady, NY, and Peterborough, ON, and the Newfoundland and Labrador Hydro. He has 40 years of teaching and research experiences at the Universities including ten years of full-time concurrent industrial/utility/consulting experiences. He has held Visiting Professorships at the Nanyang Technological University (1991 to 1992 and 1999 to 2000), Tokyo Institute of Technology (1992), and Science University of Tokyo (1999). He has published over 450 papers including ten patents. Dr. Rahman received numerous IEEE and Non-IEEE awards over the years. He is a Fellow of the Institute of Electrical Engineers, U.K., a Life Fellow of the Institution of Engineers, Bangladesh, and a Fellow of the Engineering Institute of Canada. He is a Registered Professional Engineer in Ontario and Newfoundland.