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Contents
1.1 Background, Overview (Computer
Generations)
1.8 Supercomputers
Background, Overview
A summary of Computer Generations and
Historical Information on the
Developments are given below. (detail is on
‘computer_generation’ file)
- I/O mechanism,
- Control signals,
• Control (signals)
Levels of Machines:
There is a concept of levels in computer
architecture. The basic idea is that there are
many levels at which a computer can be
considered, from the highest level, where the
user is running programs, to the lowest level,
consisting of transistors and wires.
Upward Compatible:
The Motherboard
The five von Neumann components are
visible in this example motherboard, in the
context of the system bus model.
Super Computers:
Fastest and most expensive modern
computers designed for high precision
based applications. Used in research and
intensive mathematical calculations.
The CPU with the system bus indicating its connection to the rest of system
is shown as:
The CPU with the System BUS Internal Structure of the CPU
CPU consists of:
I/O Devices: The processor reads or sends data from an I/O device.
• ALU
• Performs the actual computation or processing of data by
arithmetic & logic operations.
• Only operates on data in the internal CPU memory.
• Flag settings
• Arithmetic operation like Addition, Subtraction, Multiplication,
Division.
• Logic function like AND, OR, etc.
• Registers
• It is an internal CPU memory, fast & most expensive.
• Used for temporary storage of results & control information. It
also contains a level of memory above main memory i.e. cache
memory.
Function of Memory
It is used for data/program storage. Each location has address.
Communication between CPU & main memory is via MAR, MBR and R/W
control lines. Consider a simple memory, the operation of a Memory
Read/Write cell and the memory interface with the processor.
Memory Read: Causes data from the addressed location to be placed on the
bus. Its steps are: Get address in MAR, Read Control line activated, which
places the content of desired location in MBR
Memory Write: Causes data on the bus to be written into the addressed
location. Its steps are: Place the word in MBR, Place the address in MAR
(where to be written), Activate write control line, this causes the contents of
MBR is to transferred into the memory location specified by MAR
I/O Devices:
Input Device : Which accepts outside information
Output Device : Communicate to outside device.
Touch screen I/O device is:
What is an Opera
problems easier.
Make the computer sys
Computer Startup
known as firmware
Initializates all aspect
Computer System
Loads operating syste
Computer-system operatio
Program Developmen
One or more CPUs, devi
Compiling
common bus
Linking
providing
Concurrent execution o
Loading
for memory cycles
Executing / Debugging
Umer Khan u.k_007@yahoo.com
Information Technology (MBA-1) Any Quiry..03225035335
Computer-System
Storage Structure