Diseñar un codificador BCD activo en alto tanto en salidas como entradas

 Tablas de verdad

Entradas Salidas
A B C D a b c d e f G
0 0 0 0 1 1 1 1 1 1 0
0 0 0 1 0 1 1 0 0 0 0
0 0 1 0 1 1 0 1 1 0 1
0 0 1 1 1 1 1 1 0 0 1
0 1 0 0 0 1 1 0 0 1 1
0 1 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 1 1 1 1 1
0 1 1 1 1 1 1 0 0 0 0
1 0 0 0 1 1 1 1 1 1 1
1 0 0 1 1 1 1 1 0 1 1
1 0 1 0 X x X X X X X
1 0 1 1 X X X X X X X
1 1 0 0 X X X X X X X
1 1 0 1 X X X X X X X
1 1 1 0 X X X X X X X
1 1 1 1 x X X X X X X

 Mapas de Karnaugh
a

AB/CD 00 01 11 10
00 1 0 1 1
01 0 1 1 1
11 X X X X
10 1 1 X X

AB/CD 00 01 11 10
00 1 1 1 1
01 1 0 1 0
11 X X X X
10 1 1 X X

AB/CD 00 01 11 10
00 1 1 1 0
01 1 1 1 1
11 X X X X
10 1 1 X X

d
 AB/CD 00 01 11 10
00 1 0 1 1
01 0 1 0 1
11 X X X X
10 1 1 X X

AB/CD 00 01 11 10
00 1 0 0 1
01 0 0 0 1
11 X X X X
10 1 0 X X

AB/CD 00 01 11 10
00 0 0 0
01 1 1 0 1
11 X X X X
10 1 1 X X

AB/CD 00 01 11 10
00 0 1 1 1
01 1 1 0 1
11 X X X X
10 1 1 X X

 Ecuaciones booleanas

a= C+A+B’D’+BD
b= B’+C’D’+CD
c= C’+D+B
d= A+B’D’+B’C+CD’+BC’D
e= B’D’+CD’
f= A+C’D’+BC’+BD’
g= A+B’C+CD’+BC’

 Simulación