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What is E1

line?
In telecommunications, where a single physical wire can be used to carry many simultaneous voice
conversations, worldwide standards have been created and deployed. E-carrier system, which is revised
and improved version of the earlier American T-carrier technology.
Now it is widely used in almost all countries outside USA, Canada and Japan. The line data rate for E1
is 2.048 Mbit/s (full duplex) which is split into 32 time slots, each being allocated 8 bits in turn. It is a ideal
for voice traffic because voice is sampled at the same 8khz rate so E1 line can carry 32 simultaneous
voice conversions.

Synchronous Digital Hierarchy (SDH)

Introduction

The Transmission System is traditionally seen as the link between main WAN switching
centres. These Transmission Systems consist of large bandwidth highways that form the
backbone to the network. They typically serve many customers each with their own requirements
so the systems have to be reliable, resilient and flexible.

Rather than have two wires for every voice or data conversation, Time Division Multiplexing is
used. ITU-T G.704 defines 32 channels of 64Kb/s to form 2.048Mb/s where channel 0 is used for
framing. You will often see the standard G.703 mentioned with G.704, this is because G.703
defines the unframed physical interface coaxial (75 ohm) or RJ48 (120 ohm) used for the E1/T1
connection at the client premises. Channel 0 is for timing used to synchronise the multiplexers at
each end of the link. Channels 1 to 15 and 17 to 31 are for voice or data whilst channel 16 is used
for Common Channel Signalling (CCS) or Channel Associated Signalling (CAS). Every 3.91
microseconds 8 bits from one channel is sent down the line followed by 8 bits from the next
channel during the next 3.91 microseconds and so on in a round robin fashion throughout all the
channels, thus 32 channels are used once every 125 microseconds.

The connection at the end is either a 75 ohm coax, 120 ohm coax or a 150 ohm UTP/STP.

Plesiochronous Digital Hierarchy (PDH)

As bandwidth demand grew the technology called Plesiochronous Digital Hierarchy (PDH) was
developed by ITU-T G.702, whereby the basic primary multiplexer 2.048Mb/s trunks were joined
together by adding bits (bit stuffing) which synchronised the trunks at each level of the PDH.
2.048Mb/s was called E1and the hierarchy is based on multiples of 4 E1s.

• E2, 4 x E1 - 8Mb/s
• E3, 4 x E2 - 34Mb/s

• E4, 4 x E3 - 140Mb/s

• E5, 4 x E4 - 565Mb/s

The E3 tributaries are faster than the E2 tributaries, E2 tributaries are faster than the E1
tributaries and so on. These need to be synchronised with other tributaries, so extra bits are
added called Justification bits. These tell the multiplexers which bits are data and which are
spare. Multiplexers on the same level of the hierarchy remove the spare bits and are
synchronised with each other at that level only. Multiplexers on one level operate on a different
timing from multiplxers on another level. For instance, the timing between Primary Rate Muxes
(combines 30 x 64Kb/s channels into 2.048Mb/s E1) will be different from the timing between
8Mbit muxes (combines up to 4 x 2Mb/s into 8Mb/s).

Inserting and dropping out traffic from different customers can only happen at the level at which
the customer is receiving the traffic. This means that if a 140Mb/s fibre is near a particular site
and a new customer requires a 2Mb/s link, then a whole set of demultiplexers are required to do
this.

Synchronous Digital Hierarchy (SDH)


Management is very inflexible in PDH, so SDH was developed. Synchronous Digital Hierarchy
(SDH) originates from Synchronous Optical Network (SONET) in the US. It includes capabilities
for bandwidth on demand and is also made up of multiples of E1. STM-1 (155Mb/s) is 63 x
E1, STM-4 (622Mb/s) is 4 x STM-1 and STM-16 (2.5Gb/s) is 4 x STM-4.

The benefits of SDH are:

• Different interfaces or different bandwidths can connect (G708, G781).

• Network topologies are more flexible.

• There is flexibility for growth.

• The optical interface is standard (G957).

• Network Management is easier to perform (G774 and G784).

Existing PDH can interface into SDH. There are three G transmission series recommendations
that are very important:

• G.707 - SDH Bit Rates

• G.708 - The SDH Network Node Interface.

• G.709 - Synchronous Multiplexing structure.


With the exception of 8Mb/s, different PDH outputs are 'mapped' into Containers (C) and then
into fixed size Virtual Containers (VC). When the VC is aligned in the Tributary Unit (TU)
a Pointer is added which indicates the phase of the particular VC. TU's are then grouped, via
Time Division Multiplexing (TDM), intoTributary Unit Groups (TUG).

The TUGs are collated into Administrative Units (AU) via more VCs where more pointers are
added (these being fixed relative to the frame). The VCs and the pointers are incorporated into
the section overhead of theSynchronous Transport Module (STM). One AU forms an STM-1, 4
AUs form an STM-4. You can also get STM-16 and STM-64.

Let us follow a 2Mb/s pipe through the hierarchy.

The 2Mb/s PDH first enters a container C12 which compensates for the varying speeds via the
use of stuff bits (R). Stuff opportunities are identified by S1 and S2 and these are controlled by
the control bits C1 andC2 respectively. If the C bits are are 0s then the corresponding S bits
contain data and if the C bits are 1s then the S bits are not defined. In the diagram
below, O represents Overhead channel bits and Irepresents Information bits.
To create the VC12 a Path Overhead (POH) is added. The POH uses Bit Interleaved Parity (BIP)
to monitor errors. In addition, there are fault indicators, Far End Block Error (FEBE), Remote
Fail Indicator (RFI) and Far End Receive Failure (FERF). The Signal Label is normally set
at 2 to indicate asynchronous data.

A pointer is added to the VC12 which defines the phase alignment of the VC12 and this changes
during transmission. Phase variation can be due to Jitter (from regeneration and multiplexing
equipment) andWander (temperature differences within the transmission media). VC12s created
by different multiplexers may not be synchronous so the TU adds a pointer at a fixed position
within the TU. The value of the pointer indicates the start of the VC12. If the phase of the VC12
changes then the value of the pointer changes such that if data is running faster than the TU then
the pointer value is increased and if the data speed is slower then the pointer value is decreased.
This difference in speed can be up to one byte per frame in SDH.

The following diagram illustrates three TU12s entering a TUG2 at three different times with the
VC12 pointers indicating where the POH is for each:
The TU12 is multiplexed into a TUG 2 along with 2 other TU12s. This is achieved by interleving
the bytes of each TU12 in turn. Next, seven TUG 2s are byte interleaved into a TUG 3 and then
three TUG 3s can be byte interleaved to form the VC4 (see the SDH diagram above). You can
see that 3 x 7 x 3 = 63 2Mb/s circuits can be contained in VC 4.