// DSCH 2.

6c
// 7/11/2019 11:46:15
// D:\Mary\microelectronica\pregunta2 divisor 4b-2b.sch

module pregunta2 divisor 4b-2b( B2,B3,B0,B1,D1,D0,kbd11,kbd12,

kbd13,kbd14,kbd21,kbd22,kbd23,kbd24,Q3,Q1,
Q0,Q2,R0,R1,digit11,digit12,digit13,digit14,
digit21,digit22,digit23,digit24);
input B2,B3,B0,B1,D1,D0,kbd11,kbd12;
input kbd13,kbd14,kbd21,kbd22,kbd23,kbd24;
output Q3,Q1,Q0,Q2,R0,R1,digit11,digit12;
output digit13,digit14,digit21,digit22,digit23,digit24;
and and2(w3,w1,w2);
and and2(w6,w4,w5);
and and2(w9,w7,w8);
and and2(w4,w10,w2);
and and2(w5,kbd21,kbd22);
and and3(w15,w13,w14,w2);
and and3(w17,w13,w2,kbd12);
and and2(w7,w10,w18);
and and2(w8,kbd21,w13);
and and3(w19,kbd22,w18,kbd12);
and and3(w20,kbd22,w14,w18);
and and2(w22,kbd21,w21);
and and3(w24,kbd22,w23,kbd12);
and and2(w26,kbd12,w25);
xor xor2(w27,kbd21,kbd12);
not inv(w25,kbd21);
not inv(w21,kbd22);
not inv(w29,w28);
not inv(w23,w2);
not inv(w1,kbd12);
or or3(w31,w26,w24,w30);
and and2(w32,w27,w28);
and and2(w33,w31,w29);
xor xor2(w34,w32,w33);
not inv(w35,kbd22);
and and2(w37,w35,w36);
or or2(digit13,w38,w39);
or or3(w39,w41,w37,w28);
or or3(w38,w42,w43,w44);
and and2(w30,w3,w22);
or or3(w45,w20,w19,w9);
or or2(w48,w46,w47);
or or3(w47,w17,w15,w6);
and and2(w46,w45,w28);
not inv(w10,kbd12);
not inv(w18,w2);
not inv(w13,kbd22);
not inv(w14,kbd21);
not inv(w36,kbd21);
and and2(w41,w2,w36);
and and2(w44,w2,w35);
and and2(w42,w2,kbd12);
and and2(w43,w35,kbd12);
and and2(w52,w51,kbd24);
and and3(w55,kbd22,w53,kbd14);
and and2(w57,kbd21,w56);
and and3(w59,kbd22,w58,w53);
and and2(w61,kbd21,w60);
and and2(w63,w62,kbd24);
and and2(w65,w63,w64);
and and2(w67,w66,w57);
and and2(w70,w68,kbd11);
and and2(w71,w34,kbd11);
and and2(w72,w34,w68);
and and2(w74,w34,w73);
not inv(w73,kbd21);
not inv(w75,kbd21);
not inv(w76,kbd22);
not inv(w77,w34);
not inv(w78,kbd11);
and and2(w80,w79,w48);
or or3(w84,w81,w82,w83);
or or2(digit23,w80,w84);
or or3(w79,w86,w87,w88);
and and2(w91,w89,w90);
or or3(w92,w71,w70,w72);
or or3(w94,w74,w93,w48);
or or2(digit14,w92,w94);
and and2(w93,w68,w73);
not inv(w68,kbd22);
xor xor2(digit24,w96,w97);
and and2(w97,w99,w100);
and and2(w96,w101,w48);
or or3(w99,w102,w103,w91);
not inv(w104,kbd11);
not inv(w105,w34);
not inv(w100,w48);
not inv(w106,kbd22);
not inv(w107,kbd21);
xor xor2(w101,kbd21,kbd11);
and and2(w102,kbd11,w107);
and and3(w103,kbd22,w105,kbd11);
and and2(w90,kbd21,w106);
and and3(w86,kbd22,w75,w77);
and and3(w87,kbd22,w77,kbd11);
and and2(w108,kbd21,w76);
and and2(w109,w78,w77);
and and3(w81,w76,w34,kbd11);
and and3(w82,w76,w75,w34);
and and2(w110,kbd21,kbd22);
and and2(w111,w78,w34);
and and2(w88,w109,w108);
and and2(w83,w111,w110);
and and2(w89,w104,w34);
and and2(w114,w112,w113);
and and2(w117,w115,w116);
and and2(w120,w118,w119);
and and2(w115,w121,w113);
and and2(w116,kbd21,kbd22);
and and3(w124,w122,w123,w113);
and and3(w125,w122,w113,kbd13);
and and2(w118,w121,w126);
and and2(w119,kbd21,w122);
and and3(w127,kbd22,w126,kbd13);
and and3(w128,kbd22,w123,w126);
and and2(w130,kbd21,w129);
and and3(w132,kbd22,w131,kbd13);
and and2(w134,kbd13,w133);
xor xor2(w135,kbd21,kbd13);
not inv(w133,kbd21);
not inv(w129,kbd22);
not inv(w137,w136);
not inv(w131,w113);
not inv(w112,kbd13);
or or3(w139,w134,w132,w138);
and and2(w140,w135,w136);
and and2(w141,w139,w137);
xor xor2(w2,w140,w141);
not inv(w142,kbd22);
and and2(w144,w142,w143);
or or2(digit12,w145,w146);
or or3(w146,w148,w144,w136);
or or3(w145,w149,w150,w151);
and and2(w138,w114,w130);
or or3(w152,w128,w127,w120);
or or2(w28,w153,w154);
or or3(w154,w125,w124,w117);
and and2(w153,w152,w136);
not inv(w121,kbd13);
not inv(w126,w113);
not inv(w122,kbd22);
not inv(w123,kbd21);
not inv(w143,kbd21);
and and2(w148,w113,w143);
and and2(w151,w113,w142);
and and2(w149,w113,kbd13);
and and2(w150,w142,kbd13);
and and2(w66,w62,w53);
and and3(w155,w56,kbd24,kbd14);
and and2(w64,kbd21,kbd22);
and and3(w156,w56,w58,kbd24);
and and2(w158,w157,kbd14);
and and2(w159,kbd24,kbd14);
and and2(w160,kbd24,w157);
and and2(w162,kbd24,w161);
not inv(w161,kbd21);
not inv(w58,kbd21);
not inv(w56,kbd22);
not inv(w53,kbd24);
not inv(w62,kbd14);
and and2(w164,w163,kbd24);
or or3(w165,w155,w156,w65);
or or2(w136,w164,w165);
or or3(w163,w59,w55,w67);
and and2(w166,w52,w61);
or or3(w167,w159,w158,w160);
or or3(w169,w162,w168,kbd24);
or or2(digit11,w167,w169);
and and2(w168,w157,w161);
not inv(w157,kbd22);
xor xor2(w113,w170,w171);
and and2(w171,w172,w173);
and and2(w170,w174,kbd24);
or or3(w172,w175,w176,w166);
not inv(w51,kbd14);
 not inv(w177,kbd24);
not inv(w173,kbd24);
not inv(w60,kbd22);
not inv(w178,kbd21);
xor xor2(w174,kbd21,kbd14);
and and2(w175,kbd14,w178);
and and3(w176,kbd22,w177,kbd14);
endmodule