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1.1 Objectives
R1(measured) = ____________
R2(measured) = ____________
R3(measured) = ____________
b. Connect the oscilloscope to measure the voltage Vi, for the channel being used set the AC‐
GND‐DC switch to the GND position and set the horizontal line in the middle of screen.
Then return the AC‐GND‐DC switch to the AC position.
c. Set the vertical sensitivity to 1V/cm and adjust the amplitude control of signal generator
until Vi = 8 Vp‐p at a frequency of 1kHZ. Use a horizontal sensitivity of 0.2 ms/cm.
d. Set the DC supply to 12 V using the DMM.
DC MEASUREMENTS
Both the oscilloscope and DMM will now be used to measure the DC level of Fig. 1‐1.
e. Calculate the expected DC voltage level at Vo using the measured resistor values.
Vo(calculated) =
Vo (measured) =
Determine the present difference between the calculated and measured values using the
following equation:
|Vo(calc) –Vo(Neac) |
%Difference = × 100% (1)
|Vo(caSc)|
% Difference (calculated) =
g. Connect the scope to Vo and set the AC‐GND‐DC switch to the DC position. Using a
sensitivity of 1V/cm determine the shift (in volts) in the position peak value (referenced to
0V) from the established in part (e).
Was the shift up or down from the center of the screen? What does the shift tell us about the
polarity of Vo.
How does the measured shift with the oscilloscope compared with the measured with the
DMM?
Is the scope or DMM more accurate for this type of reading? Why?
AC Measurements
Both the oscilloscope and DMM will now be used to measure the AC level of Fig. 1‐1.
Vi(rms) (calculated) =
i. Calculate the expected rms voltage Vo for the network of Fig. 1‐1 at a frequency of 1 kHz,
using measure resistor values. Be aware the reactance of the capacitor must be
determined and the vector relationship between resistive and reactive elements employed
in the determination. For the ac analysis the 12V supply can be set to zero volts
(superposition applies to the DC/AC analysis of network) resulting in a parallel
arrangement for R2 and R3.
Vo(rms)(calculated) =
Vo(rms) (measured) =
Determine the present difference between the calculated and measured values using Eq. 1.
% Difference(calculated) =
k. Connect the oscilloscope to measure Vo and set the AC‐GND‐DC switch the AC position.
Using an appropriate vertical and horizontal sensitivity determine the peak‐to‐peak value
of Vo .
Vo(p‐p) (measured)=
Determine the present difference between the calculated and measured values using Eq. 1‐1.
% Difference (calculated)=
l. Are you satisfied that both the oscilloscope and DMM can effectively measure the rms
values of sinusoidal waveforms? why?
In this part of the experiment the oscilloscope will be used to measure the period and
frequency of a sinusoidal waveform.
a. Hook up the signal generator directly to a vertical channel of the oscilloscope. Set the
frequency dial between 1 and 2 kHz. Without taking the time to carefully read the scale
and determine which frequency was chosen. Adjust the amplitude control until an
8Vp‐p signal is obtained on the screen.
An 8 Vp‐p sinusoidal signal of unknown frequency is now displayed on the screen. The
following is the general procedure to determine the period and frequency of a
waveform.
b. Adjust the horizontal sensitivity until one or two complete cycles of the waveform is
displayed on the screen. Record the chosen horizontal sensitivity below.
Horizontal sensitivity =
c. Measure the number of divisions (including fractional parts) encompassed by one full
cycle of the waveform on the screen.
Number of divisions =
d. Calculate the period of the waveform by multiplying the horizontal sensitivity by the
number of divisions.
Period (T) =
e. The frequency then can be determined using the relationship f = 1/T. Calculate the
frequency.
Frequency (f) =
f. Now that the frequency is known compare it to the frequency set on the signal
generator. Record the frequency below.
g. If the calculated frequency and frequency of signal generator do not match can you
offer a person for the difference?
h. Hook up the frequency counter to the output voltage terminals and record displayed
frequency.
f(counter) =
i. Is the frequency displayed by the counter closer to the frequency calculated using the
scope or determined from the dial of the signal generator? Assuming the counter is our
best measure ent does a scope or dial setting usually displ y a more accurate reading
of the frequency?
a. Construct the network of Fig. 1‐1. Insert the measured resistor value.
R(measured) =
b. Determine the rms value of the 6 V Vp–p signal applied to the input.
Vi(rms) (calculated)=
VO(rms) (calculated) =
VO(p–p) (calculated) =
θ=
e. Hook up channel 2 to Voand using the same vertical sensitivity of 1V/cm and
superimpose V0 on Vi. Be sure both Vo and Vi are balanced above and below the center
line using the GND position of the AC‐GND‐DC switch for each channel.
f. Count the number of horizontal division between positive slopes of V0 and Vi as shown
Fig. 1‐3 and label the result A. The sepration A represents the phase shift between Vo
and Vi.
A (number of division)=
g. Count the number of divisions encompassed by one full cycle of the waveform and
label the result B (note Fig. 1‐3)
B (number of divisions) =
h. The phase angle in degrees can then be determined using the following equation:
8 = Æ × 3600 (2)
B
Using Eq. 1‐2 calculate the phase angle between V 0 and Vi for the network of Fig. 1‐2.
How does the phase angle measured in part 3 (h) compare to the phase angle calculated value
of part 3(c)?
i. How does the peak‐to‐peak value of Vo compare to the calculated values of part 3(c)?
j. If Vo crosses the axis with a positive slope to the right of Vi , Vo lags Vi by the angle Ө.
For the network of Fig. 1‐2 does V0 lead or lag Vi? Is the result expected? Why?
Interchanging the position of the resistor and capacitor of Fig. 1‐1 and calculated the
magnitude and angle of VR assuming Vi = Vi∠00.
VR(rms) (calculated)=
VR(p–p) (calculated)=
Ө=
l. Use the oscilloscope to measure the magnitude of VR and Vi . Also indicate if Vo leads
or lags Vi.
VR(p–p) (measured)=
Vi(p–p) (measured)=
Ө=
Leads or lags =
a. Construct the network of Fig. 1‐4. Insert the measure values of R1 and R2.
R1(1‐kΩ) =
R2(1‐MΩ) =
R1(1‐kΩ) =
R2(1‐MΩ) =
c. Using the measured resistor values calculate the peak‐to‐peak values of Vo.
V(p–p)(Calculated) =
d. Energize the network of Fig. 1‐4 and measure the output voltage Vo using the
oscilloscope.
Vo (p–p)(measured) =
e. Now replace the two 1kΩ resistor with 1MΩ resistors. Insert the measured values of R1
and R2.
f. Using the measured resistor values calculate the peak‐to‐peak voltages for Vousing the
oscilloscope.
Vo (p–p) (calculated) =
Vo (p–p) (measured) =
h. It is expected that the results of Part 4(g) will reveal that the measured and calcul ted
values of Vo do not compare as they did for parts 4(c) and 4(d). The change in response
is due to the loading of the scope on the circuit when applied to measure Vo. In Fig 1‐5
an additional resistor has been added to that Fig. 1‐4 to represent the loading of the
scope on the c rcuit.
Using the measured levels of Vo and Vi the m gnitude of Rccope can be obtained by solving for
Rccope in the following equation obtained using the voltage‐divider rule.
R2Rccpe R1 (3)
Ru = = 7i
R2 + Rccope –1
7o
Using the measured levels of Vo and Vi determine Rccope using Eq. 3 and the measured values
of R1and R2.
Rscope (calculated) =
If the input impedance of the oscilloscope is known compare it to the calculated value.
Vo(p–p) (calculated) =
j. Energize the network and measure the resulting peak‐to‐peak value of Vo.
Vo(p–p) (measured) =
1. For the network of Fig. 1‐1 is it reasonable to assume the capacitor is simply an “open‐
circuit” for dc conditions and a “short‐circuit” for ac conditions? Do the measured
values of the experiment support of your calculations? Why?
3. What are the relative advantageous of using a DMM over an oscilloscope for measuring
ac quantities?
4. What are some of the relative advantageous of using an oscilloscope over a DMM for
measuring ac quantities.
T (calculated) =
f (calculated) =
5. A sinusoidal signal occupies 5 horizontal divisions with the horizontal sensitivity set at
0.1 ms/div. what are the period and frequency of the waveform?
Ɵ(calculated) =
6. Derive Eq. 3.
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
2.1 Objectives
To measure AC and DC voltages in a common‐emitter amplifier.
To obtain measured values of voltage amplification (AV), input impedance (Zi), and output
impedance (Zo) for loaded and unloaded operation.
2.2 Equipment Required
AC Voltage Gain: The AC voltage gain of a CE amplifier (under no‐load) can be calculated
using following equation:
–RC
A
v = (3)
RE+re
–RC
A
v = (4)
re
Zo = RC (7)
Figure 1
m. Calculate DC bias values for the circuit of Fig. 1. Record calculated values below.
VB(calculated) =____________
VE(calculated) =____________
VC(calculated) =____________
IE(calculated) =____________
n. Wire up the circuit of Fig. 1. Set VCC = 10 V. Check the DC bias of the circuit measuring
values of
VB(measured) =____________
VE(measured) =____________
VC(measured) =____________
Check that these values compare closely with those calculated in Part 1(b). Calculate the
DC emitter current using
EI = VE
RE
(8)
o. Calculate the AC dynamic resistance, re, using the measured value of IE.
26(mV)
re = (9)
IE(mV)
re =____________
b. Apply an AC input signal, Vsig= 20mV, rms at f = 1kHz. Observe the output waveform on the
scope to be sure that there is no distortion (if there is, reduce the input signal or check the
DC bias). Measure the resulting AC output voltage, Vo, using a scope or a DMM.
Vo(measured) =____________
Vo
AV= (10)
Vsig
Av =____________
a. Calculate Zi using Eq. 6. Use the beta measured with a transistor curve tracer or beta tester,
or the nominal listed value in specification sheets (say, β = 150).
Zi(calculated) =____________
Figure 2
Vi(measured) =____________
we get
Zi = ( Vi ) ∗ Rx (12)
Vsig–Vi
Zi =____________
b. Remove the input measurement resistor, Rx. For input of Vsig= 20mV rms, measure the
output voltage, Vo. Check the output waveform to ensure that no distortion is present.
Vo[measured] (unloaded) = Vo=____________
VL= ( RL ) ∗ VO (13)
ZO+RL
for which
ZO = (VO–VL) ∗ RL (14)
VL
Zo=____________
Connect the amplifier of Fig. 1. For input of Vsig= 20 mV, p‐p, at a frequency of f = 1 kHz, sketch
the waveforms for Vsig and Vo in Fig. 2‐3.
Figure 3
Name: ___________________________
Part – 1
Part – 2
Lab
Part – 3
Section
Part – 4
Part – 5
Working
Lab
Performance
Viva
Instructor’s Verification
3.1 Objectives
To measure DC and AC voltages in common‐base amplifier.
To obtain measured values of voltage amplification (Av), input impedance (Zi) and output
impedance (Zo).
3.2 Equipment Required
a. Calculate DC bias current and voltages for the circuit of Fig. 1. Record calculated values
below.
Figure 1
Calculate re using
26(mV)
re = (4)
IE(mV)
re(calculated) =
Wire up the circuit of Fig. 1. Set VCC= 10 V. Check the DC bias of the circuit measuring values of
VB (measured) =
VE (measured) =
VC (measured) =
EI = VE
RE
(5)
IE =
26(mV)
re = (6)
IE(mV)
re =
Compare the DC voltages, current IE, and dynamic resistance re calculated in Part 1(a) with the
values obtained in Part 1(b).
Av (calculated) =
b. Apply an AC input signal, Vsig = 50mV, rms at a frequency of 1kHz. Measure the
resulting AC output voltage, Vo.
Vo(measured) =
Av =
Compare the voltage gain calculated in Part 2(a) with that measured in Part 2(b).Using the
oscilloscope, observe and sketch the input voltage waveform, Vsig, and the output voltage
waveform, Vo, in Fig. 2.
Zi (calculated) =
Figure 3
Vi(measured) =
Determine Zi using
Zi
Vi = (8)
(Zi+RX)Vsig
Vi
Zi = (9)
(Vsig–Vi)RX
Zi(measured) =
Zo(calculated) =
For an input of Vsig = 20mV at a frequency of 1kHz, rms measure the output voltage, Vo, with no
load connected.
Vo(measured) (unloaded) =
RLVo
VL = (10)
Zo+RL
For which
RL(Vo–VL)
Zo= (11)
VL
Zo =
Compare the AC output impedance calculated in Part 4(a) with the output impedance
calculated from measured voltage data in Part 4(b).
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
4.1 Objectives
To measure DC and AC voltages in emitter‐follower (common‐collector) amplifier.
To obtain measured values of voltage amplification (Av), input impedance (Zi) and output
impedance (Zo).
4.2 Equipment Required
RE
A
V = (1)
RE+re
a. Calculate DC bias current and voltages for the EF circuit of Fig. 1. Record calculated
values below.
Figure 1
Calculate re using
26(mV)
re = (2)
IE(mV)
re(calculated) =
b. Wire up the circuit of Fig. 4. Set VCC = 10 V. Check the DC bias of the circuit measuring
values of
VB(measured) =
VE(measured) =
VC(measured) =
Determine IE using
I E= VE (3)
RE
IE =
r e=
Compare the DC voltages and current calculated in Part 1(a)with those measured in Part 1(b).
Av(calculated) =
b. Apply an AC input signal, Vsig = 1V, rms at a frequency of 1 kHz. Measure the resulting
AC output voltage, Vo.
Vo(measured) =
Av(measured) =
Compare the voltage gain calculated in Part 2(a) with that measured in Part 2(b).
Observe and sketch the input signal, Vsig, and output voltage, Vo, in Fig. 2.
Zi(calculated) =
Figure 3
Vi(measured) =
Calculate Zi Using
Zi∗Vsig
Vi = (6)
Zi+RX
Vi∗RX
Zi = (7)
Vsig–Vi
Zi =
Compare the AC input impedance of a CC amplifier calculated in Part 3(a) with that measured
in Part 3(b).
Zo(calculated) =
b. For input of Vsig= 20 mV, rms at frequency f = 1 kHz measure the output voltage, Vo.
Vo(measured) =
VL(measured) =
RLVo
VL = (8)
Zo+RL
For which
RL(Vo–VL)
Zo= (9)
VL
Zo =
Compare the CC output impedance calculated in Part 4(a) with that determined in Part 4(b).
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
5.1 Objectives
To design, build, and test a common‐emitter amplifier. Both DC bias and AC amplification
values are considered.
β = 100 typical
IC(max) = 200mA
VCE(max) = 40 V
Figure 1
The CE circuit to be built is that shown in Fig. 1. The level of VCC (10 V) is well within the
maximum rating of the transistor (VCE = 40 V maximum), and would allow a 3 Vp‐p output
voltage swing. For the mid‐band frequency of f = 1 kHz, capacitor values of C1 = C2 = 15µF and
CE = 100 µF would be satisfactory. For the transistor consider a minimum β = 100 in the design.
b. Have each laboratory team design for a different value of IC. The design shown here is
for IC = 1 mA. For IC =1mA. For IE = IC = 1 mA, the value of RE should be
VE 1V = 1kfi
ER = =
IE 1mA
c. Select RC to bias the circuit at about VCE = 5 V (one‐half VCC). Then VRC = VCC – VCE – VE =
4V, and
VE 4V = 4kfi (use 4. 1kfi)
ER = =
IE 1mA
d. Check Av:
26(mV)
r e= = 26fi
IE(mV)
RC 4. 1kfi
|A | = = = 158
V 26fi
re
e. Since the input impedance looking into the base of the transistor is βre = 100(26 Ω) =
2.6kΩ, select R1 and R2 as large as possible but still sensitive to the DC condition βRE ≥
10R2 so the system is not loaded down.
Using βRE ≥ 10R2 we find R2 =10, βre =10(2.6 kΩ)=26 kΩ (Use 27kΩ) for the DC bias of
VB =VE = 0.7 V = 1.7 V we calculate R1 =132kΩ (Use 130kΩ)
f. Check Zi:
Zo = RC = 4. 1kfi
a. Build the CE amplifier circuit of Fig. 1 using the capacitors, resistors, and transistor
from the design in Part 1, and analysis in Part 2.
b. Set VCC = 10 V. Measure and record DC voltages.
VB(measured) =
VE(measured) =
VC(measured) =
IC = IE =
c. Apply an AC input, Vsig= 10 mV, rms at f = 1 kHz (or adjust value for maximum
undistorted load voltage as observed using a scope). Measure and record AC voltages.
Vsig =
VL(measured) =
d. Connect a measurement resistor, Rx = 3kΩ, in series with input Vsig. Using a DMM,
measure and record Vsig and Vi (from base to ground).
Vsig=
Vi(measured) =
Calculate Zi.
Zi =
e. Remove load resistor RL. (Readjust Resistors Vsig if waveform seen using scope is
distorted.) Measure unloaded AC output voltage Vo.
Vo(measured) =
Calculate AC output impedance (using VL in Part 3(c)).
Zo =
Name: ___________________________
Part – 1
Lab
Section
Part – 2
Working
Lab
Performance
Viva
Instructor’s Verification
6.1 OBJECTIVES
The DC bias of a JFET is determined by the device transfer characteristic(VP and IDSS) and the
DC self‐bias determined by the source resistor. The AC voltage gain at this DC bias point is
then dependent on the device parameters (gm or gfs) and circuit drain resistance.
AC Voltage Gain: The voltage gain of the amplifier shown in Fig. 1 is calculated from
Vo
A= = —g R = —g (R ‖R )
V m D m D L
Vi
where
g =g ( VGSQ
)
m mO 1—
VP
With
2IDSS
gmO =
VP
Zi = RG
Zo = RD
Use a characteristic curve tracer to determine the values of IDSS and VP, if available. Otherwise,
use the following steps to obtain these values.
VDD = +20 V,
RG = 1 MΩ, RD = 510Ω, and RS = 0Ω. Measure and record.
VD(measured) =
VGS(measured) =
VD(measured) =
First:
VDD — VD
I D=
RD
ID(calculated) =
Second:
VP (calculated) =
6.5 Part 2. DC Bias of Common‐Source Circuit
a. Calculate the DC bias expected in the circuit of Fig. 2, using IDSS and VP obtained in
Part1. Draw graphs of the equations
VGS 2
ID = IDSS (1 — )
VP
And
VGS = —IDRS
VGS(calculated) =
ID(calculated) =
Using
VD = VDD — IDRD
VD(calculated) =
VG(measured) =
VS(measured) =
VD(measured) =
VGS(measured) =
Calculate the value of ID under DC bias conditions.
VS
I =
D
RS
ID =
Compare the DC bias values calculated in Part 2(a) with those measured in Part 2(c).
AV = —gmRD
Av(calculated) =
b. Connect the input of Vsig= 100 mV at 1kHz. Measure and record using the DMM:
Vo(measured) =
Calculate the voltage gain of the amplifier.
Vo
AV =
Vsig
Av =
6.7 Part 4. Input and Output Impedance Measurements
Zi(expected) =
Zo(expected) =
c. Connect a 1‐MΩ resistor, Rx, in series with the input signal, Vsig = 100 mV, rms at f = 100
Hz. Measure Vi.
Vi(measured) =
Determine the input impedance using
d. Measure Vo.
Vo(measured) =
Connect load RL = 10 kΩ. Measure voltage across load, VL.
VL(measured) =
Determine the AC output impedance using
Vo — VL
Z o= R L
VL
Zo(calculated) =
Compare the input impedance calculated in Part 4(a) with that deter‐mined from
measurements in Part 4(c). Compare the output impedance calculated in Part 4(b) with that
deter‐mined from measurements in Part 4(d).
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
7.1 Objectives
To measure DC and AC voltages in a multistage FET amplifier.
To obtain measured values of voltage amplification (Av), input impedance (Zi),and
output impedance (Zo).
The DC bias of a JFET is determined by the device transfer characteristic (VP and IDSS) and the
external circuit connected to it. The AC voltage gain at this DC bias point is dependent on the
device parameters (gm or gfs) and circuit drain resistance.
AC Voltage Gain: The voltage gain of an amplifier stage as shown in Fig. 1 can be calculated
from Vo
A= = —g R = —g (R ‖R )
V m D m D L
Vi
Where
g =g ( VGSQ
)
m mO 1 —
VP
With
2IDSS
gmO =
VP
Zi = RG
Zo = RD
It is necessary to obtain values of IDSS and VP for both Q1 and Q2. Use a characteristic curve
tracer, if available, to determine the values of IDSS and VP. Obtain readings at VDS = +10 V.
For Q1:
IDSS =
VP =
For Q2:
IDSS =
VP =
Go on to Part 2. If no curve tracer is available, use the following steps to obtain the above
values.
a. Construct the circuit of Fig. 2 with RD = 510 Ω but with RS = 0Ω. Measure and record.
Figure 2
VD(measured) =
ID(calculated) =
Since this is the drain current at VGS = 0 V
IDSS(Q1) = ID =
(using the value of ID just calculated).
Replace Q1 and repeat the measurement with Q2.
VD(measured) =
Calculate the value of drain current, ID.
VDD — VD
I D=
RD
ID(calculated) =
Since this is the drain current at VGS = 0 V
IDSS (Q2) = ID =
(using the value of ID just calculated).
VGS(measured) =
VD(measured) =
VDD — VD
I D=
RD
ID(calculated) =
VGS
VP =
I
1—J D
IDSS
VP(Q2) (calculated) =
VGS(measured) =
VD(measured) =
VDD — VD
I D=
RD
ID(calculated) =
VGS
VP =
I
1—J D
IDSS
VP(Q1)(calculated) =
a. Calculate the DC bias expected in the circuit of Fig. 3, using IDSS and VP obtained in Part
1 for each transistor.
Figure 3
Draw graphs of the equations
VGS 2
ID = IDSS (1 — )
VP
And
VGS = —IDRS
VD1(calculated) =
The calculated DC bias values are:
VGS2(calculated) =
ID2(calculated) =
Using
VD2 = VDD — ID2RD2
VD2(calculated) =
b. Build the circuit of Fig. 3 using RG1 = RG2 = 1MΩ, RS1 = RS2=510 Ω, and RD1 = RD2= 2.4 kΩ.
RL= 10kΩ. Set VDD= +20 V.
c. Measure the DC bias voltages.
VG1(measured) =
VS1(measured) =
VD1(measured) =
VGS1(measured) =
Calculate the value of I D1 under DC bias conditions (using nominal resistor values).
VS1
ID2 =
RS1
ID2 =
Compare the DC bias values calculated in Part 2(a) with those measured in Part 2(c).
For stage 2:
AV2 = —gm(RD2‖RL)
with
2IDSS(Q2) VGS2
(
gm(Q2) =
|VP ) (1 — )
(Q2)| VP(Q2)
Using VP(Q2), IDSS(Q2) from Part 1, and VGS2 calculated in Part 2.
AV2(calculated) =
For stage 1:
AV1 = —gm(RD1‖Zi2)
with
2IDSS(Q1) VGS1
(
gm(Q1) =
|VP ) (1 — )
(Q1)| VP(Q1)
Using VP(Q1), IDSS(Q1) from Part 1, and VGS1 calculated in Part 2(a).
AV1(calculated) =
AV = AV1 ∗ AV2
Av(calculated) =
b. Connect the input of Vsig= 10 mV, rms at f = 1 kHz. Use the oscilloscope to obtain an
undistorted output voltage, adjusting Vsig if necessary. Measure and record:
Vsig(measured) =
VL(measured) =
Calculate the voltage gain of the overall amplifier:
Zi = RG1
Zi =
Zo = RD2
Zo =
c. Connect a 1‐MΩ resistor, Rx, in series with the input signal, Vsig=10 mV, rms at f = 100
Hz. Measure Vi1.
Vi1(measured) =
Measure VL.
VL(measured) =
Disconnect load RL = 10kΩ. Measure output voltage, Vo.
Vo(measured) =
Calculate the AC output impedance using
Vo — Vi1
Z o= R L
VL
Zo =
Compare the input impedance calculated in Part 4(a) with that determined from
measurements in Part 4(c). Compare the output impedance calculated in Part 4(b) with that
determined from measurements in Part 4(d).
Compare their values with those obtained experimentally.
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
8.1 Objective
To calculate and measure DC and AC voltages in Darlington connection circuits.
A Darlington connection (as shown in Fig. 1) provides a pair of BJT transistors in a single IC
package with effective beta (β D) equal to the product of the individual transistor betas.
QD = Q1Q2
The Darlington emitter‐follower has a higher input impedance than that of an emitter‐
follower. The Darlington emitter‐follower input impedance is
Zi = RBǁ(QDRE)
Zo = re
a. For the circuit of Fig. 1 calculate the DC bias voltages and currents.
VB(calculated) =
VE(calculated) =
Calculate the theoretical values of voltage gain and input and output impedance.
Av(calculated) =
Zi(calculated) =
Zo(calculated) =
b. Construct the Darlington circuit of Fig. 1. Adjust the 50‐kΩ potentiometer (RB) to
provide an emitter voltage, VE = 5 V. Using a DMM, measure and record the DC bias
values:
VB(measured) =
VE(measured) =
c. Apply an input signal Vsig = 1 V, peak at f = 10 kHz. Using the oscilloscope, observe and
record the output voltage to assure that the signal is not clipped or distorted. (Reduce
the input signal amplitude if necessary.)
Vi(measured) =
Vo(measured) =
Calculate and record the AC voltage gain:
Av= Vo/Vi =
Zi(calculated) =
Calculate the circuit output impedance:
b. Connect a measurement resistor, Rx = 100 kΩ, in series with Vsig. Measure and record
input voltage, Vi.
Vi(measured) =
Vo(measured) =
Connect a load resistor, RL= 100 Ω. Measure and record the resulting output voltage:
Vo = VL(measured) =
(Vo — VL)
Z o= R L
VL
Zo =
Name: ___________________________
Part – 1
Lab
Section
Part – 2
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Instructor’s Verification
9.1 Objective
To calculate and measure DC and AC voltages in cascode connection circuits.
AV1 = —1 (1)
RC
AV2 = (2)
re2
a. Calculate DC bias voltages and currents in the cascode amplifier of Fig. 1 (assuming
base currents are much less than the voltage divider current).
VB1(calculated) =
VE1(calculated) =
VC1(calculated) =
VB2(calculated) =
VE2(calculated) =
VC2(calculated) =
b. Connect the cascode circuit of Fig. 1. Measure and record DC bias voltages.
VB1(measured) =
VE1(measured) =
VC1(measured) =
VB2(measured) =
VE2(measured) =
VC2(measured) =
c. Using Eqs. 1 and 2, calculate the AC voltage gain of each transistor stage:
Av1(calculated) =
d. Apply input signal, Vsig = 10 mV, peak at f = 10 kHz. Using the oscilloscope, observe the
output waveform Vo to make sure that no signal distortion occurs. If the output is
clipped or distorted, reduce the input signal until the clipping or distortion disappears.
Using the DMM, measure and record the AC signals.
Vi(measured) =
Vo1(measured) =
Vo2(measured) =
Compare the measured voltage gains with those calculated in Parts 1(c) and 1(d).
e. Using the oscilloscope, observe and record waveforms for the input signal, Vi, output of
stage 1, Vo1, and output of stage 2, Vo2.
Name: ___________________________
Lab
Part – 1
Section
Working
Lab
Performance
Viva
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10.1 OBJECTIVE
Current source circuits are part of many types of linear integrated circuits. This experiment
will build and test a few types of each circuit.
Fig. 1 shows a simple form of current source using a JFET biased to operate at its drain‐source
saturation current. Regardless of the load RL (within practical limits), the current through load
RL will be set by the JFET device:
IL = IDSS
Figure 1
A BJT current source circuit is shown in Fig. 2. The base voltage is approximately set by
R1
V = (—VEE)
B
R1 + R2
The emitter voltage is then
Figure 2
a. Wire up the circuit of Fig. 2. Use RL = 51 Ω. Measure and record the drain‐source
voltage.
VDS(measured) =
b. Using the voltage measured in Part 1(a), calculate the load current.
VDD — VDS
I L=
RL
c. Replace RL with the resistors as listed in Table 1 and repeat Parts 1(a) and 1(b).
TABLE 1
a. Calculate the current IRL through the load in the circuit of Fig. 2.
IRL(calculated) =
b. Wire up the circuit of Fig. 2. Measure and record the following voltages.
c. Calculate the emitter current and the current through the load.
IRE =
IRL =
d. Replace RL with the resistors listed in Table 2 and repeat Parts2(a) through 2(c).
TABLE 2
Name: ___________________________
Part – 1
Lab
Section
Part – 2
Working
Lab
Performance
Viva
Instructor’s Verification
11.1 OBJECTIVE
Current mirror circuits are part of many types of linear integrated circuits. This experiment
will build and test a few types of each circuit.
The circuit of Fig. 1 is a current mirror, in which the current set through resistor Rx is mirrored
through the load
VCC — VBE
X
= = IL
RX
Figure 1
The circuit of Fig. 1 shows how a current mirror can provide the same current to a number of
loads. The mirrored current set through resistor Rx and mirrored through both loads is
VCC — VBE
I = =I =I
X L1 L2
RX
Ix(calculated) =
VB1(measured) =
VC2(measured) =
Ix =
IL =
Ix(calculated) =
VB1(measured) =
VC2(measured) =
Ix =
IL =
Ix(calculated) =
VB1(measured) =
VC2(measured) =
VC3(measured) =
I x=
IL1=
IL2=
Name: ___________________________
Part – 1
Lab
Section
Part – 2
Working
Lab
Performance
Viva
Instructor’s Verification
12.1 OBJECTIVE
The analysis of the frequency response of an amplifier can be considered in three frequency
ranges: the low‐, mid‐, and high‐frequency regions. In the low‐frequency region the capacitors
used for DC isolation (AC coupling) and bypass operation affect the lower cutoff (lower 3‐dB)
frequency. In the mid‐frequency range only resistive elements affect the gain, the gain
remaining constant. In the high‐frequency region of operation, stray wiring capacitances and
device inter‐terminal capacitances will determine the circuit’s upper cutoff frequency.
Lower Cutoff (lower 3‐dB) Frequency: Each capacitor used will result in a cutoff frequency.
The lower cutoff frequency at the network is then the largest of these lower cutoff frequencies.
For the network of Fig. 1 the lower cutoff frequencies are as follows.
Figure 1
Ri = R1ǁR2ǁQre
1
†L,2 = Hz
2G(RC + RL )Ci
With
Re = REǁre
Upper Cutoff (upper 3‐dB) Frequency: In the high‐frequency range the amplifier gain is affected
by the transistor’s parasitic capacitances as follows: At input connection of circuit:
1
†H,i =
2GRTH,i Ci
Where
RTH,i = R1ǁR2ǁQre
and Ci is
Where
RTM,o = RCǁRL
And
Co = Cw,o + Cce
(We’ll ignore the transistor’s upper cutoff frequency, as it usually is greater than that due to
wiring and inter‐terminal capacitances.)
Cbe(specified) =
Cbc(specified) =
Cce(specified) =
b. Using a characteristic curve tracer, beta measuring instrument, or value obtained from
previous use in the lab, obtain the value of transistor beta.
β(measured) =
c. Calculate values of DC bias voltage and current for the circuit of Fig. 1.
VB(calculated) =
VE(calculated) =
VC(calculated) =
IE(calculated) =
(RcǁRL)
Av,mid =
re
e. Calculate lower cutoff frequencies due to coupling capacitors and due to bypass
capacity.
fCS(calculated) =
fCC(calculated) =
fCE(calculated) =
a. Construct the network of Fig. 1. Record the actual resistor values in the space provided
in Fig. 1, if desired. Adjust VCC = 20 V. Apply an input AC signal, Vsig= 20 mV, at a peak
frequency of f = 5 kHz. Observe the output voltage using a scope. If Vo shows any
distortion, reduce Vsig until the output is undistorted.
Maintaining the input voltage at the level set above, vary the frequency and measure and
record Vo to complete Table 1.
TABLE 1
Calculate the amplifier voltage gain for each frequency and complete Table 2.
TABLE 2
a. Using the equations provided in the Résumé of Theory section calculate the upper
cutoff frequencies and record below.
fH,I (calculated) =
fH,o(calculated) =
Vi(measured) =
TABLE 3
Calculate the amplifier voltage gain (in dB units) and complete Table 4.
TABLE 4
a. Using the semi‐log paper of Fig. 2, plot the gain versus frequency over the full
frequency range. Plot the actual points and connect to obtain the actual plot. Use
straight‐line approximation curves to obtain the Bode plot.
Figure 2
From the plot, obtain the lower and upper 3‐dB frequency points and record below.
f–3dB(measured) =
f+3dB(measured) =
Name: ___________________________
Part – 1
Part – 2
Lab
Section
Part – 3
Part – 4
Working
Lab
Performance
Viva
Instructor’s Verification
13.1 OBJECTIVE
To calculate and measure DC and AC voltages, and power input and output for class‐A and
power amplifiers.
A class‐A amplifier draws the same power from a voltage supply regardless of the signal
applied. The input power is calculated from
VB(calculated) =
VE(calculated) =
IE(calculated) = IC =
VC(calculated) =
b. Construct the circuit of Fig. 1. If desired, measure and record actual resistor values in
the space provided in Fig. 1. Adjust the supply voltage to VCC= 10 V and measure and
record DC bias voltages:
VB(measured) =
VE(measured) =
VC(measured) =
a. Using the DC bias values calculated in Part 1 and the equations given in the Résumé of
Theory section, calculate power and efficiency values for the largest signal swing in the
class‐A amplifier of Fig. 1.
Pi(calculated) =
Vo(calculated) =
Po(calculated) =
%η(calculated) =
b. Using the oscilloscope, adjust the input signal (f = 10 kHz) to obtain the largest
undistorted output signal. Measure and record these input and output voltages.
Vi(measured) =
Vo(measured) =
Pi =
Po =
%η =
Compare the measured and calculated values of power and efficiency obtained in Parts2(b)
and 2(c).
d. Reduce the input signal to one‐half the level of Part 2(b). Measure and record the input
and output voltages.
Vi(measured) =
Vo(measured) =
e. Calculate the input power, output power, and efficiency using half the input voltage
used in Part 2(a).
Pi(calculated) =
Po(calculated) =
%η(calculated) =
f. Using the measured values, calculate the power and efficiency for the class‐A amplifier
of Fig. 1.
P i=
Po=
%η=
Compare the measured and calculated values of power and efficiency obtained in Parts 2(e)
and 2(f).
Name: ___________________________
Part – 1
Lab
Section
Part – 2
Working
Lab
Performance
Viva
Instructor’s Verification
14.1 OBJECTIVE
To calculate and measure DC and AC voltages, and power input and output for class‐B power
amplifiers.
A class‐B amplifier draws no power if no input signal is applied. As the input signal increases,
the amount of power drawn from the voltage supply and that delivered to the load both
increase. The input power to a class‐B amplifier is
P (DC) = V I 2VCCVC(p)
i CC DC =
GR L
a. Calculate the power ratings for a class‐B amplifier, as shown in Fig. 1, for Vo= 1 V, peak
and Vo= 2 V, peak.
Pi(calculated) =
Po (calculated) =
%η(calculated) =
For Vo = 2 V, peak:
Pi(calculated) =
Po(calculated) =
%η(calculated) =
b. Construct the circuit of Fig. 2. Adjust VCC = 10 V. If desired, measure and record actual
resistor values in the space provided in Fig. 2. Adjust the input until Vo= 1 V, peak.
Measure and record AC voltages.
Vi(measured) =
Vo(measured) =
Using the measured values, calculate input and output power, and circuit efficiency.
P i=
Po=
%η=
Vi(measured) =
Vo(measured) =
P i=
Po=
%η=
Name: ___________________________
Part – 1
Lab
Section
Part – 2
Working
Lab
Performance
Viva
Instructor’s Verification
15.1 OBJECTIVE
To measure DC and ripple voltages in series and shunt regulator circuits.
VL = VZ — VBE
If the output voltage tends to go lower, the series transistor is driven further into conduction,
providing more current to the load to maintain the output voltage.
Figure 1
The circuit of Fig. 2 shows the addition of an op‐amp to provide improved regulation. The
output voltage is set by the Zener diode and feedback network made of resistors R1 and R2. The
voltage gain of the op‐amp, connected in a positive‐feedback configuration, is
R1
A=
R2
If the output voltage tends to get larger, the increased feedback voltage sensed by voltage
divider R1 and R2 causes a reduced input to the op‐amp, less drive current to the series pass
transistor, and reduced load current, thereby maintaining the output voltage.
Figure 2
15.3.3 Shunt Regulation
The circuit of Fig. 3 shows a transistor connected in parallel (shunt) with the output. The
transistor conducts to provide greater or less load current, thereby maintaining the output
voltage. Again, a sensing network made of a resistor voltage divider (using R1and R2) controls
the input to the op‐amp, which then controls the conduction of the shunt transistor. The
regulated output voltage can be calculated using
R1 + R 2
V= Vz
L
R2
Figure 3
b. Construct the circuit of Fig. 1. (Measure and record the resistor values in Fig. 1.) Vary
the DC input voltage, Vi, from 10 V to 16 V, measuring and recording the load voltage in
Table 1. Record the regulated output voltage measured.
c.
Vo(measured) =
Compare the regulation voltage obtained in Part 1(b) with that calculated in Part 1(a).
VL(calculated) =
b. Construct the circuit of Fig. 2. (Measure and record the resistor values in Fig. 2.) Vary
the DC input voltage, Vi, from 10 V to 24 V, in 2‐V steps, measuring and recording the
load voltage, VL,in Table 2. Record the value of the regulated load voltage.
VL(measured) =
Compare the regulation voltage obtained in Part 2(b) with that calculated in Part 2(a).
VL(calculated) =
b. Construct the circuit of Fig. 3. (Measure and record the resistor values in Fig. 3.) Apply
an input voltage varied from 24 V to 36 V, in 2‐Vsteps. Measure and record the load
voltage in Table 3. Record the regulated output voltage.
VL(measured) =
Compare the regulation voltage obtained in Part 3(b) with that calculated in Part 3(a).
Name: ___________________________
Part – 1
Lab
Part – 2
Section
Part – 3
Working
Lab
Performance
Viva
Instructor’s Verification