Floyd, Digital Fundamentals, Tenth Edition CHAPTER 6: FUNCTIONS OF COMBINATIONAL LOGIC Experiment 11 Adder and Magnitude Comparator Objectives After completing this experiment, you will be able to © Complete the design, build, and test a 4-bit binary to Excess-3 code converter. © Complete the design of a signed number adder with overflow detection, Materials Needed 7483A 4-bit binary adder 7485 4-bit magnitude comparator 7404 hex inverter Five LEDs ‘One 4-position DIP switch. Resistors: five 330 .Q, eight 1.0kQ For Further Investigation: Materials to be determined by student Summary of Theory This experiment introduces you to (wo important MST circuits—the 4-bit adder and the 4-bit magni- tude comparator. The TTL version of a 4-bit adder, with full look-ahead carry, is the 7483A. The TTL version of the 4-bit magnitude comparator is the 7485 which includes A > B, A < B, and A = B outputs. Italso has A > B, A < B, and A = B inputs for the purpose of cascading comparators. Be careful to note inputs and outputs when you are con- necting a comparator. ‘One difference in the way adders and com- parators are labeled needs to be clarified. A 4-bit adder contains a carry-in, which is considered the least significant bit so it is given a zero subscript (Co). The next least significant bits are contained in the two 4-bit numbers to be added, so they are iden- tified with a one subscript (Ay, B,). On a compara- tor, there is no carry-in, so the least significant bits are labeled with a zero subscript (Ao, Bo). In this experiment, an adder and comparator are used to convert a 4-bit binary code to Excess-3 code. The approach is somewhat unorthodox but shows how adders and magnitude comparators work. Although the technique could be applied to larger binary numbers, better methods are available. To familiarize you with the experiment, a similar circuit is described in the following example. Example: A 4-Bit Binary to BCD Converter Recall that a 4-bit binary number between 0000 and 1001 (decimal 9) is the same as the BCD number. If we add zero to these binary numbers, the result is unchanged and still represents BCD. Binary numbers from 1010 (ten) to 1111 (fifteen) can be converted to BCD by simply adding 0110 (six) to them. The circuit that accomplishes this is illustrated in Figure 11-1. Notice that the B input of the com- parator is connected to 1001. If the binary number 81as0V, 50v R230 inary . input Ree LOK a483q Least significant RCD digit fo fo fo re Fro Enos Ace A= | toputs pare FIGURE 11-1 Binary to BCD converter. fon the A input of the comparator is greater than when A > Bis 1. Bits B, and B, are always 0, hence 1001, the A > B output is asserted. This action these inputs are connected to ground. causes the adder to add 0110 to the binary input. Notice how the A > B output of the comparator is connected to the B side of the adder. Only b bits B, Procedure and B, will be HIGH when A > B is asserted; other- 1. Figure 11-2 (in the report) shows a par ‘wise, all bits are LOW. This causes the adder to tially completed schematic of a binary to Excess-3 either add 0000 or 0110 to the binary input. The sit- code conversion circuit. It uses the basic idea de- uation is summarized in Table 11-1. Notice in the scribed by the example in the Summary of Theory table that bits B, and B; have the same “sense” as except it needs to add either 0011 or 1001 to the the A > B ovutput—they are O when A> BisOand1 binary input number. The adder must add OO11 82TABLE 11-1 Binary to BCD, 7 re ‘Comparator A>BOupur |B Bs By B, Comment 0 _ 0 0 {input is less than ten, add 0000 1 oO 1 1 input is greater than nine, add 0110 (decimal 3) to the binary input number if it is between 0000 and 1001 but add 1001 (nine) to the number if it is greater than nine in order to convert the 4-bit binary number to Excess-3. The problem is summarized in Table 11-2. Decide how to connect, the open inputs on the 7483A, and complete the schematic. 2. From your schematic, build the circuit. Test all possible inputs as listed on truth Table 11-4 (in the report). The outputs can be read directly from the LEDs. Assume an LED that is ON represents a logic I and an LED that is OFF represents a logic 0. For Further Investigation Overflow Detection Fixed-point signed numbers are stored in most computers in the manner illustrated in Table 11-3. Positive numbers are stored in true form and nega- tive numbers are stored in 2's complement form. If two numbers with the same sign are added, the answer can be too large to be represented with the number of bits available, This condition, called overflow, occurs when an addition operation causes a catty into the sign bit position. As a result, the sign bit will be in error, 2 condition easy to detect. When two numbers with the opposite sign are added, overflow cannot occur, so the sign bit will always be correct. Figure 11-3 illustrates overflow for 4-bit numbers. In this part of the experiment we will step through the design of a 4-bit adder for signed numbers that detects the presence of an overflow error and lights an LED when overflow occurs. We can start with the 7483A adder and a 7404 hex in- verter as shown in Figure 114 (in the report). 1. Consider the problem of detecting an over- flow error. We need consider only the sign bit for each number to be added and the sign bit for the answer. Complete truth Table 11-5 for all possible combinations of the sign bit, showing a 1 whenever an overflow error occurs. 2. Complete the Karnaugh map of the output (shown in the report as Figure 11-5) to see whether minimization is possible. 3. Write the Boolean expression for detection of an overflow error in your report. 4, Note that the signals going into the box in Figure 11-4 are Ag, B,, and Sy. If you apply DeMor- xgan’s theorem (o one term of your Boolean expres- sion, you can draw a circuit that uses only these inputs. Draw the circuit in the box. If directed by your instructor, build and test your circuit, TABLE 11-2 Binary to Excess-3, ‘Adder Input ‘Comparator A> B Output Be By Bs a Comment 0 0 0 1 1 Input is Tess than ten, add 001% 1 1 0 0 1 |[__inpocis greater than nine, add 1001 83