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The GD75232 combines three drivers and five receivers from TI trade-standard SN75188 and SN75189
bipolar quadruple drivers and receivers, respectively. The pinout matches the flow-through design of the
SN75C185 to decrease the part count, reduce the board space required, and allow easy interconnection of the
UART and serial-port connector of an IBM PC/AT and compatibles. The bipolar circuits and processing of
the GD75232 provide a rugged, low-cost solution for this function at the expense of quiescent power and
external passive components relative to the SN75C185.
The GD75232 complies with the requirements of the TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards.
These standards are for data interchange between a host computer and a peripheral at signaling rates up to
20 kbit/s. The switching speeds of the GD75232 are fast enough to support rates up to 120 kbit/s with lower
capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be expected unless the
designer has design control of the cable and the interface circuits at both ends. For interoperability at signaling
rates up to 120 kbit/s, use of ANSI TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is
recommended.
The GD75232 is characterized for operation over the temperature range of 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
9 12
RA5 RY5
VDD
11.6 kΩ 9.4 kΩ
Input DAx
75.8 Ω
320 Ω
DYx Output
4.2 kΩ
GND
To Other
Drivers
10.4 kΩ
3.3 kΩ 68.5 Ω
VSS
To Other Drivers
Resistor values shown are nominal.
VCC
9 kΩ 5 kΩ 1.66 kΩ
RYx Output
2 kΩ
3.8 kΩ
Input RAx
10 kΩ
GND
To Other Receivers
Resistor values shown are nominal.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
Supply voltage, VSS (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V
Input voltage range, VI: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V to 7 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 V to 30 V
Driver output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 15 V to 15 V
Receiver low-level output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 60°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
DRIVER SECTION
RECEIVER SECTION
VSS or GND
VI
VO
RL = 3 kΩ
VSS
Figure 1. Driver Test Circuit for VOH, VOL, IOS(H), and IOS(L)
VDD
VCC
IIH
VI
– IIL
VI
VSS
3V
Input 1.5 V 1.5 V
VDD
Input V 0V
CC
t PHL t PLH
Pulse
Generator VOH
RL CL 90%
See Note A 90%
(see Note B) 50% 50%
Output 10% 10%
VOL
VSS
t THL t TLH
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
VI
VSS
VDD
VCC
VIT, VI – IOH
VOH
VOL IOL
VSS
4V
VDD Input 50% 50%
Input 0V
VCC
t PHL t PLH
Pulse
Generator
RL CL VOH
See Note A (see Note B) 90% 90%
Output 50% 50%
10% 10%
VSS VOL
t TLH
t THL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: tw = 25 µs, PRR = 20 kHz, ZO = 50 Ω, tr = tf < 50 ns.
B. CL includes probe and jig capacitance.
TYPICAL CHARACTERISTICS
DRIVER SECTION
OUTPUT CURRENT
ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ
vs
VOLTAGE TRANSFER CHARACTERISTICS OUTPUT VOLTAGE
ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ
12 20
VDD = 12 V, VSS = – 12 V VDD = 9 V
9
ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ
16 VSS = – 9 V
ÎÎÎÎ ÎÎÎÎÎ
VDD = 9 V, VSS = – 9 V TA = 25°C
VOL(VI = 1.9 V)
12
ÎÎÎÎÎÎÎÎ
6
I O – Output Current – mA
VO – Output Voltage – V
ÎÎÎÎÎÎÎÎ
8
VDD = 6 V, VSS = – 6 V
3
4
0 0
–4
ÎÎÎ
–3
VO
–8 3-kΩ
IO
–6 Load Line
ÎÎÎÎ
– 12
ÎÎÎÎ
–9 RL = 3 kΩ VOH(VI = 0.8 V)
TA = 25°C – 16
– 12 – 20
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 – 16 – 12 –8 –4 0 4 8 12 16
VI – Input Voltage – V VO – Output Voltage – V
Figure 7 Figure 8
ÁÁÁÁ
FREE-AIR TEMPERATURE LOAD CAPACITANCE
ÁÁÁÁ
12 1000
VDD = 9 V
ÎÎÎÎ
ÁÁÁÁ
VSS = – 9 V
OS – Short-Circuit Output Current – mA
ÎÎÎÎ
ÁÁÁÁ
IOS(L) (VI = 1.9 V) RL = 3 kΩ
TA = 25°C
6
SR – Slew Rate – V/ µs
100
3
ÎÎÎÎÎ
ÎÎÎÎ
0
ÎÎÎÎÎ
VDD = 9 V
VSS = – 9 V
–3
VO = 0 10
ÁÁ ÎÎÎÎÎÎ –6
ÁÁ
IOS(H) (VI = 0.8 V)
IIOS
–9
– 12 1
0 10 20 30 40 50 60 70 10 100 1000 10000
TA – Free-Air Temperature – °C CL – Load Capacitance – pF
Figure 9 Figure 10
TYPICAL CHARACTERISTICS
VIT +
1.8 1.4
1.6 1.2
1.4 1
VIT–
1.2 0.8
1 VIT –
0.6
0.8
IT
IT
0.4
0.6
0.2
0.4
0 10 20 30 40 50 60 70 0
2 3 4 5 6 7 8 9 10
TA – Free-Air Temperature – °C VCC – Supply Voltage – V
Figure 11 Figure 12
NOISE REJECTION
ÎÎÎÎ
ÎÎÎÎ
6 MAXIMUM SUPPLY VOLTAGE
VCC = 5 V vs
ÎÎÎÎ
TA = 25°C FREE-AIR TEMPERATURE
ÎÎÎÎ
See Note A
5 16
4 ÎÎÎÎ
CC = 300 pF
ÁÁÁÁ
14
VDD – Maximum Supply Voltage – V
Amplitude – V
ÁÁÁÁ
3 ÎÎÎÎÎ
ÁÁÁÁ
CC = 500 pF
12
ÁÁÁÁ
10
CC = 12 pF
ÎÎÎÎÎ
2
ÁÁÁÁ 8
ÎÎÎÎÎ
1ÁÁÁÁ CC = 100 pF
6
4
0
10 40 100 400 1000 4000 10000 2
tw – Pulse Duration – ns RL ≥ 3 kΩ (from each output to GND)
NOTE A: This figure shows the maximum amplitude of a 0
positive-going pulse that, starting from 0 V, does not 0 10 20 30 40 50 60 70
cause a change of the output level. TA – Free-Air Temperature – °C
Figure 13 Figure 14
APPLICATION INFORMATION
Diodes placed in series with the VDD and VSS leads protect the GD75232 in the fault condition in which the device
outputs are shorted to ± 15 V and the power supplies are at low and provide low-impedance paths to ground (see
Figure 15).
VDD
VDD
Output
± 15 V
GD75232 GD75232
VSS
VSS
– 12 V
TL16C450
ACE
11 10 5
GND VSS
RI 43 12 9 RI 9
RY5 RA5
DTR 37 13
DA3 DY3
8 DTR
C3
CTS 40 14
RY4 RA4
7 CTS
TIA/EIA-232-F
SO 13 15
DA2 DY2
6 TX DB9S
GD75232 C2 Connector
RTS 36 16
DA1 DY1
5 RTS
C1
SI 11 17
RY3 RA3
4 RX
6
DSR 41 18
RY2 RA2
3 DSR
DCD 42 19
RY1 RA1
2 DCD
1
20 1
VCC VDD 12 V
5V
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