Book: Computer Organization and Architecture

Chapter 4: Cache Memory

1. What are the differences among sequential access, direct access, and random access?
2. What is the general relationship among access time, memory cost, and capacity?
3. How does the principle of locality relate to the use of multiple memory levels?
4. What are the differences among direct mapping, associative mapping, and set associative
mapping?
5. For a direct-mapped cache, a main memory address is viewed as consisting of three fields. List
and define the three fields.
6. For an associative cache, a main memory address is viewed as consisting of two fields. List and
define the two fields.
7. For a set-associative cache, a main memory address is viewed as consisting of three fields. List
and define the three fields.
8. What is the distinction between spatial locality and temporal locality?
9. In general, what are the strategies for exploiting spatial locality and temporal locality?

Chapter 5: Internal Memory Organization

1. What are the key properties of semiconductor memory?

2. What are two senses in which the term random-access memory is used?
3. What is the difference between DRAM and SRAM in terms of application?
4. What is the difference between DRAM and SRAM in terms of characteristics such as speed, size,
and cost?
5. Explain why one type of RAM is considered to be analog and the other digital.
6. What are some applications for ROM?
7. What are the differences among EPROM, EEPROM, and flash memory?
8. What is a parity bit?
9. How is the syndrome for the Hamming code interpreted?
10. How does SDRAM differ from ordinary DRAM?

Chapter 10: Instruction Sets: Characteristics and Functions

1. What are the typical elements of a machine instruction?

2. What types of locations can hold source and destination operands?
3. If an instruction contains four addresses, what might be the purpose of each address?
4. List and briefly explain five important instruction set design issues.
5. What types of operands are typical in machine instruction sets?
6. What is the relationship between the IRA character code and the packed decimal
representation?
7. What is the difference between an arithmetic shift and a logical shift?
8. Why are transfer of control instructions needed?
 9. List and briefly explain two common ways of generating the condition to be tested in a
conditional branch instruction.
10. What is meant by the term nesting of procedures?
11. List three possible places for storing the return address for a procedure return.
12. What is a reentrant procedure?
13. What is reverse Polish notation?
14. What is the difference between big endian and little endian?

Chapter 11: Instruction Sets: Addressing Modes and Formats

1. Briefly define immediate addressing.

2. Briefly define direct addressing.
3. Briefly define indirect addressing.
4. Briefly define register addressing.
5. Briefly define register indirect addressing.
6. Briefly define displacement addressing.
7. Briefly define relative addressing.
8. What is the advantage of autoindexing?
9. What is the difference between postindexing and preindexing?
10. What facts go into determining the use of the addressing bits of an instruction?
11. What are the advantages and disadvantages of using a variable-length instruction format?

Chapter 12: Processor Structure and Function

1. What general roles are performed by processor registers?

2. What categories of data are commonly supported by user-visible registers?
3. What is the function of condition codes?
4. What is a program status word?
5. Why is a two-stage instruction pipeline unlikely to cut the instruction cycle time in half,
compared with the use of no pipeline?
6. List and briefly explain various ways in which an instruction pipeline can deal with conditional
branch instructions.
7. How are history bits used for branch prediction?

Chapter 15: Control Unit Operation

1. Explain the distinction between the written sequence and the time sequence of an instruction.
2. What is the relationship between instructions and micro-operations?
3. What is the overall function of a processor’s control unit?
4. Outline a three-step process that leads to a characterization of the control unit.
5. What basic tasks does a control unit perform?
6. Provide a typical list of the inputs and outputs of a control unit.
7. List three types of control signals.
8. Briefly explain what is meant by a hardwired implementation of a control unit.
 Chapter 17: Parallel Processing

1. List and briefly define three types of computer system organization.

2. What are the chief characteristics of an SMP?
3. What are some of the potential advantages of an SMP compared with a uniprocessor?
4. What are some of the key OS design issues for an SMP?
5. What is the difference between software and hardware cache coherent schemes?
6. What is the meaning of each of the four states in the MESI protocol?
7. What are some of the key benefits of clustering?
8. What is the difference between failover and failback?
9. What are the differences among UMA, NUMA, and CC-NUMA?

Chapter 18: Multicore Computers

1. Summarize the differences among simple instruction pipelining, superscalar, and simultaneous
multithreading.
2. Give several reasons for the choice by designers to move to a multicore organization rather than
increase parallelism within a single processor.
3. Why is there a trend toward given an increasing fraction of chip area to cache memory?
4. List some examples of applications that benefit directly from the ability to scale throughput with
the number of cores.
5. At a top level, what are the main design variables in a multicore organization?
6. List some advantages of a shared L2 cache among cores compared to separate dedicated L2
caches for each core.
Book: COMPUTER ARCHITECTURE: A QUANTATIVE
APPROACH
Chapter 1: Fundamentals of Quantitative Design and Approach

1. What are trends in technologies? Explain trends with respect to bandwidth and latency.
2. What is dependability? What are the dependability attributes? Explain MTTF, MTBF, and MTTR.
3. Explain the quantitative principles of computer design.
4. Explain different classes of parallelism and parallel architectures.
5. Explain the new and old view of computer architecture.
6. Explain the impact of time, volume, and commoditization on cost of system.