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l 234 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-21' NO. 5.

SEPTEMBER/OCTOBER 198-5

A Computer-Aided Analysis and Design Approach for


Static Voltage Source Inverters
PHOIVAS D. ZIOGAS, MEMBER, IEEE, EDUARDO P. WIECHMANN, STUDENT MEMBER, IEEE, AND
VICTOR R. STEFANOVIC SENIOR MEMBER, IEEE
,

Abstract-The relative success of the "cut and try" method has made occur while the inverter is supplying maximum load with
the design of static power converters more of an art than a science. As a maximum dc bus voltage. The reason is that transistors
result, no comprehensive analysis approach is available today that can be (especially bipolars) are much more sensitive to overvoltage
used to design static converters with a good degree of confidence. Some
important aspects of this problem-concerning mainly static voltage than over current stresses [4].
source inverters-are treated in this paper within the framework of a With a load model available and worst operating conditions
generalized analysis and design method. The subject approach utilizes the identified, the next step in obtaining the required component
switching function concept to derive relevant analytical expressions, and ratings is to develop an adequate converter model. Experience
digital simulation to obtain relevant design data. with static converts [5], [6] has shown that the most useful
I. INTRODUCTION analytical information is obtained when the converter is
viewed by the input and output terminals as a multifrequency
ESPITE the ongoing intensive research activity in the area ac current and/or voltage source.
of static power converters, no comprehensive analysis Consequently, the converter can be modeled as a black box
method is available today that can be used to obtain relevant whose transfer characteristics are analytically described by the
design information for these converters. Proper converter Fourier series expansion of its respective set of switching
design requires that maximum rms, peak, and average current functions [5]-[7]. By multiplying converter switching func-
and voltage ratings are known so that components with tions with expressions describing respective input voltages,
adequate safety margins can be selected. The same informa- analytical expressions for the converter output voltages are
tion is also essential to the potential user who wants an in- obtained. Line current components are derived next as ratios
depth evaluation of a converter under consideration. of voltages and respective impedances. Finally, the required
The tasks of finding the maxima component ratings requires component ratings are calculated from the products of line
that currents and voltages with the appropriate switching functions.
1) the load is adequately modeled, These are the basics of converter method of analysis presented
2) worst operating conditions are specified or identified, in this paper.
3) the static converter is adequately modeled, The remaining part focuses, for brevity, on an important
4) a suitable analysis method is established. class of dc-to-ac converters known as voltage source inverters.
However, the analysis method developed can be applied with
Continuing research in the modeling of active converter minor modifications to any other class of static converters,
loads, such as electric motors, has resulted in several models such as current source inverters, rectifiers, cycloconverters,
of varying degrees of accuracy and complexity [U]-[3]. Less etc.
complex loads, such as office and emergency type equipment
can be modeled by a combination of passive elements and II. SWITCHING FUNCTIONS AND INVERTER
voltage and/or current sources. MODELING
Identifying worst operating conditions requires careful
consideration of operating characteristics and requirements of As mentioned in Section 1, a converter model as a
both load and converter components. For example, typical multifrequency ac generator is based on the particular switch-
worst-case operating conditions for a thyristor inverter occur ing function employed. For each converter configuration,
while supplying maximum load with minimum dc bus voltage. however, several switching functions yield identical output
The respective conditions for a transistor inverter, however, results. Such a case is shown in Fig. 2, where two inverter
switching functions SI(cwt) and S2(cot) (obtained with the sine
Paper IPCSD 85-14, approved by the Static Power Converter Committee of PWM control scheme [8], [91, Fig. 2(a)) are presented.
the IEEE Industry Applications Society for presentation at the 1984 Industry Multiplication of the inverter input voltage E (Fig. 1) with
Applications Society Annual Meeting. Chicago, IL, September 30-October 4. either of the two functions yields, after phase voltage
Manuscript released for publication February 21, 1985.
P. D. Ziogas and E. P. Wiechmann are with the Department of Electrical subtraction, the same line-to-line voltage waveforms (e.g.,
Engineering, Concordia University, 1455 de Maisonneuve Boulevard West, Tab, Fig. 2(c)). Specifically, function S1(wt) represents the
Montreal, PQ, Canada H3G 1M8. switching function of one of the three inverter legs (i.e., leg
V. R. Stefanovic was with the General Electric Company, Charlottesville.
VA. He is now with the Electronic Systems Division of the Electro-Craft comprising S,1 and SW,,2, Fig. 1) while S2(Wt) is the switching
Corporation, 1600 Second Street South, Hopkins, MN 55343. function of one of the six inverter switches (i.e., Sw1).

0093-9994/85/0900-1234$01.00 © 1985 IEEE


ZIOGAS et al.: COMPUTER-AIDED ANALYSIS FOR STATIC VOLTAGE SOURCE INVERTERS I1- 35

Ii Such expressions can be obtained by deriving the respective


Fourier series expansions, as shown next with (1) and (2).
\Swi SW3 SWI
+E Finally, two more switching functions S1(wt) and S2(wt)
E- Ci/2
r 0C/2 b C suitable for a six-step variable voltage input (VVI) inverter are
Sw6 shown in Fig. 5. As with previous example, line-to-line
izCi/2 I
SW4
I
SW2
voltage Vab can be obtained by using either SI(cot) or S2(cot):
la lb if IC If 00

In
O
S,(t)=
n =dd
A, sin (nwt) (1)
n odd

.. 0
Van Vcn
(a)

Is S2()t)= Bo + n 0=1 B cos (nut). (2)


n7 = I
n odd
IT
Note that the only difference between SI(ot) and S2(ct) is
D that S2(ot) has a dc component not present in SI(cot).

III. ANALYSIS METHOD


With the inverter switching functions Sj(cot) and S2(wt)
swi identified (as in Fig. 2) and analytically specified (as with (1)
(b) and (2)), the inverter phase voltages VO(wt), Vbo(wt), and
Fig. 1. (a) Simplified voltage source (vs) inverter circuit diagram. (b) Actual V,O(wt) (Fig. 1) are given by
configuration of Sw1, Sw2r *, SW6 switches.
E X0
VaO(wt)= ES,(wt) =-2 n- ' A, sin (nut) (3a)
n odd
Ar A M=A/A C
(a)
Vbo(cot) = V,O(wt -120') (3b)
_~~~~~~~ ~ wt V O(wt) = V0O(wt + 1200). (3c)
(b)
Similarly, the respective line-to-line voltages Vab(Wt), VbC(Wt),
and Vc0(wt) are given by
Sb(wt)
V0b(Wt) = V1o(Wt) - VbO(Wt)
(c)
E0 O

= 2/3 A, sin [n(ctt+ 300)] (4a)


2n=
n odd
n * triplen
(d) 90 180 270 360 wt
VbC(Wt) =
Vab(Wt -1200) (4b)
Fig. 2. Sine PWM inverter control scheme. (a) Method of obtaining inverter
switching points. (b) Inverter phase, S1(wt) type of switching function. (c) Vca(.t)= V0b(wt+ 1200). (4c)
Respective inverter line-line voltage waveform. (d) Inverter phase, S2(wt)
type of switching function. Assuming a 3-0 balanced load, the inverter line currents are
given by
Consequently, SI(ot) type of functions have the advantage of
simplifying the analysis, evaluation, and selection of PWM =\/ Vab(wt-30-) 3E
schemes, while S2(wt) type functions are more effective with ia(Ut Z(cot) ~~SI(cot)
Z(wt)
(Sa) =

the computation of current ratings of inverter components.


Although switching function patterns (e.g., as in Fig. 2(b) Ib(t) = Ia(wt -120 0) (Sb)
and (d)) help to visualize the generated inverter voltage and
current waveforms, they are not suitable for further analytical
Ic(&t) = Ia(wot + 1200) (5c)
work. Effective inverter analysis requires that suitable mathe- where Z(wt) is the impedance of the equivalent delta-
matical expressions are found for S1(cot) and S2(wt) functions. connected phase load.
1 2 33 61236 TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-2 1. NO. 5. SEPTEMBER/OCTOBER 1985
~~~~~~~~~IEEE

A simulated Ia,(ct) waveform obtained with (5a) and load 4


power factor angle 0 = 600, for the example shown in Fig. 2,
is presented in Fig. 3(b). Next, the portion of line current (a) 7-

0
conducted by each of the six ideal inverter switches of Fig. 1
wt

h,,(cot) is obtained from the product of the line current


waveform with the respective switching function (e.g., Ia(cot) a(LVt)

and S2(cOt), as follows


9 1 0 0 ~~~~~~wt
S2(cot). (6)
AS2(cot)
-4--

A simulated I1(cot) waveform obtained with (6), for the


foregoing example, is shown in Fig. 3(d). Furthermore, each
of the six ideal inverter switches shown in Fig. 1, consists of
(c) 9,0 1 ~
191(cot)
an undirectional controlled switch (e.g., thyristor, transistor, -I ---O
wt
etc.) with an antiparallel diode (Fig. 1(b)). Therefore, the (d) -+0-
ideal switch current Ii~(ct) can be analytically decomposed 090
90

into its unidirectional controlled switch and diode components,


'TI(wLt)
ITi,t) and ID1i'wt), respectively, according to -0- ..t.da
wt

h'i(cot) = ITi (CLt) IDi (Wt).


- (7) (e) 910 160 2~O0 360
Now, since this kind of analysis is typically performed with a I1 ID(Wt)
digital computer, the numerical values of the current wave- (f) 1 ~. 11,R. II II In in III Ih1114 .+- +----P

form Ii(wot) (obtained with (6)) are assumed to be stored into Ii(Cot) 90 160 2.O 390 u, t

an n-dimensional array (Ii1(n)). Consequently, (7) can be


readily implemented by subjecting each array vector to the (g)
-~I1d iU~ liiiJi
-16~0
lh L l
lIlflPiIEllEhI~IhllIlE:FIh! lUl1 U
390
90
EfliK l~lEU:~E~ -
2 ~0 wt
conditional statements: 1(Wt)
I

if Ij (n) >0, then ITi (n)-=Ij (n) (8)


(h)
if I,,(n) <0, then IDi (n) Ij(n).- =- (9) 6 12 18 24 30 316 fLpu]I
Fig. 3. Inverter generated current waveforms with the SPWM control
Simulated IA{cot) and ID(cot) waveforms obtained with (8) and scheme. (a) Method of obtaining inverter switching points. (b) Inverter line
current I10(wt) waveform. (C) S2(cO) type of switching function. (d) Ideal
(9) are shown in Fig. 3(e) and (f), respectively. switch current I41(ct) waveform. (e) Controlled switch current I17(Wt)
The average and rms values of IT.cot) and ID(cot) are waveform. (f0 Diode current ID(wt) waveform. (g) Inverter input current
computed next through numerical integration of respective I,(cot) waveform. (h) Inverter input current spectrum.
vectors I17(n) and ID(n), as follows:
and by using (6)
(10)
2n k =I Ii(WAt)=Ia(COt) S2(CAt)+Ia,(Wt' 120) S(wt'-"120)
and + Ia(wt+ 120) . S2 (ct + 120). (13)
A simulated I1(cot) waveform and its respective spectrum,
obtained with (13), is shown in Fig. 3(g), and (h). It is obvious
that, in addition to its dc component, I1(wt) contains a large
number of undesired harmonics which must be supplied from
The same formulae can also be employed to obtain 'D and the input filter capacitor C1 without causing serious voltage
'DR ratings. Relevant simulated results for 'T, ITRy 'D, and IDR, distortion D, to the dc input bus. For a given I1(cot) spectrum
obtained with the SPWM control scheme, are shown in Fig. (e.g., Fig. 3(h)) and assuming C, = 1 pu capacitor, The
4(a), (b), (d), and (e), respectively. Moreover, peak IT and ID amount of inverter input dc voltage distortion D, is given by
values can be easily identified by successively examining
respective array vectors T~r(n) and TD(n). Again, relevant 100 Iin 2 1/2
results for IT and ID are shown in Fig. 4(c) and (f), Dv = percent. (14)
E n
respectively. n 2

To complete the inverter modeling as multifrequency ac While the respective inverter input cur.rent distortion Di and
current generator the analysis method is extended to include normalized input (filter) capacitor kVA, kVACi, are given by
the inverter input current IXcot) and its spectra.
From Fig. 1, im 1/2 00

Li(cot) =
'I, (cot) + I,, (cot) + ,5 (wt) (12)
2
Di=
Ii I
Y, Ii
(15)
n = 2
n percent
ZIOGAS et al.: COMPUTER-AIDED ANALYSIS FOR STATIC VOLTAGE SOURCE INVERTERS 1237

Lpu. ]
Ip U. ] [p.u.]
KVAC,
.5- .5- 2.5-

.4 IT 1.0
.4. 2
0.6 pf
.3- .3 1.5
0.2
.2 0.2
1
0.6 pf .5 -
I
1.0
M -Mt
.2 .4 8 I .2 .4 .6 .8 I .2 .4 .6 .8
(a) (d) (g)
Iu. ] [ p u.U ]
LIt]

80-
I
.8 ITR L.0 .8- 60-
.6 -0- 50 pf .6 DOR
0. 2 40-
0. 2
. 4 -. .4
0.6 pf 20-
. 2 -_ .2 -I _ \ 1~~~~~~~~~
.0
_ M
--+ ,M
. 2 .4 .6 .B 1 .2 .4 .6 .8 1 .2 .4 .6 .8

(b) (e) (h)


[pu. ]
LP- u L p-u.
with Cj =l p.U. F
2- IT .0 2- _ U
~~~~~~1.0
2

pf
1.5
+
0. 6
~~~~~~~0.
2
1.5_ +
0.6
~~~~~~~0.
2
pf
1.5 0.2 pf
0.6 pf
I pf
I - 1 -

/
S
.5 .5 t .5

, 1 i 1
.2 .4 .6 .8
l .2 .4 .6 .8 1 .2 .4 .6 .8

(c) (f) (i)


Fig. 4. Normalized inverter component ratings with sine PWM control
scheme. (a) Controlled switch (transistor) average current ratings Ir. (b)
Controlled switch rms current ratings ITR. (c) Controlled switch peak
current ratings, IT. (d) Diode average current ratings ID (e) Diode rms
current ratings IDR (f) Diode peak current ratings ID. (g) Input filter
capacitor kVA ratings, kVACi (16). (h) Inverter input current distortion
ratings Di (15). (i) Inverter input voltage distortion ratings DU (14).

/X 1/2
kVACi-=Ex( Iin2) pu (16)
n=2
where 'in is the nth harmonic component of the inverter input
current Ii and E is the inverter input dc voltage (being E =

142 pu for the PWM case and E r-.//12 pu for the six step=
- sl(wt)
VVI case), Ii, is the nth harmonic component of Ii(wt) and E is (a) e-v +-

the rated value of dc bus voltage. 90 1 110 wt

D,, Di, and kVACi curves obtained with (14), (15), and
(16) for various operating conditions are shown in Fig. 4(i),
2
1 Vab(Ct)

(h), and (g), respectively. 11


Finally, the results shown in Figs. 3 and 4 for the sine PWM (b)
scheme (Fig. 2) are repeated in Figs. 6 and 7 for the six-step 90 360 wt

VVI scheme (Fig. 5). This is done to a) demonstrate the S2(Wot)


flexibility of the proposed analysis method and b) extend the 'I1
applicability of predicted results.
(c) MIllIIIIIIIIIIIIIIIII . I 1 --
90 180 2?0 360 wt
IV. EVALUATION OF PREDICTED RESULTS
Generalized results for inverter component ratings obtained Fig.phase
5. Variable voltage input (VVI) inverter control scheme. (a) Inverter
S1(wt) type of switching function. (b) Respective inverter line-line
with the analysis method discussed in Section III are presented voltage waveform. (c) Inverter phase S2(wt) type of switching function.
in Figs. 4 and 7. For maximum applicability these results are
expressed in per unit where the rated rms value of the
fundamental component V001 of the inverter load (line-to-
neutral) voltage V,00 (Fig. 1) has been taken as 1-pu V, and the
_)
)
is IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS. VOL. IA--1. NO, 5. SEPTEMBER/oCTOBLR 1985

(a)

(b)

(c)

(d)

(e)

(f)

(g)

Fig. 6. Inverter generated current waveforms with VVI scheme. (a) Inverter line current Id,(wt) waveform. (b) S2(t) type of
switching function. (c) Ideal switch current fh(Qt) waveform. (d) Controlled switch current IT(Wt) waveform. (e) Diode current
ID(wt) waveform. (f) Inverter input current li(wt) waveform. (g) Inverter input current spectrum.

t[pu. I p0. u. I [p .u .]
IT
.5- 1.0 .5±+ KVACI
.4 .4 - 2-
0.6 of
.3- 1..5- _ .0
.3 C0.2 0. 6 [1
,

.2 0.2 0.2
.2 --
2_ pf
0.6 .5-
1.0
m
I
I - i~~~~~~~~~~~r
.2 .4 .6 8 1T .2 .4 .6 .8 I .2 .4 .6 .8a I
(a) (d) (g)
[p.u. T [ p .u . ;
[0]
6e0 1)
ITO DP
. 8 . 8- 60-
U t.
. 6 I: . 6 -
40 - n -,
.; -4
4-
20+
.2 t' r.
.0
i 1 .8 m
8 .2 .4 .6 .a 1
.2 .4 . .8 1 .2 .4 .6 I
(b) (e) (}I)
L;u'U. [pu.V [PU.
IT 2-_ u- 5- D
2- 2 0-I v
, 0.2
1.0 0.2 4- _
pf 0.6 0.6 pf
1.5 - 0.6 1.5- pf
0. 2 1.0 3- 1 .0

2-
I
--~~~~~~~~~~~~~~~~~~I .5 -.
1-

.2 4 .6 t9 1 . i . i i_ M
. 2 .4 .6 .8 I .2 . 4 . 6 . a I .2 .4 .6 .8 I 1
(c) (1') (i)
Fig. 7. Normalized inverter component ratings with VVI control scheme. (a) Controlled switch average current ratings lT (b)
Controlled switch rms current ratings ITR. (c) Controlled switch peak current ratings IT- (d) Diode average current ratings IO. (e)
Diode rms ratings IDR. (f) Diode peak current ratings ID. (g) Input filter capacitor kVA ratings, kVACi (16). (h) Inverter input
current distortion ratings D; (15). (i) Inverter inwut voltage distortion ratings D.. (14).
ZIOGAS el al.: COMPUTER-AIDED ANALYSIS FOR STATIC VOLTAGE SOURCE INVERTERS 1239

respective rms value of the fundamental load current I,, as pu Example


A. Moreover, the results have been obtained with the With the three-phase system shown in Fig. 1, it is assumed
assumption that the load is balanced and that line currents I, that
Ib,, and I,, remain constant and equal to 1 pu A, while inverter
output voltage V10 varies from 1 pu to 0 V. The purpose of this rated output power=30 kVA (17)
assumption is the simulation of ac motor type of loads in their rated phase load voltage= 100 V,,,,,
constant torque variable speed region of operation (i.e., volts/ (18)
hertz ratio approximately constant). expected load PF variation =0.2 < PF < 1.0 lagging. (19)
In particular, results shown in Fig. 4 are applicable to
inverters using the sine PWM control scheme (Fig. 2), while a) With the inverter employing the sine PWM scheme (Fig.
Fig. 7 shows results applicable to VVI inverters using the six- 2), find the maximunm peak, average, and rms current values
step control scheme (Fig. 5). Specifically, Fig. 4(a) and (b) for the inverter components, as well as input filter capacitor
show that IT and ITR ratings of the unidirectional controlled kVA.
switches increase as load power factor and modulation index Solution: From (17) and (18),
M increases. The opposite is true with respective diode ratings
ID and IDR, as shown in Fig. 4(d) and (e). The explanation is 30 000
I pu power= 3 = 10 000 VA (20)
that conduction intervals of unidirectional controlled switches 3
decreases with M and reactive currents flowing through
feedback diodes increase. and
Other results of interest are the D, (in (14)), Di (in (15)), 1 pu voltage, rms= 100 V.
and kVACi (in (16)) curves shown in Fig. 4(i), (h), and (g). (21)
These results reveal that inverter input current distortion Di Therefore,
and associated input capacitor kVA increase as load power
factor increases and become worst around the M = 0.6 point. 10 000
The opposite is true with the worst input voltage distortion D,.
1 pu current, rms= = 100 A. (22)
100
It is also noted that Di and kVACi values shown in Fig. 4(h)
and (g) are independent of carrier frequency fc, while D, Furthermore, from Fig. 4 the required maximum current
values decrease as f, increases. values are found to be
The observation that IT and ITR ratings of the controlled
inverter switches increase (while 1T and IDR diode ratings IT= 1.9 pu (Fig. 4(c), with PF= 1.0, M= 1.0)
decrease) as the load power factor increases is also true for the
case of VVI inverters using the six-step scheme. This is clearly !T= 0.41 pu (Fig. 4(a), with PF= 1.0, M= 1.0)
shown in Fig. 7(a) and (b). Moreover, Fig. 7(g), (h), and (i) ITR=0.67 pu (Fig. 4(b), with PF= 1.0, M=1.0)
show that, as with the sine PWM scheme examined earlier,
respective kVAC,, Di values increase as load power factor fD= 1.6 pu (Fig. 4(f), with PF=0.2, M=0.0)
increases, while Dv values decrease. 'D= 023 Pu (Fig. 4(d), with PF=0.2, M=0.0)
Discussion IDR=0.5 pu (Fig. 4(e), with PF=0.2, M=0.0).
Note that the analytical results presented and discussed in
this section have been obtained assuming circuit components Moreover, maximum input filter kVA
with ideal switching characteristics. Therefore, the effect on
inverter component ratings of factors such as finite switching kVACi=2.4 pu (Fig. 4(g), with PF =0.6, M = 1.0).
times and snubber and/or commutation circuits have not been Conversion of pu values into actual A and kVA values yield
included in these results. The reason is that such effects cannot
be properly assessed before converter topology, type of fTl100X 1.9 pu= 190 A
switches, switching frequencies, snubber configuration, and IT=IOOXO.41 pu=41 A
component values, etc., are known. Moreover, present design
and manufacturing trends, for obvious reasons, favor the ITRl=OOXO.67 pu=67 A
complete elimination of all auxiliary components. Conse- !D=100X1.6 pu=160 A
quently, the omission of the aforementioned deviations from
the proposed design approach does not present a serious ID=IOOXO.23 pu=23 A
problem. Also, one could simply perform the first converter IDR =IOOXO.50 pu=50 A
design iteration by using results obtained as shown in this
section and then include, on subsequent iterations, all relevant and
secondary factors not previously included.
kVACi=10.0x2.4 pu=24.0 kVA.
V. A DESIGN EXAMPLE b) With the inverter employing the VVI six-step scheme
In order to illustrate the significance and facilitate under- shown in Fig. 6, repeat part a).
standing of predicted results discussed in Section IV, the Solution: With 1-pu current = 100 A and by utilizing the
following design example is presented. maximum vu current ratings obtained from Fig. 7, the
1240 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. IA-21, NO. 5, SEPTEMBER/OCTOBER 1985

required current values are found to be


fT=100x1.48 pu=148 A
IT= 100 X 0.47 pu = 47 A
ITR= 100x0.75 pu=75 A
fD=100x1.48 pu= 148 A
ID=100XO.l8 pu=18 A
IDR=l00X0.42 pu=42 A (a)
and
kVACi= l0x 1.85 pu= 18.5 kVA.
Discussion
Readers might be surprised to see that input filter capacitor
kVA, kVACi, are higher with the sine PWM scheme (i.e.,
kVACi = 24 kVA) than with VVI six-step scheme (i.e.,
kVAC1 = 18.5 kVA). The reason, however, becomes clear as
soon as one examines a) the frequency spectra of inverter input (b)
current I,(wt) generated with the two schemes (Figs. 3(h) and
6(g), respectively), and b) the expression (16) used to compute
the kVAC, values. Note that the dominant I#(ot) harmonics
with the sine PWM control scheme and the VVI six-step
control schemes are the thirtieth and sixth, respectively.
Consequently, the required input filter capacitor Cj value will
be far smaller with the sine PWM control scheme.
VI. EXPERIMENTAL RESULTS
To check the validity of the proposed analysis and design
method, selected theoretical results were verified with an
experimental 2-kVA unit. In particular, Fig. 8(a) and (b)
illustrate experimental inverter output line-to-line voltage
Vab(wt) and line current Ia(wt) waveforms, obtained with the
sine PWM control scheme, while Fig. 8(d) and (c) show the
respective switch current I,.(wt) and inverter input current
I1,wt) waveforms. The frequency spectrum for I,wt) is shown
in Fig. 8(e). Comparison with results shown in Figs. 2(c),
3(b), (c), (g), and (h) reveals a close agreement between
predicted and experimental current/voltage waveforms and
values. Moreover, agreement in waveforms inplies agreement
in respective peak and average rms current/voltage values.
Further experimental results regarding worst-case average,
peak, and rms inverter switch current ratings, are shown in
Fig. 9. To facilitate comparison, respective predicted results
have been plotted on the same set of axes. Close agreement
between experimental and predicted results is again evident.
VII. CONCLUSION
A generalized analysis and design approach for forced
commutated static converters has been presented in this paper.
The approach is analytically based on the switching function 0 6 12 ls 24 30 f (PU)
[10] concept and employs digital simulation to obtain relevant (e)
design data. Although it requires a considerable amount of
number "crunching," the subject approach is conceptually Fig. 8. Experimental inverter voltage and current waveforms with SPWM
very simple and can be easily implemented on today's personal scheme. (a) Inverter output line-line voltage V0b; 50 V/div, to = 60 Hz. (b)
Inverter output line current I.; 4 A/div, fo = 60 Hz. (c) Inverter input
computers. The particular application considered in this paper current I,; 4 A/div, fo = 60 Hz. (d) Inverter switch current I,; 4 A/div, f,
is static voltage source inverters. Component ratings for the = 60 Hz. (e) Frequency spectrum of inverter input current Ii.
ZIOGAS et al.: COMPUTER-AIDED ANALYSIS FOR STATIC VOLTAGE SOURCE INVERTERS 1241

+[p.u.] [p.u.]
.5 .5-
T0
.4
it_ IT pf 1 4-
= .

.3 .3t
.2 .2t -- --
pP f =0 2
=

.1 _ .It
I IT
.2 .4 .6 .8 M .2 .4 .6 .8 1T M
(a) (d)
[p.u.l [p.u.]
1-it 1-
111_ ITR IDR
.6- _ pf =
l .6-
,
_ pf = 0. 2
.4 t
. .

. 4 -

I --
I .2 .4 .6 .B 1 M .2 .4 .6 .8 1 M
(b) (e)
[p.u.] [p.u.]
2
IT ID
. . . . . pf = 1 2 --
i .,. pf = 0.2
1.5 -- 1.5-_
I1- _
.5 -_ .5
- 2 I4 -- . - I -
.2 .4 .6 .8 1 M .2 .4 .6 .8 I1
(c) (f)
Fig. 9. Worst-case experimental (dotted lines) and predicted (solid lines)
inverter component current ratings with SPWM scheme. (a) Controlled
switch (transistor) average current ratings IT. (b) Controlled switch rms
current ratings ITR. (c) Controlled switch peak current ratings IT. (d) Diode
average current ratings ID. (e) Diode rms current ratings IDR- (f) Diode peak
current ratings D-

two well-known PWM and six-step VVI inverter structures [8] A. Shonung and H. Stemmler, "Static frequency changers with
have been obtained by using the proposed approach. Results subharmonic control in conjunction with reversible speed ac drives,"
have been expressed in per unit form for maximum applicabil- Brown Boveri Rev., pp. 555-577, Aug./Sept. 1964.
[91 K. Heintze et al., "Pulse width modulating static inverters for the
ity. Finally, selected predicted results have been verified speed control of induction motors," Siemens-Z, vol. 45, pp. 154-161,
experimentally on a #2-kVA laboratory prototype unit. 1971.
[101 1. J. Pitel, S. N. Talukdar, and P. Wood, "Characterization of
programmed-waveform pulse width modulation, IEEE Trans. Ind.
REFERENCES Appl., pp. 707-715, Sept./Oct. 1980.
[1] B. K. Bose, Adjustable Speed AC Drives Systems. New York:
IEEE Press, 1981.
[2] P. C. Krause and T. A. Lipo, "Analysis and simplified representations
of rectifier-inverter induction motor drive," IEEE Trans. PowerApp.
Syst., vol. PAS-88, pp. 588-596, May 1969. Phoivas D. Ziogas (S'75-M'78), for a photograph and biography please see
[3] J. M. D. Murphy and M. G. Egan, "A comparison of PWM strategies page 1214 of this issue.
for inverter-fed induction motors," IEEE Trans. Ind. AppI., vol. IA-
19, May/June 1983.
[41 W. J. Schultz, "Power transistors safe operating area," Power
Conversion Int., pp. 62-66, July/Aug. 1982.
[5] P. D. Ziogas, "Synthesis of optimum gain functions for static power Eduardo P. Weichmann (S'84), for a photograph and biography please see
converters," IEEE Trans. Ind. Appl., vol. IA-19, pp. 401-408, May/ page 1233 of this issue.
June 1983.
[6] P. D. Ziogas and P. N. D. Photiadis, "An exact input current analysis
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Mar./Apr. 1983.
[7] P. D. Ziogas, S. Manias, and E. Wiechmann, "Application of current
source inverters in UPS systems," in IEEE-IAS-1983 Conf. Rec., pp. Victor R. Stefanovic (S'70-M'75-SM'79), for a photograph and biography
949-957. please see page 1214 of this issue.

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