Documentos de Académico
Documentos de Profesional
Documentos de Cultura
Bachelor thesis
by
Shun Yang
i
Modelling and control of a Buck converter
Bachelor thesis
at
Blekinge Institute of Technology
By
ii
Acknowledgement
iii
Abstract
DC/DC buck converters are cascaded in order to generate proper load voltages.
Rectified line voltage is normally converted to 48V, which then, by a bus voltage
regulating converter also called the line conditioner converter, is converted to the bus
voltage, e.g. 12V. A polynomial controller converter transforms the 12V into to a
suitable load voltage, a fraction of or some few voltages. All cascaded converters are
individually controlled in order to keep the output voltage stable constant. In this
presentation focusing on the polynomial controller converter implemented as
Ericsson’s buck converter BMR450. In this paper modeling, discretization and control
of a simple Buck converter is presented.
For the given DC-DC-Converter-Ericsson BMR 450 series, analyzing the
disturbance properties of a second order buck converter controllers by a polynomial
controller.
The project is performed in Matlab and Simulink.
The controller properties are evaluated for measurement noise, EMC noise and for
parameter changes.
iv
Table of Contents
Acknowledgement ........................................................................................................................... iii
Abstract ............................................................................................................................................ iv
List of Tables ................................................................................................................................... vi
List of Figures ................................................................................................................................. vii
List of Symbols .............................................................................................................................. viii
Chapter 1. Introduction ............................................................................................................... 1
Chapter 2. Modeling of Buck Converter..................................................................................... 3
Chapter 3. Polynomial Controller Design................................................................................. 11
Chapter 4. Simulation on MATLAB ........................................................................................ 15
Chapter 5. Results and Conclusion ........................................................................................... 19
References ....................................................................................................................................... 30
Appendix ......................................................................................................................................... 31
Appendix A Simulink Models ..................................................................................................... 31
Appendix B MATLAB Code ....................................................................................................... 33
Appendix C Interesting Phenomenon found in the simulation .................................................... 38
Appendix D Transfer function ..................................................................................................... 42
v
List of Tables
vi
List of Figures
vii
List of Symbols
% Percentage
V Volt
L Inductor
C Capacitor
R Resistor
d Duty Cycle
DC Direct Current
fs Switching Frequency
iL Switch/Inductor Current
yref Reference Voltage
PWM Pulse Width Modulation
viii
Chapter 1. Introduction
This chapter describes the thesis background, objectives, scopes, and summary.
In the chapter, it briefs the description of the buck converter and the voltage-mode
controller as well as the objectives and the scopes. At the end, outline of this thesis is
given in this chapter.
2
Chapter 2. Modeling of Buck Converter
A Buck converter consists of a transistor and diode that applies the supply voltage
on an inductor capacitor, LC, circuit. The output voltage is the voltage across the
capacitor.
The input voltage u on the LC circuit is controlled by pulse width modulation,
PWM. i.e. part of a cycle time, the voltage applied on the LC circuit is Vg and the rest
of the cycle time the input voltage is zero. The range of duty cycle, d=[0, 1], is the
relative time of the cycle time that the supply voltage is connected to the circuit, i.e.
the input is Vg.
The duty cycle d is the control signal to the Buck converter. A circuit diagram
can be seen in Fig. 1.
RL L
Switch
node 1
RC
node 2
Vg
iI
C
The system need to be modeled to get the relationship between the input signal
and output.
The Buck converter system is a switched system. It consists of two switching
states: firstly, when the switch is connected to node 1, charging status; secondly, when
the switch is connected to node 2, discharging status.
The switched system can be modeled as an averaged system. The averaged
system describes the switched system up to about one tenth of the PWM frequency. In
this chapter deriving the two system models of these two switching state, and then
take the average of the two systems according to the duty cycle.
PWM is the method of choice to control modern power electronics circuits. The
basic idea is to control the duty cycle of a switch such that a load sees a controllable
average voltage. To achieve this, the switching frequency (repetition frequency for the
PWM signal) is chosen high enough that the LC filter cannot follow the individual
switching events.
In this case, the sampling interval is 3μs. So the sample frequency is 330 kHz, see
Fig. 2.
3
1
0.9
0.8
0.7
0.6
PWM wave
0.5
0.4
0.3
0.2
0.1
0
0 0.5 1 1.5 2 2.5 3
Time -5
x 10
d
3.5 pwm
2.5
1.5
0.5
When the controller output (green line) d, is bigger than the saw-tooth waveform
(red line), the switch will be connected to node 1, which is charging status and the
input voltage(blue line) is 12V. Otherwise, the switch will be connected to node 2,
discharging status and the input voltage is 0V.
4
The frequency of the repetitive waveform with a constant peak, which is shown
to be a saw-tooth, establishes the switching frequency. This frequency is kept constant
in a PWM control.
RL L
RC
Vg
iI
C
Fig. 4 Circuit with Voltage Source
5
uRC RC 0 iRC
(2.5)
uRL 0 RL iRL
So:
uRC RC 0 0 1 uC RC 0 0 1 uU
RL 0 1 iL 0 RL 0 0 iI
(2.6)
uRL 0
As the output voltage is the sum of capacitor voltage and resistor voltage, where
resistor voltage is the product of current and resistor, then it has
u0 uC uRC (2.8)
uRC RC iL (2.9)
u
u0 uC uRC 1 RC C (2.10)
iL
iC 0 1 uC 0
uU
uL 1 RC RL iL 1
(2.11)
u 1 R uC
0 C
iL
Including the constitutive equations, the system is modeled by
d 1 1
dt uC 0 0
C uC C uU
(2.12)
d i 1 RC RL iL 1 RC iI
L
dt L L L L
u0 1 RC uC 0 0 uU
(2.13)
iL 0 1 iL 0 0 iI
The ABC-differential equation system is given as
x A1 x B1u
(2.14)
y C1 x
6
1
0 C
A1 (2.15)
1 RC RL
L L
1
0
C
B1 (2.16)
1 RC
L L
1 RC
C1 (2.17)
0 1
Where u is the input of system which is Vg in the diagram and y is the output of
the system.
RL L
RC
iI
C
Fig. 5 Circuit without Voltage Source
iC 0 0 0 1 1 uC
iRC 0 0 0 1 1 uRC
i 0 0 0 1 1 uRL (2.18)
RL
uL 1 1 1 0 0 iL
1 1 0 0 0 iI
uI
7
iC 0 0 0 1 uC 1
iRC 0 0 0 1 uRC 1 i (2.19)
i 0 0 0 1 u 0 I
RL RL
u 1 1 1 0 i 0
L L
Modeling the two energy storing components:
iC 0 1 uC 0 0 uRC 1
iI (2.20)
uL 1 0 iL 1 1 uRL 0
iRC 0 1 uC 1
iI (2.21)
iRL 0 1 iL 0
uRC RC 0 iRC
(2.22)
uRL 0 RL iRL
uRC RC 0 0 1 uC RC 0 1
RL 0 I
i
uRL 0 RL 0 1 iL 0 (2.23)
0 RC uC RC
iI
0 RL iL 0
Then it can simplify the equation:
iC 0 1 uC 1
iI
uL 1 0 iL 0
0 0 0 RC uC 0 0 RC
iI (2.24)
1 1 0 RL iL 1 1 0
0 1 uC 1
iI
1 RC RL iL RC
Including the constitutive equations, the system is modeled as below:
d 1 1
dt uC 0
C uC C
iI (2.25)
d i 1 RC RL iL RC
L
dt L L L
The ABC-differential equation system is given as
d 1 1
dt uC 0 0
C uC C uU
(2.26)
d i 1 RC RL iL RC iI
L 0
dt L L L
x A2 x B2 u (2.27)
8
u0 1 RC uC
(2.28)
iL 0 1 iL
y C2 x (2.29)
As it can be observed that ABCD matrix of the two systems, that ACD matrices
are the same while the B matrix are different.
So only need to take the average value of B matrix.
B d B1 1 d B2 (2.31)
0 0 0 1/ Cc
where B11 and B12 0 R / L
1/ L 0 c
0 0 0 1/ Cc
B21 and B22 0 R / L
0 0 c
Then the calculation is as below:
0 0 0 1/ Cc Vg 0 0 0 0 0 1/ Cc Vg
Bu 0 R / L I d (1 d )
1/ L 0 c 0 0 0 0 0 0 Rc / L I 0
0 0 0 I 0 / Cc 0 0 0 I 0 / Cc
d (1 d )
Vg / L
0 0 I 0 Rc / L 0 0 0 I 0 Rc / L
(2.33)
0 0 0 I 0 / Cc
d
Vg / L 0 0 I 0 Rc / L
0 I 0 / Cc d
Vg / L Rc / L I 0
Then the averaged system is as below:
x Ax Bu
(2.34)
y Cx
Writing the continuous-time system in a detailed way:
9
d 1 I0
0
dt uC 0 C uC Cc d
(2.35)
d i 1 R RL iL Vg Rc I 0
L C
dt L L L L
Since B is the averaged result of the switched system and the input voltage and
the capacitor, resistor and inductor values are fixed. So B will be decided by the duty
cycle d, the value of B will change when duty cycle d changes, so arranging d be the
control signal.
As the averaged system is a continuous time system, it needs to be transferred it
into a discrete time system. So taking samples from the continuous time system by a
sampling interval h.
The discretization is performed using Matlab, see Appendix B. The zero order
holder is assumed on the input signal, when performing the discretization.
The discrete-time transfer function. Given the system
x Fx Gu
(2.36)
y Cx
The transfer function is given by
Y
H z
C zI F G
1
(2.37)
U
As it is mentioned in chapter one, the suitable parameters for the first performed
simulation as below, see Table 2.
Table 2 Parameters of system
Topology Values
Inductance L=0.9μH
Capacitance C=150μF
Resistance of Inductor RI=2mΩ
Resistance of Capacitor RC=2mΩ
Sampling interval h=3μS
PWM sampling interval hPWM=30ns
10
Chapter 3. Polynomial Controller Design
V z
Controller System
Yref z Y z
1 U z B z
Kr H z
C z A z
D z
It gets the reference voltage as input of the controller and u as the output of
controller, while u is the input of buck converter system and y is the output of buck
converter system. Equation Chapter 3 Section 1
More importantly, yref serves as the feedback of the system and it will be
compared with the reference voltage. And by the comparing, the controller will adjust
to make the output voltage close to the reference voltage. If the output voltage is
higher than the reference voltage, then the controller will make the switch open to
discharge the circuit; while the output voltage is lower than the reference voltage, the
controller will close the switch to charge for the circuit.
The controller is a discrete transfer function, designed in order to get a certain
poles in the closed system. (The described design method is adopted from
Schmidtbaer, [2])
As in the second order discrete system, transfer function is [2]
Y z b z 1 b2 z 2 Bz
H z 1 (3.1)
U z 1 a1 z a2 z
1 2
A z
The transfer function can be expressed as a difference equation [2]
y k a1 y k 1 a2 y k 2 b1 u k 1 b2 u k 2 (3.2)
11
B z
As Y z U z H z U z , the closed system is then given as [2]
A z
B z D z B z Kr
Y z Y z Yref z (3.5)
A z C z A z C z
Y z B z Kr
(3.6)
Yref z A z C z B z D z
When z=1, Kr can be designed in order to get the correct stationary gain, [2]
C 1 B 1 P 1
K r D 1 (3.7)
A 1 B 1
This implies that the output signal Y stationary will be equal to the input value
Yref(z).
For polynomial controller design, looking at the system first.
B z
From the system, the transfer function is H z
A z
Then start the designation of polynomial controller, which refer to determine the
polynomials C(z) and D(z).
12
Z-plane Im
1
1 Re
Fig. 7 The shadow region inside the unit cycle is stable for system
As it can be seen from Fig. 7, z=0.5, z=0.5, and z=0.5are in the shadow region.
Then as the example, it can be chosen as:
P( z) (1 0.5 z 1 ) (1 0.5 z 1 ) (1 0.5 z 1 ) (3.8)
13
p1 a1 c1 b1 d 0
p2 a1 c1 a2 b1 d1 b2 d 0 (3.12)
p3 a2 c1 b2 d1
And C(z) and D(z) polynomials coefficients are below, see Table 5.
Table 5 Coefficients of Polynomial controller
Controller Polynomial Values
coeffecients
c1 0.0808
d0 0.7166
d1 -0.6485
The pole placement is fixed and the sampling interval h=3e-6 which is used by
Ericsson now. When placing the poles it has to judge that the control signal do not
saturate outside 0-1 for a reasonable change in load current, see chapter 4.
14
Chapter 4. Simulation on MATLAB
After obtaining the mathematical system model and polynomial controller model,
the simulation block building in Simulink of Matlab. In this chapter, the block of
system is built first. Secondly, adding the controller block after the system block, see
Fig. 8. Finally adding the PWM with the controller.
V z
Controller System
Yref z Y z
1 U z B z
Kr H z
C z A z
D z
15
Fig. 10 Polynomial controller block
The input of the controller is the output of the system, while the output of the
controller which will use to compare with PWM wave and then control the switch to
adjust the charging and discharging of circuit.
???
Repeating
Sequence 1
Constant
Saturation
<= dVg
d
Relational Switch To Workspace5
Constant2
Operator
Constant1
In Simulink, the relational operator is used to compare two controller output with
PWM value, see Fig. 12.
16
Fig. 12 Relational operator
Fig. 13 Switch
By the way, having the saturation for the controller output between 0 and 1
17
because the range of PWM value is between 0 and 1, see Fig. 14.
18
Chapter 5. Results and Conclusion
In chapter 4, finishing the model building in Simulink, now, run the simulation
and analysis the results. The simulation period use is 100 sample intervals which are
enough for us to observe the result.
The inductor current is much bigger than the output voltage and controller output.
In order to observe the result clearly, it shows the inductor current 10 times smaller.
Discrete model
3.5
X= 42
3 Y= 3.3
2.5 Vout
d
Output voltage
1.5
X= 42
0.5 Y= 0.275
0
0 20 40 60 80 100 120
Sampling sequence k
Fig. 15 Discrete model without saturation, system output and controller output
As it can be observed that the output voltage of discrete system can satisfy the
required voltage.
The controller output can get stable quickly (in 16 sample intervals) and remain
stable. What’s more, the controller make the output voltage come to stable status
quickly (in 16 sample intervals) and remain the wanted output voltage (reference
voltage 3.3V). The simulation is according to the polynomial controller theory, so it is
an illustration of the theory by numerical calculations.
When designing the controller, it should not hit the saturation limits too much for
a reasonable disturbance. And the simulation result satisfies it.
For chosen pole placement of the shown controller, see Table 4.
For the continuous model, the simulation result is showed in Fig. 16
19
Continuous model
3.5
X: 0.000135
3 Y: 3.3
Vout
d
2.5
Output voltage
1.5
X= 0.000135
0.5 Y= 0.275
0
0 0.5 1 1.5 2 2.5 3 3.5
Time s -4
x 10
As the reference voltage is 3.3V, and the output voltage can achieve it very well.
What is more, the output voltage remains stable at 3.3V. It shows that the continuous
model with polynomial controller works perfectly.
The controller output can get stable quickly (in 48 μs) and remain stable. What’s
more, the controller make the output voltage come to stable status quickly (in 48 μs)
and remain the wanted output voltage (reference voltage 3.3V). It is very close to the
polynomial controller theory.
20
Simulation result, without disturbance, without noise
6
Vout
Output voltage, Inductor current, Controller output d
5
iL/10
4 X: 0.0001593
Y: 3.316
0 X: 0.0001593
Y: 0.2749
-1
0 0.5 1 1.5 2 2.5 3 3.5
Time -4
x 10
It can be seen that after 60μs, the output voltage get quite stable near 3.3V and
the controller output is also very stable near 0.275 = 3.3/12, which is equal to
reference voltage divide input voltage.
21
Noise Magnitude
0.25
0.2
0.15
0.1
0.05
Noise
0
-0.05
-0.1
-0.15
-0.2
-0.25
0 1 2 3
Time -4
x 10
The noise used in the simulation is suitable, not so small and not so big. And then
use the same kind of noise in the simulation. The noise is added with the output
voltage as the measurement noise.
And the output voltage measurement with noise can be seen in Fig. 19.
3.5
3
Measurement Noise
2.5
With Noise
2
1.5
0.5
-0.5
0 1 2 3
Time -4
x 10
22
It can be find that after adding some noise, the output is still stable. The noise is
not very big but has some bad effect on the stability of controller. When the output
cannot get stable, the range is 3.0V-3.5V. It shows that the controller without noise is
more stable than the one with noise.
d
5
iL/10
4 X: 0.0001246 X: 0.0002289
Y: 3.346 Y: 3.338
3
X: 0.0001594
Y: 2.863
2
0 X: 0.0001246 X: 0.0002289
Y: 0.2767 Y: 0.2766
-1
0 0.5 1 1.5 2 2.5 3 3.5
Time -4
x 10
The stable output voltage under control is about 3.342 V which is quite close to
the reference voltage 3.3V, and it means the controller is good.
At the 60th sample interval (180μs) changing the load current from 5A to 15A, the
output voltage falls from 3.346V to 2.862Vand it recover to the stable voltage 3.338V
soon (in 10 sample intervals). The drop percentage is (3.346-2.863)/3.346 = 14%,
which is acceptable for the good performance. When the load changes suddenly the
controller can take the control of output voltage and make it recover to the stable
voltage soon.
23
When having some parameters change, to observe the change of simulation
result.
In the simulation changing the inductance and capacitance by increasing 10%.
See Fig. 21.
5 d
iL/10
4 X: 0.0001306 X: 0.0002187
Y: 3.352 Y: 3.315
3
X: 0.0001593
Y: 2.908
2
0 X: 0.0001306 X: 0.0002187
Y: 0.2706 Y: 0.2781
-1
-2
0.5 1 1.5 2 2.5 3
Time -4
x 10
Fig. 21 +10%, L=0.99μH, C=165μF, Simulation result, with disturbance, without noise
The stable output voltage under control is about 3.346 V which is quite close to
the reference voltage 3.3V both before and after the disturbance. It means the
controller is good.
At the 60th sample interval (180μs) changing the load current from 5A to 15A, the
output voltage falls from 3.352V to 2.908Vand it recover to the stable voltage 3.315V
soon (in 10 sample intervals). The drop percentage is (3.352-2.908)/3.352= 13%,
which is acceptable for the good performance. When the load changes suddenly the
controller can take the control of output voltage and make it recover to the stable
voltage soon.
24
Simulation result, with disturbance, without noise
5
Vout
Output voltage, Inductor current, Controller output d
4 X: 0.000127 X: 0.0002234
iL/10
Y: 3.336 Y: 3.348
X: 0.0001592
Y: 2.82
2
0 X: 0.000127 X: 0.000223
Y: 0.2748 Y: 0.2749
-1
0 0.5 1 1.5 2 2.5 3 3.5
Time -4
x 10
Fig. 22 -10%, L=0.81μH, C=135μF, Simulation result, with disturbance, without noise
The stable output voltage under control is about 3.345 V which is quite close to
the reference voltage 3.3V both before and after the disturbance. It means the
controller is good.
At the 60th sample interval (180μs) changing the load current from 5A to 15A, the
output voltage falls from 3.336V to 2.82Vand it recover to the stable voltage 3.348V
soon (in 10 sample intervals). The drop percentage is (3.346-2.82)/3.346 = 15.7%,
which is acceptable for the good performance. When the load changes suddenly the
controller can take the control of output voltage and make it recover to the stable
voltage soon.
And from Fig. 21 and Fig. 22, there is no big difference for simulation result.
It means the change below 10% is tolerant.
25
Output voltage measurement with noise, with disturnance
4.5
3.5
Measurement Noise
2.5
2
With Noise
1.5
0.5
-0.5
0 1 2 3
Time -4
x 10
As it can be seen, after adding the noise, the output voltage is not so stable like
before. But the output voltage is close to the reference voltage totally and the
controller output is close to 0.275 but not so stable.
The simulation need to try large capacitor, and observe the controller quality. For
the simulation result, see Fig. 24.
d
8 iL/10
-2
0 0.5 1 1.5 2 2.5 3 3.5
Time -4
x 10
26
As it can be seen from Fig. 24, the large capacitor with large resistor has a bad
simulation result. The output voltage does not reach the stable reference voltage 3.3V,
and it can be seen by viewing the control signal d, that the system is not stable.
By changing the controller design the system can be stable. The changed design
implies that the closed system get a lower bandwidth.
3.5
3
Vout
2.5 d
iL/10
2
1.5
0.5
-0.5
0 0.5 1 1.5
Time s -3
x 10
Fig. 25 Output Voltage before and after disturbance when RL =2mΩ, RC=50mΩ, C=500uF
Using a FIR filter for averaging the signal for one PWM period gives the
signal shown in Fig. 26. The FIR filter removes the ESR ripple.
27
Discrete polynomial controlled Buck, switched continuous model filtered measurement
3.5
X: 0.0005167 X: 0.001281
2.5
1.5
0.5
0
0 0.5 1 1.5
Time s -3
x 10
From Fig. 26, it can be seen the output voltage clear that the stable output voltage
before disturbance is 3.35V and the stable output voltage after disturbance is 3.33V.
Both of them are close to the reference voltage 3.3V. And during the disturbance
the output voltage drops to the minimum value 3.133V, so the drop percentage is
(3.35-3.133)/3.35 = 6.48%. It has better control about the disturbance.
When the small capacitor has about 14% voltage drop.
After adding the noise in Fig. 18, get the simulation result as below, see Fig. 27.
28
Output voltage measurement with noise
4
3.5
2.5
Measurement Noise
With Noise
1.5
0.5
-0.5
0 0.5 1 1.5
Time -3
x 10
From Fig. 27, it can be seen the output voltage with noise, the noise have
magnitude between -0.2 and 0.2 and frequency as 33MHz.
5.7 Conclusions
After observing the simulation results above, conclusions can be drawn as below:
1. The controller is good enough that it can keep the output voltage at the
reference voltage level.
2. A larger capacitor has better quality to deal with disturbance because it has
less voltage drop with the current disturbance. The larger capacitor will imply
a lower bandwidth in the closed system.
3. A controller design that works for a small capacitor load can give a non-stable
system for a larger capacitor load.
4. It is possible to use pole placement in a discrete polynomial controller as
design method
29
References
Books
[1] Karl J. Åström, Björn Wittenmark; Computer controlled systems, third edition;
1997; Prentice Hall international, Inc., Upper Saddle River, New Jersey, USA
ISBN:0-13-314899-8
Websites
30
Appendix
Model 1:
Continuous time model without saturation, see Appendix Fig. 1.
t
dc1
Clock To Workspace2
To Workspace1
1 Bctf(s)
Kr yc1
cpoly(z) Actf(s)
Step1 Gain2 Add Discrete Filter Transfer Fcn To Workspace7
dpoly(z)
1
Discrete Filter2
The model consists of the polynomial controller and a continuous system. For
Simulation result, see Fig. 16.
Model 2:
Discrete time model without saturation, see Appendix Fig. 2.
d1
To Workspace1
1 Bdtf(z)
Kr y1
cpoly(z) Adtf(z)
Step1 Gain2 Add Discrete Filter Discrete Filter1 To Workspace7
dpoly(z)
1
Discrete Filter2
The model consists of the polynomial controller and a discrete system. For
Simulation result, see Fig. 15.
31
Model 3:
Discrete time model with saturation, see Appendix Fig. 3.
d2
To Workspace1
Saturation
1 Bdtf(z)
Kr y2
cpoly(z) Adtf(z)
Step1 Gain2 Add Discrete Filter Discrete Filter1 To Workspace7
dpoly(z)
1
Discrete Filter2
Model 4:
PWM model with controller, see Appendix Fig. 4
pwm
Repeating To Workspace4
Sequence 1
Constant Band-Limited
White Noise2
SaturationRate Transition
1/z
1 <= x' = Ax+Bu Vout
Kr
cpoly(z) y = Cx+Du
Relational Add2 To Workspace7
Switch
Step1 Gain2 Add Discrete Filter State-Space
Operator
iL
0
To Workspace3
Constant1 Step2
d
Rate Transition1
Add1 ZOH To Workspace1
dpoly(z)
1 Band-Limited
Discrete Filter2 White Noise1
ts
Clock To Workspace2
dVg
To Workspace5
The model consists of the polynomial controller and PWM switched system. For
Simulation result, see Fig. 17-27.
32
Appendix B MATLAB Code
I_steptime = 50*h;
% noise = 1e-10;
noise = 0;
% Model
A = [ 0 1/Cc ; -1/L -(Rc+Rl)/L ];
% Input signals duty cycle and load current
B1 = [ 0 -1/Cc ; 1/L Rc/L ]; % With power supply
B2 = [ 0 -1/Cc ; 0 Rc/L ]; % Without power supply
33
B = B1*Vg; %averaged system, the control signal is duty cycle d
C = [ 1 Rc ; 0 1 ];
D = [ 0 0 ; 0 0 ];
% Initial values
uC0 = 0;
iL0 = 0;
% Continuous system
Gcss = ss(A,B(:,1),C(1,:),D(1,1));
[Ac,Bc,Cc,Dc] = ssdata(Gcss)
Gctf = tf(Gcss);
[Bctf,Actf] = tfdata(Gctf,'v')
% Discrete system
Gdss = c2d(Gcss,h,'zoh');
[Ad,Bd,Cd,Dd] = ssdata(Gdss)
Gdtf = tf(Gdss);
[Bdtf,Adtf] = tfdata(Gdtf,'v')
34
b1 = Bd1;
b2 = Bd2;
a1 = Ad1;
a2 = Ad2;
% Pole placement
q1 = 0.5;
q2 = 0.5;
q3 = 0.5;
% p1 = a1 + c1 + b1*d0
% p2 = a1*c1+ a2 + b1*d1 + b2*d0
% p3 = a2*c1 + b2*d1
% polynomial coefficients
c1 = (b1^2*p3 + b1*b2*(a2-p2) + b2^2*(p1-a1))/(a2*b1^2 + b2^2 - a1*b1*b2);
d0 = (p1-a1-c1)/b1;
d1 = (p3-a2*c1)/b2;
a1
a2
b1
b2
c1
d0
d1
%% Simulation
N = 100; % 100 sample intervals
sim('Buckd1',N); % Discrete time model without saturation
sim('Buckd2',N); % Discrete time model with saturation
35
sim('Buckc1',N*h); % Continuous time model
sim('Buckswitch',N*h); % PWM model with saturationplot
figure(2)
stairs([y1 d1])
legend('Vout','d')
title('Discrete model')
xlabel('Sampling sequence k'),ylabel('Output voltage')
figure(3)
td=0:h:h*(length(y1)-1);
stairs(td,y1)
hold on, stairs(td,d1),hold off
legend('Vout','d')
title('Discrete model without saturation')
xlabel('Time s'),ylabel('Output voltage')
figure(4)
stairs([y2 d2])
legend('Vout','d')
title('Discrete model with saturation')
xlabel('Sampling sequence k'),ylabel('Output voltage')
figure(5)
plot(t,yc1)
dt=t(end)/(length(dc1)-1);
tt=0:dt:t(end);
hold on,stairs(tt,dc1),hold off
legend('Vout','d')
title('Continuous model')
xlabel('Time s'),ylabel('Output voltage')
figure(6)
plot(ts,Vout,ts(1:length(d)),d,ts,iL/10)
legend('Vout','d','iL/10')
grid
title('Switched continuous model with saturation')
title('Simulation result, with disturbance, without noise')
xlabel('Time'),ylabel('Output voltage, Inductor current, Controller
output')
figure(7)
plot(ts,Vout,ts(1:length(d)),d,ts,pwm)
legend('Vout','d','PWM')
36
grid
title('Switched continuous model with saturation')
xlabel('Time'),ylabel('Output voltage, Controller output, PWM wave')
figure(8)
plot(ts(1:1001),dVg(1:1001)*12,ts(1:1001),d(1:1001),ts(1:1001),pwm(1:
1001))
legend('dVg','d','PWM')
title('Discrete polynomial controlled Buck, switched continuous model
with saturation')
xlabel('Time'),ylabel('controlled input voltage, controller output, PWM
wave')
figure(9)
plot(ts(1:2001),d(1:2001),ts(1:2001),pwm(1:2001))
legend('d','PWM')
title('Controller output & PWM wave')
xlabel('Time'),ylabel('Controller output, PWM wave')
figure(10)
plot(ts(1:10000),Noise(1:10000))
title('Noise Magnitude')
xlabel('Time'),ylabel('Noise')
figure(11)
plot(ts(1:10000),Vout_N(1:10000))
legend('With Noise')
title('Output voltage measurement with noise, without disturnance')
xlabel('Time'),ylabel('Measurement Noise')
37
Appendix C Interesting Phenomenon found in the simulation
The simulation shows some interesting phenomenon which will be showed in the
last section of chapter 5.
When having C = 150μF, L = 0.9μH, if many different combinations of resistors
with capacitor and inductor are tried, and choosing the most 4 typical combinations,
the different simulation results are showed as below.
In Appendix Table 1 the first combination is given:
Vout
3.6
Output voltage, Inductor current, Controller output
d
iL/10
3.5
3.4
3.3
3.2
3.1
3
0.5 1 1.5 2 2.5
Time -4
x 10
Appendix Fig. 5 Output Voltage before and after disturbance when RL = 2mΩ and RC=2mΩ
In Appendix Fig. 5, it can be seen that the output voltage before and after
disturbance is almost the same around 3.33V. The transfer function can be calculated
0.01963 z 2 0.01805 z 0.001586
by use of Matlab, see Appendix D, H ( z ) .
z 3 1.5 z 2 0.75 z 0.125
The stationary gain is -0.0196.
38
In Appendix Table 2 the second combination is given:
3.55 Vout
Output voltage, Inductor current, Controller output
d
3.5
iL/10
3.45
3.4
3.35
3.3
3.25
3.2
3.15
3.1
Appendix Fig. 6 Output Voltage before and after disturbance when RL < RC
In Appendix Fig. 6, it can be seen that the output voltage before disturbance (about
3.36V) is lower than the one after disturbance (about 3.41V). The transfer function
can be calculated by use of Matlab, see Appendix D,
0.0188 z 2 0.02177 z 0.002519
H ( z) . The stationary gain is -0.0188.
z 3 1.5 z 2 0.75 z 0.125
39
Appendix Table 3 Capacitor’s Resistor is smaller than Inductor’s
Resistor Values
RL 10mΩ
RC 2mΩ
3.6 Vout
Output voltage, Inductor current, Controller output
d
iL/10
3.5
3.4
3.3
3.2
3.1
2.9
Appendix Fig. 7 Output Voltage before and after disturbance when RL >RC
In Appendix Fig. 7, it can be seen that the stable output voltage before
disturbance (about 3.33V) is bigger than the one after disturbance (about 3.27V). The
transfer function can be calculated by use of Matlab, see Appendix D,
0.01964 z 2 0.01774 z 0.001343
H ( z) . The stationary gain is -0.0196.
z 3 1.5 z 2 0.75 z 0.125
40
Simulation result, with disturbance, without noise
3.8
Vout
3.5
3.4
3.3
3.2
3.1
2.9
2.8
In Appendix Fig. 8, it can be seen that the stable output voltage before and after
disturbance is almost the same around 3.35V. The transfer function can be calculated
0.01881 z 2 0.02135 z 0.002538
by use of Matlab, see Appendix D, H ( z ) .
z 3 1.5 z 2 0.75 z 0.125
The stationary gain is -0.0188.
41
Appendix D Transfer function
42