Hardware Implementation of QPSK

Modulator for Satellite Communication

Presented By :
Kiran Prajapati
Pradeep Santdasani

Internal Guide : External Guide :

Dhara Shah E P Balasubramanian
Lecturer (EC Dept.) Group Director SPSG
L C Institute of Tech. Space Application Center (ISRO)
 Agenda

 Overview of Satellite Communication

 Overview of Digital Modulation
 Description of QPSK Modulator
 Steps of Project Implementation
 Matlab Simulation of QPSK Modulator
 Hardware Implementation of QPSK Modulator
 Results
 Conclusion
 Future Scope

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 Overview of Satellite Communication

 Digital Modulation
schemes are used in
Satellite Communication
Systems.

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 Overview of Digital Modulation

 Any features of a carrier signal –

amplitude, frequency, or phase
can be digitally modulated .

 ASK = Amplitude Shift Keying

 FSK = Frequency Shift Keying

 PSK = Phase Shift keying

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 Description of QPSK Modulator

Data
Phase Shift Keying :

 An M-phase PSK modulator puts the BPSK

phase of carrier into one of M - states
according to the value of a input .
QPSK
 By increasing states , it can transmit
more data in same bandwidth
8PSK

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 Description of QPSK Modulator

Block Diagram Constellation

sin ωct
Q - Signal
0 bit = 90 o

I data 01 bit =135 o 00 bit = 45 o

Modulator
Output
+
0 bit = 0 o
Q data I - Signal
1 bit = 180 o

11 bit = 225 o 10 bit = 315 o

Cos ωct
1 bit = 270 o

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 Description of QPSK Modulator
Equations Phasor Diagram
I Q I Mod Q Mod QPSK O/P QPSK
Data data O/P O/P O/P Q - Signal
Phase +cos ωct

0 0 sin ωct cos ωct sin ωct + cos ωct 45˚

= sin ( wct + 45 ) sin (ωct + 135 ) sin (ωct + 45 )

0 1 sin ωct -cos ωct sin ωct - cos ωct 135˚

= sin (ωct + 135)
I - Signal

1 0 - sin ωct cos ωct - sin ωct + cos ωct 315˚ -sin ωct +sin ωct

= sin (ω ct - 45 )

1 1 - sin ωct -cos ωct - sin ωct - cos ωct 225˚

sin (ωct - 135 ) sin (ωct - 45 )
= sin (ωct - 135 )
-cos ωct

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 Description of QPSK Modulator

Time Domain

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 Steps of Project Implementation

 Matlab Simulation
 Simulation on Xilinx FPGA
 Implementation on Virtex – 4
 Testing and Debugging

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 Matlab Simulation of QPSK Modulator

QPSK Modulator Block Diagram

I data Unipolar
to Upsampling Multiplier
Bipolar
Adder

Q data Unipolar
to Upsampling Multiplier
Bipolar

90o

Carrier
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 Matlab Simulation of QPSK Modulator

Upsampling

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 Matlab Simulation of QPSK Modulator

I - Signal Modulation

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 Matlab Simulation of QPSK Modulator

Q Signal Modulation

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 Matlab Simulation of QPSK Modulator

QPSK Time Domain Signal

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 Matlab Simulation of QPSK Modulator

Baseband Spectrum

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 Matlab Simulation of QPSK Modulator

QPSK Spectrum

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 Matlab Simulation of QPSK Modulator

Root Cosine Filter

 It is used for band limit the signal

bandwidth .
 The objective is to create a pulse
that resembles the sin x/x shape.
 So that receiver samples at
intervals of Tb , where Tb is the bit
period .
 At the sampling instant , the “tails”
from all preceding pulses have zero
values

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 Matlab Simulation of QPSK Modulator

QPSK Modulator Block Diagram

I data Unipolar
to Upsampling Shaping Multiplier
Bipolar

Adder

Q data Unipolar
to Upsampling Shaping Multiplier
Bipolar
90o

Carrier
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 Matlab Simulation of QPSK Modulator

QPSK Spectrum

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 Matlab Simulation of QPSK Modulator

QPSK Bandwidth

1
Bandwidth = f d (1 + α )
2

Carrier Frequency ƒc = 25 MHz

Data Frequency ƒd = 25 MHz

Roll off Factor α = 0.3

Bandwidth = 16.25 MHz

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 Hardware Implementation of QPSK Modulator

Digital Signal Processing (DSP) in FPGA :

 DSP algorithm has sum of products of equations

M
y[ n] = ∑ bk x[ n − k ]
k =0

 DSP systems are required to perform intensive arithmetic operations such as

multiplications and additions.
 FPGAs can be used to implement DSP system as they provide tremendous
computational power by using highly parallel architecture for high
performance.
 FPGAs dedicated for DSP has Embedded multipliers and distributed RAM for
storage of coefficients.

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 Hardware Implementation of QPSK Modulator

Field Programmable Gate Array (FPGA)

 It consists of I/O buffers, an array of
configuration logic blocks and
programmable interconnect
structures.
 Programming of the interconnect
structure is accomplished by RAM
cells whose o/p terminals are
connected to the gates of MOS pass
transistor

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 Hardware Implementation of QPSK Modulator

Virtex – 4 (SX Family)

 Virtex 4 development kit is based on

the 4VSX35 FPGA

 SX family is focused for DSP

applications

 It has embedded multipliers which

increases speed in MAC operations

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 Hardware Implementation of QPSK Modulator

Xilinx ISE

 The Integrated Software Environment (ISE) is the Xilinx design software suite
that allows taking design from design entry through Xilinx device programming.

Design Device
Synthesis Implementation Verification
Entry Configuration

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 Hardware Implementation of QPSK Modulator

QPSK Modulator Block Diagram Look Up

Table sinwct

I Carrier
Unipolar Shaping
I data to filter
bipolar QPSK
Modulated
Signal
+

Unipolar Shaping
Q data to filter
bipolar
Q Carrier

Look Up
Table coswct
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 Hardware Implementation of QPSK Modulator

Lookup Table Method

 The lookup-table method is technique used for generating periodic waveforms.

 It involves reading a series of stored data values that represent the waveform.

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 Hardware Implementation of QPSK Modulator

I & Q Carrier Signal Generation

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 Hardware Implementation of QPSK Modulator

QPSK Modulated Signal

Simulated Implemented

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 Hardware Implementation of QPSK Modulator

QPSK Spectrum

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 Results

QPSK Spectrum :
Simulated Implemented

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 Results

Hardware Setup :

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 Conclusion
QPSK modulator has been successfully implemented on the Xilinx Virtex – 4
Development kit. QPSK Modulator is simulated in Matlab Software to verify
and compare its functionality taking into account the limitations imposed by the
hardware

The modulator algorithm has been implemented on FPGA using the VHSIC
hardware description language (VHDL) on Xilinx ISE 8.2i. Simulated waveform
is compared with actual output on the digital oscilloscope and spectrum
analyzer.

The designed modulator may be used as a test bed for the functional verification of
various RF subsystems which requires to be parameterized under modulated
signal conditions

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 Future Scope

The hardware module can be functionally extended to the following to

support a variety of applications:
 QPSK Demodulator
 Multi Carrier QPSK Modulator
 Higher Order Digital Modulator and Demodulator

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 References

 Modern Digital and Analog Communication Systems By B.P. LATHI

 Satellite Communication By William Pratt
 Contemporary Communication Systems using Matlab By John G. Proakis
 VHDL Primer By J.Bhasker
 Digital Systems Design with VHDL and Synthesis By K.C.Chang
 User Guide of Xilinx ISE
 Datasheet of Virtex - 4
 Datasheet of P240 Prototype Module

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Thanks