M.Sc. Thesis.

Microcontroller Based Datalogger for Front End

Electronics of MEMS sensors

MIC - Department of Micro and Nanotechnology

Technical University of Denmark

c
2007 Muhammad Asif Malik.
Preface

In order to assess the behaviour of cod fish and its population in the Baltic ocean,
a data storage tag (DST) has been demanded from Danish Institue for Fisheries
Research (DFU) to be sutured onto the fish. The tag is planned to be implanted
in the fish body for at least one year. When the fish will be re-caught second time,
the stored digital data in the electonics part of the tag will provide us information
about the fish past journey.
There are fours sensors that are essential to gather the data. Pressure sensor
will provide information about the depth maneuvering of fish. On the basis of con-
ductivity, we can measure salinity of the water. Temperature and light sensors will
complete the rest of the information for determinig the footsteps of fish.
The usefulness of current DSTs is strongly limited by the size, price and limited
measuring capabilities. The DSTs comprise of a sensor part, interface electronics,
a non-volatile memory and a energy source. The aim of Fish&Chip project is to
increase measuring capabilities and to shrink the system size while keeping in mind
that the design is only a complete success if tags can be produced at a price com-
parable or preferably lower than that of the DSTs available today[6].
Before the start of the project, a prototype of the above mentioned four sensors,
Pressure, Temperature, Light and Salinity measurement sensors have already been
integrated in one module. MIC foundry rules has been used to fabricate the multi-
chip module. That was a giant step towards the generation of extremely small data
storage tags. The current size of the multichip module is 4 ×12.3mm2 .
There are many contemporary designs available in the market like Cefas G5 de-
sign and DSTs from Star-Oddi. The data storage tag (DST) fabricated at DANCHIP,
compatible with MIC MPW process for MEMS devices, has the distinguishing char-
acteristic of having direct contact with the ocean environment. Hence, expecting to
yield more measurements of ambient pressure, temperature and salinity.
This project is a board level design for reading out the signals from multisensor
module and storing the data into non-volatile memory. The stored data will fur-
ther be processed by an application of some computational device like Desktop PC,
Labtop etc. There has been several verions for this application. The hallmark of
the current version is that it utilzes extremely low power and area efficient micro-
controller.

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Acknowledgment

I am grateful to my parents for their persevere patience and kind permission to allow
me to stay in Denmark for quite long time.
And then thanks for a highly friendly and cooperative attitude of MEMS-Applied
Sensors group at MIC, whom I found always supportive and welcoming. I consider
it my privilege to work with them on the project. The project achievements will
remain a milestone in my professional life.
Finally, I thank to my supervisor Erik V Thomsen, co-supervisor Ole Hansen
and colleagues Anders Hyldgård, Zdenek K. Ferus, Dennis Mortensen for their time
to time feedback on the project. I wish them luck in their projects for further en-
deavours.

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Contents

1 Introduction 1
1.1 Motivation behind Data Storage Tag Industry . . . . . . . . . . . . . 1
1.2 Probing into a typical DST . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 DSTs in the Market . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Packaging of the DST . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.6 Report Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 System Level issues 8

2.1 Given Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Power Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 Fabrication Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3 Design space exploration 13

3.1 Critique on ATMEL MCU based design [4] . . . . . . . . . . . . . . . 13
3.2 Critique on TI MCU based design [5]. . . . . . . . . . . . . . . . . . . 14
3.3 ”Dream” MCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.4 Comparison of different Microcontrollers . . . . . . . . . . . . . . . . 16
3.5 Why MSP430F2013 microcontroller? . . . . . . . . . . . . . . . . . . 18
3.6 Sigma-Delta ADC vs conventional ADCs: . . . . . . . . . . . . . . . . 19
3.7 Sigma-Delta Analog to Digital Converter . . . . . . . . . . . . . . . . 20
3.8 Justification of Memory Used . . . . . . . . . . . . . . . . . . . . . . 20
3.9 CAD tools to layout the design . . . . . . . . . . . . . . . . . . . . . 21
3.10 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4 Baseline Implmentation 23
4.1 Features of Baseline Implementation . . . . . . . . . . . . . . . . . . 23
4.2 Architecture of Micro-controller . . . . . . . . . . . . . . . . . . . . . 25
4.3 Sigma-Delta ADC of MSP430F2013 . . . . . . . . . . . . . . . . . . . 28
4.3.1 SINC Comb Filter of Sigma-Delta ADC . . . . . . . . . . . . 30

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 4.4 Configuration of Sigma-Delta ADC . . . . . . . . . . . . . . . . . . . 31
4.4.1 SINC Comb Filter . . . . . . . . . . . . . . . . . . . . . . . . 32
4.5 Capturing Storage Data . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.6 Comparison Between SPI and I 2 C . . . . . . . . . . . . . . . . . . . 34
4.7 SPI configuration in the microcontroller . . . . . . . . . . . . . . . . . 35
4.8 How Spi-By Wire programming of MCU worked . . . . . . . . . . . . 37
4.9 Internal Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . 38
4.10 Architecture of Memory Used . . . . . . . . . . . . . . . . . . . . . . 40
4.10.1 Memory Operations . . . . . . . . . . . . . . . . . . . . . . . . 41
4.11 Soldering of SM Components . . . . . . . . . . . . . . . . . . . . . . 44
4.12 Embedded Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
4.13 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

5 PCB Fabrication 51
5.1 Process of Fabricating a PCB . . . . . . . . . . . . . . . . . . . . . . 51
5.2 Key points to consider in fabricating the PCB . . . . . . . . . . . . . 51
5.3 Specification of the Prototype PCB . . . . . . . . . . . . . . . . . . . 53
5.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

6 Test and Verification 55

6.1 Test Scenarios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.1.1 Testing With Temperature Sensor . . . . . . . . . . . . . . . . 56
6.1.2 Testing With Pressure Sensor . . . . . . . . . . . . . . . . . . 58
6.2 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

7 Conclusion and Future Work 59

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List of Figures

1.1 Motivation Behind DSTs [9] . . . . . . . . . . . . . . . . . . . . . . . 2

1.2 Functional Diagram, DST. . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Left:Micro Tag, Right: Cefas G5.[10, 11] . . . . . . . . . . . . . . . . 5
1.4 Epoxy Filled DSTs.[9] . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Geometry of Eectronic Part of DST . . . . . . . . . . . . . . . . . . . 8

2.2 Geometry of DST. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1 Basic Block Diagram of Σ∆ ADC. . . . . . . . . . . . . . . . . . . . 19

4.1 eZ430-F2013 Development Tool[12]. . . . . . . . . . . . . . . . . . . 24

4.2 MCU Architecture [16]. . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.3 Sigma Delta ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.4 Comb Filter’s Frequency Response with OSR = 32 [13]. . . . . . . . 30
4.5 SPI Communication Module. . . . . . . . . . . . . . . . . . . . . . . 38
4.6 Modified Spi-Bi-Wire Interface circuitry[12]. . . . . . . . . . . . . . . 39
4.7 Block Diagram of Memory [20]. . . . . . . . . . . . . . . . . . . . . . 40
4.8 Buffer Write Operation [20]. . . . . . . . . . . . . . . . . . . . . . . 42
4.9 Buffer to Main Memory Page Program [20]. . . . . . . . . . . . . . . 42
4.10 Designed Prototype DST. . . . . . . . . . . . . . . . . . . . . . . . . 45
4.11 Software Flow Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.12 Clock Source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

5.1 PCB with pressure sensor5.1. . . . . . . . . . . . . . . . . . . . . . . 52

6.1 Temperature Sensing Results. . . . . . . . . . . . . . . . . . . . . . . 56

7.1 Schematics of Baseline Implemenation. . . . . . . . . . . . . . . . . . 65

7.2 Proposed Software Flow with 4 sensors. . . . . . . . . . . . . . . . . . 79

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List of Tables

2.1 TageMeasurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Proposed Sensor Requirements . . . . . . . . . . . . . . . . . . . . . . 10

3.1 Micrcontroller Comparision Table . . . . . . . . . . . . . . . . . . . . 16

4.1 Operating modes of Microcontroller . . . . . . . . . . . . . . . . . . . 28

5.1 PCB Components List . . . . . . . . . . . . . . . . . . . . . . . . . . 53

6.1 Temperature Sensor Measurement Comparision . . . . . . . . . . . . 57

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Chapter 1

Introduction

The chapter explains about the propelling force behind designing data storage
tags. The potential subject of investigation using these tags, are the open sea
species like cod, plaice, tuna and salmon. It gives bird’s eye view about contempo-
rary solutions for the data storage tags available in the market. Generic features of
tag devices are mentioned with some guidlines for the customers. Tags packaging
issue is explained briefly at the end.

1.1 Motivation behind Data Storage Tag Industry

Data Storage Tags (DST) are small computational devices that are used to log
data, relevant to depth, temperature and conductivity of the marine environment
of species. The data storage tag is to be sutured in the body of fish and then she
is released into the ocean for about two years. When the fisherman catches a fish
with a tag and hands over it to the researchers, he gets a prize of 100USDs. The
researchers untow the electronics part of the tag and retreive the data contents of
the non-volatile memory attached with the tag. The memory contents are then
analysed to map the behaviour of the fish. The migration route of the fish is one
key information for which the researchers hunt for. The final results and recommen-
dations are to be fed back to fishery industry so that they can apply these results on
a new breed of fish. Hence, they may improve on their business. The information is
also vital for government regulations, related to preservation of marine species. The
complete cycle of data storage tag is described in figure 1.1.
The electronic data storage tags (DST) saves our effort to collect data as com-
pared to acoustic based solution that is not feasible for long distance communication[7].
Although Star-Oddi do offers a GPS based tag, DST GPS, but overhead is constant
presence of a sonar/transmitter, within the range of 4km. A sonar/transmitter will
have to follow the fishes continously to keep the communication alive with the DST

1
via accoustic/electromagnetic waves. In case of salty water, electromagnetic waves
could not establish connection in presence of excessive charge particles in the sea
water. The traditional method of stomach content observation portrays only three
to hour instant picture of the fish habit[8].
On the contrary, DST is a complete deployable system that requires necessary
sensors on board for intelligently sensing the environment and storing the details into
its electronic back pack. There is no implicit requirement of a supportive standby
equipment for the functionality of the tag. Capturing of data and retrieving of
data, both actions, do not overlap on the time scale. This discrete division of tasks
eradicates the requirement of a communication equipment, at the data capture time.

Figure 1.1: Motivation Behind DSTs [9]

.

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1.2 Probing into a typical DST
If we explore more into DST technology then it reveals on us that one major goal
of these tags is to find out the feeding spots of the fish. These locations can not
be unearth by measuring only one or two ambient parameters. But it is a combi-
nation of many parameters. The past location of the fish is determined by depth,
salinity, temperature and light intensity in the ocean environment. The pressure
sensor measurement directly provides the depth details. The salinity measurement
is somewhat cumbersome, as it depends on many factors like conductivity, temper-
ature and pressure sensor details. The ultimate aim is to trace back the migration
route of the fish in the ocean by interploting these location points as explained in
figure 1.1.
We require to sense temperature, depth, conductivity and light. For that purpose
we need some sensors for our design. To extract the depth information, the pressure
sensor serves our purpose. Salinity can be calculated by sensing the conductivity.
It would be a current sensing component in the tag.
MEMS-Applied sensors group at MIC has already fabricated a cluster of MEMS
sensors. These sensors could be immersed in the final tag and their measurements
can be tested.

DST

ELECTRONICS DOMAIN Developer: Muhammad Asif Malik.

SENSOR DOMAIN
Date: 29 Jan 2007.

Cluster of Sensors Preconditioning

Switch/Mux MCU
Memory SPI LabView Module
Pressure
+
SPI SPI
V−− V−−
−

+
Temp V−− V−−
−
ADC
+
Salinity V~~ V−−
−

I−− V−− Crystal

Light +

Power

Figure 1.2: Functional Diagram, DST.

The design of data storage tag is 2-dimentional as it it evident from figure 1.2.
• Sensor Domain.

3
 • Electronics Domain.

The sensor domain constitutes a cluster of four MEMS sensors that should pro-
vide pressure, temperature, conductivity and light intensity related signals to the
electronics domain. The current project uses manufactured MEMS sensor. As the
fabrication of MEMS sensor beyond the scope of the project. Some of the sensors
have already been tested by the MEMSApplied-Sensors group at MIC.
The electronics part of the DST consists of a host processor/microcontroller with
an analog to digital converter. The processor samples the data from the sensors and
then communicates with the neighbouring memory via a smart protocol. The sam-
pled data is transmitted by the processor to the memory to be stored. Output port
of memory provides an interface for downloading the stored data, once the tag is
returned from the ocean.
A preconditioning circuitry may become indispensable to be placed between the
host processor and the sensors. In case the sensors feed some noisy data, then the
filtering part of preconditioning circuitry caters for it. Some sensors will provide
data in the current form and there is need to amplify and map the signal into
noise-free differential voltage. As the host processor is compatible with differential
voltage inputs. The current design uses a microcontroller as a host processor. These
devices set forth a design constraint due to their limited number of input/output
ports. That fact steer the design in a different direction. To serve all four sensor, a
multiplexer or switch will be required between the preconditioning and the micro-
controller blocks of figure 1.2.

1.3 DSTs in the Market

There has been immense diversity in the data storage tag industry, ranging from a
simple sensor reader towards a sophisticated tracking device for the ocean animals.
The typical example of some commercially available data storage tags are shown in
figure 1.3.
The Cefas G5 tag designed by Cefas Technology Limited (CTL) weighs arround
1g in water and its dimention are 8 × 31mm2 . It provides 8Mbit of storage capacity
with 10 years of retention. The tag is shown in figure 1.3
Star-Oddi, an environmental monitoring and research organization, provides two
eye-catching products, DSTmicro and DST CTD.
The DSTmicro tag costs 540USD and its dimention are 8.3 × 25.4mm2 . It measures
temperature and depth weighs arround 2.5g in water. DST CTD can measures
three parameters comprising salinity, temperature and depth. It’s dimentions are
15 × 46mm2 , with 25 years of data retention capacity.
Plethora of DSTs, available in the market, offer the customer versatile options

4
to consider. Every solution has its own flavour. Some DSTs are aimed at collecting
the precise temperature and some tags come up with solution that aimed at pressure
sensor data that insinuates how deeper the fish journeyed into the ocean.
Before selecting a DST, one has to consider following key parameters before
hand. These guidlines are broad and depends on case to case basis.

• Size of the tag. The industrial format of size is diameter×length.

• What are the number of measurements that one can be stored in the tag? In
a simple way, the data storage capacity of the tag. In our design, 0.5Mbyte of
storage capacity is available in the prototype DST. But It could be increased
to 2MByte without increasing the size of the tag.

• What is the battery life of the DST? In our prototype board, it is six(6)
months, at the most. Stacking more batterys together will increase the life
span of the tag at the cost of tag size.

• Data retention period of the memory used. It will determine how much older
data can be gathered. In our design the data retention capacity of the memory
is 20years.

• How much deeper a tag can sustain without being damaged due to corrosion?

• What is the tag to fish ratio in terms of size. Clumsy tags could force the fish
to behave out of it’s normal attitude and hence an imprecise data storage. It
could also lead to less chances to get back the tag.

Figure 1.3: Left:Micro Tag, Right: Cefas G5.[10, 11]

5
 • Weight of the tag in water. Generally, it should not exceed 15g for cod fish.

• Resolution and accuracy of the sensor measurements.

• Range of sensor measurements.

• What is the communication method for retrieving the data from the tag?

1.4 Packaging of the DST

There are three levels of packaging exhibited in the figure1.4.
• Wirebonding.

• Glob topping.

• Filling.
Wire bonding is required to make lossless connections between electronic part and
the sensor section of tag. In order to protect the material from corosion, glob
topping is done with polystyrene material. The reason to fill the pot with an epoxy,
Epotek 302, is to protect the bonding wires and stabilise the rest of the tag core.
Additionally the filling material may serve as a heat sink for the electronics part.

1.5 Summary
In this chapter, the designer tried to emphasize the need to pursue for a data storage
tag that is mostly of electronics nature and compatible with MEMS sensors. The
features of a typical data storage tag are explained with commercial tags examples.

1.6 Report Overview

Chapter 2: System Level Issues
The chapter explores the project at a system level. It analyses the given spec-
ification and then considers different practical options. Memory requirements has
been calculated. Power consumption of the electronic part of data storage tag is
calculated.
Chapter 3: Design Space Exploration
The chapter explains the design at different levels. Explanation of former designs
and a small critique on their choice of design is presented. Then it proposes an ’ideal’

6
 Figure 1.4: Epoxy Filled DSTs.[9]

solutions for the main bottlenecks in the former design decision. The justification
of the components and tools selected for the current design is explained.
Chapter 4: Baseline Implementation
The chapter explains the baseline implementation of the prototype data storage
tag. It gives more in detail specification of the components used. The related hard-
ware and software are explained. An optimized implementation of the data storage
tag is explained briefly.
Chapter 5: PCB Fabrication
A printed circuit board is fabricated with to accomodate pressure sensor on
board. The constraints of the design and it’s guidlines are mentioned.
Chapter 6: Test and Verification
Testing of the prototype board in done in different environments. The chapter
explains tests and verfication of the prototype board.
Chapter 7: Conclusion
The chapter conlcudes the design with recommendations.

7
Chapter 2

System Level issues

The chapter elaborates the given specification of data storage tage. Measuremets of
differents tags are mentioned. The storage capacity is calcuated.

2.1 Given Specification.

The tag has to be able to withstand 21bar (304.6psi) of pressure and has to operate
in temperature down to −2◦ C. The upper temperaure limits go up to 30◦ C. A
typical tag used on a 50cm cod is about 38.4mm long, 12.4mm in dia and has a
rounded end. Tages are expected to be in water for more than two years.[8]
We finally settled on the following size specification of the electronic part of DST.
Diameter, ∅ = 9mm.
Length,l ≤ 40mm.
The price of commercially available tag is arround 400Euros. Our aim is to reduce
the cost and make it 250 Euros per tag. Table 2.2 shows brief picture of given
specification.

40mm

9mm

Figure 2.1: Geometry of Eectronic Part of DST

8
Size Measurements of Available Tags The tag whose sensor part is packed
inside the potting tube, has been measured with vernier calipers. The tag consists of
two strips. Small strip contains a cluster of four MEMS sensors and larger strip will
host the electronic part of the tag. In presence of electronics board, larger strip will
be completely imersed in the potting tob. Only the smaller tube, containing sensors,
will be in direct contact with the environment. This is one of the distinguishing
feature of the tag that it’s sensors are in direct contact with the environment. That
leads to more precise measurement of desired data.

MEMS Sensor Part

Electronic Part
ws2
ws1

ls2 ls1

Figure 2.2: Geometry of DST.

Tage External Internal Strip1 Strip2 Strip2 Total

Type Dia, Dia, Strip1 Width, Length, Width, Length,
dex din Length, ws1 ls2 ws2 L
(mm) (mm) ls1 (mm) (mm) (mm) (mm)
(mm)
T1 10.90 8.66 25.43 7.15 - 4.35 -
T2 10.70 8.06 25.30 7.18 - 4.30 -
T3 10.87 9.30 25.30 7.14 - 4.31 -
TDA open open - - 12.64 4.34 69.50

Table 2.1: TageMeasurements

Table 2.2 enlists the range and precision of required sensors.

9
 Parameter Range Resolution(Accuracy) % of Full scale
Pressure(bar) 0 - 21 - 0.05(0.5)
Temperature( ◦ C ) (-2) - (+30) 0.01(0.05) 0.03(0.16)
Salinity 0 - 35 0.01(0.05) 0.03(0.125)

Table 2.2: Proposed Sensor Requirements

Memory Specification First, we have to figure out, the minimum amount of

memory that is sufficient for the Data Storage Tag(DST). The required memory can
be calcuted with following formulas:
Memory Required = (Total Time of tag in water, in hours)*(No. of measurement
per hour)* (Size of one measurement)
OR we can put the above equation, in a more generic form,
Memory Requrired = Total time of tage in water *(f rac1Samplinginterval ) * Size
of one measurement.

If each sensor signal is converted to a 12bit digital signal, and 4 sensors are used,
then each measurement will take up 48bit or 6 Byte of memory.If these measure-
ments are carried out in every minute of the week, a 60kByte memory is used.
Sampling interval, ts = 1 min.
A/D converter = 12bit.(Decided in earlier designs)
One measurement = 4 signals = 4*12 = 48bits = 6 Bytes

Sampling interval, ts = 1 min,

Time in water, tw = 2 years = 2 ∗ 365 ∗ 24 ∗ 60 = 1051200 min.
Size of one measurement, Sm = 6 Bytes.
So, the total memory required, Mr = (tw /ts ) ∗ Sm .
Mr = (1051200mins/1min) * 6 Bytes
Mr = 6307200 Bytes
Mr =6MBytes.
Tolerance in memory size = 500kByte.
In order to reduce the required memory, we have three controlling factors,

• tw ,Total time of tag in water (That is 2 years in the current specifications)

• ts , (Sampling interval is 1min)

• Sm , Size of one measurement, (6 Bytes)

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2.2 Power Analysis
In the final DST design, power will be critical issue. So it must be kept into consid-
eration from the very start of the project.
Let’s anlyze the power consumption in our current design We will start with
the memory, According the DC-charateristics obtained from the datasheet of Atmel
devices [20] Under worst conditions,
Icc2 , Actice Current, Programme/Erase Operation = 17mA.
Vcc , Operating Voltage = 3.6V
Power Consumption during programming the memory,PM = 0.017×3.6 = 61.2mW
The justification of focussing on Icc2 in power analysis is that the peak current for
DataFlash occur during the programming and erase operation. The volatage sup-
ply must provide this much current to avoid current starvation during programming.

Power consumption in MCU The current drawn by the MCU depends on the
mode of its operations. The number of peripherial used also effects the current con-
sumption. It we enable, more peripherals for our use then the current consumption
will increase.
For MSP430F2013 microcontroller, the typical current consumption is 220uA at
2.2V, in active mode. In order to calculate the power consumption inside the MCU,
we ll consider worst case scenario. Assuming that MCU peripherals are operating at
their maximum limitation. The maximum load current on reference output voltage
buffer of MSP430F2013 = 1mA at 3.6V. That makes the power consumption to
3.6mW.

Power Consumption in Interfacing Circuitry To programme the device, we

have an interfacing circuitry that transfer the binary version of application software
to the MCU. In case of MSP430F2013 microcontroller, Spi-By wire interface circuitry
serve that purpose. There are some losses in that circuitry as well. Placing a
3.6V applied voltage and 47kΩ register in the path makes the consumption to be
(3.62 )
47k
= 0.278mW.

Total Power Consumption Total Power Consumption in the electronic part of

the DST is: PT = 61.2 + 3.6 + 0.278 = 65mW The above equation shows that
94% of the power consumption is due to memory operations. That is the price we
have to pay by having an external memory on board.

11
2.3 Fabrication Issues
There has been various fabrication issues in the project. The only promising option
that is available is to fabricate the prototype design using a CAM machine. But it
can make PCB of feature size 20mils = 0.5mm. Our PCB minimum track width =
0.35mmm. These figures abondon us to pursue this option.
The second option is to fabricate the design on the veroboard. And that is done
for the prototype design. Involving a third party to fabricate our design is another
option.But for this we have to keep into considerationthe financial and time delivery
concerns.
The design consists mostly of SMD components. Soldering of SMD components
require specialize equipment, in principle. And that equipment is not available from
the services provided from Electronics Workshop of DANCHIP.

2.4 Summary
The chapter explained the given specification of data storage tag. The size measure-
ments of the tag has been compiled. It explains where MEMS sensor part ends and
how much space is available for the electronic part of the tag. Storage requirements
has been calculated. What are the controlling factor that could reduce the high
demand of the memory. In the end it calculates power consumption and fabrication
issues.

12
Chapter 3

Design space exploration

The chapter starts with highlighting main issues in the whole design process of
data storage tag (DST). It looks on previous design approaches and mentions their
constraints. Then proposes a ”dream” microcontroller in light of the specification
of the DST and the lessons learned from previous designs. Comparsion is made
between contemporary microcontrollers available in the market. Design decisions
in selecting the components are justified by comparing the given specification and
manufacture’s claims.
There are fundamentally six kind of issues in the design of data storage tag
(DST).

1. Economics.

2. Tag Size.

3. MEMS sensors fabrication.

4. Power Consumption.

5. Sensor data measurements

6. Stored Data Retrieval/Communication.

The current project is an evolution of the three former design target at DataS-
torageTag for fish. So it is considered necessary to have a birds eye view of earlier
designs.

3.1 Critique on ATMEL MCU based design [4]

When the fish is re-caught then we need to download the data from the tag. The de-
sign is aimed to establish a bi-directional communication between a RFID reader and

13
a RFID transponder. The RFID transponder is part of the data storage tag (DST).
An off the shelf RFID developing kit (STK500) from ATMEL is used as a RFID
reader. A magnet field, modulated at 125kHz, is established between the reader and
transponder to start the communication process. The Reader and Transponder use
the same type of microcontroller.
The designer used a microcontroller (ATmega128L) from Atmel. The sensor data
emulated by a variable resister output is captured by ADC and then processed by
the MCU. The application software running on the PC communicate with the DST
and the reader via RS232 interface.
This design was mainly aimed at Data Retrieval and Communication issues of
data storage tag(DST). RFID solution can be an effective replacement technology
for (Universal Product Code) UPC bar codes. The basic concept of Radio Frequency
Identification (RFID) is that a query is sent out over radio waves (”What or who
are you?”) and then a subsequent reply is received (”This is what or who I am”).
[19].
The use of RFID technology is not justified in the design. As it’s mainly not best
known for duplex communication, because we require two active parties for bilat-
eral communication. The tag recovered after 1-2years period would have almost
exhausted all of it’s energy. Data recovery from the tage is still possible due to non-
volatile nature of the embedded memory, but not so effectively with RFID solution
presented in [4] . Secondly, the claim of the designer that RFID communication is
more secure is not proven yet from the technology market. Thirdly, the transmitted
radio frequencies used in RFID communication, exchange a very brief and small
amount of data. While DST data will be in the range of MBytes. That will almost
crawl the data flow from DST to PC. Fourthly, If we content on RFID solution, we ll
need an explicit software for the reader of transponder, that will ramp up the overall
cost. RFID technology is not at the desired matured stage where it could fit into
our application effectively. ATmega128 is a high pin count device 15mm×16mm
with only 10bit ADC on chip. As explained by the former designer that it is not an
ultra-low power MCU. The design does not use a dedicated external memory but it
stores data in 512bit EEPROM of transponder interface IC (U328oM). This much
memory is far lower than current specifications of the design.

3.2 Critique on TI MCU based design [5].

The design captured an external temperature sensor data and stored the values
inside a memory. The process is controlled by a Texas Instrument (TI) microcon-
troller. This design approach was aimed at power consumption and data storage
issues of DST.
The designer made a good selection of MCU that is more power efficient and

14
computationally rich. A matrix switch on board, ADG728/ADG729 (from Analog
Devices), is not best choice for the design. But by keeping in consideration the lim-
ited number of pins on the MCU, it’s a more realistic selection. In order to overcome
this problem, we will ultimate need a highly active tag, that will hamper the power
budget. The matrix switch IC is two times bigger in size than the MCU. It increases
the size of the PCB.

Limitations OF MSP430F2014 Microcontroller The 14-pin device has all

its analog pins shared with reference voltage and serial communication interface.
Apparently, it looks that the MCU can handle four(4) analog channels but in prac-
tice it cannnot. In our application it can handle up to two (2) analog channels
simultaneously. Although, in the architechture of Sigma Delta ADC available on
chip, we have the option of 8 channel differential multiplexer. But that seems to be
useless for our application unless there are sufficient I/Os on the periphery of the
MSP430F2013 microcontroller.
MSP430F2013 does not allow to use SPI feature at it’s full potential. Due to only
one shift register in the USI module, it is possible only to do half duplex com-
munication. In high pin packages of MSP430 microcontrollers, it’s possible to do
full duplex communication. MSP430F2013 microcontroller allows communication
in both directions but not simultaneously.

3.3 ”Dream” MCU

Depending on our specification, we need a host processor that could following re-
quirements.

• 16bit ADC on chip (Earlier Design Experience).

• High internal storage capacity (4-6MB).

• Transmission capacity to PC (USART/RS232).

• Low pins ( A simple footprint for easy fabrication and stuffing on board).

• SMD category.

• Low operating Voltage.

• Small size.

• At least 8bit CPU.

15
 • Low price and conveniently purchaseable.

• Conveniently and Quickly deliverable to the designer/customer.

Our former design experience suggests to deploy at least 16-bit ADC on the DST.
At least 4MB of memory will be required for the data of interest. After collecting
the data from the fish environment, we have to transmit that data to a computing
device. To establish this communication, the host processor/mircocontroller should
have at least one communication standard on chip. Serial Communication is pref-
ered than parallel communication in order to make the interconnection as small as
possible. Surface Mount Device, (SMD) can significantly reduce the size of the over-
all PCB. It is desired from the DST designer that the ordered components reach
at the workbench well in time. Most of the requirements mentioned in the Dream
MCU are driven by low power consumption and small size of the DST.
8bit CPU is enough to do simple arithmatics coined by the application software
of DST. But as the embedded software of the DST tag will host more features, a
CPU with smart architecture will be required.

3.4 Comparison of different Microcontrollers

The credits are given to microcontrollers depending on power consumption, package
size, ADC technology, CPU architecture and SPI communication in comparision
with our specification of the design.
The table 3.1 has been prepared by comparing specification given in the

Family Power Pack- CPU SPI Credits

Con- age ADC Archi- com-
sump- Size tecture muni-
tion cation
Microchip + ++ + ++ +++ 9
Texas +++ ++ +++ ++ +++ 13
Instru-
ments
Analog + +++ + ++ +++ 10
Devices
Atmel + + + ++ +++ 8

Table 3.1: Micrcontroller Comparision Table

datasheet of prospective microcontrollers. The potential Atmel and Analog Devices

16
microcontrollers operate at 5V. They offer high pin count packages that will extend
the PCB size of the end product. Most of the 16 bit Mircochip microcontroller are
in production stage and they does not provide SPI communication that will reduce
the interconnection on the PCB board.
Almost all the manufactures provide a flavour of 16bit MCUs with some serial
communication feature. The real difference comes at surface when we compare power
consumption, package size and on-chip peripherals of the micorcontoller like ADC
type and flash memory capacity. The table 3.1 speaks in favour of the MSP430F2013
microcontroller.

Analog Devices MCU ADuC7020 microcontroller from analog devices have

an on board switch selector and appropropriate number of I/Os to handle uptill 5
analog differential signals. It it’s additional specifications are:

• Operating Voltage = 2.7V - 3.6 V

• 12 bit ADC with 5 differential input channels.

• Temp sensor Accuracy =±3.0◦ C.

• Serial Ports = UART, SPI and 2I 2 C ports

• Size = 6x6mm2 ,40-Lead CSP

• Price @ 1k = 9.24 USDs.

• Power: Active mode: 11 mA @ 5 MHz; 40 mA @ 41.78 MHz[15]

ATMEL MCU

• Operating voltage: 5V.

• Maximum Operating Frequency: 21MHz.

• 2kB StandBy RAM on chip.

• Technology: 1u High-density Complementary Metal-Oxide Semiconductor(HCMOS).

• A serial communication Interface (SCI).

• High-pin packages.

• RISC like CPU architecture.

17
Microchip MCU
• Operating Voltage: 5V.
• SPI available.
• Simple 10/13 bit ADC. No Σ∆ ADC.
• NanoWatt Core (Tuning off the CPU while peripherals are working).
• 14 pin devices have 8bit CPU architecure..
• 256kB on chip memory.

3.5 Why MSP430F2013 microcontroller?

The MSP430F2013 includes 16bit CPU, a 16-bit Sigma Delta Analog-to-Digital con-
verter, a 16-bit timer, Watchdog timer, brownout detector, a USI module supporting
SPI and I2C seiral communication standards, and five low power modes drawing as
little as 0.1µA standby current [12].
If we compare these sepecification with the ”Dream” microcontroller explained
in section 2.4 of chapter 2, then we can say that the MSP430F2013 is somewhat
realistic option for the current design. Although there are few trade offs in the mi-
crocontroller like low internal storage capacity, few I/Os as compared to the number
of sensors to be accomodated. But on the contrary, its extremely low power con-
sumption feature out balances its selection decision for the design.
Different modes of operations are defined depending on the power consumptions.
These modes can be switched by enabling/disabling clock ports. The operating
modes take into account three different needs.
• Ultra low-power.
• Speed and data throughput.
• Minimization of individual peripheral current concumptions, in side the mi-
crocontroller.
MSP430F2013 microcontroller has one active mode and five software selectable
low-power modes of operation. An interrupt event can wake up the device from any
of the five low-power modes, serivce the request, and restore to the low-power mode
on return from the interrupt program.

In active mode of operation, all three(3) clocks within the MCU are enabled.
Current consumption in active mode is 65 uA at 100kHz frequency of operation.
And at 1Mhz operation, the current consumption ramps upto 370uA. [16].

18
3.6 Sigma-Delta ADC vs conventional ADCs:
An ADC takes an analog signal as an input and then converts that analog signal into
a digital stream of bits depending on its resolution, precision and reference voltage.
An n-bit ADC (A/D converter) provides 2n discrete quantization levels correspond-
ing to some specified analog input signal amplitude range. There exist a number of
A/D conversion techniques varying in complexity and speed. In it’s simplest case,
ADC comprises of a differential comparator cascaded with an up-down counter, and
a digital to analog converter (DAC) in the feedback path. The parallel or flash
converter utilizes 2n−1 comparators and a control logic circuitry to get the n-bits of
the output digital word. The price payed in parallel/flash converters is complexity
and area but the gain is speed.

Principle operation of Σ∆ ADC: The analog-to-digital conversion is performed

by a 1-bit, second-order sigma-delta modulator. A single-bit comparator within the
modulator quantizes the input signal with the modulator frequency fM . The result-
ing 1-bit data stream is averaged by the digital filter for the conversion result .

Figure 3.1: Basic Block Diagram of Σ∆ ADC.

Figure 3.1 shows the basic operation of a Σ∆ ADC. An input analog signal is
first passed through a modulator before applying a low-pass filtering operation on
the generated bit stream. The modulator and low-pass filter block can both be
implemented in digital domain that reduces the total area of the component.

19
3.7 Sigma-Delta Analog to Digital Converter
Justification for using Sigma-Delta ADC: The Σ∆ ADC is prefered over
normal ADC because of the following reasons:

1. Most of the circuitry in sigma-delta converters is of digital nature. This implies

that performance will not drift significantly with time and temperature.

2. The background noise level, which determines the (Signal to Noise Ratio) SNR,
is independent of the input signal level.

3. Σ∆ ADC requires only low precision components and that leads to small size
of the overall IC.

4. Inclusion of Σ∆ ADC on the mircocontroller IC, as compared to traditional

ADC, reduces the total power consumption of the IC.

5. A low pass filter at the output of Σ∆ modulator further reduce the noise and
SNR.

MSP430F2013 MCU has a, on chip, 1.2V reference voltage generator to operate

the Σ∆ ADC. It could be operated with an external low voltage. The 2nd order
modulator is incorporated in the implementation. SINC comb filter is placed at the
output of Σ∆ ADC. One disadvantage is that, higher order modulator of Σ∆ ADC
can make the system unstable. This unstablility is partially compensated by the
SINC comb filter at the output of modulator.

3.8 Justification of Memory Used

To store the data, it is required to have 4-6MB of memory on board. Mostly, the
microcontroller are designed with memory in kBytes range. That amount of memory
won’t suffice for our specifications of data storage tag. Inclusion of an external
memory is a must. The next parameter that we have to look for is that in what way
the memory will communicate with the microcontroller? A serial communication
protocol is prefered than a parallel one. The other features are the programming
current, package pin-count and operating voltage range.
In the current desig Atmel DatalFlash AT45DB041D memory is embedded on
the prototype board. Unlike conventional flash memory, that are accessed randomly
with multiple address lines and a parallel interface, the DataFlash uses a synchronous
serial interface called RapidS, to sequentially access its data. The simple sequential
access dramatically reduces active pin count, facilitates hardware layout, increases

20
system reliability, minimizes switching noise and reduces package size. In our appli-
cation high memory density, low-pin count, low-voltage and low-power are essential
factors to be considered for which this device is optimized for.
Three (3) wire interface consisting of serial input(SI), Serial Output(SO) and the
serial clock(SCK) with an enabled signal CS are the only required connections to
access the memory from the MCU.
The memory has two SRAM data buffers that allows to receive the data while
the memory is being reprogrammed.
The device contains a specialized security register that can be used for purposes
such as unique device serialization or locked key storage. The register has two por-
tions, 64bytes each. The upper portion is factory programmed by Atmel and will
contain a unique value for each device. The factory programmed data is fixed and
cannot be programmed. The lower portion is one-time programmable. This space of
the register can be used to store a special identification of the fish and the implanted
tag.
The status of the memory like device’s ready/busy status, memory page size,
memory contents comparison operation results, sector protection status or the de-
vice density can be determined by reading the contents of a status register.
In order to save a pin connection, the software alternative for memory content
protection reduces the interconnect where size and power issues are quite sensitive.
The memory can be written byte by byte. We can address each byte in a page
of 264bytes each. But the minimum amount of memory to be erased is one page
that is 264bytes.
The whole chip (0.5Mbytes) can be erased at once with just one command.
The device can be pulled down to deep power-down mode within 3us. The typ-
ical power dissipation in the deep pwer-down mode is 5uA [20].

3.9 CAD tools to layout the design

While exploring process, to select the appropriate CAD tool for our design, we came
across three softwares to layout the PCB:
1. OrCAD,CapturerCIS Demo, from Cadencer Design Systems.
2. Protel from Altiumr .
3. Eagle, version 4.16r2, Light Edition, from CadSoft.
In order to make the design cost effective, Eagle is used to layout the PCB. As our
PCB design is two layer, so it justifies this selection. Protel is old tool and OrCAD
is expensive. Although, Eagle has limited library of footprints.

21
3.10 Summary
The chapted explained the critique on former designs of data storage tag. What
technique former designs have followed? What were the main loop holes in the for-
mer design? How those bottlenecks have been fixed in the current design? What
lessons we get from the former designs? What sort of components are required to
fulfil our design specification? Contemporary devices and solutions are compared
from different desgin angles. Finally, it’s been justified that we should proceed with
MSP430F2013 microcontoller as the host processor. Σ∆ ADC, Atmel DatalFlash
AT45DB041D memory and Eagle CAD tool are now decided to pursue our design
ambitions.

22
Chapter 4

Baseline Implmentation

This chapter describes the baseline implementation of the prototype data storage
tag(DST). It explains more in detail information of the components selected for the
design. How each component is configured individually in compatible with the given
specification of data storage tag. Microcontroller, Memory and their programming
interface will be expalined in the chapter. Hardware and Software aspects of the
design are addressed in details.

4.1 Features of Baseline Implementation

The baseline implementation contains following features.

1. Transfering microcontroller from the emulation board to the prototype DST.

2. Configuring the microcontroller components using Spi-By Wire Interface.

3. Generating Cock from the Digital Clock Oscillator (DCO).

4. Configuring sigma-delta ADC.

5. Capturing internal temperature sensor signal.

6. Communication with the external memory.

7. Interrupt service routine for Sigma-Delta ADC.

8. Interrupt service routine for USI module.

Texas Instruments (TI) provides an emulation board, eZ430-F2013, as shown in

figure 4.1. The emulator comprises of two main parts, a debugging interface and a

23
detachable target board. The emulator is a complete developing tools that provides
all the hardware and software to evaluate MSP430-F2013 microcontroller. This USB
stick shapped device is compatible with IAR embedded workbench integrated devel-
opment envrironment (IDE). The IAR tool is used to compile application software
for the prototype board. No external power is required to operate the device as it
utilizes power from the USB port.

Figure 4.1: eZ430-F2013 Development Tool[12].

Figure 4.1 shows that the development tool has two(2) parts.

• Debugging Interface.

• Target board.

The debugging interface contains USB port and a Spi-By Wire Interface that is
incorporated to download the binary version of the software on the microcontroller.
The microcontroller resides on the target board of the developing tool. All the 14-
pins of the microcontroller, MSP430F2013, are fully accessible on the target board.
A minute testing circuit is placed along side the microcontroller on the target board.
The circuit consists of a LED and a resister. In order to confirm the functionality
of the MCU, small testing programes like blinking the LED with certain frequency,
can be downloaded on the target board.
Before pursuing for our own design, small test programes has been downloaded
on the MCU. Most of these programes are available from Texas Instruments for free.

24
4.2 Architecture of Micro-controller
As expalined earlier in the conclusion of table 3.1 that we should select MSP430F2013
microcontroller as a host processor for data storage tag (DST). The numerous rea-
sons have been presented. The major arguments were in favour of low power con-
sumption, small package size and presence of SigmaDelta ADC on the chip. The
architecture of MSP430F2013 microcontroller is shown in figure 4.2. The device is
equiped with following salient features:

- Flash Programming Voltage 2.2-3.6V.

- Operating Votage 1.8-3.6V.

- 16-bit RISC CPU.

- 62.5ns Instruction cycle time.(speed uptil 16MHz).

- Flash program memory of 2kB.

- 128 Byte RAM.

- Built in synchronous protocols(SPI and I2C) capabilties for communication.

- 16bit Sigma-Delta ADC.

Figure 4.2 shows the internal architecture of the MSP430F2013 microcontroller.

The core part of the microcontroller is 16bit central processing unit (CPU). The
MSP430 CPU has a reduced Instruction Set (RISC) architecture that is highly
transparent to the application. RISC architecture simplifies the instruction set and
makes all instruction of the same width and of finite formats. The software developer
and hardware designer, both equall take advantage from the RISC architecture.
CPU usually comprises of a register file, cache memory and an ALU. At any in-
stant of computation, ALU of the CPU can crunch data of 16bits width. And that
determines processing ability of the CPU. The register file of the CPU consists of
16 registers. The register to register operation, like adding/subtracting two register
contents and storing the result into a register, takes one CPU clock cycle that is as
low as 62.5ns.
There are many ways, how the CPU fetches data to be used as operand for it’s
ALU. This is called addressing mode. The MCU provides uptil seven addressing
modes for it’s operand data.
Peripherals are connected with the CPU via address bus (MAB) and control bus.
There is a separate data bus (MDB) that is shared by all the peripherials on chip.
The CPU controls the peripherals with 51 instructions of 3 different formats. USI
module, 16bit Σ∆ ADC, a 8bit general purpose I/O port P1 and 2-bit I/O port P2,

25
 Figure 4.2: MCU Architecture [16].

a Timer, 16bit watch dog, a 128B RAM and a 2kB Flash are the on-chip peripherals
controlled by the CPU.
The timers in the MCU architecture are mainly used to generate interrupt signals
after a predefined time period. T imer A2 is a 16-bit timer/counter with two cap-
ture/compare registers. T imer A2 can support multiple capture/compares, pulse
width modulated (PWM) outputs and interval timings. T imer A2 also has exten-
sive interrupt capabilities. Interrupts may be generated from the counter on overflow
conditions and from each of the capture/compare registers [16].
The primary function of the watchdog timer (WDT+) module is to perform a
controlled system restart after software problem occurs. If the selected time interval

26
expires, a system reset is generated. If the watchdog function is not needed in an
application, the module can be disabled or configured as an interval timer and can
generate interrupts at selected time intervals.
16bit Σ∆ ADC is used to process analog signals. It is cascaded with a SINC
comb filter. Internal voltage sensing and temperature sensor are also part of the
architecture of Σ∆ ADC.
USI module is responsible to make external communication with neighbouring
components on board. The serial communication protocols are implemented in USI
module i.e SPI and I2C.
Basic Clock System block in figure 4.2 can take input (XIN and XOUT) from an
offchip crystal oscillator and gives three different set of clocks, Main clock (MCLK),
Sub main clock (SMCLK) and auxiliary (ACLK). Among these clocks MCLK is the
default clock for the CPU. In the absence of off chip crystal oscillator, a digital con-
trol oscillator(DCO), embedded within the Black Clock System module, can provide
clock in the range of 100kHz to 20MHz.
The Brownout Protection circuit is implemented to provide proper internal reset
signal to the device during power on and power off.
Spi-Bi-Wire is basically two wire interface to pragrame flash memory of the mir-
cocontroller. One line is used to transmit/recieve the data and the other is dedicated
for the clock.
JTAG (Joint Test Action Group) is a formal name for IEEE 1149.1 standard.
The standard is used to test ICs while they are in the functional system. The IC
designer places a boundary of registers to circumvent the pins of the device. The
purpose is to provide more visibility of the internal architecture of IC. This helps test
engineer to confirm the functionality of IC. During testing, I/O signals enter and
leave the chip through these boundary-scan cells. Futher description about JTAG
can be found in references [17] [18]. In our MCU, the JTAG can also be used to
programe the flash memory.
In our design CPU, Flash Memory, Basic Clock System module, Σ∆ ADC, Port1,
USI module and Spy-Bi Wire blocks of figure 4.2 are used. The flash memory con-
tains the binary version of our embedded software. Basic Clock System module
provides clock. Port P1 configure I/Os of the device, Σ∆ ADC processes the analog
signals and USI module make communication with the external memory. All these
operations are governed by the CPU.
ACLK, MCLK and SMCK are three clock ports avaiable from the Basic Clock
System module of MSP430F2013 microcontroller in figure 4.2. In table 4.1, ACLK
is the clock provided from crystal oscillator, MCLK is the main clock port. CPU
is sourced from the MCLK. Either Digital Clock Oscillator (DCO) or the crystal
oscillator provides MCLK and SMCLK (subsystem clock).
The MCU provides five power saving modes. The three main ultra-low-power
consumption modes are:

27
 Opt. Mode Clk Disabled Clk Enabled Comments
AM No All Active Mode
LPM0 MCLK ACLK and SMCLK Low power mode 0, CPU disab
LPM1 MCLK ACLK and SMCLK Low power mode 1, CPU disab
LPM2 MCLK and SMCLK ACLK Lower power mode 2, CPU disa
LPM3 MCLK and SMCLK ACLK Lower power mode 3, CPU disa
LPM4 ACLK, SMCLK and MCLK No Lower power mode 4, CPU disa

Table 4.1: Operating modes of Microcontroller

- Active Mode: 220uA at 1MHz, 2.2V.

- Standby Mode: 0.5uA.

- Off mode (RAM Retention): 0.1uA.

MCU is supposed to remain in Off mode most of the time. MCU will remain in
standby mode to wait for the sensors data. To reduce the power consumptions,
MCU should enter active mode (AM) only for a fraction of time slot. Major contri-
bution of power consumption will be in the active mode of MCU. The MCU power
consumption is also dependent on it’s operating frequency. Therefore, it is needed
to operated the device at frequency as low as possible. This makes necessay to use
an external low frequency crystal oscillator.

4.3 Sigma-Delta ADC of MSP430F2013

One distinguishing feature of MSP430F2013 microcontroller, is it’s capability to
host Sigma-Delta 16bit ADC on chip. Additionally, it contains an internal reference
voltage source that could be used to excite the sensors.
Sigma-Delta ADC comprises of following building blocks.

1. 8:1 differential input multiplexer, SD16INCHx.

2. Amplifier up to a factor of 32, PGA.

3. 2nd Order Sigma-Delta Modulator for low pass digital filter.

4. Decimation Filter up to oversampling ratio of 1024.

5. 16bit convertion result register, SD16MEM0.

6. 4:1 multiplexer for clock source selection, SD16SSELx.

28
 7. Two converstion modes.

8. Sample frequency divider up to a factor of 348.

9. 1.2V Reference Voltage Source mainly built for the modulator but can be used
off the chip.

10. Integrated Temperature Sensor.

Figure 4.3: Sigma Delta ADC

29
4.3.1 SINC Comb Filter of Sigma-Delta ADC
The digital filter processes the 1-bit data stream from the second order modulator
using SINC comb filter. The transfer function is described in the z-Domain by:

 3
1 1 − z −OSR
H(z) = . (4.1)
OSR 1 − z −1
and in the frequency domain by:
#3 " #3
sinc(OSR.π. ffM ) f
"
1 sin(OSR.π. fM )
H(f ) = = . (4.2)
sinc(π. ffM ) OSR sin(π. ffM )

where the oversampling rate, OSR, is the ratio of the modulator frequency fM to
the sample frequency fS .
fM
OSR = (4.3)
fS

Figure 4.4: Comb Filter’s Frequency Response with OSR = 32 [13].

Figure 4.4 shows the filter’s frequency response for an OSR of 32. The first filter
fM
notch is at fS = OSR . The notch’s frequency/sampling frequency can be adjusted
by changing the modulator’s frequency, fM , using SD16SSELx and SD16DIVx and
the oversampling rate using the SD16OSRx and SD16XOSR bits of Sigma-Delta
control registers.

30
4.4 Configuration of Sigma-Delta ADC
In configuration process of Sigma Delta ADC, there are following main agents to be
considered. The desired operation of sigma-delta ADC is not guaranteed without
these agents.

1. Clock source for the Sigma-Delta ADC.

2. Division of the input clock, if required , so as to keep the clock within the
range of modulator specification. Modulator frequency should not exceed
1.1MHz[13].

3. The operation of the sigma-delta ADC requires a reference voltage source. The
input analog signal is converted with reference to this voltage with the help a
modulator.

4. Opening the right channel path to allow the analog signal to flow into the
Sigma-Delta ADC.

5. Amplification of the signal.

6. Selection of oversampling ratio, OSR, of the filter.

7. Format of the data recieved from the output of the filter.

The functionality of Sigma-Delta ADC can be adjusted by the following four

registers,
Control Register, SD16CTL: The contents of this 16bit register selects the
appropriate clock for the Sigma-Delta ADC. It divides the selected clock according
to the specification. Sigma-Delta clock can be divided up to a factor of 48. The
internal reference voltage can be set by SD16REFON bit. SD16VMIDON bit sources
out the voltage on pin 5 of the microcontroller. SD16LP bit enables and disables
the low pass power mode of the Σ∆ ADC.
Control Register 0, SD16CCTL0: The data format of the conversion register
SDMEMO can be changed with SD16UNI. It provides two modes. Unipolar mode
and Bipolar mode. In unipolar mode, data contents of SDMEMO register sweeps
from 0000h to FFFFh. In case of negative differential voltage, this is not suitable.
The bipolar mode mapes data from 8000h to 7FFFh. In case the differential voltage
at the inputs of SD16INCHx muliplexer is negative, then bipolar mode is the right
choice for that.
Oversampling ratio (OSR) and sampling frequency, ( fs ), of SINC comb filter is
adjusted from SD16XOSR and SD16OSRx bits of SD16CCTL0 register. OSR can
be spanned from 32 to 1024. Higher OSR reduces the sampling frequency.SD16SC
bit controls the start of the conversion process.

31
Input Control Register, SD16INCTL0: When the conversion of Σ∆ADC is
completed, the available results cause an interrupt in order to recieve data by other
peripherials. First, Second, third or fourth sample causes can be control. This is
controlled by SD16INTDLYx bits of the input control register. Σ∆ ADC contains
an preamplifier at its input that can amplify the input analog signal uptil 32 times.
In case the analog input is too feable, the preamplifier can be set according. But
the designer should be carefull in adjusting the gain of the preamplifier, as the input
signal strenght range to the modulater should not exceed ±600mV according the
datasheet of MSP430F2013 microcontroller.
One important parameter in the input control register is the multiplexer channel
selection. This is done by SD16INCHx bits of SD16INCTL0 register.The allocation
of channels SD16INCHx multiplexor are as follows.
1. Channel A7 is for measuring the offset due to PGA amplifier.
2. Channel A6 is reserved for internal temperature sensor data.
3. Channel A5 is for measuring the divided voltage.

4. Channel A2, A3 and A4 cannot be used due to limited I/O’s.

5. Channel A1 is for pressure sensor data.

6. Channel A0 is for external Temperature sensor data.

In the baseline implementation external sensors are not included. But integrated
temperature available on channel A6 is selected to log the temperature of the am-
bient environment.
Conversion Memory Register, SD16MEM0: This registers contains the latest
16bit converted data of the sensor input. It holds upper or lower 16bits of the digital
filter output.In our design we have selected upper 16bits, as the lower bits contains
fluctuations due to noise factor of the input data. The converted results is in 2’s
complement. If we select lower bits then we cannot be sure about the polarity of
the sensor data.
Analog Input Enable Register, SD16AE: This 8-bit register is used to enable
external analog input that pass through A0-A7 channel of the input multiplexer
in Σ∆ ADC. In the software, we must enable the appropriate channel in order to
samples sensor input data.

4.4.1 SINC Comb Filter

Modulate frequency,fM , should not exceed 1.1MHz. As we are sourcing 1MHz clock
from a DCO. We have to divide the clock in order feed the modulator with a lower

32
frequency. The output of the modulator is cascaded with the SINC Comb filter, as
described earlier. In the baseline implementation , the SINC Comb Filter is designed
with the following parameters.
Clock source (from DCO) = 1MHz.
Clock divider = 384.
Net clock for the sigma delta modulator = 2.6042 kHz. (It should be arround 8kHz,
otherwise we USI module will transmitt data faster than it is available from the
sigma-delta ADC.)

4.5 Capturing Storage Data

The stored data in the memory is decided to be captured by National Instrument
device NI USB-8451. The device is available on a small PCB. It has a USB port
on one side and 32pin connector on other side. The device provides I 2 C and SPI
communication interface with eight SPI chip selects and eight general-purpose data
input/output (DIO) lines. USB-8451 board contains a micrcontroller and a cur-
rent limiting circuit. A driver NI-845x 101, that is downloadable form National
Instrumetns website, must be installed on the PC to which the USB8451 is plugged
in.
LabVIEW, a product from National Instruments, can acquire, analyze and present
data. In our application the LabVIEW will acquire stored data and present it to the
user. Researcher or goverment official could be the user. In figure 1.2, SPILabView
module is the USB-8451 board with SPI communication capability on it.
Communication between the ATMEL memory and USB-8451 module requires
four connections.

• SPI CS0 (Pin13 of USB-8451 vs Pin 4 of Memory): The connection can send
the assert signal for the memory form the USB8451. This chip select signal is
crucial for internal memory operations. It starts and completes the operation.

• SPI SDO (Pin 14 of USB-8451 vs Pin 1 of Memory):The connection transfers

commands from USB8451 module to the memory.

• SPI SDI (Pin 15 of USB8451 vs Pin 8 of Memory):The conncection transfer

the stored data in the memory to the PC via USB8451.

• SPI SCK (Pin 16 of USB8451 vs Pin 2 of Memory): Source clock for the mem-
ory to synchronize the communication. The maximum clock that USB8451
module can provide is 12MHz. While memory can accept uptil 66MHz of
clock.

33
The memory is sandwitched between two SPI communications, one with the MCU
and other with the USB8451 module, as shown in figure 1.2. The two SPI commu-
nications cannot be established at the same time. The memory provides only one
group of chipselect, data lines, and clock. But in our application that problem won’t
arise. Data storage process and data downloading/capture process don’t coincide
on the timescale. When the tag will be in the ocean, storage process will be going
on. On the return from the ocean, we can use the SPI communication of memory
for the data downloading process.
The speed of capturing data is not important. It does not matter, if we would
be unable to source 66MHz clock to memory form the SPILabView module. 12MHz
clock captures the data in a reasonable amount of time.

4.6 Comparison Between SPI and I 2C

Serial Peripheral Interface (SPI) and Inter Integrated Ciruit C (I 2 C) are two proto-
cols for short distance and low speed serial communication among electronic com-
panonents.

Features of I 2 C The standard contains following features.

• I 2 C was invented by Philips.

• It consists of two lines, one data line and the other clock line.

• It operates on the principle of master/slave model. Master provides the clock.

• The protocol is mainly for low-speed device and can transmitt data uptil
3.4Mbps.

• It allows half duplex communication. That means, it’s not possible to do

communication in both directions at the same time.

Features of SPI In it’s simplest implementation, SPI communication involves

two shift registers of 8/16 bit size. On a predefined clock edge the data is shifted
in/from one side of the register. Shift rate depends on the clock applied. The SPI
communication protocol has following features:

• SPI communication standard is named by Motorola.

• The devices communicates with a master/slave model. The master device

provides the clock to synchronize the communication.

34
 • Four wires are needed to establish the communication. One for the clock,
second for the data to be transfered from master to slave, third for the data
transformation from slave to master and fourth to select the slave device.

• The protocol operates in full duplex mode. That means communication is

possible in both directions of the parties involed.

• The protocol is feasable for device that can be operated even at 70MHz.

• In case of multiple slaves, separate slave select signal are required.

In I 2 C, only one data line is used to transmit and recieve the data that makes
impossible to do full duplex communication. It slowes down the data transfer pro-
cess. In SPI communication, we have separate lines for transmit and recieve that
makes communication faster. I 2 C requires an overhead of acknowledge, start and
stop bits in the data transfer. Moreover, we need pull-up resisters in case of I 2 C
communication. That increases the size of the electronic board. SPI is faster but
becomes complicated when more slave device are added as it increase the hardware
complexity to accomodate more chip select signal from the master device.
MCU and memory need to communicate equally with one another. A duplex proto-
col will fulfill our design need. The ATMEL memory is compatible with SPI interface
instead of I 2 C interface.
MCU acts like a master device and will source the clock to the Memory, that
will serve as a slave device. The memory module is selected through its chip select
pin, CS, by the MCU. One general purpose pin of MCU is dedicated to control the
memory via chip select pin. Serial communication of the selected microcontroller
and memory is a noticeable advantage.We can get rid of many interconnecting lines
on board. That goal motivates the designer to opt for SPI communication between
the components on the electronics board.
A laptop PC has been reserved to serve as a computing device to handle the
data stored in the memory. In the prototype board, this is tantamount to RF
reader that is used in an earlier design [4].National Instruments device USB-8451
has the capacity to handle both SPI and I2C communication protocol. The opted
SPI communication between memory and laptop can be tuned uptill 12MHz.

4.7 SPI configuration in the microcontroller

The MSP430F2013 has one USI (Universal Serial Interface) module. The internal
architecture of the module is shown in figure 4.5. The module operates on the
principle of a shift register. The shift register, USISR, is configurable as 16/8 bits
register. An 8/16 bit counter operates hand in hand with the shift register. Both the

35
shift register and the counter are sourced with the same clock. The clock shifts in and
shifts out the data stored in the shift register. These operations are edge triggered.
By default, the data is shifted from right to left, means MSB is transmitted/received
first. The shift direction can be changes by USILSB bit in the control register.
Whenever a bit is shifted in the USISR register, the bit counter counts down its
value until it’s contents hit zero. An interrupt, USIIFG, is set when the bit counter
counts down to zero. The USIIFG flag can be used to poll the results in the shift
register, USISR. Moreover, we can manually control the process of clearing the
USIIFG flag with USIIFGCC bit selection.
We can enable and diable the clock and transmitt/receive data lines at any time
of operation by toggling USIPE5, USIPE6 and USIPE7.
There are many options for the clock sourcing. The multiplexer at the input of
USI module, USISELx, provides options to select a DCO clock, crystal oscillator
clock or timer output. A divider at the output of the multiplexer that can slow
down the selected clock at the most by the factor of 128.
Output latch at the output port of USI module, enabled by USIGE bit, trails
the transmitting data by half a clock cycle. This trailing is required to prevent the
transmission of unstabalised data in the shift register and achieve synchronization
with the external modules. The clock polarity and clock phase serve as another
synchronization handles for SPI communication.
The most important thing to be of notice is that USI module of MSP430F2013
microcontroller provides half duplex communication. We can either transmitt data
or receive the data at the given time.
In SPI communication, the one who comes up with the clock sourcing capability
is the master. The device that is fed with the clock from the external component
is the slave.The clock could be fed into the USI module of the microcontroller or it
can be extracted from its internal resources. This can be done by enabling USIMST
bit of the control register.
The configured parameters for the baseline implementation are:

• Microcontroller (master) sources clock to the memory (slave).

• Clock value = 1MHz

• Clock divider = 128, Net clock for the SPI Communication = 7.8125kHz.

• 16 bit counter.

• 16 bit shift register.

In the baseline implementation of the tag, the clock is sourced from on chip DCO
of microcontroller. The best option is to use the crystal oscillator clock for the
operation but that’s not possible on the prototype board. The crystal oscillator

36
integration on the board required special care as explained in the PCB fabrication
part of the board. Due to lot of noise on the board, crystal oscillator clock has been
replaced with the DCO clock.
The converted data available in SD16MEM0 register is 16 bit. That requires to
use 16 bit shift register of USI module. Similarly, 16 bit counter will be needed to
tranmitt all 16bits of the converted data towards memory.

4.8 How Spi-By Wire programming of MCU worked

MCU can be programmed by 2-wire interface(SBWCLK-Pin11, SBWTDIO-Pin10).
Following errors occured during testing the board with the embedded software de-
velped:
• Communication Error.
• Could not get target status.
These error can be eliminated by plugging out and plugging in the debugger board
from the PC USB port. The one reason of these error could be that the circuit is
on veroboard. The second is that the flash memory of the MCU is very limited in
size and we have written software in C language that could lead to filling up the
memory.
Following measures are take to eliminate the errors completely and successfully
download the binary file of the embedded software on the prototype board.

1. The length of Spi-By Wire interface has been shorted, so that it became 14cm
in total length. Recommended length of the wire is less than 20cm.
2. An analogue circuit has been placed who schematics is shown in figure 4.6.
3. The applied voltage from the debugging interface is 3.6V. It could be provided
on board from the Power Supply, which will be the case in the final version of
the tag.
4. Maximum clock frequency of Spy-Bi Wire interface is set to 20MHz [16].
5. The software is optimized for area.
The circuit diagram is explained in figure 4.6. C1 is 100nF capacitor and R1
is 47kΩ resistor. The C1 and R1 values are suggested from the datasheet of the
emulator [12]. C1 is placed to stabalise the applied voltage for the MCU. It also
removes the noise ripples in the volatage signal. R1 is used to pull up the Spi-By
wire data line, SBWTDIO. J1 is a connector to hold the Spi-Bi Wire.

37
 Figure 4.5: SPI Communication Module.

4.9 Internal Temperature Sensor

Due to the limitation of input pins on the microcontroller, the integrated tempera-
ture sensor has been decided to use in the current design.The user’s guide[13] claims
38
 Figure 4.6: Modified Spi-Bi-Wire Interface circuitry[12].

that on chip temperature sensor of the microcontroller is capable of depicting fol-

lowing features.

• Temperature measurement range, −48◦ Cto80◦ C.

• Temperature sensor output voltage range is 280mV to 450mV.

• Total peak to peak output voltage span = 170mV.

• Resolution of the integrated temperature sensor = 170 / 80-(-48) = 1.32mV /◦ C.

• Sensor Temperature Coefficient, T CSensor = 1.32mV/K (Typical Value).

• Temperature Sensor Offset Voltage, VOf f set,Sensor = -100 to 100mV.

If practically these results can be acheived from the integrated temperature sensors
then this befits with our given specification for temperature sensing.
The following formula can be used to calculate the temperature sensor output volt-
age:
VSensor,typ = T CSensor (273 + T [◦ C] + VOf f set,sensor [mV ] (4.4)
By inserting the values given in [16], the equation take the following form,

T [◦V ] = 0.76 ∗ VSensor [mV ] − 349. (4.5)

In equation 4.5, Sensor offset voltage is set to +100mV.

39
 T [◦ V ] = 0.76 ∗ VSensor [mV ] − 197. (4.6)
In equation 4.6, Sensor offset voltage is set to -100mV.

4.10 Architecture of Memory Used

Figure 4.7: Block Diagram of Memory [20].

Figure 4.7 shows the block diagram of the ATMEL, AT45DB041D. The SOIC
package is shown in the figure. The memory is divided into three levels of granu-
larity comprisiting of sectors, blocks and pages. There are eight sectors with each
sector comprising of 256 blocks. Then every block has eight pages in it. The size
of one page is 256/264 bytes. By default the page size is 264 bytes but it could be
configured to 256bytes.
The flash array acts like a main memory and the data buffers serve the purpose of

40
a cache memory. The two SRAM data buffers allow receiving of data while repro-
gramming the flash array/main memory.

4.10.1 Memory Operations

Most memory operations start with asserting the CS pin and then 4 bytes are send
on the SI pin. After the last bit of this sequence is clocked in, the CS must be
deasserted to complete the operation. This all process is controlled by the micro-
controller. The detailed description of memory operation can be found in [20]. Some
of the main memory operations that have been extensively used in the project are
described below:
Conversion from Standard Buffer/Page to Binary Buffer/Page Size:
The standard buffer and page size is 264 bytes. Bit 0 in the status register indicates
whether the page size of the main memory array is configured for binary page size
(256 bytes). If the bit is 1 then the page size is set to 256 bytes. If the bit is 0,
then the page size is unchanged and is set to 264 bytes. A Configuration Register
is a user-programmable nonvolatile register that allows the page size of the main
memory to be configured for binary page size. Once the device is configured for
binary page size, it cannot be reconfigured again.
Buffer Write: Data can be clocked in from the input pin (SI) into either buffer1
or buffer2. To load data into the DataFlash standard buffer(264 bytes), a 1-byte
opcode, 84H for buffer1 will be clocked into the device, followed by three address
bytes comprised of 15 don’t care bits and 9 buffer address bits. The 9 buffer address
bits specify the first byte in the buffer to be written. After the last address byte
has been clocked into the device, data can then be clocked in on subsequent clock
cycles. If the end of the data buffer is reached, the device will wrap around back
to the begining of the buffer. Data will continue to be loaded into the buffer until
a low-to-high transition on the CS pin. The same sequence of operations can be
performed with a different opcode, if we are going to use buffer2 of the memory.
Figure 4.8 shows the buffer write operation. The diagram is for binary buffers(256
bytes each), not for standard buffer. That’s why 16 don’t care bits and 8 buffer ad-
dress bits (BFA7-BFA0) are shown. CMD is the opcode byte i-e 84H in case of
buffer 1 and 87 in case of buffer 2.
Buffer to Main Memory Page Program with Built-in Erase: Data writ-
ten into either buffer 1 or buffer 2 can be programmed into the main memory, 83H
for buffer 1 or 86H for buffer 2, must be clocked into the device. For the DataFlash
standard page size(264 bytes), the opcode must be followed by three address bytes
consists of 4 don’t care bits, 11 page address bits that specify the page in the main
memory to be written and 9 don’t care bits. When the low-to-high transition oc-
curs on the CS pin, the part will first erase the selected page in main memory (the

41
 Figure 4.8: Buffer Write Operation [20].

erased state is a logic 1) and then program the data stored in the buffer into the
specified page in main memory. Both the erase and the programming of the page
are internally self-timed and should tage place in a maximum time of 35ms. During
this time the status register will indicate that the part is busy.

Figure 4.9: Buffer to Main Memory Page Program [20].

Figure 4.9 shows how data from buffer is shifted into the flash page. The example
explains data writing to binary pages of main memory. The opcode 83h for buffer 1
or 86h for buffer2, must be clocked into the device followed by three address bytes
consisting of 5 don’t care bits, 11 page address bits (A18-A8) and 8 don’t care bits.
A low-to-high transition on CS pin completed the writing operation to the selected
page of main memory array.

42
 Continuous Array Read: To perform a continuous read array with the page
size set to 264 bytes, the CS must first be asserted then an opcode, 03h, must be
clocked into the device followed by three address bytes(which comprises the 24-bit
page and byte address sequence). The first 11 bits of the 20-bit address sequence
specify which page of the main memory array to read. and the last 9 bits of the
20-bit address sequence specify the starting byte address within the page. Following
the address bytes, additional clock pulses on the SCK pin will result in data being
output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bytes,
and the reading of data. When the end of a page in the main memory is reached
during a Continuous Array Read, the device will continue reading at the begining
of the next page with no delays occured during the page boundary crossover. When
the last bit in the main memory array has been read, the device will continue read-
ing back at the begining of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping arround from the end of the
array to the begining of the array. A low-to-high transition on the CS pin will ter-
minate the read operation and tri-state the output pin (SO). The continuous array
read bypasses both data buffers and leaves the contents of the buffers unchanged.
Two protection methods, hardware and software controlled, are provided for pro-
tection against unintentional or erraneous program and erase cycles. The software
controlled method relies on the use of software commands to enable and disable sec-
tor protection while the hardware controlled method employs the use of the Write
Protect, W P , pin. The selection of which sectors that are to be protected or unpro-
tected against program and erase operations is specified in the nonvolatile Sector
Protection Register. The status whether or not sector protection has been enabled
or disabled by either the software or the hardware controlled methods can be deter-
mined by checking the status register.

System Consideration For Atmel Memory

• The clock SCK, serial input SI and chip select CS signal must rise and fall
monotonically and be free from noise. Excessive noise or ringing on theses
pins can be misinterpreted as multiple edges and cause improper logging of
the data in the memory.

• The PC board traces must be kept to a minimum distance or appriopriately

terminated to ensure proper operation.

• Decoupling capacitors can be added on signal lines to provide filtering against

noise glitches.

43
 • Like all Flash memories, the peak current for DataFlash occur during the
programming and erase operation. The regulator needs to supply this peak
current requirement.

4.11 Soldering of SM Components

Surface Mount Technology is a type of electronic component package. Most elec-
tronic components can be divided into two categories - through hole (TH) and
surface mount (SM). Through hole (TH) are designed to be loaded on one side of a
printed circuit board (PCB) and soldered on the other. While SM components are
designed to be loaded and soldered on the same side of the PCB. [21]
Surface Mount Technology (SMT) has many important benefits as compared to
the through hole (TH) technology. For example:

• Faster for automatic machine to place.

• Have the small physical size for almost the same electrical function.

• Less parasitic effects.

• Cheaper in terms of raw material cost.

Equipment used in soldering All sorts of SMT soldering can be done with the
common W eller r workstation. The workstation includes:

• Soldering Iron.

• Soldering Tips.

• Soldering Wire(an alloy of lead and tin).

• Soldering Stand.

• Tweezers.

• Solder Flux.

• Wire Stripper AWG28 (increasing gauge numbers give decreasing wire diam-
eters and 8 gauge is about 1/8 inches in diameter).

• Witer cutter.

• Sodering Braid 32-Wick.

• Heavy Water, D2 O.

44
 Soldering stand is there to place the heated soldering iron, when it’s not in use.
The temperature of the Sodering iron is set above than 270◦C. Solder Flux is applied
to protect the solder points on the board. Soldering Braids are used to desolder the
components that are not properly soldered. The Soldering braids are made of thin
copper wire. A soldering pump, that works on the repulsive power of a spring, can
also desolder the unnecessary joints. Heavey water is used to clean the Soldering
Tip. Tweezers help to better align the SM components on the boards.
The soldering of SM components on the prototype board is done manually. PCB
adapters are discrete PCBs that are used to test the SM devices. First these adapters
are fixed on the veroboard by soldering. The memory and the microcontroller are
then soldered on these adapters.
Figure 4.10 shows the prototype board that contains the electronic part of

Figure 4.10: Designed Prototype DST.

the data storage tag (DST). The board contains MSP430F2013 microcontroller
from Texas Instrument, AT45DB041D memory of 0.5 MByte storage capacity from
AT MELr , Spi-By Wire Interface ciruitry to download the application software,
a wheatstone bridge , power supply from Panasonic, MEMS pressure sensor from

45
Honeywell and some discrete components for testing purpose. The board was suc-
cessfully tested to measure temperature sensor data. Rubber studs are placed on
the bottom side of the board to protect the connections. At the time of writing the
report, the pressure sensors data mesurements were on it’s way.

4.12 Embedded Software

To develop the application software for the data storage tag, IAR Embedded Work-
bench is used. IAR Embedded Workbench is a set of development tools for building
and debugging embedded applications using assembler, C and C++. 16 bit MSP430
devices from Texas Instrument are supported by IAR tool. The IAR development
tool can generate a binary file needed to be downloaded on the microcontroller. The
status of all the interval registers related to microcontroller’s peripherials that we
discussed in the MCU architecture, as shown in figure 4.2, are visible in the tool.
The developer can monitor the configuration of the devices before generation the
binary code for the microcontroller.
The software developer is not completely satisfied with the development environ-
ment provided by IAR. There was some problems while setting break points on some
commands. The temporary solution is to debug the software by single-stepping pro-
cess.
In figure 4.11, a flow chart of the software is shown. At the outset of the software
developement, correct device is selected. As there are more than hundred devices
with MSP430 architecture. They differ with one another, in terms of peripherals,
frequency of operation and package size.
There are two drivers available to continue to software development process.
The IAR tools provides the facility to simulate the device operation without any
hardware. This feature allows the designer to start developing the software for the
application before any hardware is built. The second option is to debug the hard-
ware with the emulator, the USB shaped device shown in figure [12].
After selecting the right device, that is MSP430F2013, and the appropriate
driver, the device reqiures to configure it’s I/O port according to our application.
The device has one watch dog timer, that we should stop. If we don’t stop the watch
dog timer the it will contribute to extra power consumption. The puprose of watch
dog timer is to generate reset signals at specified interval of time. In the optimized
version of the design we will use the interrupt capability of the peripheral itself. In
stead of using the watch dog timer, the interrupt register of the peripherals gives us
more control on the application development.
As the device pins are designed for multi-functionality. We should clarify to
the software, what functionality we are going to utilise from a particular pin of the

46
device. These pin should be set to input or output feature according. Either a pin
is configured as a general puprose input output (GPIO) port or its is configured as
peripheral function.
The system needs a clock to operate. We have to mention, at some point in
the software, what sort of clock we are going to feed. Either we can use a built-in
DCO, digital clock oscillator, or we can configure the device pins for as external
crystal oscillator. In the baseline implementation of DST, a DCO is used to source
the clock. While in the optimized version, a 32kHz crystal oscillator will be used.
The aim is to operate the device at lower and stable frequency so as to reduce the
power consumption. The frequency provided by DCO is not stable. Moreover, DCO
sources frquency is MHz range instread of kHz range. The modified clock block of
the microcontroller is shown in figure 4.12
Configuring the Sigma-Delta ADC is essential part of the software development
process. The SD conf ig() function is responsible to configure control registers of
Sigma-Delta ADC.
The multiplexer on the input of sigma-delta ADC is configured to feed in the
desired data.
The software will continue sampling the data until it has received sufficient sam-
ples. The samples will be averaged to outcome a final value of the sensor signal.
The purpose different functions is explained below:
Init Sys(): This function boot up the microcontroller by doing general initializa-
tion. At the outset, it stops the watch dog timer to save power. It selects appropriate
directions of the pins. Clock source is selected from this function.
void SD conf ig(): Analog input channel selection, analog input channel enable,
switching on/off the internal voltage reference generator, dividing the clock for the
modulator, oversampling ratio of SINC Comb filter, interrupt enabling and PGA
amplifier gain are set in this function.
void Conf ig USCI(): The function enables the SPI serial communication between
the microcontroller and the memory. It divided the clock for the USI module and
selects it’s phase. Data lines, clock and chip select signal are controled in this funci-
ton.
void Mem W rite(): It write data into the memory. It also assert and deassert the
chip select signal for the memory.
void Mem Read():Reading stored data in the Memory, into a variable, for testing.
char Read Mem status(): Reading status register of Memory.
void writebuffer1 (int ,int , int , int ): To write data into buffer1 of of External
Memory.
void sendbyte(volatile unsigned int ): To send byte to External Memory.
void sendword(volatile unsigned int ): To send word to External Memory.
int receivebyte( ): To receive byte from Memory.
void buffer1toflash (int, int , int , int ): Data transfer from buffer1 to flash when

47
buffer1 is full.
void delay(volatile unsigned int): It emulates hardware delay because it takes time
to settle signals on the hardware.
i nterrupt void SD16ISR(void): Interrupt service routine for Sigma Delta ADC
module to sample the converted data fro transmission towards memory.
i nterruptvoiduniversal serial interf ace(void): Interrupt service routine for USI
module.

4.13 Summary
The chapter presented detailed architecture of the component used in the design.
How those components have been configured according to the given specification.
Features of the prototype board are mentioned. Soldering of components on the
prototype board is thoroughly explained. The schematics, flow chart and software
are attached in the appendices.
The programming of the microcontrolled can by summerised as follows.

• Shut down the watch dog timer.

• Opening the channel to the Σ∆ ADC.

• Configuring peripherals.

• Selecting appropriate format for the data to be collected.

The peripherals include USI serial communication module, Σ∆ ADC, DCO and gen-
eral purpose ports. The software development with 4 simultaneous sensors has been
proposed with flow chart in figure 7.2. The device has been configured differently
for each sensor input. When sufficient number of measurements has been captured,
the averaged data is stored in the memory.

48
Figure 4.11: Software
49 Flow Chart.
Figure 4.12: Clock Source.

50
Chapter 5

PCB Fabrication

The chapter describes the PCB (printed circuite circuit ) fabrication step. The
guidelines to prepare a PCB and the specification of our PCB are explained.

5.1 Process of Fabricating a PCB

When the designer finalises the design and he tests the design on the prototype.
Afterwards, following steps are required to transfer the circuit on the PCB. The
process flow to design a PCB is as below.
• Selection of a CAD tool that is compatible to speak with PCB related file
formats.
• Preparation of a detailed schematics using the CAD tool.
• Preparation of footprints of the components, if not available. And then layout
the design in a board file.
• Generating a CAM file.
The schematics completes the interconnections between different components. That
is more in depth details of the design than the functional diagram. The board
file (.brd) gives details about the footprints of the component packages. This file
contains sufficient information to process the fabrication. The PCB team generates
a CAM file for the fabrication machine that finally sketches the design on a substrate.

5.2 Key points to consider in fabricating the PCB

There are some main issues that should be considered while fabrication the PCB.
The details of some points can be find in[14].

51
 Figure 5.1: PCB with pressure sensor5.1.

1. The crystal oscillator should be as close to the microcontroller as possible.

Long distance lines make the oscillator very sensitive to electromagnetic com-
patibility (EMC), electrostatic discharge (ESD) and cross talk. It also mini-
mizes parasitic capacitace.

2. Keep frequently switching lines away from the the crsytal oscillator.

3. Reduce the parasitic capacitance between XIN and XOUT signals by routing
them as far apart as possible.

4. Reduce the parasitic capacitance between XIN and XOUT signals of micro-
controller by routing them as far apart as possible.

5. Guard the crystal traces with ground traces (guard ring). This ground guard
ring must be clean ground. This means that no current from and to other
devices should be flowing through the guard ring. This guard ring should be
connected to VSS of the MSP430 with a short trace. Never connect the ground
guard ring to any other ground signal on the board. Also avoid implementing
ground loops.

6. Connect the crystal housing to ground.

7. With 2-layer boards, do not route any digital-signal lines on the opposite side
of the PCB under the crystal area. In any case, it is good design practice to fill

52
 Footprint Family Value/PartNumber
IC2 Microcontroller MSP430F2013
IC1 Memory AT45DB041D, 4Mbit
C3 Capacitor 100nF
R2 Resistor 2kΩ

Table 5.1: PCB Components List

the opposite side of the PCB with clean ground and also connect this ground
to VSS of the MSP430.

8. Making use of the MSP430 built-in capacitors gives a simple layout, with only
the crystal connected to the XIN and XOUT pins of the MSP430.

5.3 Specification of the Prototype PCB

The main parameter of the prototype board is

• The length of the PCB should not exceed from 9mmx40mm This is dependent
on the overall size of the data storage tag.

• The minimum track width should be 0.30mm. This track width is due to
the smallest width of the pin of the package on board. The microcontroller,
MSP430F2013 pin width put this constraint on the PCB fabrication.

• Minimum spacing between tracks is 0.35mm., that is the spacing between the
microcontroller’s two adjacent pins.

• The PCB will be of two layers. Bottom layer is reserved for ground plane but
could be used to host more devices in the forthcoming evolution of the design.
This practice may force the designer to route the signal on both sides of the
PCB that may cause problem due to cross talk and EMI.

The material of the PCB is FR4, that is the abbreviation of flame resistant 4.
FR4 is acceptable for signals up to around 2 GHz. As our data storage tag design
is not a high speed circuit, we can opt for this less expensive substrate. For similar
reasons, a 2-layer PCB is sufficient for the design instead of going for mutli-layer
PCB. These two decisions make the design more cost effective.
All the components except the crystal oscillator are surface mount devices (SMD).
Non-SMD crystal oscillator has been intentially because of the MCU requirements.

53
 The table 5.1 enlists the components shown in figure 5.1. In table5.1, IC2 is
the microcontroller, IC1 is memory. There are two 2kΩ resisters, The microcon-
troller MSP430F2013 is the product of Texas Instruments, TI and the memory,
AT45DB041D, is a device from Atmel.

5.4 Summary
We have selected Eagle Version 4.16r2, Light Edition to layout the PCB. OrCAD
Capture CIS Demo from Cadence Design System is an alternative option to layout
the design but an expensive one. The first version of the PCB does not contain Spi-
By Wire Interface circuitry on it. On the contrary, it will use the Spy-By Interface
of the prototype board to programme the device. The PCB size can be made even
more smaller by manually routing the board file. In case it be possible to solder
compoment on both sides of the PCB, then it will make the size of the PCB even
more small.

54
Chapter 6

Test and Verification

The chapter explains different test scenarios in order to verify the prototype board
results. As it’s been explained earlier that the board can accommodate two sensors
data by using the integrated temperature sensor and pressure sensor data. The
corresponding configuration of devices is explained.
Figure 4.10 in the earlier chapter showed the designed prototype board. The mi-
crocontroller MSP430F2013, memory ATD45DB41, Pressure Transducer 235-5841
Guage Style from HoneyWell, Power Supply from Panasonic, Spi-By Wire interface,
Wheat stone bridge and some discrete components are placed on the veroboard. All
components on the board has been soldered manually.
The board can be plugged into USB port of PC, through the emulator shown in
figure 4.1, to download the software on the board. In the prototype board, we have
three options to supply the power at the moment.
• Evaluation Board(Pin1 and Pin4). It is sourced with the Spi-By Wire from
the PC.

• Panasonic CR1220, whose specifications are

Battery size: Coin shaped
Height: 2 mm
Weight: 1.2 g
Diameter: 12.5 mm
Voltage: 3 V
Capacity: 35 mAh

• External DC Power source

The advantage of using an external DC Power source is that we can control the
supplied current to the board. In this way one can estimate, how much minimum
current is necessary to drive the circuit.

55
For the initial testing, the evaluation board power supply is used. But the ultimate
goal is to find an alternative power supply of the size of Panasonic CR1220 battery
with higher current capacity to drive the data storage tag.

6.1 Test Scenarios

6.1.1 Testing With Temperature Sensor
The DST has been placed in four(4) different environments to collect the measure-
ments:
In Figure 6.1, T is the temperature shown by the thermocouple device. TM

Figure 6.1: Temperature Sensing Results.

is the temperature measured by the prototype board. Four different points in the
graph corresponds to four different locations at DTU.
The results are obtained with the following design parameter.
Modulator Frequency of Σ∆ADC, fM = 500kHz.
Oversampling Ratio of Comb Filter, OSR = 32.

56
Sampling Frequency of Comb Filter,fs = 15.6kHz.
Channel of Σ∆ADC used = A5.
PGA amplifier gain = 1.

Location Time Σ∆ Measured Thermocouple Error

ADC Temp.(C) Temp.(C) (C)
output
MEMSLab 11:10 (570E)h 32.3 32 0.3
344 Bldg 11:23 (549E)h 23.7 24.6 0.9
Basement
341 Bldg 11:36 (59E4)h 42.2 41 1.2
Lawn
IceBox 14:00 (5001)h 7.6 8.4 0.8

Table 6.1: Temperature Sensor Measurement Comparision

The Table 6.1 readings are taken on 11 June 2007. The average difference be-
tween temperature measurements from the thrmocouple readings is 0.8◦ C
The following formula is used to calculate values from the board.
1
T = . (SDMEM0)d − 273 (6.1)
73
1
The factor 73 is due to the PGA offset, 16bit resolution and reference generator
voltage, Vref of Σ∆ADC. (SD16MEM0)d is the decimal value of Σ∆ conversion
register SD16MEMO. The factor 273 is included to get temperature value in celc-
sius.
The observed value in the SD16MEMO conversion register of Σ∆ ADC is a func-
tion of following parameters:
 
Resolutionof Σ∆ADC×ChannelV oltage,Vch
SD16MEM0 = f Ref erenceGeneratorV oltage,Vref
Resolution of Σ∆ADC = 216
Reference generator voltage, Vref = 1.2V
The Channel Voltage, Vch , is the differential voltage at the input of the multiplexer,
SD16INCHx, of Σ∆ADC architecture, shown in figure 4.3. A higher temperature
leads to higher voltage on the input channel. The same principle applies for other
channel inputs of SD16INCHx channel shown in figure 4.3. According to datasheet
of MSP430F2013, the channel voltage should not go higher than 600mV for PGA=
1. We are collecting 16 MSB of the filter output.

57
6.1.2 Testing With Pressure Sensor
In our testing scenario, we are using Honeywell pressure sensor with 30psi guage
type specs. The input resistence of the Honeywell pressure sensor is 5kΩ. The de-
signer plan is to utilize, internal reference voltage of MCU, that is 1.2V and supply
1mA at the most.The output voltage from the sensor out is too low if we use 1.2V
excitation voltage, as the recommended excitation voltage for pressure sensor is 10V.
Rip is the internal input resistance offered by the pressure sensor.
Vref is the reference voltage delivered from within MCU.
Rip = 5kΩ.
Vref = 1.2V
V
The current to be supplied by the internal reference source , Ip = Rref ip

Theoretically, Ip = 1.2
5k
= 0.24mA
That much amount of current should not be a problem as our MCU can provide
uptill 1mA.
As the full scale volage of pressure sensor is 330mV with sensitivity of 11mV/psi.
A wheatshone bridge is placed to feed A1 channel of sigma-delta ADC form its out-
put. The parameters of the circuit are designed in such a way that it provides
voltage in the range of 0-330mV with the step of 11mV , that are compatible with
the HoneyWell pressure sensor output range. The volatge is changed by poten-
tiometer. The further testing on this part are going on at the time of writing the
report.

6.2 Summary
The chapter explained the two testing procedures for the the prototype board. One
with the temperature sensor data and second with pressure sensor data. Tempera-
ture measurements are compared with thermocouple reading. The board is test at
four different location. The maximum difference was 1.2◦ C in the outdoor environ-
ment. A wheatstone bridge output is captured by the prototype board to emulate
the pressure sensor data.

58
Chapter 7

Conclusion and Future Work

Different aspects in data storage tag designing have been considered meticulously.
Mainly electronic part of the data storage tag is emphasized in the current project.
A prototype board has been designed and implemented in hardware. An embedded
software is developed for the electronic hardware of data storage tag. The functional-
ity of the board has been tested successfully. The electronic board can sense ambient
temperature. It can also sense voltages that correspond to a pressure sensor data.
The parameters to configure the sigma delta ADC, SINC Comb filter and SPI com-
munication are designed. Two interrupt service routines(ISR), one for sigma-delta
ADC and second for serial communication are developed. Σ∆ ADC receives analog
sensor data, process the sensor data with 2nd order modulator, passes it through a
SINC Comb filter. Σ∆ ISR interrupts the embedded software to sample the digital
version of the data. The first version of the design layout has been transfered to
PCB. The devices on the prototype board has been successfully configured through
Spi-By wire interface. The board has been tested at four (4) different locations to
capture and interpret the sensor data. The prototype board results has been verified
with a thermocouple.

ASIC Solution There are plethora of options to approach the design. One poten-
tial solution can be an application specific integrated circuit (ASIC) design. After
defining the specifications in concrete form, the designer can opt for a resource effi-
cient FPGA(Field Programmable Gate Array)to spread out his custom design. Full
custom design will be an almost ideal solution for the project. The said approach is
not pursued in the project because of limited number of customers of the application
and was considered to be beyond the scope of the current project.

Analog Device MCU based design Second option could be to pursue in the
direction of an analog micocontroller based solution. As we are dealing with ana-
log signals and of feable strength. But we have to trade off in terms of power

59
consumption in the electronic part of data storage tag. The designer would recom-
mend MCU from Analog Devices only if a more power efficient solution is available.
MSP430F2013 microcontroller has more than six (6) times better power consump-
tion specifications than ADuC7020 microcontroller. The figure is calculated by
comparing active mode current consumption at the same frequency and tempera-
ture.
As our application is not computationally intensive but storage intensive. So the
compromise could be made in terms of CPU architecture and other resources on the
microcontroller. Design shifting from 16bit RISC architecture to 8-bit architecture
should not cost much to the design. But there would be more overhead in the soft-
ware development. Signal processing through Σ∆ ADC becomes time consuming in
case of 8-bit architecture.
The designer has been reluctant in using RFID technology to download stored
data from the memory into the PC. First reason is the delay that could cause the
communication between DST and computational device(PC) to almost crawl.The
second is the full duplex communication between sender and reciever. As it’s been
evident from the ATMEL based design that the former design could not establish
bidirectional communication between transmitter and reciever using RFID technol-
ogy.That is the limitation of RFID technology. The alternative solution is the wired
approach. Using UART or RS232 interface could make the things easier and faster.

Potential Problems The memory has to communicate both with the MCU and
the laptop. In the protoype board, a race condition could occur to duplicate SPI
communcation of the memory. But in the final DST that problem will be out of
question as the MCU will be configured only to write data into the memory. Mem-
ory read operation will be performed upon re-catching the fish.
The main bottleneck of the selected MCU is that not all the functionalities are
available simultaneously. The designer has to sacrifice one capability of the MCU in
order to utilize the other one. And that also tempts to add more external circuitry
on the electronic board. If we want to stick with this microcontroller for the final
product without compromising on the specifications then one hardware solution is
to add an external multiplexer at the expense of size and power consumption. We
have to poll the sensors data in round robin fashion.
The storage capacity is the real bottleneck of the overall electronic part of the
project. Our dream specification can be achieved if we sort out 6-7MB of non-
volatile memory. The memory used in the protoytype board is 0.5MB. When we
have to store data from a cluster of four sensors then it won’t fulfill our specifications
completely. During the testing phases of the electronic board, the designer come
across with a high storage memory.

60
STMicroelectronics Flash Memory The memory has following hallmarks

• Program Current = 20mA.

• Read Supply Current = 10mA.

• Supply Voltage = 2.7V to 3.6V for program, erase and read.

• Package Mechanical = 14mm x 20mm (TSOP56), 10mm x 13mm(TBGA64).

• Capacity = 16Mbyte.

• Operating Temperature = −50◦ C to 125◦C

The above values are typical parameters for M29W128FH flash memory from STMi-
croelectronis. Now if we juxtapose the above parameters with the Atmel DataFlah
Memory, AT45DB041D.

• Program Current = 17mA.

• Read Supply Current = 20mA.

• Supply Voltage = 2.5V to 2.7V for program, erase and read

• Package Mechanical = 5.05mm x 6.20mm (SOIC),

• Capacity = 0.5Mbyte.

• Operating Temperature = −40◦ C to 85◦ C

We can examine that STMicroelectronis memory provides 32 times higher storage

capacity at the expense of twice the package size of Atmel memory. The parameters
that dictate the power consumption are nearly the same. But the interfacing the
MCU with the above mentioned memory is questionable as it does not provide SPI
communication facility and that may discourage the designer to opt for this device.
Another hurdle is to solder ball grid array package but that is avoidable if third
party is assigned with the soldering components and PCB layout tasks.

Inclusion of Time parameter In designing the tag, the time stamp can easily be
included among other parameters of interest. It will only cost, a little bit overhead
in the application software and data storage. But the time parameter can exhibit
the season details of the year, when the sensor data was captured. The correspond-
ing memory requirements should be assessed as we are increasing the size of every
sampled sensor data by adding timing information with it.

61
Inclusion of Light Sensor and Salinity Sensor In order to accommodate
light sensor and salinity sensor, a microcontroller that can support multi-channel
differential analog inputs should be used. High-pin packages from Texas Instrument
could be one options by trading off the PCB fabrication simplicity. But we can test
the amplified output of light and salinity sensors with the current prototype board,
not simultaneously but one at a time.

Biocompatible Material for packaging We should make sure that final product
is packaged with biocompatible material. It makes fish better protected from the
harm effects of data storage tag.

How we can improve our DST

• Accurcay of data storage tag can be improved by integrating more precise

sensors.

• In terms of resolution and precision, MEMS temperature sensors integrated

on the multichip is expected to provide better results than the intergrated
temperature sensor of microcontroller.

• Additional filtering can be done in the software, to fine tune the output digital
decimation filter.

• Data can be compressed with some software algorithm before storing into
the memory and the it could be decompressed while capturing data form the
memory.

The project was a balanced combination of hardware and software tasks. The hard-
ware design include both digital and analog domains. Hardware requirements were
more challenging. In the end it was possible to speak with the hardware by the
software, according to the specification requirements. There is room for doing more
experiments with the design by accomodating more sensors and testing circuitry.

62
References

[1] Bolle, L.J. and Hunter, E. and Rijnsdorp, A.D. and Pastoors, M.A. and Met-
calfe, J.D. and Reynolds, Do tagging experiments tell the truth? Using elec-
tronic tags to evaluate conventional tagging data. ICES Journal of Marine Sci-
ence, volume 62, number 2, pages 236-246, ISSN 10543139, 2005.

[2] MSP430 IAR C/C++ Compiler, Texas Instruments, 2006.

[3] MSP430x2xx Family User’s Guide , Texas Instruments, 2006.

[4] Jorge Alberola Lluch, Erik V. Thomsen, RFID Interface For Fish Route Mon-
itoring, Technical University of Denmark, 2006,

[5] Zdenek Ferus, FISH & CHIP Hadware Specification , MIC, Technical University
of Denmark, 2007, University of West Bohemia Univerzitnı́ 8 306 14 Pilsen
Czech Republic,

[6] Erik V.Thomsen, Fish and Chip Project, Technical University of Denmark,
2007.

[7] Ulrik Sørensen Wismar, Multi Sensor CMOS-IC Interface, COM, DTU, Fabu-
rary 2003.

[8] Anders Hylgård, Development of a multisensor for Marine Environment Stud-

ies, MIC, DTU, April 2004.

[9] Erik V. Thomsen, Fish & Chip, Technical University of Denmark, 2006.

[10] Star-Oddi, www.star-oddi.com, Faburary 2007.

[11] Cefas Technology Limited, http://www.cefastechnology.co.uk/, September 2006.

[12] Texas Instruments, eZ430-F2013 Development Tool, 2006.

[13] Texas Instrument, MSP430x2xx Family User’s Guide.

63
[14] Peter Spevak and Peter Forstner, MSP430 32kHz Crystall Oscillators, Texas
Instrument, Augest 2006.

[15] Analog Devices, Precision Analog Microcontroller 12-bit Analog I/O,

ARM7TDMI R MCU ADuC7019/20/21/22/24/25/26/27,

[16] MSP430x20x1,MSP430x20x2,MSP430x20x3 Mixed Signal Microcontroller, Au-

gust 2006.

[17] Nick Patavalis, A Brief Introduction to the JTAG Boundary Scan Interface,
2001,

[18] Building Simple JTAG Cable, http://www.diygadget.com/store/building-

simple-jtag-cable/info 12.html.

[19] AN OVERVIEW OF RFID TECHNOLOGY, informationdataflows.com.

DataFlows Dimensions, 2006.

[20] ATMEL Corporation, 4-megabit 2.5-volt or 2.7-volt DataFlash,

ATD45DB041D, 2007.

[21] Luke Enriquez, Hints and Tips for using Surface Mount Technology (SMT),
2001.

64
Figure 7.1: Schematics of Baseline Implemenation.

65
Appendix A

//Develpor: Muhammad Asif Malik

// Date: 24 May, 2007
// Purpose: To store data from internal temp sensor, available in SDMEMO to the
// External Atmel Memory.
// Note: i) Sigma Delta Module has higher priority than USI
// ii) In Active mode, all clocks are enables.

// mem_sens_data and sens_data should be same during testing!

#include <msp430x20x3.h>

void Init_Sys(); //Booting up the MCU, general settings, clock source,

//stoping watch dog etc
void SD_config(); //Configuring SigmaDelta ADC
void Config_USCI(); //Configuring SPI communication with external Atmel Memory
void Mem_Write(); //Writing to the memory by the MCU
void Mem_Read(); //Reading stored data in the Memory, into a variable, for testing
char Read_Mem_status(); //Reading status Register of Memory

void writebuffer1 (int ,int , int , int ); //Writing to Buffer 1 of External Memory
void sendbyte(volatile unsigned int ); //send byte to External Memory
void sendword(volatile unsigned int ); //sending word to External Memory
int receivebyte(); //Receive byte from Memory
void buffer1toflash (int, int , int , int ); // Data transfer from Buffer 1 to Flash

void delay(volatile unsigned int); // Hardware delay

unsigned long int sens_data; //SD16MEM0 data

unsigned long int mem_sens_data; // sensor data stored in the memory

//unsigned int n; //running average

char st_reg; // status register of Memory

66
void main( void )
{
volatile int j = 0; // Use volatile to prevent removal
// by compiler optimization
volatile int i = 0;

Init_Sys(); //Clock sourcing and other basic bootstrapping

SD_config(); //ADC settings
Config_USCI(); // Configuring SPI communication with memory

st_reg = Read_Mem_status();

P1OUT |= 0x02; // De Asserting CS

// _EINT(); // Enable general interrupts

while (1)
{
_EINT(); // Enable general interrupts

SD16CCTL0 |= SD16SC; // SET BREAKPOINT HERE

// Set bit to start conversion

// LPM0 mode
// CPU is disabled, MCLK is disabled
// ACLK, SMCLK remain active
_BIS_SR(LPM0_bits + GIE); // Enter LPM0

Mem_Write();
}

void Init_Sys()
{

WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer

//Configureing I/O

67
 // P1.1 = Pin3 = ChipSelect = Output Dir = GPIO function
// P1.4 = Pin6 = SMCLK = Output Dir = Peripheral function (DC0)
// P1.5 = Pin7 = SCLK = Output Dir = Peripheral function (USI)
// P1.6 = Pin8 = SDO = Output Dir = Peripheral function (USI)
// P1.7 = Pin9 = SDI = Input Dir = Peripheral function (USI)

P1DIR |= 0x72; //
P1SEL |= 0xF0; //
// P1OUT; // Putting Memory in Standby Mode

//Configure DCO
DCOCTL = CALDCO_1MHZ;
BCSCTL1 = CALBC1_1MHZ;

delay(2);

void SD_config()
{

// A6 channel differential pair input

//Preamplifier gain set to 1

SD16INCTL0 = SD16INCH_6;

SD16INCTL0 |= SD16INTDLY_2; //Second sample causes interrupt

//Internal Reference Generator ON

// Low power mode
//Clk Division by 384
//SMCLK

SD16CTL = SD16REFON + SD16DIV0 + SD16DIV1 + SD16XDIV0 + SD16XDIV1 +SD16SSEL_1;

SD16CTL |= SD16VMIDON; // To minimize to affects of the contention, with externa
//on the conversion

68
 //Unipolar
//Oversampling Ratio = 1024
// SD16LSBACC toggles each time SD16MEM0 is read
// Continous Conversion Mode
// SD16MEM0 contains lower 16bits of the conversion
// Enabling the interrupts

SD16CCTL0 = SD16XOSR + SD16OSR0 + SD16IE + SD16IFG;

// External Input enabled

SD16AE = SD16AE6;
delay(2);

void Config_USCI() // SPI mode will be set

{
// Module is set for MSB first

//MCU is master and memory is slave, Master sources the clk

USICTL0 |= USIMST;
//There are two options to for SPI clock
// i) SMCLK, Pin 6, P1.4
// ii) ACLK, Pin 2, P1.0, Current Hardware is set here

// Select SMCLK that is 1MHz from the DCO

USICKCTL |= USISSEL_3;

USICKCTL |= USIDIV_7; // Dividing clock to 128

// Net clock for SPI = 7.8125kHz

// Enable SDI , SDO and SCLK

USICTL0 |= USIPE7 + USIPE6 + USIPE5;

USICTL1 |= USICKPH; // data is captured on the first SCLK edge and changed on the f

69
// USICNT |= USI16B; //16-bit register mode
// USICNT |= USICNT3; //8 bits to be transmitted or recieved

USICTL0 |= USIOE; // Enabling output

USICTL0 |= USIGE; // Latch transparent

//P1OUT &= 0xFD; // Asserting Chip Select for the Memory, P1.1, Pin 3

delay(2);
}

void Mem_Write()
{
volatile unsigned int j=0;
volatile unsigned int k=0;

for (k=0;k<10;k++) // k is page number

{

for (j=0;j<200;j++) // 200 bytes , the loops writes data in to buffer 1

{

writebuffer1(0x84,0x00,0x00,2*j);

P1OUT &= 0xFD; //Assert CS by pulling it down

sendword(sens_data); //sending data
P1OUT |= 0x02; // De-Asserting Chip Select for the Memory, P1.1, Pin 3
//buffer1write();
}

buffer1toflash(0x83,k,0x00,0x00);
k++;
}

}
void writebuffer1 (int opcode,int add1, int add2, int add3)
{
P1OUT &= 0xFD; //Assert CS by pulling it down

sendbyte(opcode);

70
 sendbyte(add1); // 3 byte address
sendbyte(add2);
sendbyte(add3); // this specifies the address of byte to be written

P1OUT|=0x02; // CS goes up, Deasserted

}
void sendbyte(volatile unsigned int B)
{
USISRL=B;
USICNT = USIIFGCC + USICNT3; // 8 bits to be transmitted
//USIFGCC is not automatically cleared
delay(2);
}
void sendword(volatile unsigned int w)
{
USISR=w;
USICNT = USIIFGCC + USICNT4; // 16 bits to be transmitted + interrupt
delay(2);
}

void buffer1toflash(int opcode,int add1, int add2, int add3)

{
P1OUT &= 0xFD; //Assert CS by pulling it down

sendbyte(opcode);
sendbyte(add1); // 3 byte address
sendbyte(add2);
sendbyte(add3);

P1OUT|=0x02; // CS goes up, Deasserted

delay(2);

}
int receivebyte()
{
USICNT = USIIFGCC + USICNT3;
delay(2);
return(USISRL);
}

//functions declaration

71
void delay(volatile unsigned int d)
{
do d--;
while (d != 0);
}

void Mem_Read()
{
// No need now: Only used during testing
}

char Read_Mem_status()
{
char rd;
volatile int cnt = 0;
while (cnt < 2) // Making two attempts to get status register contents
{

P1OUT &= 0xFD; //Asset CS

// Read USISR
// Write to USISR
// Enable module for next transmission

// rd = USISRL;
USISRL = 0xD7; //Sending opcode for status register read
USICTL0 &= ~USISWRST; // USI released for operation
//USICTL0 &= 0xFE; // reset USISWRST = 0 => USI released for operation
USICNT = 8;

USICTL1 &= ~USIIFG;

// USICTL1 &= 0xFE; // USIIFG = 0 => Remove the clock HOLD if it exists.
rd = USISRL;
// sendbyte(0xD7); //Opcode to read the status register
delay(10);
P1OUT |= 0x02; // De Asserting CS
delay(2);
cnt++;
}
return(rd);

72
}

#pragma vector=SD16_VECTOR
__interrupt void SD16ISR(void) // ISR for Sigma Delta ADC module
{
//_DINT(); //Disable interrupts
//SD16CCTL0 |= ~SD16IE; // Disabling SD interrupts
//n++;
switch (SD16IV)
{
case 2: // SD16MEM Overflow
break;
case 4: // SD16MEM0 IFG
//result = result + SD16MEM0; // Save CH5 results (clears IF
//result = result/n;
sens_data = SD16MEM0;
break;
}

//SD16CCTL0 |= SD16IE; // Enabling SD interrupts

_BIC_SR_IRQ(LPM0_bits); // Exit LPM0

_EINT(); //Enable interrupts
}
// USI interrupt service routine
#pragma vector=USI_VECTOR
__interrupt void universal_serial_interface(void) //ISR for USI module
{
_DINT(); //Disable interrupts

//P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR

//USICNT = 0x1F; // re-load counter
_EINT(); //Enable interrupts
}

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Appendix B

//Developer: Muhammad Asif Malik

//Date: 11June, 2007
//Purpose: Interpretting SDMEMO for measured temperature
// T = SDMEM0/73 -273
// Status : works fine with the prototype board.
#include <msp430x20x3.h>
void Init_Sys(); //Booting up the MCU, general settings, clock source,
//stoping watch dog etc
void SD_config(); //Configuring SigmaDelta ADC
void delay(volatile unsigned int); // Hardware delay
unsigned long int SD; //SD16MEM0 data,
unsigned long int T;
void main( void )
{

Init_Sys(); //Clock sourcing and other basic bootstrapping

SD_config(); //ADC settings

while (1)
{
_EINT(); // Enable general interrupts

SD16CCTL0 |= SD16SC; // SET BREAKPOINT HERE

// Set bit to start conversion

T = SD / 73; // Converting SDMEMO contents to temperature value

T = T - 273; // from Kelvin to Celsiou

// LPM0 mode
// CPU is disabled, MCLK is disabled
// ACLK, SMCLK remain active
_BIS_SR(LPM0_bits + GIE); // Enter LPM0

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 }

void Init_Sys()
{

WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer

//Configureing I/O

// P1.1 = Pin 3 = A4+ = Input = Sigma-Delta

// P1.2 = Pin 4 = A4- = Input = Sigma-Delta
// P1.4 = Pin6 = SMCLK = Output Dir = Peripheral function (DC0)

P1DIR |= 0x10; // SMCLK

P1DIR |= 0x08; // Vref output

P1SEL |= 0x16; // SMCLK, A4+, A4-

P1SEL |= 0x08; // Vref output

//Configure DCO
DCOCTL = CALDCO_1MHZ;
BCSCTL1 = CALBC1_1MHZ;

delay(2);

void SD_config()
{

// A5 channel differential pair input

//Preamplifier gain set to 1

//SD16INCTL0 |= SD16GAIN_1; // PGA = 2

// SD16INCTL0 = SD16INCH_5;

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// SD16INCTL0 = SD16INCH_7; //PGA offset measurement
SD16INCTL0 = SD16INCH_6; // Temp Sensor

SD16INCTL0 |= SD16INTDLY_1; //Third sample causes interrupt

//Internal Reference Generator ON

// Low power mode

//SMCLK

// Typical Modulator Frrquency = 500kHz

SD16CTL = SD16REFON + SD16SSEL_1;

SD16CTL |= SD16DIV_1; ////Clock Divider = 2

//SD16CTL |= SD16XDIV_1; // Clock Divider = 3
//SD16CTL |= SD16DIV_2; ////Clock Divider = 4

// Net Modulator Frequency, Fm = 250kHz

delay(12);

SD16CTL |= SD16VMIDON; // To minimize to affects of the contention, with externa

//on the conversion
delay(2);

// By default Bipolar

//SD16CCTL0 |= SD16UNI; // Unipolar

SD16CCTL0 |= SD16SNGL; // Single Conversion Mode

// SD16LSBACC toggles each time SD16MEM0 is read

// Continous Conversion Mode
// SD16MEM0 contains lower 16bits of the conversion
// Enabling the interrupts

// Sampling Frequency fs = fm/OSR = 250/32 = 7.8kHz

SD16CCTL0 = SD16DF + SD16IE;

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 //SD16CCTL0 |= SD16LSBACC; // SDMEMO containst laest sig 16b of conversion

//SD16CCTL0 |= SD16XOSR; // OSR = 512

//SD16CCTL0 |= SD16XOSR + SD16OSR0; // OSR = 1024

// SD16CCTL0 |= SD16OSR0; //OSR = 128

SD16CCTL0 |= SD16OSR1; //OSR = 64

SD16CCTL0 |= SD16OSR1 + SD16OSR0; //OSR = 32

// External Input enabled

SD16AE = SD16AE6;
delay(2);

void delay(volatile unsigned int d)

{
do d--;
while (d != 0);
}

#pragma vector=SD16_VECTOR
__interrupt void SD16ISR(void) // ISR for Sigma Delta ADC module
{
_DINT(); //Disable interrupts
//SD16CCTL0 |= ~SD16IE; // Disabling SD interrupts
//n++;
switch (SD16IV)
{
case 2: // SD16MEM Overflow
break;
case 4: // SD16MEM0 IFG
//result = result + SD16MEM0; // Save CH5 results (clears IF
//result = result/n;
SD = SD16MEM0;
// case 0: // Patch, in case SD16IV resets its contents after entering ISR
// SD_offset = SD16MEM0;
break;

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 }

//SD16CCTL0 |= SD16IE; // Enabling SD interrupts

_BIC_SR_IRQ(LPM0_bits); // Exit LPM0

_EINT(); //Enable interrupts
}

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Figure 7.2: Proposed Software Flow with 4 sensors.

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