Quanta Ze 8 R1a Schematics

5 4 3 2 1
ZE8 BLOCK DIAGRAM

PCB STACK UP
6L HDI POWER
CLOCK SYSTEM 5V/3V
D LAYER 1 : TOP D
CK505 (QFN-64) RT8206B P24
LAYER 2 : GND
PG 3
LAYER 3 : IN1 CPU Core
LAYER 4 : IN2 ISL6261A P25
FAN & THERMAL
LAYER 5 : VCC
P4 DDR Power
LAYER 6 : BOT
CPU RT8207A P26
Penryn SFF ULV DC/SC VCCP 1.05V

RT8202A P27
Micro-FCBGA956/10W P4,5
1.5V
800/1066 MHz FSB G9334/AO4466 P28
LVDS LED Panel 1.5V_S5
DDR2-SODIMM cahnge A NORTH BRIDGE Connector P23 RT9025 P28
C C
P16 VGA CRT Discharge

667/800MHZ DDR II
Cantiga SFF GS45 Connector P22 P28
DDR2-SODIMM cahnge B
TMDS HDMI Level Shifter HDMI GFX
P17 P23 Connector P23 ISL6263A P29
PG 6,7,8,9,10,11
DMI x 4
PCIE4 MINI CARD 1
2.5HDD SATA0 SOUTH BRIDGE
P21 Connector P20
PCIE PCIE5 MINI CARD 2 SIM CARD
Port 8 Connector P20 Connector P20
Touch Screen
P23
B PCIE1 Connector GLAN B
On Board USB0 Port 6 ICH9-M SFF P22 Atheros AR8131L

P21
IHDA Line Out/MIC Connector
MINI CARD 1 Port 4 P22
CODEC
P20
Speaker Speaker Connector
Realtek ALC269X
MINI CARD 2 Port 2 USB P19
P20
Digital MIC LED Panel
PG 12,13,14,15
CCD Port 7 P18 Connector P23
P23
LPC
Bule Tooth Port 5
EC
P22 8x16 Keyboard
Winbond WPCE775LA0DG
Connector P22
A Port 0 P19 A
Connector
On Board USB2
Port 1 SPI PS/2
On Board USB3
FLASH TouchPAD Quanta Computer Inc.
Card Reader Port 3
2Mbytes Connector PROJECT : ZE8
Alcor AU6433 P22 Size Document Number Rev
P19 P22 1A
Schematic Block Diagram
Date: Tuesday, September 29, 2009 Sheet 1 of 32
5 4 3 2 1
5 4 3 2 1
ZE8 Power On Sequence BOM naming rule

From AC,Battery VIN
Items Function Name Description
D
+5VPCU +3VPCU D
1 With HDMI HD@
From PWM SYS_HWPG(PCU)
2 Without HDMI NHD@
From Power Button NBSWON#
3 3G Module 3G@
From EC S5_ON
4
+3V_S5,1.5V_S5
5
+5V_S5
6
From EC to SB RSMRST#
From SB to EC SUSB#,SUSC#
SUSON
From EC SUSON
+3VSUS +1.8VSUS +SMDDR_VREF +SMDDR_VTERM
>5ms ICH9M SFF SMBUS Table
From PWM HWPG_1.8V (SUS)
C C
From EC MAINON >5ms

MAINON CLK GEN RAM Mini Card (WLAN/WMAX) Mini Card (3G) G sensor
+5V +3V +1.5V +1.05V (SMB_DATA) / (SMB_CLK) (+3V_S5) V V V V V
From PWM HWPG_1.5V HWPG_1.05V Power Plane +3V +3V +3V +3VSUS +3V
>10ms
From PWM HWPG(MPWROK) VRON MOS CKT Stuff Stuff Stuff Stuff Stuff
From EC PWROK_EC
>5ms
From EC VRON
+VCC_CORE
From PWM to U5 VR_PWRGD_CK410#
From U5 to SB VR_PWRGD_CLKEN EC SMBUS Table
From SB to CLK GEN VR_PWRGD_CK410
Battery CPU thermal Sensor EC EEPROM
B From PWM to U7 DELAY_VR_PWRGOOD(CPU PWRGD) B
EC775 SDATA1/SCLK1(+3VPCU) V
From U7 to SB ICH_PWRGD EC775 SDATA2/SCLK2(+3V) V
From SB to CPU H_PWRGOOD EC775 SDATA3/SCLK3(+3VPCU) V
Power Plane +3VPCU +3V +3VPCU
From SB to NB PLTRST#,PCIRST#
MOS CKT X X X
From NB to CPU CPURST#
A A
Quanta Computer Inc.

PROJECT : ZE8
Size Document Number Rev
1A
Power Sequence/ BOM Rule
5 4 3 2 1
5 4 3 2 1
+3V +3V
Clock Generator (CLK)

R152 R157
+1.05V +1.05V_VDD_CLK
2
Q5 Q6
4.7K_4 4.7K_4
L16 PBY160808T-301Y-N/2A/300ohm_6 (16,19,21) SMBDT1 1 3PDAT_SMB PDAT_SMB (14,19) (16,19,21) SMBCK1 1 3PCLK_SMB PCLK_SMB (14,19)
2N7002 2N7002
C237 C230 C234 C238 C239 C236
D D
R153 *0_4 R158 *0_4
+3V_VDD_CLK
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 U7
9 VDD_PCI NC 55
16 VDD_48 SMBCK1 +3V
23 VDD_PLL3 CK505 SCLK 7
SMBDT1
4 VDD_REF SDA 6
QFN PM_STPPCI# R149 2.2K_4
+3V +3V_VDD_CLK 46 45 PM_STPPCI# PM_STPCPU# R148 2.2K_4
+1.05V_VDD_CLK VDD_SRC SRC5/PCI_STOP# PM_STPPCI# (14)
62 44 PM_STPCPU# PM_STPCPU# (14)
L17 PBY160808T-301Y-N/2A/300ohm_6 VDD_CPU SRC5#/CPU_STOP#
19 61 CLK_CPU_BCLK CLK_CPU_BCLK (4)
C240 C223 C227 C228 C232 C231 VDD_96_IO CPU0 CLK_CPU_BCLK#
27 VDD_PLL3_IO CPU0# 60 CLK_CPU_BCLK# (4)
33 VDD_SRC_IO_1
52 58 CLK_MCH_BCLK CLK_MCH_BCLK (6)
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4 VDD_SRC_IO_3 CPU1 CLK_MCH_BCLK#
43 VDD_SRC_IO_2 CPU1# 57 CLK_MCH_BCLK# (6)
56 VDD_CPU_IO
SRC8/ITP 54
SRC8#/ITP# 53
(14) CLKREQ#_SATA CLKREQ#_SATA R121 475/F_4 CR#_A 8 41 PECLK_MINI2 PECLK_MINI2 (19)

PCI0/CR#_A SRC10 PECLK_MINI2#
SRC10# 42 PECLK_MINI2# (19)
(21) CLKREQ#_LAN CLKREQ#_LAN R138 475/F_4 CR#_B 10
C PCI1/CR#_B CR#_H R147 3G@475/F_4 C
SRC11/CR#_H 40 CLKREQ#_MINI2 (19)
(19) PCLK_DEBUG PCLK_DEBUG 11 39 CR#_G R146 475/F_4 CLKREQ#_MINI1 CLKREQ#_MINI1 (19)
PCI2/TME SRC11#/CR#_G
12 37 PECLK_MINI1 PECLK_MINI1 (19)
PCI3 SRC9 PECLK_MINI1#
SRC9# 38 PECLK_MINI1# (19)
(18) PCICLK_EC PCICLK_EC R117 33_4 PCICLK_EC_R 13 PCI4/LCDCLK_SEL
SRC7/CR#_F 51
(13) PCLK_ICH PCLK_ICH R118 33_4 PCLK_ICH_R 14 50 CR#_E R143 475/F_4 CLKREQ#_MCH CLKREQ#_MCH (7)
0603 : card reader PCIF5/ITP_EN SRC7#/CR#_E +3V
use external crystal CG_XIN 3 48 PECLK_3GPLL PECLK_3GPLL (7)
CLK48_CARD R133 *22_4 XTAL_IN SRC6 PECLK_3GPLL# CR#_A R131 10K_4
(21) CLK48_CARD SRC6# 47 PECLK_3GPLL# (7)
CG_XOUT 2 CR#_B R132 10K_4
XTAL_OUT PECLK_LAN CR#_E R142 10K_4
SRC4 34 PECLK_LAN (21)
(14) CLK48_ICH CLK48_ICH R124 22_4 CLK48_ICH_R 17 35 PECLK_LAN# PECLK_LAN# (21) CR#_G R145 10K_4
USB_48/FSA SRC4# CR#_H R144 3G@10K_4
FSB 64 31 PECLK_ICH PECLK_ICH (13)
FSB/TEST/MODE SRC3/CR#_C PECLK_ICH#
SRC3#/CR#_D 32 PECLK_ICH# (13)
(14) CLK14_ICH CLK14_ICH R126 33_4 CLK14_ICH_R 5 Clock Request Table
REF0/FSC/TESTSEL PECLK_SATA
65 VSS_BODY SRC2/SATA 28 PECLK_SATA (12) CLKREQ# MAPPING Control
15 29 PECLK_SATA# PECLK_SATA# (12) 0 1
VSS_PCI SRC2#/SATA# CR#_A SRC0 SRC2 SATA
18 VSS_48
22 24 DREFSSCLK DREFSSCLK (7) CR#_B LCDCLK SRC4 LAN
Layout notice: placed within 500-mils of CK505M VSS_IO SRC1/SE1 DREFSSCLK# CR#_C SRC0 SRC2 N/A
26 VSS_PLL3 SRC1#/SE2 25 DREFSSCLK# (7)
B 59 CR#_D LCDCLK SRC4 N/A B
C226 27p/50V_4 CG_XIN VSS_CPU DREFCLK CR#_E SRC6 MCH
30 VSS_SRC1 SRC0/DOT96 20 DREFCLK (7)
36 21 DREFCLK# DREFCLK# (7) CR#_F SRC8 N/A
VSS_SRC2 SRC0#/DOT96#
2
Y1 49 CR#_G SRC9 MINI1

VSS_SRC3 VR_PWRGD_CK410 CR#_H SRC10 MINI2
1 VSS_REF CKPWRGD/PWRDWN# 63 VR_PWRGD_CK410 (14)
14.318MHZ SLG8SP513
1
C225 33p/50V_4 CG_XOUT

SLG8SP513VTR ,ICS9LPRS365BKLFT SLG8SP513VTR ICS9LPRS365
(AL8SP513000) (ALPRS365000) PULL HIGH PULL DOWN
+3V SMbus address D2 Pin 11 PCI2/TME PCI2/TME NO OVERCLOCKING (default) NORMAL RUN
If XDP is not implemented the 1-k ±10% resistor is not required.
10K_4 R122 PCLK_DEBUG
R135 2.2K_4 CLK48_ICH_R Pin 13 PCI4/ PCI_4/ PIN 24/25 IS 27MHz PIN 24/25
CPU_BSEL0 R127 1K_4 MCH_BSEL0 27_Select SEL_LCDCLK# IS SRC/DOT (default)
(4) CPU_BSEL0 MCH_BSEL0 (7)
R141 Short_4 FSB R140 10K_4 PCLK_ICH_R
(4) CPU_BSEL1 CPU_BSEL1 R137 1K_4 MCH_BSEL1 MCH_BSEL1 (7)
Pin 14 PCIF-5/ITP_EN PCIF-5/ITP_EN PIN 53/54 IS CPUITP PIN 53/54 IS SRC8
(default)
R134 10K_4 CLK14_ICH_R
(4) CPU_BSEL2 CPU_BSEL2 R119 1K_4 MCH_BSEL2 MCH_BSEL2 (7) ITP_EN Pin 53/54 <MAIN> : SLG8SP513VTR(AL8SP513000)
0 SRC_8/SRC_8# FAE suggest: place Cap before Resistor
1 ITP/ITP#
<SECOND> : ICS9LPRS365BKLFT(ALPRS365000)
A A
FSC FSB FSA CPU SRC PCI REF DOT96 USB PCLK_ICH_R C220 *33p/50V_4
(MHz) (MHz) (MHz) (MHz) (MHz) (MHz) PCICLK_EC_R C219 *33p/50V_4
0 0 0 266.6 100.0 33.3 14.318 96.0 48.0 R139 10K_4 PCICLK_EC_R CLK48_ICH_R C229 *33p/50V_4
0
0
0
1
1
0
133.3
200.0
100.0
100.0
33.3
33.3
14.318
14.318
96.0
96.0
48.0
48.0
CLK14_ICH_R C224 *33p/50V_4 Quanta Computer Inc.
0
1
1
0
1
0
166.6
333.3
100.0
100.0
33.3
33.3
14.318
14.318
96.0
96.0
48.0
48.0
PROJECT : ZE8
1 0 1 100.0 100.0 33.3 14.318 96.0 48.0 LCDCLK_SEL Pin 20/21 Pin 24/25 Size Document Number Rev
1 1 0 400.0 100.0 33.3 14.318 96.0 48.0 0 DOT_96/DOT96# LCDCLK/LCDCLK# 1A
1 1 1 Reserved 1 SRC_0/SRC_0# 27M/27M_SS
CLOCK GENERATOR CK505
5 4 3 2 1
1 2 3 4 5 6 7 8
Penryn SFF - Host Bus (CPU)

H_A#[3..16] U17A H_D#[0..15] U17B H_D#[32..47]
(6) H_A#[3..16] (6) H_D#[0..15] H_D#[32..47] (6)
H_A#3 P2 M4 H_D#0 F40 AP44 H_D#32
A[3]# ADS# H_ADS# (6) D[0]# D[32]#
H_A#4 V4 J5 H_D#1 G43 AR43 H_D#33
A[4]# BNR# H_BNR# (6) D[1]# D[33]#
H_A#5 W1 L5 H_D#2 E43 AH40 H_D#34
A[5]# BPRI# H_BPRI# (6) D[2]# D[34]#
Celeron 743 AJSLGEVVT03 H_A#6 T4 H_D#3 J43 AF40 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
ADDR GROUP 0
DATA GROUP 0
AA1 A[7]# DEFER# N5 H_DEFER# (6) H40 D[4]# D[36]# AJ43
H_A#8 AB4 F38 H_D#5 H44 AG41 H_D#37
A[8]# DRDY# H_DRDY# (6) D[5]# D[37]#
SU2300 AJSLGYWVT03 H_A#9 T2 J1 H_D#6 G39 AF44 H_D#38
DATA GROUP 2
A[9]# DBSY# H_DBSY# (6) D[6]# D[38]#
H_A#10 AC5 H_D#7 E41 AH44 H_D#39
H_A#11 A[10]# H_D#8 D[7]# D[39]# H_D#40
CONTROL
AD2 M2 H_BR0# (6) L41 AM44
H_A#12 A[11]# BR0# H_D#9 D[8]# D[40]# H_D#41
SU4100 AJSLGS4VT03 AD4 K44 AN43
H_A#13 A[12]# H_IERR# H_D#10 D[9]# D[41]# H_D#42
A AA5 B40 N41 AM40 A
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
AE5 D8 H_INIT# (12) T40 AK40
H_A#15 A[14]# INIT# H_D#12 D[11]# D[43]# H_D#44
SU7300 AJSLGYVVT06 AB2 M40 AG43
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
AC1 N1 H_LOCK# (6) G41 AP40
A[16]# LOCK# H_D#14 D[13]# D[45]# H_D#46
(6) H_ADSTB#0 Y4 M44 AN41
H_REQ#[0..4] ADSTB[0]# H_D#15 D[14]# D[46]# H_D#47
(6) H_REQ#[0..4] G5 H_RESET# (6) L43 AL41
H_REQ#0 RESET# D[15]# D[47]#
R1 K2 H_RS#0 (6) (6) H_DSTBN#0 K40 AK44 H_DSTBN#2 (6)
H_REQ#1 REQ[0]# RS[0]# DSTBN[0]# DSTBN[2]#
R5 H4 H_RS#1 (6) (6) H_DSTBP#0 J41 AL43 H_DSTBP#2 (6)
H_REQ#2 REQ[1]# RS[1]# DSTBP[0]# DSTBP[2]#
U1 K4 H_RS#2 (6) (6) H_DINV#0 P40 AJ41 H_DINV#2 (6)
H_REQ#3 REQ[2]# RS[2]# DINV[0]# DINV[2]#
P4 L1 H_TRDY# (6)
H_REQ#4 REQ[3]# TRDY# H_D#[16..31] H_D#[48..63]
W5 (6) H_D#[16..31] H_D#[48..63] (6)
H_A#[17..35] REQ[4]# H_D#16 H_D#48
(6) H_A#[17..35] H2 H_HIT# (6) P44 AV38
H_A#17 HIT# H_D#17 D[16]# D[48]# H_D#49
AN1 F2 H_HITM# (6) V40 AT44
H_A#18 A[17]# HITM# H_D#18 D[17]# D[49]# H_D#50
AK4 V44 AV40
H_A#19 A[18]# H_D#19 D[18]# D[50]# H_D#51
AG1 AY8 AB44 AU41
H_A#20 A[19]# BPM[0]# H_D#20 D[19]# D[51]# H_D#52
ADDR GROUP 1
AT4 BA7 R41 AW41
H_A#21 A[20]# BPM[1]# H_D#21 D[20]# D[52]# H_D#53
DATA GROUP 1
AK2 BA5 W41 AR41
H_A#22 A[21]# BPM[2]# H_D#22 D[21]# D[53]# H_D#54
AT2 AY2 N43 BA37
DATA GROUP 3
H_A#23 A[22]# BPM[3]# H_D#23 D[22]# D[54]# H_D#55
AH2 AV10 U41 BB38
XDP/ITP SIGNALS
H_A#24 A[23]# PRDY# ITP_BPM5# H_D#24 D[23]# D[55]# H_D#56
AF4 AV2 AA41 AY36
H_A#25 A[24]# PREQ# ITP_TCK H_D#25 D[24]# D[56]# H_D#57
AJ5 AV4 AB40 AT40
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
AH4 AW7 AD40 BC35
H_A#27 A[26]# TDI +1.05V H_D#27 D[26]# D[58]# H_D#59
AM4 AU1 AC41 BC39
H_A#28 A[27]# TDO ITP_TMS H_D#28 D[27]# D[59]# H_D#60
AP4 AW5 AA43 BA41
H_A#29 A[28]# TMS ITP_TRST# H_D#29 D[28]# D[60]# H_D#61
AR5 AV8 Y40 BB40
H_A#30 A[29]# TRST# SYS_RST# H_D#30 D[29]# D[61]# H_D#62
AJ1 J7 SYS_RST# (14) Y44 BA35
H_A#31 A[30]# DBR# R123 H_D#31 D[30]# D[62]# H_D#63
AL1 T44 AU43
H_A#32 A[31]# D[31]# D[63]#
AM2 (6) H_DSTBN#1 U43 AY40 H_DSTBN#3 (6)
H_A#33 A[32]# 1K/F_4 DSTBN[1]# DSTBN[3]#
AU5 THERMAL (6) H_DSTBP#1 W43 AY38 H_DSTBP#3 (6)
H_A#34 A[33]# DSTBP[1]# DSTBP[3]#
AP2 (6) H_DINV#1 R43 BC37 H_DINV#3 (6)
H_A#35 A[34]# H_PROCHOT#_D DINV[1]# DINV[3]#
AR1 D38
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF AW43 COMP0 R275 27.4/F_4
(6) H_ADSTB#1 AN5 BB34 AE43
ADSTB[1]# THERMDA H_THERMDC GTLREF COMP[0] COMP1 R130 54.9/F_4 Layout note:
BD34 E37 MISC AD44
THERMDC TEST1 COMP[1] COMP2 R287 27.4/F_4 comp0,2: Zo=27.4ohm, L<0.5"
(12) H_A20M# C7 D40 AE1
A20M# H_PM_THRMTRIP# R116 C214 TEST2 COMP[2] COMP3 R288 54.9/F_4 comp1,3: Zo=55ohm, L<0.5"
(12) H_FERR# D4 B10 C43 AF2
B FERR# THERMTRIP# TEST3 COMP[3] B
(12) H_IGNNE# F10
IGNNE# ICH 2K/F_4 *0.1u/10V_4
AE41
AY10
TEST4
G7
TEST5 DPRSTP# H_DPRSTP# (7,12,25)
(12) H_STPCLK# F8 AC43 B8 H_DPSLP# (12)
STPCLK# TEST6 DPSLP#
(12) H_INTR C9 H CLK C41 H_DPWR# (6)
LINT0 CLK_CPU_BCLK DPWR#
(12) H_NMI C5 A35 CLK_CPU_BCLK (3) (3) CPU_BSEL0 A37 E7 H_PWRGOOD (12)
LINT1 BCLK[0] CLK_CPU_BCLK# BSEL[0] PWRGOOD
(12) H_SMI# E5 C35 CLK_CPU_BCLK# (3) (3) CPU_BSEL1 C37 D10 H_CPUSLP# (6)
SMI# BCLK[1] BSEL[1] SLP#
(3) CPU_BSEL2 B38 BD10
BSEL[2] PSI#
V2
RSVD01
Y2
RSVD02 Layout Note: Penryn_SFF_1p0
AG5
RSVD03 Place voltage divider
RESERVED
AL5
RSVD04 within 0.5" of GTLREF pin
J9
RSVD05
F4
RSVD06
H8
RSVD07
Penryn_SFF_1p0
+1.05V
3
+1.05V
2 Q4 +1.05V
(7,14,25) DELAY_VR_PWRGOOD
ME2N7002E R120 56_4 H_IERR#
C C
Voltage Level shift +1.05V R274
1
+1.05V R286 51/F_4 ITP_BPM5# 56_4

No use Thermal trip CPU side still PU 56ohm. R284 51/F_4 ITP_TDI
R84 R285 51/F_4 ITP_TMS
Use Thermal trip can share PU at SB side
R309 1K_4 R101 51/F_4 ITP_TCK H_PROCHOT#_D R273 *0_4
H_PROCHOT# (25)
R103 51/F_4 ITP_TRST#
56.2/F_4 Q3
2
MMBT3904-7-F
H_PM_THRMTRIP# 1 3 SYS_SHDN# (24)
Layout Note:
Place Resistor close to CPU
with Stub length <200mils.
R83 *0_4
PM_THRMTRIP# (7,12)
CPU FAN CTRL(THM) CPU Thermal Monitor(THM)

+3V
8/11 B-test : for EMI +3V +3V
+3V +5V C222 0.1u/10V_4

R341 ALERT#:pull up at SB side
FAN_PWM_CN FANSIG 10K_4 R125 R128

+3V R346 R343 GMT ADDRESS: 4CH
FANSIG 10K_4 *10K_4 EC ADDRESS: 98H
D
C244 C245 10K_4 10K_4
FANSIG (18) 30mA(20mils) D
*220p/50V_6 *220p/50V_6 +5V U6

R345 CN15 H_THERMDA
Q25 (18) 2ND_MBCLK 8 1
4 6 SCLK VCC
2
10K_4
MMBT3904 3 5 C221
2 (18) 2ND_MBDATA 7 SDA DXP 2
FAN_PWM_E 1 3 FAN_PWM_CN
1 R129 *0_4 2200p/50V_6
(14) THERM_ALERT# 6 ALERT# DXN 3
FAN
3
FAN_ON# 4 5 H_THERMDC
FAN_ON# R344 10K_4 FAN_PWM_B Q24 OVERT# GND
2
MMBT3904
IC OTHER(8P) G780P81U(MSOP-8) PROJECT : ZE8
1
CPUFAN# Size Document Number Rev

(18) CPUFAN# 1A
Penryn SFF (Host Bus)/FAN/Thermal
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Penryn SFF - Power (CPU)

VCORE +1.05V
VCORE VCORE U17F U17E U17D
U17C BD28 AL37 G25 AA15 B42 AM36
VCC_101 VCCP_021 VSS_164 VSS_280 VSS[001] VSS[082]
F32 AB28 BB26 AN37 G23 AC15 F44 AR35
VCC[001] VCC[068] VCC_102 VCCP_022 VSS_165 VSS_281 VSS[002] VSS[083]
G33 AD30 BD26 AP38 G21 Y10 D44 AU35
H32 AD28 B22 B32 J25 AD10 D42 AV34
J33 Y26 B24 C33 J23 AH12 F42 AW35
K32 AB26 D22 D32 J21 AE15 H42 AW33
L33 AD26 D24 E35 L25 AG15 K42 AY34
M32 AF30 F24 E33 L23 AJ15 M42 AT36
N33 AF28 F22 F34 L21 AH10 P42 AV36
P32 AH30 H24 G35 N25 AM12 T42 BA33
A R33 AH28 H22 F36 N23 AL15 V42 BC33 A
T32 AF26 K24 H36 N21 AN15 Y42 BB36
U33 AH26 K22 J35 R25 AR15 AB42 BD36
V32 AK30 M24 L35 R23 AM10 AD42 C27
W33 AK28 M22 N35 R21 AT12 AF42 C29
Y32 AM30 P24 K36 U25 AV12 AH42 C31
AA33 AM28 P22 R35 U23 AW13 AK42 E29
AB32 AP30 T24 U35 U21 AW11 AM42 E27
AC33 AP28 T22 P36 W25 AY12 AP42 G29
AD32 AK26 V24 V36 W23 AU15 AY44 G27
AE33 AM26 V22 W35 W21 AW15 AV44 E31
AF32 AP26 Y24 AA35 AA25 AT10 AT42 G31
AG33 AT30 Y22 AC35 AA23 BA13 AV42 J29
AH32 AT28 AB24 AB36 AA21 BA11 AY42 J27
AJ33 AV30 AB22 AE35 AC25 BB12 BA43 L29
AK32 AV28 AD24 AG35 AC23 BC11 BB42 L27
AL33 AY30 AD22 AJ35 AC21 BA15 C39 N29
AM32 AY28 AF24 AF36 AE25 BC15 E39 N27
AN33 AT26 AF22 AL35 AE23 B6 G37 J31
AP32 AV26 AH24 AN35 AE21 D6 H38 L31
AR33 AY26 AH22 AK36 AG25 E9 J39 N31
AT34 BB30 AK24 AP36 AG23 F6 L39 R29
AT32 BB28 AK22 B12 AG21 G9 M38 R27
VCC[032] VCC[099] +1.05V VCC_133 VCCP_053 VSS_196 VSS_312 VSS[033] VSS[114]
AU33 BD30 AM24 B14 AJ25 H6 N39 U29
AV32 AM22 C13 AJ23 K8 R39 U27
VCC[034] VCC_135 VCCP_055 VSS_198 VSS_314 VSS[035] VSS[116]
AY32 J11 AP24 D12 AJ21 K6 T38 R31
VCC[035] VCCP_001 VCC_136 VCCP_056 VSS_199 VSS_315 VSS[036] VSS[117]
BB32 E11 AP22 D14 AL25 M8 U39 U31
BD32 G11 AT24 E13 AL23 M6 W39 W29
1
B28 J37 AT22 F14 AL21 P8 Y38 W27
VCC[038] VCCP_004 + C82 VCC_139 VCCP_059 VSS_202 VSS_318 VSS[039] VSS[120]
B30 K38 AV24 F12 AN25 P6 AA39 W31
B26 L37 AV22 G13 AN23 T8 AC39 AA29
VCC[040] VCCP_006 220u/2.5V_3528 VCC_141 VCCP_061 VSS_204 VSS_320 VSS[041] VSS[122]
D28 N37 AY24 H14 AN21 T6 AD38 AA27
2
D30 P38 AY22 H12 AR25 V8 AE39 AC29

F30 R37 BB24 J13 AR23 V6 AG39 AC27
F28 U37 BB22 K14 AR21 U5 AH38 AA31
B H30 V38 BD24 K12 AU25 Y8 AJ39 AC31 B
H28 W37 BD22 L13 AU23 Y6 AL39 AE29
D26 AA37 B16 L11 AU21 AB8 AM38 AE27
F26 AB38 B18 M14 AW25 AB6 AN39 AG29
H26 AC37 B20 N13 AW23 AD8 AR39 AG27
VCC[049] VCCP_015 +1.5V VCC_150 VCCP_070 VSS_213 VSS_329 VSS[050] VSS[131]
K30 AE37 D16 N11 AW21 AD6 AR37 AJ29
K28 D18 K10 BA25 AF8 AT38 AJ27
M30 B34 F18 P14 BA23 AF6 AU39 AE31
VCC[052] VCCA[01] VCC_153 VCCP_073 VSS_216 VSS_332 VSS[053] VSS[134]
M28 D34 F16 P12 BA21 AH8 AU37 AG31
VCC[053] VCCA[02] VCC_154 VCCP_074 VSS_217 VSS_333 VSS[054] VSS[135]
K26 H18 R13 BC25 AH6 AW39 AJ31
VCC[054] C426 C427 VCC_155 VCCP_075 VSS_218 VSS_334 VSS[055] VSS[136]
M26 BD8 VID0 (25) H16 R11 BC23 AK8 AW37 AL29
VCC[055] VID[0] VCORE VCC_156 VCCP_076 VSS_219 VSS_335 VSS[056] VSS[137]
P30 BC7 VID1 (25) D20 T14 BC21 AK6 BA39 AL27
VCC[056] VID[1] 0.01u/25V_4 10u/6.3V_6 VCC_157 VCCP_077 VSS_220 VSS_336 VSS[057] VSS[138]
P28 BB10 VID2 (25) F20 U13 C17 AM8 BC41 AN29
VCC[057] VID[2] VCC_158 VCCP_078 VSS_221 VSS_337 VSS[058] VSS[139]
T30 BB8 VID3 (25) H20 U11 C19 AM6 BD40 AN27
VCC[058] VID[3] R276 VCC_159 VCCP_079 VSS_222 VSS_338 VSS[059] VSS[140]
T28 BC5 VID4 (25) K18 V14 E19 AP8 BD38 AL31
V30 BB4 VID5 (25) K16 V12 E17 AP6 B36 AN31
VCC[060] VID[5] 100/F_4 VCC_161 VCCP_081 VSS_224 VSS_340 VSS[061] VSS[142]
V28 AY4 VID6 (25) M18 W13 G19 AT8 H34 AR29
P26 M16 W11 G17 AT6 D36 AR27
T26 K20 P10 J19 AU9 K34 AR31
V26 BD12 VCC_SENSE (25) M20 V10 J17 AV6 M34 AU29
VCC[064] VCCSENSE VCC_165 VCCP_085 VSS_228 VSS_344 VSS[065] VSS[146]
Y30 P18 Y14 L19 AU7 M36 AU27
Y28 P16 AA13 L17 AW9 P34 AW29
AB30 BC13 VSS_SENSE (25) T18 AA11 N19 AY6 T34 AW27
VCC[067] VSSSENSE VCC_168 VCCP_088 VSS_231 VSS_347 VSS[068] VSS[149]
T16 AB14 N17 BA9 V34 AU31
Penryn_SFF_1p0 R277 VCC_169 VCCP_089 VSS_232 VSS_348 VSS[069] VSS[150]
V18 AB12 R19 BB6 T36 AW31
V16 AC13 R17 BC9 Y34 BA29
100/F_4 VCC_171 VCCP_091 VSS_234 VSS_350 VSS[071] VSS[152]
P20 AC11 U19 BD6 AB34 BA27
T20 AD14 U17 B4 AD34 BC29
V20 AB10 W19 C3 Y36 BC27
Y18 AE13 W17 E3 AD36 BA31
Y16 AE11 AA19 G3 AF34 BC31
VCORE VCC_176 VCCP_096 VSS_239 VSS_355 VSS[076] VSS[157]
AB18 AF14 AA17 J3 AH34 C21
AB16 AF12 AC19 L3 AH36 C23
AD18 AG13 AC17 N3 AK34 C25
AD16 AG11 AE19 R3 AM34 E25
C Y20 AH14 AE17 U3 AP34 E23 C
+ C162 C154 C176 C177 C175 C178 C179 C174 VCC_181 VCCP_101 VSS_244 VSS_360 VSS[081] VSS[162]
AB20 AJ13 AG19 W3 E21
VCC_182 VCCP_102 VSS_245 VSS_361 VSS[163]
AD20 AJ11 AG17 AA3
330u/2.5V_7343 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 VCC_183 VCCP_103 VSS_246 VSS_362
AF18 AF10 AJ19 AC3
VCC_184 VCCP_104 VSS_247 VSS_363 Penryn_SFF_1p0
AF16 AK14 AJ17 AE3
VCC_185 VCCP_105 VSS_248 VSS_364
AH18 AK12 AL19 AG3
AH16 AL13 AL17 AJ3
AF20 AL11 AN19 AL3
AH20 AN13 AN17 AN3
AK18 AN11 AR19 AR3
VCORE VCC_190 VCCP_110 VSS_253 VSS_369
AK16 AP12 AR17 AU3
AM18 AR13 AU19 AW3
AM16 AR11 AU17 BA3
AP18 AK10 AW19 BC3
AP16 AP10 AW17 D2
C173 C180 C168 C181 C172 VCC_195 VCCP_115 VSS_258 VSS_374
AK20 AU13 BA19 E1
C138 C144 C137 C143 VCC_196 VCCP_116 VSS_259 VSS_375
AM20 AU11 BA17 G1
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 VCC_197 VCCP_117 VSS_260 VSS_376
AP20 L9 BC19 AW1
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 VCC_198 VCCP_118 VSS_261 VSS_377
AT18 L7 BC17 BA1
AT16 N9 C11 BB2
AV18 N7 C15 A41
AV16 R9 E15 A39
AY18 R7 G15 A29
AY16 U9 H10 A27
AT20 U7 M12 A31
AV20 W9 J15 A25
AY20 W7 L15 A23
BB18 AA9 N15 A21
BB16 AA7 M10 A19
C141 C135 C142 C145 C140 C134 C136 C139 VCC_209 VCCP_129 VSS_272 VSS_388
BD18 AC9 T12 A17
BD16 AC7 R15 A11
1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 VCC_211 VCCP_131 VSS_274 VSS_390
BB20 AE9 U15 A15
BD20 AE7 W15 A7
AM14 AG9 T10 A5
AP14 AG7 Y12 A9
D AT14 AJ9 AD12 BD4 D
AV14 AJ7
VCC_217 VCCP_137
AY14 AL9
VCC_218 VCCP_138 Penryn_SFF_1p0
BB14 AL7
+1.05V VCC_219 VCCP_139
BD14 AN9
+1.05V VCC_220 VCCP_140
AN7
VCCP_141
AF38 AR9
VCCP_017 VCCP_142
AG37 AR7
VCCP_018 VCCP_143
AJ37 A33
VCCP_019 VCCP_144
AK38 A13
C190 C193 C120 C119 C116 C121 C122 C118 C117 C194 C191 C192 VCCP_020 VCCP_145 Quanta Computer Inc.
*1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 *1u/6.3V_4 Penryn_SFF_1p0
PROJECT : ZE8
1A
Penryn SFF (Power)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Cantiga SFF - Host Bus (CLG) U18A H_A#[3..35]

H_D#[0..63] H_A#[3..35] (4)
L15 H_A#3
(4) H_D#[0..63] H_A#_3
H_D#0 J7 B14 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
H6 H_D#_1 H_A#_5 C15
H_D#2 L11 D12 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
J3 H_D#_3 H_A#_7 F14
H_D#4 H4 G17 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
A G3 H_D#_5 H_A#_9 B12 A
H_D#6 K10 J15 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
K12 H_D#_7 H_A#_11 D16
H_D#8 L1 C17 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
M10 H_D#_9 H_A#_13 D14
H_D#10 M6 K16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N11 H_D#_11 H_A#_15 F16
H_D#12 L7 B16 H_A#16
H_D#13 H_D#_12 H_A#_16 H_A#17
K6 H_D#_13 H_A#_17 C21
H_D#14 M4 D18 H_A#18
+1.05V H_D#15 H_D#_14 H_A#_18 H_A#19
K4 H_D#_15 H_A#_19 J19
H_D#16 P6 J21 H_A#20
H_D#17 H_D#_16 H_A#_20 H_A#21
W9 H_D#_17 H_A#_21 B18
H_D#18 V6 D22 H_A#22
R87 H_D#19 H_D#_18 H_A#_22 H_A#23
V2 H_D#_19 H_A#_23 G19
H_D#20 P10 J17 H_A#24
221/F_4 H_D#21 H_D#_20 H_A#_24 H_A#25
W7 H_D#_21 H_A#_25 L21
H_D#22 N9 L19 H_A#26
H_SWING H_D#23 H_D#_22 H_A#_26 H_A#27
P4 H_D#_23 H_A#_27 G21
H_D#24 U9 D20 H_A#28
H_D#25 H_D#_24 H_A#_28 H_A#29
V4 H_D#_25 H_A#_29 K22
R92 C93 H_D#26 U1 F18 H_A#30
H_D#27 H_D#_26 H_A#_30 H_A#31
W3 H_D#_27 H_A#_31 K20
100/F_4 0.1u/10V_4 H_D#28 V10 F20 H_A#32
B H_D#29 H_D#_28 H_A#_32 H_A#33 B
U7 H_D#_29 H_A#_33 F22
H_D#30 W11 B20 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
U11 H_D#_31 H_A#_35 A19
H_D#32 AC11
H_D#33 H_D#_32
AC9 H_D#_33 H_ADS# F10 H_ADS# (4)
H_D#34 Y4 A15
H_D#_34 H_ADSTB#_0 H_ADSTB#0 (4)
H_D#35 Y10 C19
H_D#_35 H_ADSTB#_1 H_ADSTB#1 (4)
H_D#36
HOST
AB6 H_D#_36 H_BNR# C9 H_BNR# (4)
Layout Note: H_D#37 AA9 B8
H_D#_37 H_BPRI# H_BPRI# (4)
H_D#38 AB10 C11
H_RCOMP trace should be H_D#39 AA1
H_D#_38 H_BREQ#
E5
H_BR0# (4)
H_D#_39 H_DEFER# H_DEFER# (4)
10-mil wide with 20-mil spacing. H_D#40 AC3 H_D#_40 H_DBSY# D6 H_DBSY# (4)
H_D#41 AC7 AH10
H_D#_41 HPLL_CLK CLK_MCH_BCLK (3)
H_D#42 AD12 AJ11
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# (3)
H_D#43 AB4 G11
H_D#_43 H_DPWR# H_DPWR# (4)
H_D#44 Y6 H2
H_D#_44 H_DRDY# H_DRDY# (4)
H_D#45 AD10 C7
H_D#_45 H_HIT# H_HIT# (4)
H_D#46 AA11 F8
H_D#_46 H_HITM# H_HITM# (4)
H_RCOMP H_D#47 AB2 A11
H_D#_47 H_LOCK# H_LOCK# (4)
H_D#48 AD4 D8
H_D#_48 H_TRDY# H_TRDY# (4)
H_D#49 AE7
H_D#50 H_D#_49
AD2 H_D#_50
R289 H_D#51 AD6
C H_D#52 H_D#_51 C
AE3 H_D#_52
24.9/F_4 H_D#53 AG9 L9
H_D#_53 H_DINV#_0 H_DINV#0 (4)
H_D#54 AG7 N7
H_D#55 AE11 AA7
H_D#56 AK6 AG3
H_D#57 AF6
H_D#58 H_D#_57
AJ9 H_D#_58 H_DSTBN#_0 K2 H_DSTBN#0 (4)
H_D#59 AH6 N3
H_D#_59 H_DSTBN#_1 H_DSTBN#1 (4)
H_D#60 AF12 AA3
H_D#61 AH4 AF4
H_D#62 AJ7
H_D#63 H_D#_62
AE9 H_D#_63 H_DSTBP#_0 L3 H_DSTBP#0 (4)
H_DSTBP#_1 M2 H_DSTBP#1 (4)
H_DSTBP#_2 Y2 H_DSTBP#2 (4)
H_SWING B6 AF2
H_SWING H_DSTBP#_3 H_DSTBP#3 (4)
H_RCOMP D4 H_RCOMP
H_REQ#_0 J13 H_REQ#0 (4)
+1.05V L13
H_REQ#_1 H_REQ#1 (4)
H_REQ#_2 C13 H_REQ#2 (4)
H_REQ#_3 G13 H_REQ#3 (4)
(4) H_RESET# J11 H_CPURST# H_REQ#_4 G15 H_REQ#4 (4)
R96 G9
(4) H_CPUSLP# H_CPUSLP#
H_RS#_0 F4 H_RS#0 (4)
D 1K/F_4 F2 D
H_RS#_1 H_RS#1 (4)
H_RS#_2 G7 H_RS#2 (4)
H_AVREF L17 H_AVREF
K18
R91 C104
H_DVREF
CANTIGASFF_1p0
2K/F_4 *0.1u/10V_4 PROJECT : ZE8
1A
Cantiga SFF (Host Bus)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Cantiga SFF - DMI/VGA (CLG) U18B
Intel GS40/GS45 Strapping Signals and Configuration J43 RSVD1

Pin Name Strap Description Configuration L43 RSVD2 SA_CK_0 BB32 M_CLK_DDR0 (16)
DDR CLK/ CONTROL/COMPENSATION

000 = FSB1066 J41 RSVD3 SA_CK_1 BA25 M_CLK_DDR1 (16) Layout notice: Place the resistor
CFG2:0 FSB Frequency 010 = FSB800 L41 RSVD4 SB_CK_0 BA33 M_CLK_DDR2 (16) within 500 mils (1.27 mm) of the (G)MCH.
011 = FSB667 AN11 BA23 U18C
RSVD5 SB_CK_1 M_CLK_DDR3 (16)
Other = Reserved AM10 RSVD6
CFG4:3 Reserved AK10 RSVD7 SA_CK#_0 BA31 M_CLK_DDR#0 (16)
CFG5 DMI x2 Select 1 = DMI x 4 AL11 BC25 +1.05V
RSVD8 SA_CK#_1 M_CLK_DDR#1 (16)
0 = DMI x2 F12 RSVD9 SB_CK#_0 BC33 M_CLK_DDR#2 (16) (22) INT_LVDS_PWM D38 L_BKLT_CTRL
RSVD
CFG6 ITPM Host Interface 1 = ITPM disabled
SB_CK#_1 BB24 M_CLK_DDR#3 (16) (22) INT_LVDS_BLON C37 L_BKLT_EN PEG_COMPI U45 PEG_COMP R104 49.9/F_4
0 = ITPM enabled L_CTRL_CLK K38 T44
L_CTRL_CLK PEG_COMPO
CFG7 Intel Management 1 = Intel Management Engine Crypto TLS BC35 M_CKE0 (16)
SA_CKE_0 L_CTRL_DATA
Engine Crypto Strap cipher suite with confidentiality BE33 M_CKE1 (16) L37
SA_CKE_1 PHL_CLK L_CTRL_DATA
A 0 = Intel Management Engine Crypto Transport C27 BE37 M_CKE2 (16) (22) PHL_CLK J37 D52 A
RSVD14 SB_CKE_0 PHL_DATA L_DDC_CLK PEG_RX#_0
Layer Security (TLS) cipher suite with no D30 BC37 M_CKE3 (16) (22) PHL_DATA L35 G49
RSVD15 SB_CKE_1 L_DDC_DATA PEG_RX#_1
confidentiality K54
PEG_RX#_2
CFG8 Reserved J9 BK18 M_CS#0 (16) H50
RSVD17 SA_CS#_0 PEG_RX#_3
CFG9 PCIE Graphics Lane 1 = Normal operation : Lane Numbered in Order BK16 M_CS#1 (16) (22) INT_LVDS_DIGON B36 M52
SA_CS#_1 LVDS_IBG L_VDD_EN PEG_RX#_4
0 = Reverse Lanes BE23 M_CS#2 (16) F50 N49
CFG10 SB_CS#_0 LVDS_IBG PEG_RX#_5
PCIE Loopback 1 = Disabled AW42 BC19 M_CS#3 (16) H46 P54
RSVD20 SB_CS#_1 LVDS_VBG PEG_RX#_6
enable 0 = Enabled P44 V46
LVDS_VREFH PEG_RX#_7
CFG11 Reserved BJ17 M_ODT0 (16) K46 Y50
SA_ODT_0 TXLCLKOUT- LVDS_VREFL PEG_RX#_8
CFG12 ALLZ 1 = Disabled BJ19 M_ODT1 (16) (22) TXLCLKOUT- D46 V52
SA_ODT_1 TXLCLKOUT+ LVDSA_CLK# PEG_RX#_9
0 = ALLZ mode enabled BB20 BC17 M_ODT2 (16) (22) TXLCLKOUT+ B46 W49
RSVD22 SB_ODT_0 LVDSA_CLK PEG_RX#_10
LVDS
CFG13 XOR 1 = Disabled BE19 BE17 M_ODT3 (16) D44 AB54
RSVD23 SB_ODT_1 LVDSB_CLK# PEG_RX#_11
0 = XOR mode enabled BF20 B44 AD46
RSVD24 SMRCOMPP LVDSB_CLK PEG_RX#_12
CFG14 Reserved BF18
RSVD25 SM_RCOMP
BL25 SM_VREF=0.5*VCC_SM PEG_RX#_13
AC55
CFG15 Reserved BK26 SMRCOMPN TXLOUT0- G45 AE49
SM_RCOMP# (22) TXLOUT0- TXLOUT1- LVDSA_DATA#_0 PEG_RX#_14
CFG16 FSB Dynamic ODT 1 = Dynamic ODT enabled SM_PWROK only for (22) TXLOUT1- F46
LVDSA_DATA#_1 PEG_RX#_15
AF54
0 = Dynamic ODT disabled BK32 SM_RCOMP_VOH TXLOUT2- G41
CFG17 Reserved SM_RCOMP_VOH
BL31 SM_RCOMP_VOL DDR3.(DDR2 PD only) (22) TXLOUT2-
C45
LVDSA_DATA#_2
E51
GRAPHICS
SM_RCOMP_VOL LVDSA_DATA#_3 PEG_RX_0
CFG18 Reserved AN45
ME_JTAG_TCK SM_DRAMRST# only PEG_RX_1
F48
CFG19 DMI Lane Reversal 1 = Reverse Lanes AP44 BC51 +SMDDR_VREF_NB TXLOUT0+ F44 J55
0 = Normal operation : Lane Numbered in Order AT44
ME_JTAG_TDI SM_VREF
AY37 SM_PWROK for DDR3.(DDR2:NC) (22) TXLOUT0+ TXLOUT1+ G47
LVDSA_DATA_0 PEG_RX_2
J49
ME_JTAG_TDO SM_PWROK (22) TXLOUT1+ LVDSA_DATA_1 PEG_RX_3 HDMI_HP_IV# (22)
Digital DisplayPort 1 = Digital DisplayPort (SDVO/DP/iHDMI) and AN47 BH20 SM_REXT TXLOUT2+ F40 M54
ME_JTAG_TMS SM_REXT (22) TXLOUT2+ LVDSA_DATA_2 PEG_RX_4
(SDVO/DP/iHDMI) PCIE are operating simultaneously via the BA37 DDR3_RST# (16) A45 M50 HDMI Port B
SM_DRAMRST# LVDSA_DATA_3 PEG_RX_5
CFG20 Concurrent with PEG port P52
DREFCLK PEG_RX_6
PCIE 0 = Digital DisplayPort (SDVO/DP/iHDMI) or B42 B40 U47
DPLL_REF_CLK DREFCLK# DREFCLK (3) LVDSB_DATA#_0 PEG_RX_7
PCIE are operational D42 A41 AA49
DPLL_REF_CLK# DREFSSCLK DREFCLK# (3) LVDSB_DATA#_1 PEG_RX_8
SDVO_CTRLDATA SDVO Present 1 = SDVO/HDMI/DP interface enabled B50 F42 V54
DPLL_REF_SSCLK DREFSSCLK# DREFSSCLK (3) LVDSB_DATA#_2 PEG_RX_9
0 = No SDVO/HDMI/DP interface disabled D50 D48 V50
DPLL_REF_SSCLK# DREFSSCLK# (3) LVDSB_DATA#_3 PEG_RX_10
L_DDC_DATA Local Flat Panel 1 = LFP Card Present; PCIE disabled AB52
PECLK_3GPLL PEG_RX_11
(LFP) Present 0 = LFP Disable R49 D40 AC47
CLK
PEG_CLK PECLK_3GPLL# PECLK_3GPLL (3) LVDSB_DATA_0 PEG_RX_12
DDPC_CTRLDATA Digital Display 1 = Digital display (iHDMI/DP) devide present P50 PECLK_3GPLL# (3) C41 AC53
PEG_CLK# LVDSB_DATA_1 PEG_RX_13
Present 0 = Digital display (iHDMI/DP) interface absent G43 AD50
PCI-EXPRESS
LVDSB_DATA_2 PEG_RX_14
B48 AF52
• The recommended pull-up resistor value is 4.02 k Ω ±1% LVDSB_DATA_3 PEG_RX_15
• The recommended pull-down resistor value is 2.21 k Ω ±1%. AG55 L47 PEG_TXN0 C73 0.1u/10V_4
DMI_RXN_0 DMI_MRX_ITX_N0 (13) PEG_TX#_0 PEG_TXN1 HDMITX2N (22)
AL49 F52 C74 0.1u/10V_4
DMI_RXN_1 DMI_MRX_ITX_N1 (13) PEG_TX#_1 HDMITX1N (22)
AH54 INT_TV_COMP J27 P46 PEG_TXN2 C71 0.1u/10V_4
DMI_RXN_2 DMI_MRX_ITX_N2 (13) TVA_DAC PEG_TX#_2 HDMITX0N (22)
TV
B AL47 INT_TV_Y/G E27 H54 PEG_TXN3 C92 0.1u/10V_4 B
DMI_RXN_3 DMI_MRX_ITX_N3 (13) TVB_DAC PEG_TX#_3 HDMICLKN (22)
INT_TV_C/R G27 L55
TVC_DAC PEG_TX#_4
AG53 DMI_MRX_ITX_P0 (13) T46
DMI_RXP_0 PEG_TX#_5
(3) MCH_BSEL0 K26 AK50 DMI_MRX_ITX_P1 (13) F26 R53
CFG_0 DMI_RXP_1 TVA_RTN PEG_TX#_6
(3) MCH_BSEL1 G23 AH52 DMI_MRX_ITX_P2 (13) U49
CFG_1 DMI_RXP_2 PEG_TX#_7
(3) MCH_BSEL2 G25 AL45 DMI_MRX_ITX_P3 (13) T54
CFG_2 DMI_RXP_3 PEG_TX#_8
J25 Y46
CFG_3 PEG_TX#_9
L25 AG49 DMI_MTX_IRX_N0 (13) B34 AB46
MCH_CFG5 CFG_4 DMI_TXN_0 TV_DCONSEL_0 PEG_TX#_10
T10 L27 AJ49 DMI_MTX_IRX_N1 (13) D34 W53
CFG_5 DMI_TXN_1 TV_DCONSEL_1 PEG_TX#_11
F24 AJ47 DMI_MTX_IRX_N2 (13) Y54
MCH_CFG7 CFG_6 DMI_TXN_2 PEG_TX#_12
T17 D24 AG47 DMI_MTX_IRX_N3 (13) AC49
CFG_7 DMI_TXN_3 PEG_TX#_13
D26 AF46
CFG_8 PEG_TX#_14
CFG
J23 AF50 DMI_MTX_IRX_P0 (13) AD54

CFG_9 DMI_TXP_0 PEG_TX#_15
DMI
B26 AH50 DMI_MTX_IRX_P1 (13)
CFG_10 DMI_TXP_1 CRT_B PEG_TXP0 C72 0.1u/10V_4
A23 AJ45 DMI_MTX_IRX_P2 (13) (21) CRT_B J29 J47 HDMITX2P (22)
MCH_CFG12 CFG_11 DMI_TXP_2 CRT_BLUE PEG_TX_0 PEG_TXP1 C75 0.1u/10V_4
T16 C23 AG45 DMI_MTX_IRX_P3 (13) F54 HDMITX1P (22)
MCH_CFG13 CFG_12 DMI_TXP_3 CRT_G PEG_TX_1 PEG_TXP2 C70 0.1u/10V_4
T15 B24 (21) CRT_G G29 N47 HDMITX0P (22)
CFG_13 CRT_GREEN PEG_TX_2 PEG_TXP3 C99 0.1u/10V_4
B22 H52 HDMICLKP (22)
CFG_14 CRT_R PEG_TX_3
K24 (21) CRT_R F30 L53
CFG_15 CRT_RED PEG_TX_4
VGA
MCH_CFG16 C25 R47
T14 CFG_16 PEG_TX_5
L23 E29 R55
CFG_17 CRT_IRTN PEG_TX_6
L33 T50
GRAPHICS VID
MCH_CFG19 CFG_18 PEG_TX_7

T8 K32 (21) DDCCLK D36 T52
MCH_CFG20 CFG_19 CRT_DDC_CLK PEG_TX_8
T9 K34 G33 GPU_VID0 (29) (21) DDCDATA C35 W47
CFG_20 GFX_VID_0 R81 30.1/F_4 HSYNC CRT_DDC_DATA PEG_TX_9
G37 GPU_VID1 (29) (21) VGAHSYNC J33 AA47
GFX_VID_1 CRT_IREF CRT_HSYNC PEG_TX_10
F38 GPU_VID2 (29) D32 W55
GFX_VID_2 R80 30.1/F_4 VSYNC CRT_TVO_IREF PEG_TX_11
F36 GPU_VID3 (29) (21) VGAVSYNC G31 Y52
GFX_VID_3 CRT_VSYNC PEG_TX_12
(14) PM_SYNC# J35 G35 GPU_VID4 (29) AB50
PM_SYNC# GFX_VID_4 PEG_TX_13
F6 AE47
(4,12,25) H_DPRSTP# PM_EXTTS#0 PM_DPRSTP# PEG_TX_14
J39 AD52
(16) PM_EXTTS#0 PM_EXT_TS#_0 PEG_TX_15
PM
PM_EXTTS#1 L39
(16) PM_EXTTS#1 PM_EXT_TS#_1
(4,14,25) DELAY_VR_PWRGOOD AY39 PWROK GFX_VR_EN G39 GFX_VR_EN (29)
R136 100_4 RSTIN#_MCH BB18 CANTIGASFF_1p0
(13,18,19,21) PLTRST# R98 *0_4 RSTIN#
(4,12) PM_THRMTRIP# K28
THERMTRIP#
K36
(14,25) DPRSLPVR DPRSLPVR
CL_CLK AK52 CL_CLK0 (14)

C AK54 CL_DATA0 (14) C
CL_DATA
A7 AW40 MPWROK (14,18)
NC_1 CL_PWROK
A49 AL53 ICH_CL_RST0# (14)
NC_2 CL_RST# MCH_CLVREF
A52 AL55
ME
NC_3 CL_VREF
A54
NC_4
B54
NC_5
D55
NC_6 DDPC_CTRLCLK
G55 NC_7 DDPC_CTRLCLK F34
NC
BE55 F32 DDPC_CTRLDATA R84:

NC_8 DDPC_CTRLDATA SDVO_CTRLCLK
BH55 B38 SDVO_CTRLCLK (22) if the total motherboard route length is less than 12",
NC_9 SDVO_CTRLCLK SDVO_CTRLDATA
BK55 A37
BK54
NC_10 SDVO_CTRLDATA
C31 CLKREQ#_MCH SDVO_CTRLDATA (22)
CRT setting the recommended reference resistor value is 1 K Ω ±1% LVDS setting
NC_11 CLKREQ# CLKREQ#_MCH (3)
MISC
+3V_S5 At 11/19 BL54 K42 For longer route lengths between 12" - 15.3" ,
DDR3 PWROK NC_12 ICH_SYNC# MCH_ICH_SYNC# (14)
change U21 power supply BL52
NC_13 the recommended reference resistor value is 976 Ω ±1%
from +3VSUS to +3V_S5 BL49 +3V
NC_14 TSATN#
BL7 D10
NC_15 TSATN#
5
1 BL4 R93 1.02K/F_4 CRT_IREF R95 10K_4 L_CTRL_CLK

(18,26,28) SUSON NC_16
4 BL2 R94 10K_4 L_CTRL_DATA
NC_17 R300 2.2K_4 PHL_DATA
(18,26) HWPG_+1.5V_SUS 2 BK2
U21 NC_18 R301 2.2K_4 PHL_CLK
BK1
NC_19
3
TC7SH08FU R347 BH1 NC_20 R82 150/F_4 CRT_B

BE1
12.1K/F_4 NC_21 HDA_BIT_CLK_HDMI R78 150/F_4 CRT_G
G1 C29 HDA_BIT_CLK_HDMI (12)
NC_22 HDA_BCLK HDA_RST#_HDMI R79 150/F_4 CRT_R R102 75/F_4 INT_TV_COMP R290 2.4K/F_4 LVDS_IBG
B30 HDA_RST#_HDMI (12)
SM_PWROK HDA_RST# HDA_SDIN_HDMI R291 75/F_4 INT_TV_Y/G
D28 HDA_SDIN_HDMI (12)
HDA_SDI HDA_SDOUT_HDMI R292 75/F_4 INT_TV_C/R
A27
HDA
HDA_SDO HDA_SYNC_HDMI HDA_SDOUT_HDMI (12)

B28 HDA_SYNC_HDMI (12)
R348 HDA_SYNC
10K_4
CANTIGASFF_1p0
+3V
DDPC_CTRLCLK R294 2.2K_4

DDR3 VREF <Checklist ver0.8> DDR3 RCOMP DDR3 RCOMP_VOH/VOL DDPC_CTRLDATA R295 2.2K_4
+1.05V SDVO_CTRLCLK R297 4.7K_4
D Check list note : CL_REF=0.35V If TSATN# is not used, then it must be terminated D
R264 1K/F_4 SM_RCOMP_VOH SDVO_CTRLDATA R299 4.7K_4
(20mils) +SMDDR_VREF
with a 56-Ω pull-up resistor to VCCP.
+1.5V_SUS +1.5V_SUS
CLKREQ#_MCH R293 10K_4
+1.05V
R112 +SMDDR_VREF_NB R113 R269 C423 C421 (7/7) intel check list 360543 rev 2.0 CLKREQ# need to 10K pull high to 3.3V
BLM18BA750SN1D_6 TSATN# R296 56_4 SMRCOMPP R270 80.6/F_4
(15mils) 1K/F_4 3.01K/F_4 0.01u/25V_4 2.2u/6.3V_6
+1.5V_SUS
MCH_CLVREF +3V
+SMDDR_VREF_NB R350 *10K/F_4 SM_RCOMP_VOL
R349 *10K/F_4 PM_EXTTS#0 R100 10K_4 SMRCOMPN R272 80.6/F_4
C170 R111 PM_EXTTS#1 R97 10K_4 Quanta Computer Inc.
R266 C422 C418
0.1u/10V_4 511/F_6 +SMDDR_VREF_NB.Default use voltage PROJECT : ZE8
SM_REXT R271 499/F_4 1K/F_4 0.01u/25V_4 2.2u/6.3V_6
divider for poor layout cause +SMDDR_VREF
not meet spec.And Intel circuit PU/PD is 1A
1K,But Check list PU/PD is 10K. Cantiga SFF (DMI/VGA)
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Cantiga SFF - DDRII (CLG)
(16) M_A_DQ[63:0] (16) M_B_DQ[63:0]

A U18D U18E A
M_A_DQ0 AP46 BC21 M_A_BS#0 M_B_DQ0 AP54 BJ13 M_B_BS#0
SA_DQ_0 SA_BS_0 M_A_BS#0 (16) SB_DQ_0 SB_BS_0 M_B_BS#0 (16)
M_A_DQ1 AU47 BJ21 M_A_BS#1 M_B_DQ1 AM52 BK12 M_B_BS#1
M_A_DQ2 AT46 BJ41 M_A_BS#2 M_B_DQ2 AR55 BK38 M_B_BS#2
M_A_DQ3 AU49 M_B_DQ3 AV54
M_A_DQ4 SA_DQ_3 M_A_RAS# M_B_DQ4 SB_DQ_3
AR45 SA_DQ_4 SA_RAS# BH22 M_A_RAS# (16) AM54 SB_DQ_4
M_A_DQ5 AN49 BK20 M_A_CAS# M_B_DQ5 AN53 BE21 M_B_RAS#
SA_DQ_5 SA_CAS# M_A_CAS# (16) SB_DQ_5 SB_RAS# M_B_RAS# (16)
M_A_DQ6 AV50 BL15 M_A_WE# M_B_DQ6 AT52 BH14 M_B_CAS#
SA_DQ_6 SA_WE# M_A_WE# (16) SB_DQ_6 SB_CAS# M_B_CAS# (16)
M_A_DQ7 AP50 M_B_DQ7 AU53 BK14 M_B_WE#
SA_DQ_7 SB_DQ_7 SB_WE# M_B_WE# (16)
M_A_DQ8 AW47 M_B_DQ8 AW53
M_A_DQ9 SA_DQ_8 M_B_DQ9 SB_DQ_8
BD50 SA_DQ_9 AY52 SB_DQ_9
M_A_DQ10 AW49 M_B_DQ10 BB52
SA_DQ_10 M_A_DM[7:0] (16) SB_DQ_10
M_A_DQ11 BA49 AT50 M_A_DM0 M_B_DQ11 BC53
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[7:0] (16)
M_A_DQ12 BC49 BB50 M_A_DM1 M_B_DQ12 AV52 AP52 M_B_DM0
M_A_DQ13 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
AV46 SA_DQ_13 SA_DM_2 BB46 AW55 SB_DQ_13 SB_DM_1 AY54
M_A_DQ14 BA47 BE39 M_A_DM3 M_B_DQ14 BD52 BJ49 M_B_DM2
AY50 SA_DQ_15 SA_DM_4 BB12 BC55 SB_DQ_15 SB_DM_3 BJ43
M_A_DQ16 BF46 BE7 M_A_DM5 M_B_DQ16 BF54 BH12 M_B_DM4
SA_DQ_16 SA_DM_5 SB_DQ_16 SB_DM_4
A
M_A_DQ17 BC47 AV10 M_A_DM6 M_B_DQ17 BE51 BD2 M_B_DM5
BF50 SA_DQ_18 SA_DM_7 AR9 BH48 SB_DQ_18 SB_DM_6 AY2
M_A_DQ19 BF48 M_B_DQ19 BK48 AJ3 M_B_DM7
B
SA_DQ_19 M_A_DQS[7:0] (16) SB_DQ_19 SB_DM_7
M_A_DQ20 BC43 AR47 M_A_DQS0 M_B_DQ20 BE53
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[7:0] (16)
M_A_DQ21 BE49 BA45 M_A_DQS1 M_B_DQ21 BH52 AR53 M_B_DQS0
MEMORY
M_A_DQ22 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
BA43 SA_DQ_22 SA_DQS_2 BE45 BK46 SB_DQ_22 SB_DQS_1 BA53
M_A_DQ23 BE47 BC41 M_A_DQS3 M_B_DQ23 BJ47 BH50 M_B_DQS2
MEMORY
BF42 SA_DQ_24 SA_DQS_4 BC13 BL45 SB_DQ_24 SB_DQS_3 BK42
B M_A_DQ25 BC39 BB10 M_A_DQS5 M_B_DQ25 BJ45 BH8 M_B_DQS4 B
BF44 SA_DQ_26 SA_DQS_6 BA7 BL41 SB_DQ_26 SB_DQS_5 BB2
M_A_DQ27 BF40 AN7 M_A_DQS7 M_B_DQ27 BH44 AV2 M_B_DQS6
SA_DQ_27 SA_DQS_7 M_A_DQS#[7:0] (16) SB_DQ_27 SB_DQS_6
M_A_DQ28 BB40 AR49 M_A_DQS#0 M_B_DQ28 BH46 AM2 M_B_DQS7
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[7:0] (16)
M_A_DQ29 BE43 AW45 M_A_DQS#1 M_B_DQ29 BK44 AT54 M_B_DQS#0
M_A_DQ30 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
BF38 SA_DQ_30 SA_DQS#_2 BC45 BK40 SB_DQ_30 SB_DQS#_1 BB54
M_A_DQ31 BE41 BA41 M_A_DQS#3 M_B_DQ31 BJ39 BJ51 M_B_DQS#2
BA15 SA_DQ_32 SA_DQS#_4 BA13 BK10 SB_DQ_32 SB_DQS#_3 BH42
M_A_DQ33 BE11 BA11 M_A_DQS#5 M_B_DQ33 BH10 BK8 M_B_DQS#4
BE15 BA9 BK6 BC3
SYSTEM

BF14 SA_DQ_35 SA_DQS#_7 AN9 BH6 SB_DQ_35 SB_DQS#_6 AW3
M_A_DQ36 BB14 M_B_DQ36 BJ9 AN3 M_B_DQS#7
SA_DQ_36 M_A_A[14:0] (16) SB_DQ_36 SB_DQS#_7
M_A_DQ37 M_A_A0 M_B_DQ37
SYSTEM
BC15 SA_DQ_37 SA_MA_0 BC23 BL11 SB_DQ_37 M_B_A[14:0] (16)
M_A_DQ38 BE13 BF22 M_A_A1 M_B_DQ38 BG5 BJ15 M_B_A0
M_A_DQ39 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
BF16 SA_DQ_39 SA_MA_2 BE31 BJ5 SB_DQ_39 SB_MA_1 BJ33
M_A_DQ40 BF10 BC31 M_A_A3 M_B_DQ40 BG3 BH24 M_B_A2
BC11 SA_DQ_41 SA_MA_4 BH26 BF4 SB_DQ_41 SB_MA_3 BA17
M_A_DQ42 BF8 BJ35 M_A_A5 M_B_DQ42 BD4 BF36 M_B_A4
BG7 SA_DQ_43 SA_MA_6 BB34 BA3 SB_DQ_43 SB_MA_5 BH36
M_A_DQ44 BC7 BH32 M_A_A7 M_B_DQ44 BE5 BF34 M_B_A6
BC9 SA_DQ_45 SA_MA_8 BB26 BF2 SB_DQ_45 SB_MA_7 BK34
M_A_DQ46 BD6 BF32 M_A_A9 M_B_DQ46 BB4 BJ37 M_B_A8
DDR
BF12 SA_DQ_47 SA_MA_10 BA21 AY4 SB_DQ_47 SB_MA_9 BH40

M_A_DQ48 AV6 BG25 M_A_A11 M_B_DQ48 BA1 BH16 M_B_A10
BB6 SA_DQ_49 SA_MA_12 BH34 AP2 SB_DQ_49 SB_MA_11 BK36
DDR
M_A_DQ50 AW7 BH18 M_A_A13 M_B_DQ50 AU1 BH38 M_B_A12
C AY6 SA_DQ_51 SA_MA_14 BE25 AT2 SB_DQ_51 SB_MA_13 BJ11 C
M_A_DQ52 AT10 M_B_DQ52 AT4 BL37 M_B_A14
M_A_DQ53 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
AW11 SA_DQ_53 AV4 SB_DQ_53
M_A_DQ54 AU11 M_B_DQ54 AU3
AW9 SA_DQ_55 AR3 SB_DQ_55
M_A_DQ56 AR11 M_B_DQ56 AN1
AT6 SA_DQ_57 AP4 SB_DQ_57
M_A_DQ58 AP6 M_B_DQ58 AL3
AL7 SA_DQ_59 AJ1 SB_DQ_59
M_A_DQ60 AR7 M_B_DQ60 AK4
AT12 SA_DQ_61 AM4 SB_DQ_61
M_A_DQ62 AM6 M_B_DQ62 AH2
AU7 SA_DQ_63 AK2 SB_DQ_63
CANTIGASFF_1p0 CANTIGASFF_1p0
D D

PROJECT : ZE8
1A
Cantiga SFF (DDRII)
1 2 3 4 5 6 7 8
5 4 3 2 1
Cantiga SFF - VCC/NCTF (CLG) +VGFX +1.05V
VCC_SM(+1.5V_SUS)
UMA 9.6A(GM45) R64 *0_8
DDR3(800M) : 3162.5mA
DDR3(1067M) : 4140mA U18G (Plane or shape) R65 *0_8
R183 *0_8
Ivcc internal VGA 2.4A +1.5V_SUS Celeron 723,743 not support graphics render standby mode,
(Shape or 140mils) +VGFX
so add R64 , R65, del GFX power (Page 29)
U18F T32 SU type cpu support it, so del R64, R65 and add GFX power (Page 29)
+VCC_SM_BB36 VCC_AXG_NCTF_1
BB36 U31
+VCC_SM_BE35 VCC_SM_1 VCC_AXG_NCTF_2
D
VCC 2200mA BE35
VCC_SM_2 VCC_AXG_NCTF_3
T31 9/28: add R183 for voltage low issue D
AW34 R31
AW32 U29
+1.05V C217 C216 VCC_SM_4 VCC_AXG_NCTF_5
BK30 T29
VCC_SM_5 VCC_AXG_NCTF_6 +1.05V
BH30 R29
0.1u/10V_4 0.1u/10V_4 VCC_SM_6 VCC_AXG_NCTF_7
AT41 BF30 U28
VCC_1 VCC_SM_7 VCC_AXG_NCTF_8
AR41 BD30 U27
AN41 BB30 T27
AJ41 AW30 R27
VCC_4 VCC_SM_10 VCC_AXG_NCTF_11 C203 C182 C201 C156 + C83
AH41 BL29 U25
AD41
VCC_6 VCC_SM :3000mA BJ29
T25
AC41 BG29 R25 0.1u/10V_4 0.22u/10V_4 0.22u/10V_4 *10u/6.3V_8 *220u/2.5V_3528
Y41 BE29 U24
VCC_8 +VCC_SM_BC29 VCC_SM_14 VCC_AXG_NCTF_15
W41 BC29 U22
AT40 BA29 T22
Layout Note:
POWER
AM40 AY29 R22
VCC_11 C213 VCC_SM_17 VCC_AXG_NCTF_18
AL40 BK28 U21
VCC_12
BH28
T21
Inside GMCH cavity.
0.1u/10V_4 VCC_SM_19 VCC_AXG_NCTF_20 +1.5V_SUS
AJ40 BF28 R21
AH40 BD28 AM19
VCC CORE
AG40 BB28 AL19

AE40 BL27 AH19
AD40 BJ27 AG19
AC40 BG27 AE19
VCC_18 VCC_SM_25 VCC_AXG_NCTF_26 C200 C215 C211 C212
AA40 BE27 AD19
VCC SM
Y40 BC27 AC19
VCC_20 VCC_SM_27 VCC_AXG_NCTF_28 0.1u/10V_4 10u/6.3V_8 10u/6.3V_8 *10u/6.3V_8
AN35 BA27 W19
VCC GFX NCTF

AM35 AY27 U19
AJ35 AW26 AM18
VCC_23 +VCC_SM_BF24 VCC_SM_30 VCC_AXG_NCTF_31
AH35 BF24 AL18
VCC_24 +VCC_SM_BL19 VCC_SM_31 VCC_AXG_NCTF_32
AD35 BL19 AJ18
VCC_25 +VCC_SM_BB16 VCC_SM_32 VCC_AXG_NCTF_33
AC35 BB16 AH18
W35 AG18
VCC_27 +VGFX VCC_AXG_NCTF_35
AM34 AE18
VCC_28 C209 C424 C206 VCC_AXG_NCTF_36
C AL34 AD18 C
VCC_29 VCC_AXG_NCTF_37
AJ34 AC18
VCC_30 +1.05V 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 VCC_AXG_NCTF_38
AH34 W32 AA18
VCC_31 VCC_AXG_1 VCC_AXG_NCTF_39
AG34 AG31 Y18
AE34 AE31 W18
AD34 AD31 U18
VCC_34 VCC_AXG_4 VCC_AXG_NCTF_42 +VGFX
AT38 AC31 T18
VCC_NCTF_1 VCC_AXG_5 VCC_AXG_NCTF_43
POWER
AC34 AR38 AA31 R18

VCC_35 VCC_NCTF_2 VCC_AXG_6 VCC_AXG_NCTF_44
AA34 AN38 Y31
VCC_36 VCC_NCTF_3 VCC_AXG_7
AM38 W31
VCC_NCTF_4 VCC_AXG_8
Y34 AL38 AH29
VCC_37 VCC_NCTF_5 VCC_AXG_9 C133 C127 C128 C115 C124 C132
W34 AG38 AG29
AM32 AE38 AE29
VCC_39 VCC_NCTF_7 VCC_AXG_11 0.47u/6.3V_4 *1u/16V_6 10u/6.3V_6 10u/6.3V_8 0.1u/10V_4 0.1u/10V_4
AL32 AA38 AD29 AJ16
VCC_40 VCC_NCTF_8 VCC_AXG_12 VCC_AXG_62
AJ32 Y38 AC29 AH16
AH32 W38 AA29 AD16
AE32 U38 Y29 AC16
AD32 T38 W29 AA16
AA32 R38 AH28 U16
AM31 AT37 AG28 T16
AL31 AR37 AE28 R16
VCC GFX
AJ31 AN37 AA28 AM15
AH31
VCC_49 VCC_NCTF_17
AM37 VCC_AXG 7700mA AH27
VCC_AXG_21 VCC_AXG_71
AL15
AM29 AL37 AG27 AJ15
AL29 AJ37 AE27 AH15
AM28 AH37 AD27 AG15
VCC_52 VCC_NCTF_20 VCC_AXG_24 VCC_AXG_74 8/13 : add for EMI
AL28 AG37 AC27 AE15
VCC_53 VCC_NCTF_21 VCC_AXG_25 VCC_AXG_75 +VGFX
AJ28 AE37 AA27 AA15
AM27 VCC_55 VCC_NCTF_23 AD37 Y27 VCC_AXG_27 VCC_AXG_77 Y15
AL27 AC37 W27 W15 +VGFX
AM25 AA37 AH25 U15
VCC NCTF
AL25 VCC_58 VCC_NCTF_26 Y37 AD25 VCC_AXG_30 VCC_AXG_80 T15

AJ25 W37 AC25 + C108 + C107
AM24 U37 W25
VCC_60 VCC_NCTF_28 VCC_AXG_32 *220u/2.5V_3528 220u/2.5V_3528 C246 C247
B N36 VCC_61 VCC_NCTF_29 T37 AJ24 VCC_AXG_33 B
R37 AH24 *220p/50V_6 *220p/50V_6
AT35 AG24
VCC_NCTF_32 AR35 AE24 VCC_AXG_36 Close to GMCH
U35 AD24
VCC_NCTF_34
AT34 AC24
VCC_AXG_38 Layout Note:
VCC_NCTF_35 AR34 AA24 VCC_AXG_39 370 mils from edge.
U34 Y24
T34 W24
VCC_NCTF_38 R34 AM22 VCC_AXG_42
AL22
VCC_AXG_43
AJ22
VCC_AXG_44
AH22
VCC_AXG_45
VCC GFX
AG22
VCC_AXG_46
AE22
VCC_AXG_47
AD22
VCC_AXG_48
AC22 10mil
VCC_AXG_49 VCCSM_LF1
AA22 VCC_AXG_50 VCC_SM_LF1 AU45
AM21 BF52 VCCSM_LF2
VCC_AXG_51 VCC_SM_LF2
VCC SM LF
AL21 BB38 VCCSM_LF3
VCC_AXG_52 VCC_SM_LF3 VCCSM_LF4
AJ21 BA19
AH21 BE9
+VGFX VCC_AXG_54 VCC_SM_LF5 VCCSM_LF6
AD21 AU9
AC21 VCC_AXG_56 VCC_SM_LF7 AL9
AA21
CANTIGASFF_1p0 VCC_AXG_57
Y21
R108 VCC_AXG_58 C163 C205 C204 C207 C218 C210 C197
W21 VCC_AXG_59
AM16
10/F_4 VCC_AXG_60 0.1u/10V_4 0.1u/10V_4 0.22u/10V_4 0.22u/10V_4 0.47u/6.3V_4 1u/10V_6 1u/10V_6
AL16
VCC_AXG_61
Differential routing
(29) GFX_VCCSENSE AG13

VCC_AXG_SENSE
(29) GFX_VSSSENSE AE13 VSS_AXG_SENSE
A A
R107
10/F_4
CANTIGASFF_1p0

1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially
2. VCC_AXG_SENSE PU to +VGFX_CORE_INT with 10ohm PROJECT : ZE8
and VSS_AXG_SENSE PD with 10ohm for Intel suggest Size Document Number Rev
1A
Cantiga SFF (VCC/NCTF)
5 4 3 2 1
5 4 3 2 1
Cantiga SFF - Power (CLG) +3V
L10
+3V BLM18PG181SN1D_6 +1.05V
+3V_A_CRT_BG +3V_A_CRT_DAC
73mA(20mils) 852mA(50mils)
L9 BLM18PG181SN1D_6
C101 C102 C146 C131 C130 C148 C160

+1.05V 0.1u/10V_4 0.01u/25V_4 0.47u/6.3V_4 2.2u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 *10u/6.3V_6
D D
L27 10uH_8 +1.05VM_DPLLA
+3V
+ C436 C105 79mA(20mils)
U18H +3V_TV_DAC R89 Short_6
220U/2.5V_3528 0.1u/10V_4
5mA(10mils) C97 C96
R13
+1.05V VTT_1 0.01u/25V_4 0.1u/10V_4
T12
VTT_2
J31 R11
L28 10uH_8 +1.05VM_DPLLB C85 C94 C95 VCCA_CRT_DAC VTT_3
T10
VTT_4
R9
10u/6.3V_8 0.1u/10V_4 0.01u/25V_4 VTT_5 +1.5V
T8
+ C437 C110 VTT_6
L31 R7 50mA(15mils)
VCCA_DAC_BG VTT_7 +1.5V_VCC_HDA R298 HD@0_6
CRT
M33 T6
220U/2.5V_3528 0.1u/10V_4 VSSA_DAC_BG VTT_8
R5
VTT_9
T4
VTT_10
64mA(20mils) R3
VTT_11 C438
J45 T2 Enable HDMI C394= 0.1uF
+1.05V VCCA_DPLLA VTT_12
64mA(20mils) R1
VTT_13 HD@NHD@0.1u/10V_4
VTT
L49 Disable HDMI C394= 0Ω
VCCA_DPLLB
R110 Short_6 +1.05VM_HPLL
24mA(20mils)
PLL
AF10
VCCA_HPLL +1.5V
139.2mA(20mils)
AE1 K30 2.7mA(15mils) L11
C155 C157 VCCA_MPLL VCCA_TV_DAC +1.5V_QDAC
TV
10mA(20mils) BLM18PG181SN1D_6
4.7u/6.3V_6 0.1u/10V_4 C103 C112
C126 1000p/50V_4 +1.8V_TXLVDS +1.5V_TVDAC R88 Short_6
A PEG A LVDS
U43
C VCCA_LVDS1 0.01u/25V_4 0.1u/10V_4 C
U41 A31
VCCA_LVDS2 VCC_HDA
D TV/CRT HDA
V44 C114 C86
L15 BLM18PG181SN1D_6 +1.05VM_MPLL +1.5V VSSA_LVDS
414uA(10mils)
N34 0.01u/25V_4 0.1u/10V_4
C149 VCCD_QDAC
AJ43 35mA(15mils)
R106 VCCA_PEG_BG
N32
0.1u/10V_4 C169 +1.05VM_PEGPLL VCCD_TVDAC
0.5/F_4 +1.05V
C152
0.1u/10V_4 50mA(10mils) AG43 440mA(30mils)
+1.05VM_MPLL_RC VCCA_PEG_PLL
AW24 C106 C151

10u/6.3V_8 VCCA_SM_1
AU24
AW22
AU22
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
POWER 1u/6.3V_4 10u/6.3V_6
Clock supply(1.5V)
AU21
+1.05V VCCA_SM_5 DDR3(1066):149.5mA +1.5V_SUS
AW20
VCCA_SM_6 L26
720mA(40mils) AU19
VCCA_SM_7 +1.5VSUS_VCC_SM_CK
AW18
VCCA_SM_8 1uH/300MA_8
A SM
AU18 DDR3-800 124mA
C198 C188 C184 C189 VCCA_SM_9
AW16
+ VCCA_SM_10 (20mils) C420 R265
AU16
100u/6.3V_3528 10u/6.3V_8 4.7u/6.3V_6 1u/6.3V_4 VCCA_SM_11
AT16
VCCA_SM_12 0.1u/10V_4 1/F_4
AR16 VCCA_SM_13
AU15 C417
VCCA_SM_14 +1.5VSUS_SMCK_RC
AT15
VCCA_SM_15
AR15 VCCA_SM_16
AW14 M25 10u/6.3V_6
+1.05V VCCA_SM_17 VCC_AXF_1
VCC_AXF_2 N24
B B
Check list 2.2
AXF
26mA(20mils) AT24 VCCA_SM_NCTF_1 VCC_AXF_3 M23
AR24
VCCA_SM_NCTF_2 DDR3=>0 ohm LVDS Transmitter(1.8V)
AT22
AR22
VCCA_SM_NCTF_3 DDR2=>0.1uH, DCR<160 mohm 118.8mA +1.8V
C183 C185 C186 VCCA_SM_NCTF_4 +1.05V
AT21 VCCA_SM_NCTF_5 80mA(20mils)
AR21 BK24 +1.8V_TXLVDS R114 Short_6
10u/6.3V_8 *2.2u/6.3V_6 0.1u/10V_4 VCCA_SM_NCTF_6 VCC_SM_CK_1
AT19 VCCA_SM_NCTF_7 VCC_SM_CK_2 BL23
2
SM CK
AR19 BJ23
VCCA_SM_NCTF_8 VCC_SM_CK_3 C125 C129 D11
AT18 VCCA_SM_NCTF_9 VCC_SM_CK_4 BK22
AR18
VCCA_SM_NCTF_10 1000p/50V_4 10u/6.3V_6
CH751H-40PT
1
T41 R86 10_4 +1.05V_SD
VCC_TX_LVDS
AU27 105.3mA(20mils)
+1.05V VCCA_SM_CK_4
AU28 VCCA_SM_CK_3 VCC_HV_1 C33 +3V
157.2mA(20mils) AU29 A33
L14 BLM18PG181SN1D_6 +1.05VM_MCH_PLL2 VCCA_SM_CK_2 VCC_HV_2 C91
AU31 VCCA_SM_CK_1
HV
AT31
VCCA_SM_CK_NCTF_1 0.1u/10V_4
AR31 VCCA_SM_CK_NCTF_2
C164 AT29 AB44
+1.05V +1.05VM_PEGPLL VCCA_SM_CK_NCTF_3 VCC_PEG_1 +1.05V
AR29 VCCA_SM_CK_NCTF_4 VCC_PEG_2 Y44
0.1u/10V_4 AT28 AC43 1.782A(100mils)
L13 BLM18PG221SN1D_6 VCCA_SM_CK_NCTF_5 VCC_PEG_3
PEG
AR28 VCCA_SM_CK_NCTF_6 VCC_PEG_4 AA43

AT27
VCCA_SM_CK_NCTF_7 +1.05V
AR27 456mA(30mils)
R109 C158 VCCA_SM_CK_NCTF_8 C199 C196 C171
VCC_DMI_1 AM44
1/F_4 0.1u/10V_4 AN43 4.7u/6.3V_6 10u/6.3V_8 *10u/6.3V_6
C161 VCC_DMI_2 C202
VCC_DMI_3 AL43
+1.05VM_PEGPLL_RC
DMI
AH12
A VCCD_HPLL 0.1u/10V_4 A
50mA(20mils)
10u/6.3V_8 AE43
VCCD_PEG_PLL
+1.8V K14 +VTTLF_CAP1
VTTLF1 +VTTLF_CAP2
VTTLF
M46 VCCD_LVDS_1 VTTLF2 Y12

30mA(20mils) L45 P2 +VTTLF_CAP3
LVDS
VCCD_LVDS_2 VTTLF3
C111
C430 C147 C98 Quanta Computer Inc.
10mil
CANTIGASFF_1p0 0.47u/6.3V_4 0.47u/6.3V_4 0.47u/6.3V_4
1u/6.3V_4 PROJECT : ZE8
1A
Cantiga SFF (Power)
5 4 3 2 1
5 4 3 2 1
Cantiga SFF - GND (CLG) U18I AN25

U18J
AM8
VSS_199 VSS_300
AG25 VSS_200 VSS_301 AK8
BA55 VSS_1 VSS_100 C43 AE25 VSS_201 VSS_302 AH8
AU55 VSS_2 VSS_101 A43 AA25 VSS_202 VSS_303 AF8
AN55 VSS_3 VSS_102 BD42 Y25 VSS_203 VSS_304 AD8
AJ55 VSS_4 VSS_103 H42 E25 VSS_204 VSS_305 AB8
AE55 VSS_5 VSS_104 BG41 A25 VSS_205 VSS_306 Y8
AA55 VSS_6 VSS_105 AY41 BD24 VSS_206 VSS_307 V8
U55 VSS_7 VSS_106 AU41 AN24 VSS_207 VSS_308 P8
D
N55 VSS_8 VSS_107 AM41 AL24 VSS_208 VSS_309 M8 D
BD54 VSS_9 VSS_108 AL41 H24 VSS_209 VSS_310 K8
BG53 VSS_10 VSS_109 AG41 BG23 VSS_210 VSS_311 H8
AJ53 VSS_11 VSS_110 AE41 AY23 VSS_211 VSS_312 BJ7
AE53 VSS_12 VSS_111 AA41 E23 VSS_212 VSS_313 E7
AA53 VSS_13 VSS_112 R41 BD22 VSS_213 VSS_314 BF6
U53 VSS_14 VSS_113 M41 BB22 VSS_214 VSS_315 BC5
N53 VSS_15 VSS_114 E41 AN22 VSS_215 VSS_316 BA5
J53 VSS_16 VSS_115 BD40 Y22 VSS_216 VSS_317 AW5
G53 VSS_17 VSS_116 AU40 W22 VSS_217 VSS_318 AU5
E53 VSS_18 VSS_117 AR40 H22 VSS_218 VSS_319 AR5
K52 VSS_19 VSS_118 AN40 BL21 VSS_219 VSS_320 AN5
BG51 VSS_20 VSS_119 W40 BG21 VSS_220 VSS_321 AL5
BA51 VSS_21 VSS_120 U40 AY21 VSS_221 VSS_322 AJ5
AW51 VSS_22 VSS_121 T40 AN21 VSS_222 VSS_323 AG5
AU51 VSS_23 VSS_122 R40 AG21 VSS_223 VSS_324 AE5
AR51 VSS_24 VSS_123 K40 AE21 VSS_224 VSS_325 AC5
AN51 VSS_25 VSS_124 H40 M21 VSS_225 VSS_326 AA5
AL51 VSS_26 VSS_125 BL39 E21 VSS_226 VSS_327 W5
AJ51 VSS_27 VSS_126 BG39 A21 VSS_227 VSS_328 U5
AG51 VSS_28 VSS_127 BA39 BD20 VSS_228 VSS_329 N5
AE51 E39 H20 L5
AC51
AA51
VSS_29
VSS_30
VSS_31
VSS_128
VSS_129
VSS_130
C39
A39
BG19
AY19
VSS_229
VSS_230
VSS_231
VSS VSS_330
VSS_331
VSS_332
J5
G5
W51 VSS_32 VSS_131 BD38 M19 VSS_232 VSS_333 C5
U51 AU38 E19 BH4
R51
N51
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
H38
BG37
BD18
N18
VSS_233
VSS_234
VSS_235
VSS_334
VSS_335
VSS_336
BE3
U3
C L51 VSS_36 VSS_135 AU37 H18 VSS_236 VSS_337 E3 C
J51 VSS_37 VSS_136 M37 BL17 VSS_237 VSS_338 BC1
G51 VSS_38 VSS_137 E37 BG17 VSS_238 VSS_339 AW1
C51 VSS_39 VSS_138 BD36 AY17 VSS_239 VSS_340 AR1
BK50 VSS_40 VSS_139 AW36 M17 VSS_240 VSS_341 AL1
AM50 VSS_41 VSS_140 H36 E17 VSS_241 VSS_342 AG1
K50 VSS_42 VSS_141 BL35 A17 VSS_242 VSS_343 AC1
BG49 VSS_43 VSS_142 BG35 BD16 VSS_243 VSS_344 W1
E49 VSS_44 VSS_143 AY35 AN16 VSS_244 VSS_345 N1
C49 VSS_45 VSS_144 AU35 AG16 VSS_245 VSS_346 J1
BD48 VSS_46 VSS_145 AL35 AE16 VSS_246 VSS_347 AU43
BB48 VSS_47 VSS_146 AG35 Y16 VSS_247 VSS_348 BB42
AY48 VSS_48 VSS_147 AE35 W16 VSS_248 VSS_349 AW38
AV48 VSS_49 VSS_148 AA35 N16 VSS_249 VSS_350 BA35
AT48 VSS_50 VSS_149 Y35 H16 VSS_250 VSS_351 L29
AP48 VSS_51 VSS_150 M35 BG15 VSS_251 VSS_352 N28
AM48 VSS_52 VSS_151 E35 AY15 VSS_252 VSS_353 N22
AK48 VSS_53 VSS_152 A35 AN15 VSS_253 VSS_354 N20
AH48 VSS_54 VSS_153 BD34 AD15 VSS_254 VSS_355 N14
AF48 VSS_55 VSS_154 AU34 AC15 VSS_255 VSS_356 AL13
AD48 VSS_56 VSS_155 AN34 R15 VSS_256 VSS_357 B10
AB48 VSS_57 VSS_156 H34 M15 VSS_257 VSS_358 AN13
Y48 VSS_58 VSS_157 BL33 E15 VSS_258
V48 VSS_59 VSS_158 BG33 BD14 VSS_259 VSS_359 N42
T48 VSS_60 VSS_159 AY33 H14 VSS_260 VSS_360 N40
P48 VSS_61 VSS_160 E33 BL13 VSS_261 VSS_361 N38
M48 VSS_62 VSS_161 BD32 BG13 VSS_262 VSS_362 M39
B
K48 VSS_63 VSS_162 AU32 AY13 VSS_263 B
H48 VSS_64 VSS_163 AN32 AU13 VSS_264
BL47 VSS_65 VSS_164 AG32 AR13 VSS_265 VSS_NCTF_1 AJ38
BG47 VSS_66 VSS_165 AC32 AJ13 VSS_266 VSS_NCTF_2 AH38
E47 VSS_67 VSS_166 Y32 AC13 VSS_267 VSS_NCTF_3 AD38
C47 VSS_68 VSS_167 H32 AA13 VSS_268 VSS_NCTF_4 AC38
A47 VSS_69 VSS_168 B32 W13 VSS_269 VSS_NCTF_5 T35
BD46 VSS_70 VSS_169 BJ31 U13 VSS_270 VSS_NCTF_6 R35
VSS NCTF
AY46 VSS_71 VSS_170 BG31 M13 VSS_271 VSS_NCTF_7 AT32
AM46 VSS_72 VSS_171 AY31 E13 VSS_272 VSS_NCTF_8 AR32
AK46 VSS_73 VSS_172 AN31 A13 VSS_273 VSS_NCTF_9 U32
AH46 VSS_74 VSS_173 M31 BD12 VSS_274 VSS_NCTF_10 R32
BG45 VSS_75 VSS_174 E31 AV12 VSS_275 VSS_NCTF_11 T28
AE45 VSS_76 VSS_175 N30 AP12 VSS_276 VSS_NCTF_12 R28
AC45 VSS_77 VSS_176 H30 AM12 VSS_277 VSS_NCTF_13 AT25
AA45 VSS_78 VSS_177 AN29 AK12 VSS_278 VSS_NCTF_14 AR25
W45 VSS_79 VSS_178 AJ29 AB12 VSS_279 VSS_NCTF_15 T24
R45 VSS_80 VSS_179 M29 V12 VSS_280 VSS_NCTF_16 R24
N45 VSS_81 VSS_180 A29 P12 VSS_281 VSS_NCTF_17 AN19
E45 VSS_82 VSS_181 AW28 H12 VSS_282 VSS_NCTF_18 AJ19
BD44 VSS_83 VSS_182 AN28 BG11 VSS_283 VSS_NCTF_19 AA19
BB44 VSS_84 VSS_183 AD28 AG11 VSS_284 VSS_NCTF_20 Y19
AV44 VSS_85 VSS_184 AC28 E11 VSS_285 VSS_NCTF_21 T19
AK44 VSS_86 VSS_185 Y28 BD10 VSS_286 VSS_NCTF_22 R19
AH44 VSS_87 VSS_186 W28 AY10 VSS_287 VSS_NCTF_23 AN18
AF44 VSS_88 VSS_187 H28 AP10 VSS_288
AD44 VSS_89 VSS_188 F28 H10 VSS_289
K44 VSS_90 VSS_189 AN27 BL9 VSS_290
A H44 VSS_91 VSS_190 AJ27 BG9 VSS_291
A
BL43 VSS_92 VSS_191 M27 E9 VSS_292
BG43 VSS_93 VSS_192 BF26 A9 VSS_293 VSS_SCB_1 BL55
AY43 VSS_94 VSS_193 BD26 BD8 VSS_294 VSS_SCB_2 BL1
VSS SCB
AR43 VSS_95 VSS_194 N26 BB8 VSS_295 VSS_SCB_3 A55

W43 H26 AY8 D1
R43
VSS_96
VSS_97
VSS_195
VSS_196 BJ25 AV8
VSS_296
VSS_297
VSS_SCB_4
VSS_SCB_5 B55 Quanta Computer Inc.
M43 VSS_98 VSS_197 AY25 AT8 VSS_298 VSS_SCB_6 B2
E43 VSS_99 VSS_198 AU25 AP8 VSS_299 VSS_SCB_7 A4 PROJECT : ZE8
CANTIGASFF_1p0 1A
CANTIGASFF_1p0 Cantiga SFF (GND)
5 4 3 2 1
1 2 3 4 5 6 7 8
RTC CRYSTAL ICH9M SFF - Host,SATA,HDA (CLG)

U19A
ICH_RTCX1 F25 H3
RTCX1 FWH0/LAD0 LAD0 (18,19)
ICH_RTCX2 G25 J3
RTCX2 FWH1/LAD1 LAD1 (18,19)
C440 15p/50V_4 ICH_RTCX1 K5
FWH2/LAD2 LAD2 (18,19) +1.05V
ICH_RTCRST# G24 L3
RTCRST# FWH3/LAD3 LAD3 (18,19)
3
4
ICH_SRTCRST# C24
RTC
LPC
32.768KHZ R302 ICH_INTRUDER# SRTCRST#
C23 J2 LFRAME# (18,19)
INTRUDER# FWH4/LFRAME#
Y3 10M_6 ICH_INTVRMEN E25 H1
INTVRMEN LDRQ0# R304 R305 R307
A D25 J1 A
LAN100_SLP LDRQ1#/GPIO23
2
1
C439 15p/50V_4 ICH_RTCX2
(Internal VRM enabled for VccSus1_05, VccSus1_5, G22 N3 GA20 GA20 (18) *56_4 *56_4 56_4
GLAN_CLK A20GATE
32.768KHZ VccCL1_5, VccLAN1_05 and VccCL1_05) AB23 H_A20M# (4)
A20M#
D14
LAN_RSTSYNC H_DPRSTP#
Low = Internal VR Disabled AE23 H_DPRSTP# (4,7,25)
ICH_INTVRMEN DPRSTP# H_DPSLP#
High = Internal VR Enabled(Default) A14 AE24 H_DPSLP# (4)
LAN / GLAN
LAN_RXD0 DPSLP#
D12
LAN_RXD1 H_FERR#_R R306 56_4
B14 AD25 H_FERR# (4)
LAN_RXD2 FERR#
D13 AE22 H_PWRGOOD (4)
LAN_TXD0 CPUPWRGD
C13
LAN_TXD1
A13 AD23 H_IGNNE# (4)
LAN_TXD2 IGNNE#
RESET JUMP
CPU
ICH_GPIO56 D15 AE21 +1.05V
GPIO56 INIT# H_INIT# (4)
AD24 H_INTR (4)
INTR RCIN#
H22 L1 RCIN# (18)
GLAN_COMP GLAN_COMPI RCIN#
H21
GLAN_COMPO R310
AD21 H_NMI (4)
NMI
An RC delay circuit with a time delay in the range ACZ_BIT_CLK AE7
HDA_BIT_CLK SMI#
AC21 H_SMI# (4)
of 18 ms to 25 ms should be provided ACZ_SYNC AB7 56_4
+VCCRTC HDA_SYNC
AC25 H_STPCLK# (4)
ACZ_RST# STPCLK#
AA7
R268 20K_6 ICH_RTCRST# HDA_RST# H_THERMTRIP_R R311 54.9/F_4 R308 *0_4
AC23 PM_THRMTRIP# (4,7)
ACZ_SDIN0 THRMTRIP#
(17) ACZ_SDIN0 AB6
C425 G3 HDA_SDIN1 HDA_SDIN0
AE6 AC22
HDA_SDIN1 TP11
AC6
HDA_SDIN2
IHDA
1u/6.3V_4 *SHORT_ PAD AA5
HDA_SDIN3
ICH_SATA_LED# SATA4RXN
AD12
ACZ_SDOUT AC7 AE12
HDA_SDOUT SATA4RXP
B 0 PCIe Lane Reversed SATA4TXN
AB12 B
AD8 AA12
+VCCRTC HDA_DOCK_EN#/GPIO33 SATA4TXP
1 PCIe Straight(default) AB8
HDA_DOCK_RST#/GPIO34
AC11
R267 20K_6 ICH_SRTCRST# SATA_LED# SATA5RXN
(21) SATA_LED# AC9 AD11
SATALED# SATA5RXP
AB10
C419 G2 SATA_RXN0_ICH C399 0.01u/25V_4 SATA_RXN0_C SATA5TXN
(20) SATA_RXN0_ICH AE14 AA10
SATA_RXP0_ICH C468 0.01u/25V_4 SATA_RXP0_C SATA0RXN SATA5TXP +3V
(20) SATA_RXP0_ICH AD14
SATA0RXP
SATA
1u/6.3V_4 *SHORT_ PAD SATA_TXN0_ICH C469 0.01u/25V_4 SATA_TXN0_C AC15 AC16
(20) SATA_TXN0_ICH SATA0TXN SATA_CLKN PECLK_SATA# (3)
SATA_TXP0_ICH C470 0.01u/25V_4 SATA_TXP0_C AD15 AB16
(20) SATA_TXP0_ICH SATA0TXP SATA_CLKP PECLK_SATA (3) GA20 R339 *8.2K_4
AD13 AD10
SATA1RXN SATARBIAS# SATABIAS R332 24.9/F_4
AC13 AE10
SATA1RXP SATARBIAS RCIN# R340 *10K_4
AA14
SATA1TXN
AB14
SATA1TXP
Place within 500mils of ICH9 ball
ICH9MSFF REV 1.0
+VCCRTC
HD Audio Interface R71 1M_4 ICH_INTRUDER#

+3V_S5
RTC BATTERY (RTC)
R58 10K_4 ICH_GPIO56
+1.5V
C22 *10p/50V_4 R74 332K/F_4 ICH_INTVRMEN
+3VPCU +VCCRTC
R45 HD@33_4 R75 24.9/F_4 GLAN_COMP
ACZ_BIT_CLK R46 33_4
HDA_BIT_CLK_HDMI (7)
(DG 1.0 Table-292) Internal VRM enabled for (20mils)
C
ACZ_BITCLK_AUDIO (17)
VccSus1_05, VccSus1_5, D10 CH500H-40PT (30mils) C
C28 *10p/50V_4 VccCL1_5, VccLAN1_05 and
VccCL1_05.
24.9 Ohm pull up to 1.5V for
GLAN_COMPI/O is required, no
(20mils)
matter intel LAN is used or not. R_3VRTC D9 CH500H-40PT
layout notice : please near NB codec
C25
HDA_SDIN1 R85 HD@33_4
HDA_SDIN_HDMI (7)
1u/10V_6
R44 HD@33_4 R47
HDA_RST#_HDMI (7)
ACZ_RST# R43 33_4
ACZ_RESET#_AUDIO (17)
1K_4 (20mils)
+5V_S5
R42 HD@33_4
ACZ_SYNC R40 33_4
HDA_SYNC_HDMI
ACZ_SYNC_AUDIO
(7)
(17)
R33 HD@33_4
HDA_SDOUT_HDMI (7)
RTC_N02 1 3 R50 4.7K_4 R54 4.7K_4 (20mils)
ACZ_SDOUT R34 33_4
ACZ_SDOUT_AUDIO (17)
Q2
2
CN14 MMBT3904-7-F R56
RTC_CONN
68.1K/F_4
South Bridge Strap Pin (1/3) (20mils)
RTC_N03 R55 150K/F_4
2
Pin Name Strap description Sampled Configuration PU/PD
0 = The Flash Descriptor Security will be overridden.
HDA_DOCK_EN/ Flash Descriptor Security 1 = The security measures defined This strap should only be enabled in manufacturing
PWROK environments using an external pull-up resistor.
GPIO33 Override Strap in the Flash Descriptor will be in effect
D D
PCI Express Lane Reversal Internal PU
SATALED# PWROK
(Lanes 1-4)
ICH_TP3 HDA_SDOUT Description

XOR Chain Entrance PWROK ICH_TP3 R316 *1K_4
0 0 RSVD
(14) ICH_TP3
0 1 Enter XOR Chain HDA_IO_ICH PROJECT : ZE8
XOR Chain Entrance /PCI Express*
HDA_SDOUT Port Config 1 bit 1(Port 1-4) PWROK 1 0 Normal opration(Default) R37 *1K_4 ACZ_SDOUT Size Document Number Rev
intel design guide: pull high 3.3k 1A
1 1 Set PCIE port config bit 1 R36 *1K_4 ACZ_SYNC ICH9M SFF (Host/SATA/HDA )
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
ICH9M SFF - USB/PCIE/DMI (CLG) Place TX DC blocking caps close ICH9.

U19D
U19B T25 V25
(21) PCIE_RXN1 PERN1 DMI0RXN DMI_MTX_IRX_N0 (7)
REQ0#
A11 G4
LAN T24 V24
Direct Media Interface

AD0 REQ0# (21) PCIE_RXP1 PERP1 DMI0RXP DMI_MTX_IRX_P0 (7)
B12 GNT0# C77 0.1U/10V_4 PCIE_TXN1_C
A10
AD1 PCI GNT0# E1
A9 REQ1#
(21) PCIE_TXN1
C76
1
1
2
2 0.1U/10V_4 PCIE_TXP1_C
R24
R23
PETN1 DMI0TXN U24
U23
DMI_MRX_ITX_N0 (7)
AD2 REQ1#/GPIO50 (21) PCIE_TXP1 PETP1 DMI0TXP DMI_MRX_ITX_P0 (7)
C12 AD3 GNT1#/GPIO51 E12
A8 B11 REQ2# P25 W23
AD4 REQ2#/GPIO52 PERN2 DMI1RXN DMI_MTX_IRX_N1 (7)
A12 C10 GNT2# P24 W24
AD5 GNT2#/GPIO53 PERP2 DMI1RXP DMI_MTX_IRX_P1 (7)
E10 D6 REQ3# P21 V21
AD6 REQ3#/GPIO54 PETN2 DMI1TXN DMI_MRX_ITX_N1 (7)
A C11 C6 GNT3# P22 V22 A
AD7 GNT3#/GPIO55 PETP2 DMI1TXP DMI_MRX_ITX_P1 (7)
B9
AD8
D8 D10 N23 Y24 DMI_MTX_IRX_N2 (7)
AD9 C/BE0# PERN3 DMI2RXN
A4 A5 N24 Y25
PCI-Express
AD10 C/BE1# PERP3 DMI2RXP DMI_MTX_IRX_P2 (7)
E8 E6 M21 Y21 DMI_MRX_ITX_N2 (7)
AD11 C/BE2# PETN3 DMI2TXN
A3 C9 M22 Y22 DMI_MRX_ITX_P2 (7)
AD12 C/BE3# PETP3 DMI2TXP
D9
AD13 IRDY#
C8 C3 (19) PCIE_RXN6 M25 AB24 DMI_MTX_IRX_N3 (7)
AD14 IRDY# PERN4 DMI3RXN
C2 B1 (19) PCIE_RXP6 M24 AB25 DMI_MTX_IRX_P3 (7)
AD15 PAR C80 0.1U/10V_4 PCIE_TXN6_C PERP4 DMI3RXP
D7
B3
AD16
AD17
PCIRST#
DEVSEL#
T3
A7 DEVSEL# Mini Card (Wi-Fi) (19)
(19)
PCIE_TXN6
PCIE_TXP6
C79
1
1
2
2 0.1U/10V_4 PCIE_TXP6_C
L24
L23
PETN4
PETP4
DMI3TXN
DMI3TXP
AA23
AA24
DMI_MRX_ITX_N3
DMI_MRX_ITX_P3
(7)
(7)
D11 D4 PERR#
AD18 PERR# LOCK#
B6 C5 (19) PCIE_RXN5 K24 T21 PECLK_ICH# (3)
AD19 PLOCK# SERR# PERN5 DMI_CLKN
D5
D3
AD20
AD21
SERR#
STOP#
H5
A6 STOP# Mini card (3G) (19)
(19)
PCIE_RXP5
PCIE_TXN5
C81 1 2 0.1U/10V_4 PCIE_TXN5_C
K25
K21
PERP5
PETN5
DMI_CLKP
T22 PECLK_ICH (3)
F4 A2 TRDY# C78 1 2 0.1U/10V_4 PCIE_TXP5_C K22 AB21 R52 24.9/F_4 Place within
AD22 TRDY# (19) PCIE_TXP5 PETP5 DMI_ZCOMP
E3 B8 FRAME# AB22 DMI_COMP 1 2
E4
AD23 FRAME#
H24
DMI_IRCOMP +1.5V 500mils of ICH9
AD24 PERN6/GLAN_RXN
B2 A21 PCI_PLTRST# H25 AE2 USBP0- (21) USB2
AD25 PLTRST# PCLK_ICH PERP6/GLAN_RXP USBP0N
C4 B5 PCLK_ICH (3) J24 AD1 USBP0+ (21)
AD26 PCICLK PETN6/GLAN_TXN USBP0P
C1 T1 J23 AD3 USBP1- (21) USB3
AD27 PME# PETP6/GLAN_TXP USBP1N
D1 AD4 USBP1+ (21)
AD28 USBP1P
E2 E24 AC2 USBP2- (19) Mini2(3G)
AD29 SPI_CLK USBP2N
J4 E23 AC3 USBP2+ (19)
AD30 SPI_CS1# SPI_CS0# USBP2P
H2 F23 AC5 USBP3- (21) Cardreader
AD31 SPI_CS1#/GPIO58/CLGPIO6 USBP3N
AB4 USBP3+ (21)
SPI_MOSI USBP3P
INTA#_R
Interrupt I/F G_SENSOR_INT#
F22
SPI_MOSI USBP4N
AB2 USBP4- (19) Mini1
SPI
F1 G3 G_SENSOR_INT# (21) G23 AB1 USBP4+ (19)
INTB#_R PIRQA# PIRQE#/GPIO2 INTF# SPI_MISO USBP4P
F5 G1 AA3 USBP5- (21) BT
B
INTC#_R PIRQB# PIRQF#/GPIO3 INTG# USBOC0# USBP5N B
F2 F3 P4 AA2 USBP5+ (21)
INTD#_R PIRQC# PIRQG#/GPIO4 INTH# USBOC1# OC0#/GPIO59 USBP5P
C7 H4 N4 Y1 USBP6- (20) MB USB1
PIRQD# PIRQH#/GPIO5 USBOC2# OC1#/GPIO40 USBP6N
ICH9MSFF REV 1.0 USBOC3#
N1
P5
OC2#/GPIO41 USBUSBP6P
Y2
W2
USBP6+
USBP7-
(20)
(22) CCD
USBOC4# OC3#/GPIO42 USBP7N
P1 W3 USBP7+ (22)
USBOC5# OC4#/GPIO43 USBP7P
P2 V1 USBP8- (22) LED touch panel
M3 V2 USBP8+ (22)
M2 Y5
+3V_S5 USBOC8# OC7#/GPIO31 USBP9N
P3 Y4
R1 U3
R4 U2
R2 V4
C48 OC11#/GPIO47 USBP11N
V5
USBRBIAS USBP11P
AE5
0.1u/10V_4 USBRBIAS
AD5
USBRBIAS#
5
2
ICH9MSFF REV 1.0
PCI_PLTRST# 2 R336
4 22.6/F_4
PLTRST# (7,18,19,21)
1
1
R62
3
U3
100K_6
TC7SH08FU(F)
C
South Bridge Strap Pin (2/3) PCI PULL-UP USBOC# PULL-UP
C

+3V
RP15
+3V_S5
PCI Express Port 0 = Default 6 5
HDA_SYNC PWROK 7 4 REQ2# RP1
Config 1 bit 0 (Port 1-4) 1 = Setting bit 0 8 3 REQ1# USBOC7# 6 5
DEVSEL# 9 2 INTD#_R USBOC1# 7 4 USBOC3#
+3V 10 1 FRAME# +3V_S5 USBOC6# 8 3 USBOC0#
PCI Express Port 0 = Setting bit 2 USBOC5# 9 2 USBOC4#
GNT2# / GPIO53 PWROK GNT2# T20 8.2KX8 10 1 USBOC2#
Config 2 bit 2 (Port 5-6) 1 = Default
10KX8 +3V_S5
GNT1# / GPIO51 ESI Strap(Server Only) PWROK 0 = DMI for ESI-compatible 8/28 : add pull high resister R160
RP16
1 = Default in GNT3# pin for no video issue.
USBOC10# 8 7
+3V USBOC11# 6 5
RP18
+3V USBOC9# 4 3
0 = "top-block swap" mode 6 5 USBOC8# 2 1
GNT3# / GPIO55 Top-Block Swap Override PWROK T3 GNT3# R160 10K_4 TRDY# 7 4 REQ3#
1 = Default IRDY# 8 3 SERR# 10KX4
INTB#_R 9 2 STOP#
+3V 10 1 LOCK#
SPI_MOSI Integrated TPM Enable 0 = INT TPM disable(Default) SPI_MOSI 8.2KX8

D CLPWROK 1 = INT TPM enable T18 D
PCI_GNT#0 SPI_CS#1 Boot Location RP17

+3V
GNT0# Boot BIOS Selection 0 PWROK GNT0# T21
INTH# 6 5
0 1 SPI(Default) G_SENSOR_INT#
INTF#
7 4 PERR#
REQ0#
8 3
INTC#_R 9 2 INTG#
1 0 PCI +3V 10 1 INTA#_R PROJECT : ZE8
SPI_CS1# / SPI_CS1# Size Document Number Rev
Boot BIOS Selection 1 CLPWROK T19
GPIO58 / CLGPIO6 8.2KX8
ICH9M SFF (USB/PCIE/DMI ) 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
+3V_S5
ICH9M SFF - PM/GPIO/SMB (CLG)
R326 2.2K_4 PCLK_SMB
R327 2.2K_4 PDAT_SMB +3V

U19C
R315 10K_4 ICH_GPIO60 PCLK_SMB C18 SMBCLK AE19 BOARD_ID2
(3,19) PCLK_SMB PDAT_SMB SATA0GP/GPIO21 ICH_GPIO19
(3,19) PDAT_SMB C15 SMBDATA SATA1GP/GPIO19 AA18
R48 10K_4 SMB_CLK_ME ICH_GPIO60 B21 LINKALERT#/GPIO60/CLGPIO4 AE20 ICH_GPIO36 R313 10K_4
SATA4GP/GPIO36
SATA
GPIO
SMB_CLK_ME ICH_GPIO37
SMB
E18 SMLINK0 AA20 R61 10K_4
R68 10K_4 SMB_DATA_ME SMB_DATA_ME SATA5GP/GPIO37
A24 SMLINK1
A K1 CLK14_ICH A
CLK14 CLK14_ICH (3)
R321 10K_4 RI# RI# C20 AB5 CLK48_ICH
RI# CLK48 CLK48_ICH (3)
Clocks
R76 10K_4 SYS_RST# T5 R3
SYS_RST# SUS_STAT#/LPCPD# SUSCLK
(4) SYS_RST# C25 SYS_RESET#
R312 10K_4 ICH_GPIO11 D18
SLP_S3# SUSB# (18)
(7) PM_SYNC# L2 PMSYNC#/GPIO0 SLP_S4# B20 SUSC# (18)
R63 10K_4 PCIE_WAKE# D16
ICH_GPIO11 SLP_S5#
A23 SMBALERT#/GPIO11
R67 *10K_4 EC_SCI# E14
PM_STPPCI# S4_STATE#/GPIO26
(3) PM_STPPCI# B15 STP_PCI#/GPIO15
R335 8.2K_4 PM_BATLOW# PM_STPCPU# A20 D23 ICH_PWRGD
SYS GPIO
(3) PM_STPCPU# STP_CPU#/GPIO25 PWROK
R338 *10K_4 DNBSWON# CLKRUN# M5 M1 DPRSLPVR
(18) CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 DPRSLPVR (7,25)
PCIE_WAKE# PM_BATLOW#
Power MGT
(21) PCIE_WAKE# C21 WAKE# BATLOW# C16
SERIRQ L4
R337 10K_4 ICH_GPIO12 (18) SERIRQ THERM_ALERT# SERIRQ
(4) THERM_ALERT# AD20 THRM# PWRBTN# U4 DNBSWON# (18)
R59 10K_4 ICH_GPIO13 VR_PWRGD_CLKEN B24 D22 PM_LAN_ENABLE_R R303 Short_4
VRMPWRGD LAN_RST#
A19 D19 PM_RSMRST#_R
TP12 RSMRST#
EC_SMI# AE16 U1 VR_PWRGD_CK410
VR_PWRGD_CK410 (3)
LID# D28 BAS316 (18) EC_SMI# LID#_ICH AE18
GPIO1 CK_PWRGD
+3V (18,21,22) LID# LID_touch panel# GPIO6 MPWROK
(18,21) LID_touch panel# AD18 GPIO7 CLPWROK T4 MPWROK (7,18)
EC_SCI# B25
(18) EC_SCI# GPIO8
R28 8.2K_4 CLKRUN# ICH_GPIO12 C14 B23
ICH_GPIO13 GPIO12 SLP_M# +3V +3V
D20 GPIO13
B R29 10K_4 SERIRQ BOARD_ID0 AE17 C22 B
GPIO17 CL_CLK0 CL_CLK0 (7)
BOARD_ID1 K3 A18
GPIO18 CL_CLK1
2
R314 8.2K_4 THERM_ALERT# AC8
BOARD_ID3 GPIO20 R70 R331
AC19 SCLOCK/GPIO22 CL_DATA0 E22 CL_DATA0 (7)
EC_SMI#
Controller Link
R329 10K_4 D17 B18 3.24K/F_4 *3.24K/F_4
GPIO
GPIO27 CL_DATA1
E20 GPIO28
R51 10K_4 ICH_GPIO19 CLKREQ#_SATA M4 F21 CL_VREF0_SB
(3) CLKREQ#_SATA SATACLKREQ#/GPIO35 CL_VREF0
1
ICH_GPIO38 AB18 A17 CL_VREF1_SB
R323 10K_4 LID_touch panel# ICH_GPIO39 SLOAD/GPIO38 CL_VREF1 CL_VREF0_SB CL_VREF1_SB
AC18 SDATAOUT0/GPIO39
ICH_GPIO48 AB19 C17
SDATAOUT1/GPIO48 CL_RST0# ICH_CL_RST0# (7)
R328 10K_4 ICH_GPIO39 DMI_TERM_SEL AC20 B17
GPIO49 CL_RST1#
1
ICH_GPIO57 A16 +3V_S5 R72
GPIO57/CLGPIO5
1
R57 10K_4 ICH_GPIO48 A22 C57 C441 R330
SB_BEEP MEM_LED/GPIO24 ICH_GPIO10 R49 10K_4
(17) SB_BEEP K4 SPKR GPIO10/SUS_PWR_ACK E16
R322 10K_4 LID#_ICH MCH_ICH_SYNC# AB20 A15 ICH_GPIO14 R334 10K_4 0.1u/10V_4 453/F_4 *0.47u_6.3V_4
(7) MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT
2
C19 D21 ICH_GPIO9 R60 10K_4 *453/F_4
(12) ICH_TP3 TP3 WOL_EN/GPIO9
2
MISC
AB17 TP8
R53 10K_4 ICH_GPIO38 AC17 TP9
AD17 TP10
R333 100K_4 ICH_GPIO57
ICH9MSFF REV 1.0
+3V +3V +3V +3V

+3V
C PM_RSMRST#_R C
3 1 EC_RSMRST# (18)
C59 *0.1u/10V_4 R319 R317 R27 R324 Q1 MMBT3906_NL
*10K_4 *10K_4 *10K_4 *10K_4 +3V_S5
2
R31
U4 10K_4 R41 4.7K_4
1 5
2
VR_PWRGD_CK410# 2 BOARD_ID3 BOARD_ID2 BOARD_ID1 BOARD_ID0 D5
(25) VR_PWRGD_CK410#
3 4 VR_PWRGD_CLKEN
3 BAV99
74LVC1G04GW
R69 R320 R318 R30 R325
10K_4 10K_4 10K_4 10K_4
1
100K_4
2
D6
3 BAV99
R26
1
2.2K_4
South Bridge Strap Pin (3/3) +3V_S5
C58 0.1u/16V_4
D D
Reserved PWROK
5
GPIO20 (4,7,25) DELAY_VR_PWRGOOD
DELAY_VR_PWRGOOD 1
4 ICH_PWRGD
(18) PWROK_EC 2
U5
3
0 = Default R73
PCBEEP No Reboot PWROK
1 = No Reboot mode
TC7SH08FU(F) Quanta Computer Inc.
R66 100K_4 10K_4
PROJECT : ZE8
0 = for desktop applications Size Document Number Rev
DMI Termination 1 = for mobile applications
GPIO49 PWROK DMI_TERM_SEL
T6 ICH9M SFF (PM/GPIO/SMB ) 1A
Voltage Internal PU
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
ICH9M SFF - Power/GND (CLG) B4

B7
U19E
VSS[001] VSS[107] U5
U10
+1.05V VSS[002] VSS[108]
B10 VSS[003] VSS[109] W11
+5V +3V +VCCRTC 1.634A B13 U14
U19F VSS[004] VSS[110]
B16 VSS[005] VSS[111] W16
G17 VCCRTC VCC1_05[01] L11 B19 VSS[006] VSS[112] U21
VCC1_05[02] L12 B22 VSS[007] VSS[113] U22
1
1
C53 C46 G7 L13 C55 C36 D2 U25
R35 D8 V5REF VCC1_05[03] VSS[008] VSS[114]
VCC1_05[04] L14 D24 VSS[009] VSS[115] V3
1U/6.3V_4 0.1U/10V_4 U7 L15 0.022U/16V_6 0.022U/16V_6 E5 V8
V5REF_SUS VCC1_05[05] VSS[010] VSS[116]
2
SDMK0340L-7-F M11 2/29 Follow DG E7 V19
100_4 VCC1_05[06] VSS[011] VSS[117]
J19 M15 E9 V23
VCC1_5_B[01] VCC1_05[07] VSS[012] VSS[118]
2
A
2mA K18
VCC1_5_B[02] VCC1_05[08]
N11 E11
VSS[013] VSS[119]
W1
A
+ICH_V5REF_RUN K19 N15 E13 W4
VCC1_5_B[03] VCC1_05[09] VSS[014] VSS[120]
L18 P11 E15 W5
+5V_S5 +3V_S5
1
C19 VCC1_5_B[04] VCC1_05[10] VSS[015] VSS[121]
L19 P15 E17 W7
VCC1_5_B[05] VCC1_05[11] +1.5V VSS[016] VSS[122]
M18
VCC1_5_B[06] VCC1_05[12]
R11 23mA E19
VSS[017] VSS[123]
W9
1U/10V_6 M19 R12 E21 W15
VCC1_5_B[07] VCC1_05[13] VSS[018] VSS[124]
2
N18 R13 +V1.5S_ICH_VCCDMIPLL L8 1uH_8 F24 W19

VCC1_5_B[08] VCC1_05[14] VSS[019] VSS[125]
2
N19 R14 G2 W21

VCC1_5_B[09] VCC1_05[15] VSS[020] VSS[126]
2
R38 D7 P18 R15 C63 C68 G5 W22
VCC1_5_B[10] VCC1_05[16] VSS[021] VSS[127]
R18 G10 W25
VCC1_5_B[11] 0.01U/25V_4 10U/6.3V_6 VSS[022] VSS[128]
T18 G13 Y3
VCC1_5_B[12] VSS[023] VSS[129]
1
10_4 SDMK0340L-7-F T19 G16 Y23
VCC1_5_B[13] VSS[024] VSS[130]
1
2mA U18 G19 AA1
CORE
+ICH_V5REF_SUS VCC1_5_B[14] VSS[025] VSS[131]
U19 G21 AA4
VCC1_5_B[15] +1.05V VSS[026] VSS[132]
H10 AA6
VSS[027] VSS[133]
2
48mA H12
VSS[028] VSS[134]
AA8
C20 +V1.05S_ICH_DMI R77 1_6 H18 AA11
0.1U/10V_4 +1.05V VSS[029] VSS[135]
H23 AA13
VSS[030] VSS[136]
1
1
C62 C64 2mA J5 AA15
VSS[031] VSS[137]
J9 AA16
1U/6.3V_4 0.1U/10V_4 VSS[032] VSS[138]
P19 J10 AA17
VCCDMIPLL VSS[033] VSS[139]
2
FB_330ohm+-25%_100mHz_ C47 C37 J11 AA19
VSS[034] VSS[140]
1
T17 J12 AA21
1.5A_0.09 ohm DC VCC_DMI[1]
U17 J13
VSS[035] VSS[141]
AA22
+1.5V +1.5V_PCIE_ICH VCC_DMI[2] 0.1U/10V_4 4.7U/10V/8 VSS[036] VSS[142]
646mA J15
VSS[037] VSS[143]
AA25
2
V16 J21 AB3
L7 BLM21PG331SN1D V_CPU_IO[1] +3V VSS[038] VSS[144]
U16 J22 AB9
V_CPU_IO[2] VSS[039] VSS[145]
308mA J25
VSS[040] VSS[146]
AB11
1
C50 C49 C51 V18 K2 AB13

VCC3_3[01] VSS[041] VSS[147]
K9 AB15
10U/6.3V_6 *10U/6.3V_6 0.1U/10V_4 VSS[042] VSS[148]
VCCA3GP
AE9 K10 AC24
VCC3_3[02] VSS[043] VSS[149]
2
2
C35 K11 AC1
C43 VSS[044] VSS[150]
K12 AC4
B 0.1U/10V_4 VSS[045] VSS[151] B
K13 AC10
VSS[046] VSS[152]
1
AA9 0.1U/10V_4 K15 AC12
VCC3_3[03] VSS[047] VSS[153]
10uH+-20%_100mA V14 K17 AC14
VCC3_3[04] VSS[048] VSS[154]
1
W14 K23 AD2
+1.5V VCC3_3[05] C33 VSS[049] VSS[155]
L5 AD6
VSS[050] VSS[156]
VCCP_CORE
L5 10uH_8 47mA 0.1U/10V_4 L9 AD9
VSS[051] VSS[157]
2
1.342A 2 1 +V1.5S_APLL_ICH G8 L10 AD16
VCC3_3[06] VSS[052] VSS[158]
2
H7 C21 C30 L16 AD19
VCC3_3[07] VSS[053] VSS[159]
2
C54 C56 H8 L17 AD22

VCC3_3[08] 0.1U/10V_4 *0.1U/10V_4 VSS[054] VSS[160]
L21 AE3
VSS[055] VSS[161]
1
HDA_IO_ICH L22 AE4
VSS[056] VSS[162]
1
10U/6.3V_6 0.1U/10V_4 L25 AE11

R39 *NHD@0_6 VSS[057] VSS[163]
+3V M9 AE13
VSS[058] VSS[164]
PCI
11mA M10
VSS[059] VSS[165]
AE15
2
AD7 C23 R32 HD@0_6 +1.5V M12 V17
VCCHDA VSS[060] VSS[166]
11mA M13
VSS[061] VSS[167]
AE8
W17 V10 0.1U/10V_4 M14 V9
VCCSATAPLL VCCSUSHDA VSS[062] VSS[168]
1
M16 J16
TP_VCCSUS1.05_1 VSS[063] VSS[169]
U13 T7 T2 M17
VCC1_5_A[01] VCCSUS1_05[1] TP_VCCSUS1.05_2 R25 NHD@0_6 VSS[064]
V13 H15 T4 +3V_S5 M23
VCC1_5_A[02] VCCSUS1_05[2] VSS[065]
W13 N2
VCC1_5_A[03] VSS[066]
2
2
C40
ARX
H16 TP_VCCSUS1.5_1 T5 C17 R24 HD@0_6 +1.5V_S5 N5

VCCSUS1_5[1] VSS[067]
N9
0.1U/10V_4 TP_VCCSUS1.5_2 0.1U/10V_4 VSS[068]
V7 T1 N10
1
1
N12
VSS[070]
N13
+3V_S5 VSS[071]
VCCSUS3_3[01] G14 N14 VSS[072]
U12
VCC1_5_A[04] VCCSUS3_3[02]
G15 212mA N16
VSS[073]
V12 H14 N17
VCC1_5_A[05] VCCSUS3_3[03] VSS[074]
VCCPSUS
2
C34 W12 N21

VCC1_5_A[06] VSS[075]
1
1
ATX
C42 C45 N22

0.1U/10V_4 VSS[076]
N25 VSS[077]
1
C W8 0.1U/10V_4 0.1U/10V_4 P9 C
2
2
P10 VSS[079]
+1.5V J7 P12
J8 P13
W10 VCC1_5_A[07] VCCSUS3_3[07] K7 P14 VSS[082]
K8 P16
2
C39 U15 L7 P17

VCC1_5_A[08] VCCSUS3_3[09] VSS[084]
V15 L8 P23
0.1U/10V_4 VCC1_5_A[09] VCCSUS3_3[10] VSS[085]
M7 R5
1
1
W18 M8 C24 C27 C26 R7
VCC1_5_A[10] VCCSUS3_3[12] VSS[087]
N7 R8
VCCPUSB
G9 N8 0.022U/16V_6 0.1U/10V_4 *0.1U/10V_4 R9

VCC1_5_A[11] VCCSUS3_3[14] VSS[089]
2
H9 P7 R10
VCC1_5_A[12] VCCSUS3_3[15] VSS[090]
VCCSUS3_3[16] P8 R16 VSS[091]
V11 VCC1_5_A[13] R17 VSS[092]
2
C29 U11 R19

VCC1_5_A[14] VSS[093]
R21 VSS[094] VSS_NCTF[01] A1
0.1U/10V_4 11mA R22 A25
VSS[095] VSS_NCTF[02]
1
U8 G18 TP_VCCCL1.05 T7 R25 AE1

VCCUSBPLL VCCCL1_05 VSS[096] VSS_NCTF[03]
T2 AE25
+VCCCL1_5 VSS[097] VSS_NCTF[04]
T9 VCC1_5_A[15] VCCCL1_5 H17 T8 VSS[098]
2
USB CORE
U9 VCC1_5_A[16] +3V T10 VSS[099]

C32 J14 T11
0.1U/10V_4 VCCCL3_3[1] C31 VSS[100]
VCCCL3_3[2] K14 T12 VSS[101]
1
19mA T13
VSS[102]
C38 0.1U/10V_4 1U/6.3V_4 T14
VCCLAN1_05_INT_ICH VSS[103]
2 1 G11 T15
VCCLAN1_05[1] VSS[104]
1
+3V H11 C41 T16

VCCLAN1_05[2] VSS[105]
19mA T23
VSS[106]
G12 *0.1U/10V_4
VCCLAN3_3[1]
2
H13 ICH9MSFF REV 1.0

+1.5V VCCLAN3_3[2]
2
C44
D L6 1uH_8+V1.5S_ICH_GLANPLL_R_L J17 D
0.1U/10V_4 VCCGLANPLL
23mA
1
C66 C65
GLAN POWER
H19
VCCGLAN1_5[1]
J18 VCCGLAN1_5[2]
+1.5V 10U/6.3V_6 2.2U/6.3V_4
80mA K16
C52
+3V VCCGLAN3_3
ICH9MSFF REV 1.0
1mA
10U/6.3V_6 PROJECT : ZE8
1A
ICH9M SFF (Power/GND)
1 2 3 4 5 6 7 8
5 4 3 2 1
Decoupling capacitor
+1.5V_SUS CN23 +1.5V_SUS +1.5V_SUS CN22 +1.5V_SUS
75 VDD1 VDD2 76 75 VDD1 VDD2 76

81 VDD3 VDD4 82 81 VDD3 VDD4 82
87 VDD5 VDD6 88 87 VDD5 VDD6 88 Close to SO-DIMM0
93 VDD7 VDD8 94 93 VDD7 VDD8 94
99 VDD9 VDD10 100 99 VDD9 VDD10 100
105 106 105 106 +1.5V_SUS
VDD11 VDD12 VDD11 VDD12
111 VDD13 VDD14 112 111 VDD13 VDD14 112
117 VDD15 VDD16 118 117 VDD15 VDD16 118
123 124 123 124 C305 330u_7343
M_CS#[3:0] VDD17 VDD18 VDD17 VDD18
1 126 1 126
+
(7) M_CS#[3:0] +SMDDR_VREF VREF_DQ VREF_CA +SMDDR_VREF +SMDDR_VREF VREF_DQ VREF_CA +SMDDR_VREF
+3V 199 +3V 199 C306 10u_6
M_ODT[3:0] VDD(SPD) VDD(SPD) C413 10u_6
D (7) M_ODT[3:0] D
M_A_DQ4 5 4 M_A_DQ7 M_B_DQ4 5 4 M_B_DQ2 C411 10u_6
M_CKE[3:0] M_A_DQ0 DQ0 DQ4 M_A_DQ5 M_B_DQ1 DQ0 DQ4 M_B_DQ5 C456 10u_6
(7) M_CKE[3:0] 7 6 7 6
M_A_DQ2 DQ1 DQ5 M_A_DQ3 M_B_DQ7 DQ1 DQ5 M_B_DQ0 C414 10u_6
15 16 15 16
M_CLK_DDR#[3:0] M_A_DQ1 DQ2 DQ6 M_A_DQ6 M_B_DQ3 DQ2 DQ6 M_B_DQ6 C410 10u_6
(7) M_CLK_DDR#[3:0] 17 18 17 18
M_A_DM0 DQ3 DQ7 M_A_DQS#0 M_B_DM0 DQ3 DQ7 M_B_DQS#0
11 10 11 10
M_CLK_DDR[3:0] DM0 DQS#0 M_A_DQS0 DM0 DQS#0 M_B_DQS0
(7) M_CLK_DDR[3:0] 12 12
M_A_DQ13 DQS0 M_B_DQ13 DQS0
21 21
M_A_DQ15 DQ8 M_A_DQ8 M_B_DQ12 DQ8 M_B_DQ9
23 22 23 22
M_A_DQ11 DQ9 DQ12 M_A_DQ10 M_B_DQ11 DQ9 DQ12 M_B_DQ8 +SMDDR_VREF
33 24 33 24
M_A_DQ14 DQ10 DQ13 M_A_DQ12 M_B_DQ15 DQ10 DQ13 M_B_DQ14
35 34 35 34
M_A_DQS#1 DQ11 DQ14 M_A_DQ9 M_B_DQS#1 DQ11 DQ14 M_B_DQ10
27 36 27 36
M_A_CAS# M_A_DQS1 DQS#1 DQ15 M_A_DM1 M_B_DQS1 DQS#1 DQ15 M_B_DM1 C455 .01u/25V_4
(8) M_A_CAS# 29 28 29 28
DQS1 DM1 DQS1 DM1 C416 2.2u/10V_6
M_A_RAS# M_A_DQ21 39 40 M_A_DQ19 M_B_DQ20 39 40 M_B_DQ17
(8) M_A_RAS# M_A_DQ18 DQ16 DQ20 M_A_DQ17 M_B_DQ16 DQ16 DQ20 M_B_DQ21
41 42 41 42
M_A_WE# M_A_DQ23 DQ17 DQ21 M_A_DQ22 M_B_DQ22 DQ17 DQ21 M_B_DQ19
(8) M_A_WE# 51 50 51 50
53 52 53 52
M_A_BS#[2:0] M_A_DQS#2 DQ19 DQ23 M_A_DM2 M_B_DQS#2 DQ19 DQ23 M_B_DM2
(8) M_A_BS#[2:0] 45 46 45 46
M_A_DQS2 DQS#2 DM2 M_B_DQS2 DQS#2 DM2 +3V
47 47
M_A_DM[7:0] DQS2 M_A_DQ26 DQS2 M_B_DQ28
(8) M_A_DM[7:0] 56 56
M_A_DQ29 DQ28 M_A_DQ24 M_B_DQ29 DQ28 M_B_DQ24 C412 .01u/25V_4
57 58 57 58
M_A_DQS#[7:0] M_A_DQ27 DQ24 DQ29 M_A_DQ25 M_B_DQ25 DQ24 DQ29 M_B_DQ26 C415 2.2u/10V_6
(8) M_A_DQS#[7:0] 59 68 59 68
67 70 67 70
M_A_DQS[7:0] M_A_DQ30 DQ26 DQ31 M_A_DQS#3 M_B_DQ27 DQ26 DQ31 M_B_DQS#3
(8) M_A_DQS[7:0] 69 62 69 62
M_A_DM3 DQ27 DQS#3 M_A_DQS3 M_B_DM3 DQ27 DQS#3 M_B_DQS3
63 64 63 64
M_A_A[14:0] DM3 DQS3 DM3 DQS3
(8) M_A_A[14:0]
M_CKE0 73 74 M_CKE1 M_CKE2 73 74 M_CKE3
M_A_DQ[63:0] CKE0 CKE1 CKE0 CKE1
(8) M_A_DQ[63:0]
M_A_BS#2 79 108 M_A_BS#1 M_B_BS#2 79 108 M_B_BS#1
M_A_BS#0 BA2 BA1 M_B_BS#0 BA2 BA1
109 109 Close to SO-DIMM1
BA0 M_A_A14 BA0 M_B_A14
80 80
M_A_A12 A14 M_A_A11 M_B_A12 A14 M_B_A11
83 84 83 84
M_A_A9 A12/BC# A11 M_A_A7 M_B_A9 A12/BC# A11 M_B_A7 +1.5V_SUS
85 86 85 86
M_A_A8 A9 A7 M_A_A6 M_B_A8 A9 A7 M_B_A6
89 90 89 90
M_B_CAS# M_A_A5 A8 A6 M_A_A4 M_B_A5 A8 A6 M_B_A4
(8) M_B_CAS# 91 92 91 92
M_A_A3 A5 A4 M_A_A2 M_B_A3 A5 A4 M_B_A2
95 96 95 96
M_B_RAS# M_A_A1 A3 A2 M_A_A0 M_B_A1 A3 A2 M_B_A0 C458 *330u_7343
(8) M_B_RAS# 97 98 97 98
M_A_A10 A1 A0 M_B_A10 A1 A0
C 107 107 C
+
M_B_WE# M_A_A13 A10/AP DDR3_RST# M_B_A13 A10/AP DDR3_RST# C466 10u_6
(8) M_B_WE# 119 30 119 30 DDR3_RST# (7)
A13 RESET# A13 RESET# C461 10u_6
M_B_BS[2:0] M_CLK_DDR0 101 102 M_CLK_DDR1 M_CLK_DDR2 101 102 M_CLK_DDR3 C467 10u_6
(8) M_B_BS#[2:0] CK0 CK1 CK0 CK1
M_CLK_DDR#0 103 104 M_CLK_DDR#1 M_CLK_DDR#2 103 104 M_CLK_DDR#3 C460 10u_6
M_B_DM[7:0] CK0# CK1# CK0# CK1# C462 10u_6
(8) M_B_DM[7:0]
M_CS#1 121 114 M_CS#0 M_CS#3 121 114 M_CS#2 C463 10u_6
SO-DIMM (204P)
SO-DIMM (204P)
M_B_DQS#[7:0] CS1# CS#0 CS1# CS#0
(8) M_B_DQS#[7:0]
M_A_WE# 113 110 M_A_RAS# M_B_WE# 113 110 M_B_RAS#
DDR3 SDRAM
DDR3 SDRAM
M_B_DQS[7:0] M_A_CAS# WE# RAS# M_B_CAS# WE# RAS#
(8) M_B_DQS[7:0] 115 115
CAS# M_ODT0 CAS# M_ODT2
116 116
M_B_A[14:0] M_A_DQ34 ODT0 M_ODT1 M_B_DQ36 ODT0 M_ODT3 +SMDDR_VREF
(8) M_B_A[14:0] 129 120 129 120
M_A_DQ39 DQ32 ODT1 M_B_DQ37 DQ32 ODT1
131 131
M_B_DQ[63:0] M_A_DQ38 DQ33 M_A_DQ37 M_B_DQ38 DQ33 M_B_DQ32
(8) M_B_DQ[63:0] 141 130 141 130
M_A_DQ35 DQ34 DQ36 M_A_DQ32 M_B_DQ39 DQ34 DQ36 M_B_DQ33 C457 .1u/16V_4
143 132 143 132
M_A_DQS#4 DQ35 DQ37 M_A_DQ36 M_B_DQS#4 DQ35 DQ37 M_B_DQ34 C464 2.2u/10V_6
135 140 135 140
M_A_DQS4 DQS#4 DQ38 M_A_DQ33 M_B_DQS4 DQS#4 DQ38 M_B_DQ35
137 142 137 142
DQS4 DQ39 M_A_DM4 DQS4 DQ39 M_B_DM4
136 136
M_A_DQ47 DM4 M_B_DQ41 DM4
147 147
149 146 149 146
157 148 157 148
159 158 159 158
M_A_DM5 DQ43 DQ46 M_A_DQ44 M_B_DM5 DQ43 DQ46 M_B_DQ47
153 160 153 160
DM5 DQ47 M_A_DQS#5 DM5 DQ47 M_B_DQS#5 +3V
152 152
M_A_DQ54 DQS#5 M_A_DQS5 M_B_DQ48 DQS#5 M_B_DQS5
163 154 163 154
M_A_DQ53 DQ48 DQS5 M_B_DQ52 DQ48 DQS5 C465 .1u/16V_4
165 165
M_A_DQ51 DQ49 M_A_DQ55 M_B_DQ51 DQ49 M_B_DQ50 C459 2.2u/10V_6
175 164 175 164
177 166 177 166
M_A_DQS#6 DQ51 DQ53 M_A_DQ50 M_B_DQS#6 DQ51 DQ53 M_B_DQ54
169 174 169 174
M_A_DQS6 DQS#6 DQ54 M_A_DQ48 M_B_DQS6 DQS#6 DQ54 M_B_DQ49
171 176 171 176
DQS6 DQ55 M_A_DM6 DQS6 DQ55 M_B_DM6
DM6 170 DM6 170
M_A_DQ58 181 M_B_DQ61 181
183 180 183 180
191 182 191 182
193 DQ59 DQ62 192 193 DQ59 DQ62 192 EMI
M_A_DM7 187 194 M_A_DQ61 M_B_DM7 187 194 M_B_DQ58
DM7 DQ63 M_A_DQS#7 DM7 DQ63 M_B_DQS#7 +1.5V_SUS
186 186
DQS#7 M_A_DQS7 DQS#7 M_B_DQS7
(7) PM_EXTTS#0 198 188 (7) PM_EXTTS#1 198 188
B EVENT# DQS7 EVENT# DQS7 B
R354 10K_4 A_SA0 197 200 SMBDT1 R352 10K_4 B_SA0 197 200 SMBDT1 C471 *.1u/16V_4
SA0 SDA SA0 SDA SMBDT1 (3,19,21)
R353 10K_4 A_SA1 201 202 SMBCK1
+3V R351 10K_4 B_SA1 201 202 SMBCK1
SA1 SCL SA1 SCL SMBCK1 (3,19,21)
Close to DIMM0 Close to DIMM1
77 78 77 78
+SMDDR_VTERM NC1 A15 +SMDDR_VTERM +SMDDR_VTERM NC1 A15 +SMDDR_VTERM
125 NCTEST NC2 122 125 NCTEST NC2 122
203 204
0*3C 203 204 8/13 : B-test add for EMI
0*AC VTT1 VTT2 VTT1 VTT2
C404 3 2 C403 3 2
VSS2 VSS1 C408 C406 VSS2 VSS1 C409 C407
9 8 9 8
10u_6 VSS4 VSS3 2.2u/10V_6 .1u/16V_4 10u_6 VSS4 VSS3 2.2u/10V_6 .1u/16V_4
13 14 13 14
VSS5 VSS6 VSS5 VSS6
19 20 19 20
VSS7 VSS8 VSS7 VSS8
25 26 25 26
VSS9 VSS10 VSS9 VSS10
31 VSS11 VSS12 32 31 VSS11 VSS12 32
37 38 37 38
43 44 43 44
49 48 49 48
55 VSS20 VSS19 54 55 VSS20 VSS19 54
61 60 61 60
65 66 65 66
71 72 71 72
127 128 127 128
133 VSS29 VSS30 134 133 VSS29 VSS30 134
139 138 139 138
145 144 145 144
151 150 151 150
155 156 155 156
161 162 161 162
167 168 167 168
173 172 173 172
179 178 179 178
185 VSS48 VSS47 184 185 VSS48 VSS47 184
189 190 189 190
GND
GND
GND
GND
195 196 195 196
DDR3_SODIMM_H5.2_RVS DDR3_SODIMM_H5.2_STD
205
206
205
206
A A
Reverse Type SO-DIMM0 ,H=5.2mm Standard Type SO-DIMM1,H=5.2

SMbus address A0 SMbus address A2
PROJECT : ZE8
1A
DDRIII SO-DIMM
5 4 3 2 1
5 4 3 2 1
Codec ALC269X (ADO) HPOUT-R

HPOUT-R (21)
Speaker (AMP)
HPOUT-L
HPOUT-L (21)
B-test 8/11: for EMI
ADOGND MIC1-VREFO-R
R_SPK+ R242 Short_6 R_SPK+_1
+5VA MIC1-VREFO-L
SPDIF_OUT Place next to pin 27
C357
C363 *0.22U/25V/6
C243 C358 + C365
*680p/50V_6 0.1U/10V_4
D D
2.2U/6.3V_6 *1u/6.3V_4
ADOGND C359 C353 C356 CN8
*10U/6.3V/6 0.1U/10V/4 +5VA *0.22U/25V/6
C352 R_SPK- R241 Short_6 R_SPK-_1 1
ADOGND L_SPK- R240 Short_6 L_SPK-_1 2
2.2U/6.3V_6
+ 35
46
Speak CNN
U11 C348 C347 C355 C364
36
35
34
33
32
31
30
29
28
27
26
25
58
57
56
0.1U/10V_4 *10U/6.3V_6 *0.22U/25V/6
55 *1u/6.3V_4
MIC2-VREFO
HP-OUT-L
AVSS1
CBP
CPVREF
MIC1-VREFO-L
VREF
AVDD1
CBN
CPVEE
HP-OUT-R
MIC1-VREFO-R
GND
GND
GND
GND
GND 54
ADOGND 53 C354
GND ADOGND *0.22U/25V/6
Spilt by DGND 37 24 L_SPK+ R239 Short_6 L_SPK+_1
AVSS2 LINE1-R Place next to pin 25
+5VA 38 AVDD2 LINE1-L 23
39 22 MIC1_R1 MIC1-VREFO-R
+5V PVDD1 MIC1-R
C349
C350 L_SPK+ 40 21 MIC1_L1 MIC1-VREFO-L
10U/6.3V_6 0.1U/10V_4 SPK-L+ MIC1-L
L_SPK- 41 20
SPK-L- MONO-OUT R238 R237
R226 20K/F_4 4.7K/F_4 4.7K/F_4
ADOGND
42 PVSS1 (Vista Premium Version) JDREF 19 ADOGND
Place next to pin 38 43 18
PVSS2 Sense-B MIC1_L1 C338 4.7U/6.3V/6 R234 1K/F_4
MIC1_L2 (21)
C R_SPK- 44 17 C
SPK-R- MIC2-R MIC1_R1 C341 4.7U/6.3V/6 R233 1K/F_4
MIC1_R2 (21)
R_SPK+ 45 16
SPK-R+ MIC2-L
+5V 46 PVDD2 LINE2-R 15 Placement near Audio Codec
GPIO0/DMIC-DATA
EAPD# 47 14
GPIO1/DMIC-CLK
SPDIFO2/EAPD LINE2-L
(21) SPDIF_OUT SPDIF_OUT 48 13 SENSEA R209 39.2K/F/4
SDATA-OUT
SPDIFO Sense A LINEOUT_JD# (21)
stitching caps for Audio signals
SDATA-IN
DVDD-IO
PCBEEP
RESET#
R221 20K/F/4
BIT-CLK
49
DVDD1
MIC1_JD# (21)
DVSS2
PGND
SYNC
GND
GND
GND
PD#
+5V C345
ALC269 +3VPCU +3V
50
51
52
10
11
12
ANALOG
+3V
DIGITAL 0.1U/10V_4
C342 C334 1.6Vrms C385
0.1U/10V_4 10U/6.3V_6 PCBEEP C324 1u/10V_6 BEEP_1 R198 47K_4 +3VPCU +3V
SB_BEEP (14)
C325 C327 C316 R203
0.1U/10V_4
ACZ_SDIN
0.1U/10V_4 10U/6.3V_6 100p/50V_6 2K_4 BOM notice: just can stuff one in BOM
Place next to pin 39 R192 *NHD@0_6 +3V
+5V Place next to pin 1 +AZA_VDD R189 HD@0_6 +1.5V

B B
(22) DMIC_DAT
ACZ_RESET#_AUDIO C315 C323
(22) DMIC_CLK ACZ_RESET#_AUDIO (12)
C335 0.1U/10V/4 10U/6.3V/_6
C332
ACZ_SYNC_AUDIO (12)
PD#
0.1U/10V_4 *10U/6.3V_6 0V : Power down Class D SPK amplifer R196 22_4
ACZ_SDIN0 (12)
3.3V : Power up Class D SPK amplifer C322 10P/50V_4 Place next to pin 9
ACZ_SDOUT_AUDIO (12)
R195 Short_4
ACZ_BITCLK_AUDIO (12)
Place next to pin 46
C321
*10P/50V_4
R259 Short_6
R248 *0_6
+3V
Power (ADO) R250
R243
R254
*0_6
*0_6
Short_6
R202 Demodulation Filter C377 *1000p/50V_4

+3V Place close to Codec C387 *1000p/50V_4
R247 *0_6
*HD@100K_4
R188 PD# *NHD@BAS316 D24 ACZ_RESET#_AUDIO L25 TI201209U220/8
+5V +5VA ADOGND
3
Q15 *BAS316 D25 EAPD# U15

A *HD@100K_4 3 4 A
IN OUT
2
*BAS316 D23 AMP_MUTE# 2
AMP_MUTE# (18) GND
3
*HD@2N7002E 1 5 R245 *29.4K/F/4

R199 Short_4 SHDN SET
1
ACZ_RESET#_AUDIO 2 *MAX8863SEUK+T
Q14
C373 R246 + C366 Quanta Computer Inc.
*HD@DTC144EU *0.1U/10V/4 *10K/F/4 *10U/10V/3216
PROJECT : ZE8
1

1A
Codec ALC269X
ADOGND ADOGND Date: Tuesday, September 29, 2009 Sheet 17 of 32
5 4 3 2 1
5 4 3 2 1
EC WPCE775LA0DG (KBC) ACER ID

U10
+3V_VCC_EC L22 BK1608HS220/1A/22ohm_6 +A3VPCU 3ND_MBCLK 6 1
3ND_MBDATA SCL A0
5 SDA A1 2
C326 C328 +3V 3 +3VPCU
30mil A2
0.1u/10V_4 4.7u/6.3V_6 3V_VDD_EC D22 BAS316 7 8
WP VCC
GND 4
+3VPCU E775AGND C336
C277 C276 +3V AT24C02BN-SH-T
R171 2.2_6 +3V_VCC_EC 0.1u/10V_4
0.1u/10V_4 4.7u/6.3V_6
C278 C313 C333 C331 C310 C281
115
102
19
46
76
88
4
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 U9
R208
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VDD
D D
*47K_6
3 97
SPI FLASH +3VPCU
(12,19) LFRAME# LFRAME GPI90/AD0 TEMP_MBAT (23)
(12,19) LAD0 126 98
LAD0 GPI91/AD1 TPD_TRIP U14
(12,19) LAD1 127 99
LAD1 GPI92/AD2
(12,19) LAD2 128
LAD2 A/D GPI93/AD3
100 ICMNT (23)
SPI_SDI_uR R230 22_4 SPI_SDI_uR_R 2
SO VDD
8
1 108 D31 BAS316
(12,19) LAD3 LAD3 GPIO05/AD4 Recover_LED# (21)
PCICLK_EC 2 96 +1.8V on power control SPI_SDO_uR 5 7 C346
(3) PCICLK_EC LCLK GPIO04/AD5 +1.8V on power control (28) RT1 SI HOLD
8 A2 test 6/25: add +1.5V on power control net name to control 1.5V SPI_SCK_uR 6 3 0.1u/10V_4
(14) CLKRUN# GPIO11/CLKRUN SCK WP
101
GPI94/DA0
(12) GA20
GA20 121
GA20 GPI95/DA1
105 t +3VPCU R229 10K_4 SPI_CS0#_uR 1
CE VSS
4
D/A GPI96/DA2
106 *THERMISTOR_100K/1%(NTC)
RCIN# 122 107 W25X16
(12) RCIN# KBRST GPI97/DA3
PCICLK_EC
(14) EC_SCI#
R174 Short_6 29 ECSCI/GPIO54 LPC 6/17:AKE38ZP0N01 has issue, so change to AKE37FP0Z13
64 ACIN (23)
EC_FPBACK# GPIO01/TB2 NBSWON#_EC R217 Short_4
(22) EC_FPBACK# 6 95 NBSWON# (21)
GPIO24/LDRQ GPIO03/AD6
93 LID# (14,21,22)
SPI Flash Source P/N
R181 RECOVER_BUTTON# GPIO06
(21) RECOVER_BUTTON# 124 94 SUSB# (14)
Winbond W25X16AVSSIG AKE38ZP0N01
GPIO10/LPCPD GPIO07/AD7 3ND_MBCLK
119 MXIC MX25L1605DM2I-12G AKE38FP0Z00
*22_4 PLTRST# GPIO23/SCL3
(7,13,19,21) PLTRST# 7 LREST GPIO30/CIRTX2
109 EON EN25F16-100HIP AKE38ZA0Q00
120 3ND_MBDATA AMIC A25L016 AKE38ZN0800
GPIO31/SDA3 BATLED0#
(20,21) USB_EN# 123 65 BATLED0# (21)
GPIO67/PWUREQ GPIO32/D_PWM BATLED1#
66 BATLED1# (21)
C280 SERIRQ GPIO33/H_PWM
(14) SERIRQ 125 15 VRON (25)
SERIRQ GPIO36/TB3 SUSLED#-R
*10p/50V_4 16
GPIO40/F_PWM
(14) EC_SMI# 9 17
GPIO65/SMI GPIO42/TCK
GPIO GPIO43/TMS
20 AMP_MUTE# (17) GREEN ADAPTER CIRCUIT
21 AD_OFF
MX0 GPIO44/TDI
(21) MX0 54 22
MX1 KBSIN0 GPIO45/E_PWM D30 3G@BAS316 CPUFAN# (4)
(21) MX1 55 23 3G_EC_LED# (21)
MX2 KBSIN1 GPIO46/CIRRXM/TRST
(21) MX2 56
KBSIN2 GPO47/SCL4
24 C-test : 9/8 : no stuff green adapter circuit
MX3 57 25 +3VPCU
(21) MX3 KBSIN3 GPIO50/TDO D/C# (23)
MX4 58 26
(21) MX4 KBSIN4 GPIO51/TA3 S5_ON (24,28)
MX5 59 27 PCIE_WAKE#_EC T13
(21) MX5 KBSIN5 GPIO52/CIRTX2/RDY
C MX6 60 28 MPWROK C
(21) MX6 KBSIN6 GPIO53/SDA4 MPWROK (7,14)
MX7 61 91 DNBSWON#_uR D26 BAS316 D12
(21) MX7 KBSIN7 GPIO81 DNBSWON# (14)
110 *BAS316
MY0 GPO82/TRIS BADDR0
(21) MY0 53 112
MY1 KBSOUT0/JENK GPO84/BADDR0 D21 *BAS316
(21) MY1 52 80 WLAN_LED# (19,21)
MY2 KBSOUT1/TCK GPIO41
(21) MY2 51
MY3 KBSOUT2/TMS
(21) MY3 50
MY4 KBSOUT3/TDI +VCCRTC
(21) MY4 49
KBSOUT4/JEN0 KB GPIO56/TA1
31 R154
MY5 48 117 *475/F_4
(21) MY5 KBSOUT5/TDO GPIO20/TA2 SUSON (7,26,28)
MY6 47 63 Q8
+3VPCU (21) MY6 KBSOUT6/RDY GPIO14/TB1 FANSIG (4)
MY7 43
(21) MY7 KBSOUT7
RN14
(21) MY8
MY8 42
KBSOUT8 TIMER GPIO15/A_PWM
32 CONTRAST (22) 1 3 D13 *BAS316 R155 *475/F_4 AD_ON
T11
10 1 MX3 MY9 41 118 NUMLED#
(21) MY9 KBSOUT9 GPIO21/B_PWM NUMLED# (21)
MX4 9 2 MX2 MY10 40 62 PWRLED#-R *AO3413
(21) MY10 KBSOUT10 GPIO13/C_PWM
3
MX5 8 3 MX1 MY11 39 81 CAPSLED# R165 C261
(21) MY11 KBSOUT11 GPIO66/G_PWM CAPSLED# (21)
2
MX6 7 4 MX0 MY12 38 *47K_4
(21) MY12 KBSOUT12/GPIO64
MX7 6 5 MY13 37 *1u/10V_4
(21) MY13 MY14 KBSOUT13/GPIO63 CRT_SENSE# AD_OFF
(21) MY14 36 84 CRT_SENSE# (21) 2
KBSOUT14/GPIO62 GPIO77/SPI_DI
10K_10P8R
(21) MY15
MY15 35
KBSOUT15/GPIO61/XOR_OUT SPI GPO76/SPI_DO/SHBM
83 3G_EN (19)
+3VPCU (21) KILL_SW_3G# 34 82 Q7
GPIO60/KBSOUT16 GPIO75/SPI_SCK 3G_MINI_LED# (19)
(21) KILL_SW_WL# 33 *2N7002E
GPIO57/KBSOUT17
1
75 EC_RSMRST# +3VPCU
GPIO72/IRRX1/SIN2 EC_RSMRST# (14)
MBCLK 70 73 SUSC# R156 *0_4
(23) MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# (14)
MBDATA 69 74 PWROK_EC
(23) MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC (14)
2ND_MBCLK 67 SMB IR 113 RF_EN
(4) 2ND_MBCLK GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR RF_EN (19)
2ND_MBDATA 68 14 R177
(4) 2ND_MBDATA GPIO74/SDA2 GPIO34/CIRRXL +3VPCU
114 *47K_4
GPIO16/CIRTX uR_SOUT_CR
111
GPO83/SOUT_CR/BADDR1
(21) TPCLK 72
GPIO37/PSCLK1 R186 *0_4 NBSWON#_EC
(21) TPDATA 71 GPIO35/PSDAT1
(14,21) LID_touch panel# LID_touch panel# 10 86 SPI_SDI_uR R170
GPIO26/PSCLK2 F_SDI
3
11 PS/2 87 SPI_SDO_uR_R R235 22_4 SPI_SDO_uR *47K_4
(21) BT_POWERON# GPIO27PSDAT2 F_SDO +3VPCU
(26,27,28) MAINON 12
GPIO25/PSCLK3 FIU F_CS0
90 SPI_CS0#_uR
(22) Touch_panel_HK 13 92 SPI_SCK_uR_R R218 22_4 SPI_SCK_uR *BAS316
GPIO12/PSDAT3 F_SCK D18 R164 *47K_4 C282
2
E775_32KX1 77 30 ECDB_CLOCK T12 *1000p/50V_4
32KX1/32KCLKIN GPIO55/CLKOUT
3
Q13
B B
85 VCC_POR# R220 47K_4 *2N7002E
VCC_POR +3VPCU
VCORF
1
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R219 20M_6 E775_32KX2 79 104 VREF_uR R197 Short_4 +A3VPCU NBSWON# R167 *0_4 2 C279
32KX2 VREF
*1000p/50V_4
Q11
R228 WPCE775 *2N7002E
5
18
45
78
89
116
103
VCORF_uR 44
Y2
1
32.768KHz 33K/F_4 7/7: power consumption issue,
1 4 Vendor suggest to place it close to EC.
2 3 C318 *0.1u/10V_4
C319 *0.1u/10V_4 SPI_SDI_uR
C337 C343 C295
15p/50V_4 15p/50V_4 L21 R355
1u/10V_4
E775AGND
BK1608HS220/1A/22ohm_6 100K_4
E775AGND
+3V
HWPG SM BUS PU
POWER SWITCH Q16 I/O ADDRESS SETTING +3VPCU
*DTA114YUA R166
MBCLK R210 4.7K_4
3 1 PWRLED# (21) I/O Address MBDATA R211 4.7K_4
47K
G1 *SHORT_PAD 10K_4
NBSWON# 1 2 D15 BAS316 R173 MPWROK BADDR1-0 Index Data 3ND_MBCLK R215 4.7K_4
(28) HWPG_+1.8V
10K
Short_4 3ND_MBDATA R224 4.7K_4

R201
(27) HWPG_1.05V
D16 BAS316 00 XOR TREE TEST MODE +3V
Short_4
2
D14 BAS316 01 CORE DEFINED 2ND_MBCLK R213 4.7K_4

(7,26) HWPG_+1.5V_SUS
PWRLED#-R 2ND_MBDATA R212 4.7K_4
A
(24) HWPG_SYS
D17 BAS316 10 2Eh 2Fh +3V A
D19 BAS316 11 164Eh 164Fh CRT_SENSE# R231 4.7K_4

(28) HWPG_+1.5VS5
Q9
(29) HWPG_GFX
D20 SU3500@BAS316 SHBM=0: Enable shared memory with host BIOS
*DTA114YUA
+3VPCU 3 1 SUSLED# (21) Celeron 723 ,743 not support graphics render standby mode, so del D20 BADDR0 BADDR0 R191 10K_4
47K
SUSLED#-R R180 10K_4

SU7300,SU2300,SU2700,SU4100 support it, so add D20 BADDR1 uR_SOUT_CR R193 *10K_4
10K
BATLED0# R204 10K_4

BATLED1#
PWRLED#-R
R206
R200
10K_4
10K_4
R172 SHBM 3G_EN R214 10K_4 Quanta Computer Inc.
Short_4
2
SUSLED#-R +3VPCU
PROJECT : ZE8
INTERNAL KEYBOARD STRIP SET Size Document Number Rev
MY0 R187 10K_4 1A
EC WPCE775LA0DG
5 4 3 2 1
5 4 3 2 1
Mini Card1-WLAN/WMAX(MNC)
+3V +3V_Mini1_VDD
+1.5V_Mini1_VDD
R263 Short_8
+3V_Mini1_VDD +3V +3V_Mini1_VDD
+3V_Mini1_VDD C400 C309 C401 C308
7/30 : unstuff for intel WLAN CN10
51 52 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 0.1u/10V_4
Reserved +3.3V R262
49 Reserved GND 50
R179 *0_4 47 48 +3V
D (7,13,18,21) PLTRST# Debug(PCIRST#) +1.5V D
R178 *0_4 45 46 *10K_4 R169 R176
(3) PCLK_DEBUG Debug(PCICLK) LED_WPAN#
43 44 WLAN_LED#
GND LED_WLAN# WLAN_LED# (18,21)
41 42 R261 Short_4 Q10 *10K_4 *10K_4
+3.3Vaux LED_WWAN#
2
39 +3.3Vaux GND 40 R261: for Wimax *2N7002E
37 GND USB_D+ 38 USBP4+ (13)
35 36 1 3 WL_SMDATA
GND USB_D- USBP4- (13) (3,16,21) SMBCK1
(13) PCIE_TXP6 33 PETp0 GND 34
31 32 WL_SMDATA
(13) PCIE_TXN6 PETn0 SMB_DATA
29 30 WL_SMCLK
GND SMB_CLK R168 Short_4
27 GND +1.5V 28
(13) PCIE_RXP6 25 PERp0 GND 26
23 24 +1.5V +1.5V_Mini1_VDD
(13) PCIE_RXN6 PERn0 +3.3Vaux
21 22 PLTRST#
GND PERST# RF_EN R182 *0_8
19 Reserved W_DISABLE# 20 RF_EN (18)
17 Reserved GND 18
15 16 C311 C292 C312 C297 +3V

GND Reserved LFRAME# (12,18)
13 14 *1n/50V_4 *0.1u/10V_4 *10u/10V_8 *0.1u/10V_4
(3) PECLK_MINI1 REFCLK+ Reserved LAD3 (12,18)
(3) PECLK_MINI1# 11 REFCLK- Reserved 12 LAD2 (12,18)
9 10 Q12
GND Reserved LAD1 (12,18)
2
(3) CLKREQ#_MINI1 CLKREQ#_MINI1 7 8 *2N7002E
CLKREQ# Reserved LAD0 (12,18)
5 Reserved +1.5V 6
3 4 1 3 WL_SMCLK
GND
GND
Reserved GND (3,16,21) SMBDT1
1 WAKE# +3.3V 2
53
54
R175 Short_4
MINI-CARD1(AS0B241-S50U-7F)
C C
+1.5V_Mini2_VDD
Mini Card2-3G(MNC) +3V_Mini2_VDD
+3V_Mini2_VDD
+3V_Mini2_VDD +3V
1
CN13 C434 C165 C429 C195 C428 C432
51 Reserved +3.3V 52
6/10: delete 3G wake up function 49 50 R90 3G@10u/10V_8 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@0.1u/10V_4 3G@0.47u/6.3V_4 3G@10p/50V_4
Reserved GND
2
47 48 +3V_Mini2_VDD
Reserved +1.5V *3G@10K_4
45 Reserved LED_WPAN# 46
43 44 WLAN_LED#
Reserved LED_WLAN# 3G_LED#R99 3G@0_4
41 Reserved LED_WWAN# 42 3G_MINI_LED# (18)
39 40 +1.5V +1.5V_Mini2_VDD
Reserved GND USBP2+
37 Reserved USB_D+ 38 USBP2+ (13)
35 36 USBP2- R105 3G@0_8 +3V_Mini2_VDD
GND USB_D- USBP2- (13)
33 34 R280 R283
(13) PCIE_TXP5 PETp0 GND
31 32 3G_SMDATA C187 C167 C159 Q21
(13) PCIE_TXN5 PETn0 SMB_DATA 3G_SMCLK
29 30 3G@10K_4 3G@10K_4
GND SMB_CLK
2
27 28 3G@1n/50V_4 3G@0.1u/10V_4 3G@10u/10V_8 3G@2N7002E
GND +1.5V
(13) PCIE_RXP5 25 PERp0 GND 26
23 24 PDAT_SMB 3 1 3G_SMDATA
(13) PCIE_RXN5 PERn0 +3.3Vaux (3,14) PDAT_SMB
21 22 PLTRST#_3G R115 *0_4 PLTRST#
GND PERST#
19 UIM_C4 W_DISABLE# 20 3G_EN (18)
17 UIM_C8 GND 18
+3V_Mini2_VDD R281 *3G@0_4
15 16 UIM_VPP
B GND UIM_VPP UIM_RST B
(3) PECLK_MINI2 13 REFCLK+ UIM_RST 14
11 12 UIM_CLK
(3) PECLK_MINI2# REFCLK- UIM_CLK
9 10 UIM_DATA C431 C435
GND UIM_DATA UIM_PWR +3V_Mini2_VDD
(3) CLKREQ#_MINI2 7 CLKREQ# UIM_PWR 8
5 6 3G@0.1u/10V_4 3G@10u/10V_8
Reserved +1.5V Q22
3 4
GND
GND
Reserved GND
1 WAKE# +3.3V 2
2
3G@2N7002E
53
54
PCLK_SMB 3 1 3G_SMCLK
(3,14) PCLK_SMB
3G@MINI-CARD2(AS0B241-S50U-7F)
R282 *3G@0_4
+3VSUS +3V_Mini2_VDD
R279 3G@0_8
JSIM1
UIM_CLK 6 1
CLK(C3) GND(C5) UIM_PWR +3V
7 N/A(C8) VCC(C1) 2
8 3 UIM_VPP UIM_PWR C383 3G@27p/50V_4
N/A(C4) VPP(C6) UIM_RST +3V R278 *3G@0_8
9 CT RST(C2) 4
10 5 UIM_DATA
CD DATA(C7)
GND
GND
GND
GND
UIM_DATA C388 3G@10p/50V_4 U16

A UIM_RST 1 6 UIM_VPP A
3G@SIM-Conn-CE015 CH1 CH4
13
11
12
14
2 VN VP 5
UIM_RST C386 3G@27p/50V_4 UIM_PWR
UIM_CLK 3 4 UIM_DATA
CH2 CH3
2
C378 *3G@CM1293-04SO C380

2
C384 C208
*3G@10p/50V_4 *3G@33p/50V_4
1
6/23 A2 test : change PN to DG006000005 or DG006000006 3G@0.1u/10V_4 3G@1u/10V_6

PROJECT : ZE8
1
9/2 C test : change PN and footprint to DFHS10FR381(change back to A1 type) Size Document Number Rev
1A
Layout : C431 and C252 place near JSIM2 MINI PCIE (WLAN/WMAX/3G)
5 4 3 2 1
5 4 3 2 1
MB USB (USB) 2.5" SATA HDD(HDD)

+5V_SATA +5V
+5VPCU
CN9 R232 Short_8
GND A1
GND B1
+5V_USB +5V_USB
+
C446 U20
2A
C371 C375 C362 C351
IC OTHER(8P)G547E2P81U(MSOP8) A2
4.7u/10V_6 RXP SATA_TXP0 C370 0.01u/25V_4 SATA_TXP0_R *0.1u/10V_4 0.1u/10V_4 10u/10V_8 100u/6.3V_3528
2 IN1 OUT3 8 RXP B2
3 7
IN2 OUT2 SATA_TXN0 C369 0.01u/25V_4 SATA_TXN0_R
OUT1 6
A3
C447 + C448 RXN
(18,21) USB_EN# 4 EN# B3
D RXN D
1 GND
9 GND-C OC# 5 0.1u/10V_4 100u/6.3V_3528 A4
GND
B4
GND
A5
TXN SATA_RXN0 C368 0.01u/25V_4 SATA_RXN0_R
B5
TXN
A6 SATA_RXP0 C367 0.01u/25V_4 SATA_RXP0_R
TXP
B6
TXP
R9 Short_4
+5V_USB CN17
GND
GND
A7
B7 SATA ESD(EMC)
A8
DP +5V_SATA
1 6 B8
(13) USBP6-
BUSBP6- 2
VDD
D-
GND6
GND5
5
DP 0.94A(80mils)
BUSBP6+ 3 A9
(13) USBP6+ D+ +5V
4 7 B9
GND1 GND7 +5V
8
GND8
1
1
R10 Short_4 A10
D2 D1 USB Port1 +5V
B10
+5V
*MLVG06031R_4 *MLVG06031R_4
2
2
88513-1041
8/5 : because of the space is not enough, so, del SATA ESD U12 and C363.
C
HOLE (EXC) SATA RE-DRIVER IC(XXX) C
HOLE2 HOLE3 HOLE9 HOLE13
*HG-C276D94P2 *hg-c197d94p2 *HG-C276D94P2 *HG-C276D94P2
2 5 2 5 2 5 2 5
3 6 3 6 3 6 3 6
4 7 4 7 4 7 4 7
8
1
9
8
1
9
8
1
9
8
1
9
+1.5V R368 Short_8
C242 C123 C233

.1u_4 .01u/16V_4 *2.2u_6
HOLE15 HOLE6 HOLE17 HOLE1
20
10
16
6
*HG-C276D94P2 *HG-C276D94P2 *HG-C256D94P2 *HG-C276D79P2 From SB SATA U38
2 5 2 5 2 5 2 5 To SATA HDD conn
A_BST#
B_BST#
VCC
VCC
3 6 3 6 3 6 3 6
4 7 4 7 4 7 4 7 SATA_TXP0_ICH 1 15 SATA_TXP0_R
(12) SATA_TXP0_ICH RX_0P TX_0P
Input (12) SATA_TXN0_ICH
SATA_TXN0_ICH 2
RX_0N TX_0N
14 SATA_TXN0_R Output
8
1
9
8
1
9
8
1
9
8
1
9
SATA_RXN0_ICH 4 12 SATA_RXN0_R
(12) SATA_RXN0_ICH TX_1N RX_1N
Output (12) SATA_RXP0_ICH
SATA_RXP0_ICH 5
TX_1P RX_1P
11 SATA_RXP0_R Input
+1.5V 7 9 R357 *4.7K_4 +1.5V
HOLE4 HOLE7 HOLE8 HOLE11 HOLE5 EN A_PRE
H-C276D142P2 H-TC236BC197D142P2 H-TC236BC197D142P2 H-TC236BC197D142P2 H-C236D142P2 8 R356 *4.7K_4
GND_P
B_PRE +1.5V
A_EQ
B_EQ
GND
GND
GND
PS8511A 8/3 del pull down resistor.
17
19
18
13
21
+1.5V FAE: Due to a pull-down resistor at pin 8 and 9 inside PS8511A
1
AUTOPW_EN R367 4.7K_4
AUTOPW_EN
A_EQ R161 *4.7K_4 SATA_TXP0_ICH R185 *0_4 SATA_TXP0_L R364 *0_4 SATA_TXP0_R
B_EQ R163 *4.7K_4
A_EQ
B_EQ
SATA_TXN0_ICH R358 *0_4 SATA_TXN0_L R361 *0_4 SATA_TXN0_R
B B
HOLE10 HOLE14 HOLE12 HOLE16 HOLE18
H-C236D142P2 H-C197D142P2 H-C197D142P2 *H-C91D91N *HG-C237D94P2 SATA_RXN0_ICH R359 *0_4 SATA_RXN0_L R362 *0_4 SATA_RXN0_R
2 5
3 6 SATA_RXP0_ICH R360 *0_4 SATA_RXP0_L R363 *0_4 SATA_RXP0_R
4 7
1
8
1
9
PARADE : PS8511A
PARADE : PS8511A
EMI bypass caps (XXX) +3VPCU +3VPCU +3VPCU PIN 18,19 Input Equalization setting: Internal pull down ~150Kohm
A_EQ/B_EQ = LOW: For short and medium length PCB traces (default)
A_EQ/B_EQ = HIGH: For long length PCB traces EN A_PRE B_PRE CH-0 CH-1
C402 C16 C241
0 X X Standby Standby
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
1 0 0 0dB 0dB
Output Pre-emphasis Setting: Internal pull down ~150Kohm
PIN 8,9 A_PRE/B_PRE = LOW, Pre-emphasis disabled (default) 1 1 0 Pre-emphasis (3.5dB) 0dB
+3V +3V +5V +5V +5V +5VPCU +5VPCU +5VPCU +3VPCU +3VPCU
A_PRE/B_PRE = HIGH, Pre-emphasis enabled 1 0 1 0dB Pre-emphasis (3.5dB)
C451 C14 C452 C260 C433 C5 C394 C69 C398 C109 1 1 1 Pre-emphasis (3.5dB) Pre-emphasis (3.5dB)
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
PIN 10,20 Output Level Boost setting: Internal pull up~150Kohm
A_BST#/B_BST# = HIGH, SATAi/m output level 400~700mVpp (default--SATA internal)
+1.5V +1.5V VIN VIN VIN VIN VIN VIN VIN VIN A_BST#/B_BST# = LOW, SATAx output level 800~1200mVpp
C235 C84 C15 C18 C405 C442 C329 C472 C473 C474
A PIN 17 Automatic Power Saving Enable: Internal pull down~150Kohm A
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 AUTOPW_EN = HIGH, automatic power saving enable (default)
AUTOPW_EN = LOW, automatic power saving disable
PAD PAD1 Quanta Computer Inc.

PROJECT : ZE8
1A
USB/HDD/HOLE
5 4 3 2 1
5 4 3 2 1
Keyboard(KBC) BuleTooth (BTM) LED D/B (UIF)

CN2 +3V Q20 +3V_BT_POWER
MX7 1 1 3
(18) MX7
MX6 2
(18) MX6 +3V
MX5 3 AO3413 CN1
(18) MX5
(18) MY0
MY0 4 + C379 + C376 擺放要靠近CN2
2
MY1 5 2.2u/6.3V_6 *2.2u/6.3V_6 C374 15 1
D (18) MY1 D
MY2 6 1000p/50V_4 16 2 BT_LED
(18) MY2
MX4 7 3 WLAN_LED# C113 *220P/50V_4
(18) MX4 WLAN_LED# (18,19)
MY3 8 4
(18) MY3
MY4 9 5 BATLED0# C88 *220P/50V_4
(18) MY4 3G_EC_LED# (18)
MY5 10 6 BATLED1# C89 *220P/50V_4
(18) MY5 PWRLED# (18)
MY6 11 R249 Short_4 7
(18) MY6 (18) BT_POWERON# SUSLED# (18)
MY7 12 8 KILL_SW_WL# C100 *220P/50V_4
(18) MY7 BATLED0# (18)
MY8 13 9 KILL_SW_3G# C90 *220P/50V_4
(18) MY8 BATLED1# (18)
MX3 14 10 3G_EC_LED# C87 *220P/50V_4
(18) MX3
MY9 15 11
(18) MY9
MX2 16 12
(18) MX2 +3V_BT_POWER KILL_SW_WL# (18)
MX1 17 13
(18) MX1 KILL_SW_3G# (18)
MY10 18 CN7 14
(18) MY10 +3VPCU
MY11 19
(18) MY11 1
MX0 20 BT_LED LED CONN
(18) MX0 2
MY12 21 USBP5+
(18) MY12 (13) USBP5+ 3
MY13 22 USBP5-
(18) MY13 (13) USBP5- 4 7
MY14 23 25
(18) MY14 5 6
MY15 24 26
(18) MY15
BT_CONN(88266-05001-06)
BT_LED
KB CONN(88502-2401) C372 *0.01u/16V_4
Be careful that bluetooth module PIN 2 is GND and PIN 5 is BT_LED.
A0 test : have free fall function, stuff R329,

if not, stuff R327 just can stuff one of them
For EMI Reserve Caps for debug
Touch Pad D/B (TPD) G SENSOR(GSR) 6/23 A2 test : per Acer request,
use interrupt pin to detect panel status
C CP5 CP6 +3V so, stuff R150, remove R151 C
MY1 7 8 8 7 MX7 +5V_TP +5V
MY2 5 6 6 5 MX6
MX4 3 4 4 3 MX5 U8 T22 : add for SMT request
MY3 1 2 2 1 MY0 L20 C251 C250 1 9 T22
NHCB2012KF-131T10/1A/130ohm_8 +5V Vdd_IO Reserved
*100p_8P4R *100p_8P4R C273 C274 0.1u/10V_4 10u/6.3V_8 2 10
NC Reserved
CP1 CP2 0.1u/10V_4 *0.1u/10V_4 3 11 G_SENSOR R150 Short_4
NC INT G_SENSOR_INT# (13)
MY12 7 8 7 8 MX0
MY13 5 6 5 6 MY11 SMBCK1 4 12 *0_4 R151
(3,16,19) SMBCK1 SCL/SPC GND
MY14 3 4 3 4 MY10 R162 R159
MY15 1 2 1 2 MX1 CN3 +5V_TP 5 13
4.7K_4 4.7K_4 GND GND
*100p_8P4R *100p_8P4R SMBDT1 6 14 +3V
1 (3,16,19) SMBDT1 SDA/SDI/SDO Vdd
TPCLK_8 L19 NHCB2012KF-131T10/1A/130ohm_8 TPCLK
2 TPCLK (18)
CP3 CP4 TPDATA_8 L18 NHCB2012KF-131T10/1A/130ohm_8 TPDATA 7 15
5 3 TPDATA (18) +3V SDO Reserved
MX2 8 7 7 8 MY7
MY9 MY6 6 4
6 5 5 6 8 CS GND 16
MX3 4 3 3 4 MY5 TP CONN(88513-044N) C259 C252
MY8 2 1 1 2 MY4 IC(16P) LIS33DETR
10p/50V_4 10p/50V_4 SMbus address 1D
*100p_8P4R *100p_8P4R
9/2 C-test : change footprint to sensor-3x3-5-16p-smt
9/24 Ramp-test : change footprint to sensor-3x3-5-16p-smt.(part two)
FAE : Because of internal pull-high in SDO,
I2C address for SDO floated is the same as that for SDO high
B B
Card Reader/USB DB CRT D/B (CRT)

CONNECTER(MMC)/Power Connector +3V CRT_R1 BLM18BA220SN1D/0.5A/22ohm_6 L2 CRT_R
CRT_R (7)
B-test 8/11: for EMI CRT_G1 BLM18BA220SN1D/0.5A/22ohm_6 L1 CRT_G
+5V +3VPCU CRT_G (7)
CN4
BLM18PG471SN1D_6 CN16 CRT_B1 BLM18BA220SN1D/0.5A/22ohm_6 L3 CRT_B
1 23 CRT_B (7)
R252 MIC1_R3 1 CRT_R1
(17) MIC1_R2 2 24 PCIE_TXN1 (13)
R253 MIC1_L3 2 CRT_G1
(17) MIC1_L2 3 25 PCIE_TXP1 (13)
BLM18PG471SN1D_6 3 C1 C4 C6 C8 C3 C2
(17) MIC1_JD# 4 26
4 33p/50V_4 33p/50V_4 33p/50V_4 33p/50V_4 33p/50V_4 33p/50V_4
5 27 PCIE_RXN1 (13)
5 CRT_B1
(17) LINEOUT_JD# 6 28 PCIE_RXP1 (13)
R257 Short_6 HPOUT-L1 6 VGAVSYNC
(17) HPOUT-L 7 29 VGAVSYNC (7)
R258 Short_6 HPOUT-R1 CLK48_CARD 7
(17) HPOUT-R 8 30 CLK48_CARD (3)
8 VGAHSYNC 8/18:for EMI, change to 33P.
9 31 USB_EN# (18,20) VGAHSYNC (7)
SPDIF_OUT 9 DDCCLK
(17) SPDIF_OUT 10 32 PLTRST#
CLKREQ#_LAN (3)
10
DDCCLK (7) 9/16 monitor test, change to CH01206JB05 12P, wait for EMI confirm
11 33 PLTRST# (7,13,18,19)
(13) USBP0+ NBSWON# 11 DDCDATA
12 34 NBSWON# (18) DDCDATA (7)
(13) USBP0- PWRLED# 12 CRT_SENSE# For EMI
13 35 CRT_SENSE# (18)
14 36 +3VPCU 13
(13) USBP1+ USBP1+ PCIE_WAKE# 14 SATA_LED#_R
15 37 PCIE_WAKE# (14)
(13) USBP1- USBP1- LID# 15 CAPSLED#
16 38 LID# (14,18,22) CAPSLED# (18)
+3V_S5 16 NUMLED# +3V
17 39 NUMLED# (18)
(13) USBP3+ 18 40 17
+3V 18 R17
(13) USBP3- 19 41 RECOVER_BUTTON# (18)
+5VPCU 23 19 LID_touch panel#
20 42 LID_touch panel# (14,18)
5
24 20 1 10K_4
(3) PECLK_LAN 21 43 SATA_LED#_R
(3) PECLK_LAN# 22 44 21 4
22 Recover_LED# 2
A 45 Recover_LED# (18) SATA_LED# (12) A
8/11 B-test : for EMI U2
46 47
3
Aces-87242-2201
ACES_88242-40XX_LVDS TC7SH08FU
ADOGND +3V_S5 +3V +5VPCU

MIC1_R3 C389 *470p/50V_4 +3V +5V +3VPCU +3V *0_4 R16
C307 C293 C291

MIC1_L3 C390 *470p/50V_4
1000p/50V_6 *0.1u/10V_4 0.1u/10V_4
C11 C10 C13 C60 +3V Quanta Computer Inc.
1000p/50V_6 0.1u/10V_4 *0.1u/10V_4 1000p/50V_6 DDCCLK R7 2.2K_4
HPOUT-L1 C392 *47N/25V_4 DDCDATA R13 2.2K_4 PROJECT : ZE8
ADOGND 1A
HPOUT-R1 C393 *47N/25V_4 KB/BT/PR/TP/LAN/LED/CR Connects
5 4 3 2 1
5 4 3 2 1
Backlight Control(LDS) LED Panel(LDS) C test: 8/31: exchange V_BLIGHT and LCDVCC pin define
CN6
V_BLIGHT LED Panel POWER SWITCH(LDS)
+3V
1 1
2 2
+3V VIN V_BLIGHT 3 3
PHL_CLK 4 4
(7) PHL_CLK LCDVCC_1 LCDVCC
R222 Short_8 PHL_DATA 5 5
(7) PHL_DATA
6 6
C339 C330 (7) TXLOUT0- TXLOUT0- 7 7 R251 Short_8
R236 + C344 (7) TXLOUT0+ TXLOUT0+ 8 8
10K_4 1000p/50V_4 0.1u/50V_6 9 9
1
D 10u/25V_1210 (7) TXLOUT1- TXLOUT1- 10 10 C361 C381 C382 C360 D
(7) TXLOUT1+ TXLOUT1+ 11 11
12 12 *0.1u/10V_4 0.1u/10V_4 33p/50V_4 4.7U/10V/8
2
DISPON D27 BAS316 (7) TXLOUT2- TXLOUT2- 13 13
LID# (14,18,21)
(7) TXLOUT2+ TXLOUT2+ 14 14
15 15
+3V TXLCLKOUT- 16 16
(7) TXLCLKOUT-
TXLCLKOUT+ 17 17
(7) TXLCLKOUT+
18 18
R255 Short_4 LCD_VADJ 19 19
(7) INT_LVDS_PWM
DISPON 20 20
R256 *0_4 LCDVCC 21 21 +3V
(18) CONTRAST
3
R223 22 22
10K_4 C391 *3300P/50V_4 23 23
24
2 BL# CCD_POWER R207 USBP7-_CCD 25 24
Short_4 C340 U13 LCDVCC_1
(13) USBP7-
R205 USBP7+_CCD 26 25
Short_4
(13) USBP7+ 26
Q19 27 27 1u/10V_6
31 31 6 IN OUT 1
3
2N7002E DMIC_CLK_R 28 28
C397 DMIC_DAT_R 34 34
B-test 8/11: for EMI 29 29 4 IN GND 2
1
30 30
2 *0.1u/10V_4 3 5
INT_LVDS_BLON (7) (7) INT_LVDS_DIGON ON/OFF GND
R190 BLM21PG331SN1D_8 DMIC_CLK_R LCD(111C30-000001-G4 )
(17) DMIC_CLK
Q17
2N7002E R227 C314 R244 IC(5P) G5243AT11U
100K/F_4
1
*1000p/50V_4
100K_4
3
R194 BLM21PG331SN1D_8 DMIC_DAT_R

(17) DMIC_DAT
2 EC_FPBACK# (18) ramp test : 9/29 : del L23
C317
Q18
C C
DTC144EU *1000p/50V_4
1
HDMI R18 HD@4.7K_4

HDMI_HP_A
+5V_HDMI
+5V 2 1
HDMI(HDM) R21
R23
*HD@4.7K_4
*HD@4.7K_4
MB_HDMI_DDCDAT
MB_HDMI_DDCCLK
D29
C453
HD@RSX101M-30
HD@.1u/16V_4
CN18
Camera(CCD)
+3V +3V_HDMI +3V_HDMI
SHELL1 20
Active Buffer HDMI_OE# HDMITX2P_C 1 22
D2+ SHELL3
2 D2 Shield +3V CCD_POWER
PS8101 : AL008101000 HDMITX2N_C
HDMITX1P_C
3 D2-
U1 4
36
35
34
33
32
31
30
29
28
27
26
25
HP-detect for +3V PS8101T : AL008101001---defult 5
D1+ R260 Short_8 C320 10u/10V_8
+
HDMITX1N_C D1 Shield
6
HPD_SINK
SDA_SINK
SCL_SINK
GND
DDCBUF_EN
VCC
DDC_EN
GND
GND
VCC
OE#
CFG
PS8101 only HDMITX0P_C D1- C396 1000p/50V_4
7 D0+
R8 8
HDMITX0N_C D0 Shield C395 *0.1u/10V_4
37 GND GND 24 9 D0-
*HD_8101@20K/F_6 HDMITX2P 38 23 HDMITX2P_C HDMICLKP_C 10
(7) HDMITX2P IN_D1- OUT_D1- CK+
HDMITX2N 39 22 HDMITX2N_C 11
(7) HDMITX2N IN_D1+ OUT_D1+ CK Shield
HDMI_HP_IV# +3V_HDMI 40 21 +3V_HDMI HDMICLKN_C 12
(7) HDMI_HP_IV# VCC VCC CK-
HDMITX1P 41 20 HDMITX1P_C 13
(7) HDMITX1P IN_D2- OUT_D2- CE Remote
HDMITX1N 42 19 HDMITX1N_C 14
(7) HDMITX1N IN_D2+ OUT_D2+ NC
3
R15 43 GND HD@PS8101T GND 18 MB_HDMI_DDCCLK 15 DDC CLK

HD_8101T@Short_4 HDMICLKP 44 17 HDMICLKP_C MB_HDMI_DDCDAT 16
R6
2 HDMI_HP_IV#_RR
(7) HDMICLKP
(7) HDMICLKN
HDMICLKN
+3V_HDMI
HDMITX0P
45
46
47
IN_D3-
IN_D3+
VCC
OUT_D3-
OUT_D3+
VCC
16
15
14
HDMICLKN_C
+3V_HDMI
HDMITX0P_C HDMI_HP_A
17
18
19
DDC DATA
GND
+5V
23
LED touch Panel connector (LDS)
(7) HDMITX0P IN_D4- OUT_D4- HP DET
SHELL4
B *HD_8101@7.5K/F_4 HDMITX0N 48 13 HDMITX0N_C 21 B
(7) HDMITX0N IN_D4+ OUT_D4+ SHELL2 +3V
Q23 *HD_8101@2N7002E
RT_EN#
49 GND HD@HDMI CONN CN5
REXT
GND
GND
GND
VCC
HPD
VCC
SDA
1
PC0
PC1
SCL C454
R225 Short_4 USBP8-_TP 1
(13) USBP8- 2
Equalization Control 1u/6.3V_4
(13) USBP8+
R216 Short_4 USBP8+_TP
3
1
2
3
4
5
6
7
8
9
10
11
12
(18) Touch_panel_HK Touch_panel_HK
4 7
PC1 PC0 EQ Control 5 6
L L 8dB
L H 4dB +3V +3V_HDMI +3V_HDMI LED panel touch_CONN(88266-020L)
SDVO I2C Control H L 12dB
LS_REXT
H H 0dB R22 HD@4.7K_4

SDVO_CTRLCLK (7)
R20 *HD@4.7K_4
SDVO_CTRLDATA (7)
R19 HD@499/F_4 HDMI_HP_IV#_RR
+5V 2 1 R12 HD@2.2K_4 MB_HDMI_DDCCLK
D4 HD@RB500V-40
OE# control for +3V
power saving ramp test : 9/29 : del L24

+5V
D3
2 1 R11
HD@RB500V-40
HD@2.2K_4 MB_HDMI_DDCDAT FOR EMI R5
HD@10K_4
HDMICLKP_C R2 *HD@100/F_4 HDMICLKN_C HDMI_OE#
3
HDMITX0P_C R1 *HD@100/F_4 HDMITX0N_C
PS8101 PS8101T HDMI_HP_A 2
AL008101000 AL008101001 Q26
A A
HD@2N7002E
pin 7 HPD HPD#
1
pin 34 DDCBUF_EN CFG0 +3V +3V_HDMI
R342 HD@0_6
pin 35 CFG CFG1 Quanta Computer Inc.
C444 C443 C12 C9 C449 C450 C7 C445
HD@2.2u/6.3V_6 *HD@.1u/16V_4 HD@.1u/16V_4 *HD@.1u/16V_4 HD@.1u/16V_4 *HD@.1u/16V_4 HD@.1u/16V_4 *HD@.1u/16V_4 PROJECT : ZE8
1A
LED Panel/CCD/HDMI
5 4 3 2 1
5 4 3 2 1
0.01_3720 C-STAGE change source

VA PR5
R1 PQ36
AO4427 VIN
C-STAGE change source PQ4
AO4427
24
Charger(DCD) 1 2 VA2 1
2
8
7
1
2
8
7
BAT-V
3 6 3 6
PD10 5 5
1
PC6 SX34 PC12 PR6 PC147 PC146 PR57 PC162
0.1u/50V_6 0.1u/50V_6 220K/F_6 *0.1u/50V_6 2200p/50V_6
4
PC145 33K_6 1000p/50V_4
0.1u/50V_6
PD9
2
D CYSMAJ20 D
1 6 PR59
PD1 10K_6
1N4148WS PR10 2 5
DC-IN JACK 220K/F_6
3 4
3
PJ2
1 PA1 PQ1
VA
2 IMD2AT108
3 PL10 VA2 2
+3VPCU (18) D/C#
HI0805R800R-10/5A/80ohm_8
PQ5
PC148 CSIP_1 2N7002K
5
4
2200p/50V_6
1
VIN
PC150 PC4 PC43
0.1u/50V_6 *0.1u/50V_6 PR168 1u/16V_6
100K/F_6
POWER_JACK PR45 PR43

dcjk-2dc3003-001211-5p ACIN 10/F_6 10/F_6
(18) ACIN PC58 PC56
PR20 2200p/50V_6 10u/25V_1206
PC47 4.7_6 PC25
0.1u/50V_6 1u/16V_6
88731_VDDP
PC57
CSIP CSIN *0.1u/50V_6
PD8
33
32
31
30
28
27
26
21
C C
1
PC30 +3VPCU RB500V-40
0.1u/50V_6
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PR40 PC34
2.7_6 0.1u/50V_8 PQ3
(18) MBDATA 11 25 AO4932 PR58
VDDSMB BOOT 0.01_3720
PU5 1 D1 G1 8 PL6
CM1293A-04SO (18) MBCLK 9 24 88731_DH 6.8uH/4.5A_7X7X3
MBCLK SDA UGATE BAT-V
1 6 2 D1 S1/D2 7 1 2
CH1 CH4
2 5 +3VPCU 10 23 88731_LX 3 G2 6
VN VP SCL PHASE PC131
TEMP_MBAT 3 4 MBDATA 4 S2 5 PR56
CH2 CH3 88731_DL 2.2/F_6 PC163
13 20
ACOK LGATE
Add ESD diode base on PC31 0.01u/50V_6
EC FAE suggestion PR23 0.1u/50V_6 19
49.9/F_6 PGND PC55
DCIN 22 2200p/50V_6 PC130
DCIN PR180 CSOP_1 2200p/50V_6
PR164 10/F_6 PC62 PC60
82.5K/F_6 18 CSOP CSOP_1 BAT-V 10u/25V_1206 10u/25V_1206
PU2 CSOP 1000p/50V_4
2
ACIN ISL88731A
PC27
PR65 PC67 PR48 3 0.1u/50V_6
VREF
B
*Short_6 100p/50V_6 PL1 22K/F_6 17 CSON BAT-V B
HI0805R800R-10/5A/80ohm_8 CSON
4 PR179
C114F3-108A1-L_Batt_Conn ICOMP 10/F_6
16
PJ1 NC
MBAT+ PL4 5 PR172
9 8 MBAT+ HI0805R800R-10/5A/80ohm_8 NC *Short_4
7 PR63 *0_6 BAT-V BAT-V
15
6 VBF
6
5 PD5 RB500V-40 VCOMP PR16
29
4 GND 100_4
GND
3 TEMP_MBAT (18)
ICM
NC
NC
2
10 1
1
PR147 +3VPCU 7
14
12
100K/F_6
PR47
2
PC121 2.21K/F_6
PC127 0.1u/50V_6
47p/50V_6
ICMNT (18)
PC49
PC63 0.01u/50V_6
47p/50V_6
PR152 PR150
2
100_4 100_4
PC52 PC50
MBCLK *1u/16V_6 PC51 *0.01u/50V_6
1
0.01u/50V_6
A MBDATA A
PC44
3300p/50V_4
1
PR148 PC122
2
*100K/F_6 0.01u/16V_4
PROJECT : ZE8
1A
CHARGER (ISL88731)
5 4 3 2 1
5 4 3 2 1
PR186 Short_4
(4) SYS_SHDN#
D VIN VIN D
VL
1
VL
2
PD3
ZD5.6V PC7
2
4.7u/6.3V_6
1
PR27 f : 500k Hz
1
0_4
PR185 PR26 PR177 ESR : 25mΩ
f : 400k Hz 39K/F_4 PC24 0_4 *0_4 PC36 PC41 PC138
2
PR14 PC10 1u/16V_6 0.1u/50V_6 2200p/50V_6 10u/25V_1206 Total capacitor : 167 uF
2
ESR : 25mΩ PC143 PC15 100K/F_4 0.1u/50V_6 PC13
2
PC16 PC142 10u/25V_8 10u/25V_8 1u/6.3V_4 PC32 (Peak 3.929A,AVG 2.949A)
Total capacitor :169 uF 0.1u/50V_6 2200p/50V_6 0.1u/50V_6
1
REF OCP : 4A
1
(Peak 6.086A,AVG 4.565A) 3V5V_EN 3V_DH
PR181 *0_6 +3VPCU
OCP: 5.5A PR13 PQ30 AO4932
+5VPCU 220K/F_4
8
7
6
5
4
3
2
1
5V_DH
1 D1 G1 8 PL7
LDO
ONLDO
REF
LDOREFIN
VIN
NC
VCC
TON
3.3uH/6A_7X7X3
AO4932 2 D1 S1/D2 7
PR29
+5VPCU 9 32 REFIN2 150K/F_4 3 G2 6
BYP REFIN2
PL9 8 G1 D1 1 10 OUT1 ILIM2 31 1 2 PR163
C 3.3uH/6A_7X7X3 11 30 4 S2 5 4.7_6 C
FB1 PU1 OUT2 SKIP
7 S1/D2 D1 2 1 2 12 ILIM1 SKIP# 29
PR3 210K/F_4 DDPWRGD_R 13 RT8206B 28 DDPWRGD_R
PGOOD1 PGOOD2
2
6 G2 3 5V_DL 3V5V_EN 14 27 3V5V_EN PR169 +

PR1 EN1 EN2 *SX34 PD12 PC137 *0_6
15 DH1 DH2 26
*0_4 PR183 5 S2 4 16 25 3V_LX 680p/50V_6 PC133 PC132
4.7_6 LX1 LX2 0.1u/50V_6 150u/6.3V_3528
37 PAD
+ PQ34 36 PAD
1
PGND
PVCC
PC153 1 2
BST1
BST2
GND
PAD
PAD
PAD
DL1
DL2
0.1u/50V_6 PC8 PC29 PR31 0_4
NC
2
PC1 PC139 PD11 *SX34 0.1u/50V_6 0.1u/50V_6

150u/6.3V_3528 680p/50V_6 5V_LX PR21 1 2
35
34
33
17
18
19
20
21
22
23
24
PR2 PR4 1/F_6 PR32 *0_4
0_4 1/F_6 1 2
1 2 3V_DL
1
PR171
PC152 *0_6
10u/25V_1206 VL SKIP PR178 *0_6 REF
PC9
2 0.1u/50V_6 PR17 PR174 0_4
3V_DL PC14 0_6
AO4932 Rds=21mOhm 3 1u/16V_6
1 2
PD2 PR34 10K/F_6

+5VPCU OCP: 5.5A 400K +10V 1 CHN217
AO4932 Rds=21mOhm
+3VPCU
PR187
L(ripple current) 22_8 +3VPCU OCP:4A 500K
PC144 DDPWRGD_R PR33 Short_4
=(7.5-5)*5/(3.3u*400k*9) 0.1u/50V_6 L(ripple current)
HWPG_SYS (18)
~1.2626A =(7.5-3.3)*3.3/(3.3u*500k*7.7)
MAIND
B MAIND (26,28) B
Iocp=5.5-(1.2626/2)~4.868A ~1.12687A
Vth=4.868A*21mOhm=102.2mV Iocp=4-(1.1268/2)~3.4366A
PR9(Ilim)=(102.2mV*10)/5uA SUSD
SUSD (28) Vth=3.4366A*21mOhm=72.168mV
~204.48K=210K PR177(Ilim)=(72.168mV*10)/5uA
~144K=150K
VIN +3V_S5 +5V_S5 +10V +5VPCU

+3VPCU
+5VPCU +3VPCU +3VPCU PR160 PR161 PR162 PR167

1M_6 22_8 22_8 1M_6
3
3
S5D 2
3
S5D 2
3
3
PQ2
MAIND 2 MAIND 2 SUSD 2 2 PQ31 AO3404
(18,28) S5_ON
1
2 2 2 PC99 AO3404
1
2200p/50V_4 +5V_S5
PQ22 PQ23 PQ24 PR159 PQ28
1
AO3404 AO3404 3G@AO3404 PR158 PQ27 1M_6 DMN601K-7 PQ29 +3V_S5 0.002A
1
A 100K/F_4 DTC144EU DMN601K-7 A

1
1
PQ32 0.389A
DMN601K-7
+5V +3V +3VSUS
1.563A 1.695A 0.825A

PROJECT : ZE8
1A
SYSTEM 5V/3V (RT8206B)
5 4 3 2 1
5 4 3 2 1
pull-up resistor should be

68ohm with +1.05V
PR189 68/F_4
2 1 +5V_S5
+1.05V
(4) H_PROCHOT#
PR190 Short_4 modify PIN 27 PGDIN
1
VIN
PR192 PR191
D 1 2 10K/F_4 PC154 + D
1
1 2 + PC173
PC158
1
60.4K/F_4 PC157 100u/25V_6X5.7
2
8796VCC PR193 0.22U/25V_6 100u/25V_6X5.7
2
2.2_6
2
1
1u/16V_6
PR194
+5VPCU 15K/F_4 PC156
10u/25V_1206
PR195
PC159
2
PC155 0.1u/50V_6
10/F_6
modify PR194 for 2200p/50V_6
PC160 higher OCP=17A
23
31
30
29
28
27
24
26
25
1u/16V_6
PQ39
ILIM
VDD
VCC
TIME
PGDIN
DH
LX
VRHOT
BST
Total capacitor : 440 uF
AOL1448
5
(5) VID6 20 D6 ESR : 4.5mΩ
(5) VID5 19 D5
DCR=3m f : 333k Hz
4
18 PL11 1R0uH-3mR VCORE(Peak 18A,AVG 13.5A)
(5) VID4 D4
1 2
1
2
3
(5) VID3 17 D3
4
C 16 VCORE C
(5) VID2 D2
15 22 PQ40 PR196
(5) VID1 D1 DL AOL1718 PR200 *Short_4
OVP 15A
5
14 PC161 1000p/50V_4 1.8K/F_4
(5) VID0 D0
1
PR202 PR197
5 2.2/F_6 PR198 NTC 10K_6-B4.25K + +
PR199 *Short_4 CSP *SX34 PC119
(4,7,12) H_DPRSTP# 6 DPRSTP 4
1
PC164 PD13 PC120
2
PU9 0.22U/6.3V_4 2.74K/F_4 PR203
1
2
3
PR201 DPRSLPVR_R7 PC166
PC165
2200p/50V_4
(7,14) DPRSLPVR DPRSLPVR
2
MAX8796GTJ+ 4 2009/06/23 2200p/50V_6
499/F_4 CSN 20K/F_4
PC167 1000p/50V_4 220u/2V_7343 220u/2V_7343
PC168 0.1u/50V_6
modify
pop PC167 ESR=9m
PR204 PR205 PR200/PR203/PR198197
2 1 2 1 PWR
1 PWR
add PC165
2.7K/F_4 2.7K/F_4
PR206
8796VCC 8796THRM 8 3
THRM FB
13K/F_4
GNDS 2
modify PR208
PWRGD
PR207
Load-line=-4mV/A
CLKEN
PGND
AGND
SHDN
*100K/NTC_4 PR208
V3P3
TON
CCV
B 2.61K/F_4
for CULV B
9
10
11
12
13
32
21
33
PC169 1000p/50V_4
tSW = 16.3pF x (RTON + 6.5K ) PR210 10/F_4
PR209 200K/F_4
VCC_SENSE (5)
fsw=300KHz VIN PR211 10/F_4
VSS_SENSE (5)
+3V PR212 1.91K/F_4 PC170
100P/50V_4 PC171 1000p/50V_4
PR213 *Short_4
(4,7,14) DELAY_VR_PWRGOOD
PR214 *0_4 VID0
PR215 *Short_4
(18) VRON
2 PR216 1 PR217 *0_4 VID1
10K/F_4
PR218 *Short_4 PR219
(14) VR_PWRGD_CK410#
*Short_4 PR221 *0_4 VID2
+3VPCU PR222 *0_4 VID3

+3VPCU
PR220 0_8 PR223 *0_4 VID4

PC172
*470P/50V_4
A PR224 *0_4 VID5 A
+3VPCU
PR225 *0_4 VID6

VID 1.0V PROJECT : ZE8
1A
VCore( IMAX8796GTJ+)
5 4 3 2 1
5 4 3 2 1
DDR 1.5V(DCD) PC107 10u/10V_8 27

PR101 0_6 PC106 0.1u/50V_6
+SMDDR_VTERM
VIN
0.75A DDR_DH
PC105 PC97 Total capacitor : 282uF
5
6
7
8
1
10u/10V_8 10u/10V_8 DDR_LX
D ESR : 9mΩ D
DDR_DL
2
4 f : 400k Hz
PQ18
AO4468 PC93 (Peak 12.601A,AVG 9.451A)
PC108
25
24
23
22
21
20
19
PC109 0.1u/50V_6 2200p/50V_6
10u/25V_1206
OCP: 11A +1.5V_SUS
VTT
VBST
GND
VLDOIN
DRVH
LL
DRVL
PL2
3
2
1
1uH/11A_7X7X3
5
6
7
8
1 VTTGND PGND 18
1
2 17 +
VTTSNS PU7 CS_GND PR124 4
3 TPS5116RGER 16 PQ19
GND CS
2
AO4710 PC111 PC110
DIS_MODE 4 15 13K/F_6 PR125 220u/2V_7343 10u/10V_8
MODE V5IN 2.2/F_6
C
+SMDDR_VREF 5 VTTREF V5FILT 14 +5VPCU C
3
2
1
+5VPCU 6 13 PR123
COMP PGOOD
1
5.1/F_6
VDDQSNS
PC102 PC104
VDDQSET
1u/6.3V_4 1u/6.3V_4 PC112
2
2200p/50V_6
PC103
NC
NC
S3
S5
0.033u/50V_6 +3VPCU
7
10
11
12
PR119 100K/F_6
FOR DDR III HWPG_+1.5V_SUS (7,18)
PR121 620K/F_4
VIN PR80 For RT8207 400KHZ
2
PR120 S5_1.8V
PR115 Short_4
SUSON (7,18,28)
0_4
PR114
S3_1.8V Short_4
MAINON (18,27,28)
DIS_MODE
1
PR122 Vout =0.75X[1+(RT/TB)]

B B
*0_6 RAMP DEL
+1.5V_SUS 1 2 AO4710 Rdson=11.7~14.2mOhm

PR107
0_4 RAMP CHANGE PR110
L(ripple current)
+1.5V_SUS
75K/F_4
S3_1.8V =(19-1.5)*1.5/(1u*400k*19)
RT
PR117 0_6 PC113 ~3.454A
*0.033u/50V_6
PC100
*0.1u/50V_6
Vth=(11-1.727)*14.2mOhm=0.1317V
RILIM(PR124)=0.1317/10uA~13K
5
6
7
8
PR111
75K/F_4 RB (10u*PR124)/Rdson+Delta_I/2=Iocp
(24,28) MAIND 4 S5_1.8V
PQ20
AO4468
A A
PC101
*0.1u/50V_6 Quanta Computer Inc.
3
2
1
PROJECT : ZE8
A2 STAGE ADD Size Document Number Rev
1A
+1.5V DDR 1.5V (RT8207A)
5 4 3 2 1
5 4 3 2 1
VIN
+5V_S5
Total capacitor : 630 uF
D D
ESR : 3mΩ
PD4 AOL1448
f : 272k Hz
PQ26
4.7u/6.3V_6
1
RB500V-40 (Peak 12.547A,AVG 9.41A)
5
PR62 PC61
PR151 1M_6 PR156 OCP: 10A
2
10/F_6 2.2/F_6 +1.05V
PR149 4 PC136 PC134 PC59
PU8 2.2/F_6 10u/25V_1206 0.1u/50V_6 2200P/50V_4
UPI6111A PC125
1
2
3
0.1u/50V_6
PR64 Short_6 15 13
(18,26,28) MAINON EN/DEM BOOT
+3V 16 12 UGATE-1V PL5
TON UGATE 1uH/11A_7X7X3
1 11 PHASE-1V
VOUT PHASE
PR155 2 10 PR61 2.43K/F_6
VDD OC
5
C 10K/F_6 PC129 C
3 FB VDDP 9 1 2
PR157 +
4 8 1u/16V_6 LGATE-1V 4 2.2/F_6
(18) HWPG_1.05V PGOOD LGATE PR154 PC128
6 7 PC65 PC66
R1 4.02K/F_6 33p/50V_6
GND PGND
1
2
3
PQ25 220u/2.5V_3528 10u/10V_8
5 17
Rds*OCP=RILIM*20uA AOL1718
NC TPAD PC135
14 2200p/50V_6
NC
1
PR153
PC126 10K/F_6
1u/16V_6
R2
2
PC124
*1000p/50V_6 PC123
0.01u/50V_6 1V_FB
VOUT=(1+R1/R2)*0.75
B B
TON=3.85p*RTON*Vout/(Vin-0.5) AOL1718 Rdson=4.6mOhm PR60 +1.05V

OCP=10-0.8A 0_6
Frequency=Vout/(Vin*TON) L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
TON=3.85p*1M*1/(Vin-0.5) RAMP CHANGE
~3.646A PC64
0.1u/50V_6
Frequency=1/(0.0036767)=272K 4.6m*10=RILIM*20uA 743 CPU Other CPU

RILIM(PR61)=2.3K--- 2.43K
PR154 4.22K (CS24223F917) 4.02K (CS24023F928)
A A

PROJECT : ZE8
1A
VCCP 1.05V (RT8202A)
5 4 3 2 1
5 4 3 2 1
Discharger/1.8V(DCD) 29
+3V +3V
PR74 PR37
+5VPCU +5VPCU
D D
PU6 100K_4 PU4 HD@100K_4
PC69 1u/16V_6 RT9025-25PSP PC54 HD@1u/16V_6 HD@RT9025-25PSP
4 VPP PGOOD 1 HWPG_+1.8V (18) 4 VPP PGOOD 1 HWPG_+1.5VS5 (18)
PR76 Short_6 2 6 +1.8V S5_ON PR36 2 6 +1.5V_S5
(18,26,27) MAINON VEN VO (18,24) S5_ON HD@10K/F_6 VEN VO
PR77 *0_6
(18) +1.8V on power control
3 VIN 0.12A +3VPCU 3 VIN 0.011A
+3VPCU 8 GND 8 GND
ADJ
ADJ
9 5 PR75 PC72 9 5 PR41 PC48
GND NC GND NC
R1 R1
7
34K/F_4 10u/10V_8 HD@30K/F_4 HD@10u/10V_8
0.8V 0.8V
PC71 PC45 PC40 PC37
*0.1u/50V_6 HD@10u/10V_8 HD@0.1u/50V_6 *HD@0.1u/50V_6
PR73 PR38
PC70 PC73
10u/10V_8 0.1u/50V_6
R2 27K/F_6 R2 HD@34K/F_6
Vout =0.8(1+R1/R2) Vout =0.8(1+R1/R2)
=1.81V =1.506V
C C
A2 STAGE CHANGE SOLUTION
VIN +3V +5V +1.8V +SMDDR_VTERM +1.05V +10V
PR97 PR113 PR116 PR103 PR102 PR100 PR106

1M_6 22_8 22_8 *22_8 *22_8 22_8 1M_6
MAINON_ON_G MAIND
MAIND (24,26)
3
3
3
PR98
B B
MAINON 2 1M_6 2 2 2 2 2 2
PC98
PQ16 PQ17 PQ15 PQ13 PQ10 PQ11 2200p/50V_4
PR104 PQ14 2N7002K 2N7002K *2N7002K *2N7002K 2N7002K 2N7002K
1
100K/F_6 DTC144EU
1
1
VIN +3VSUS +1.5V_SUS +10V
PR66 PR72 PR71 PR70

1M_6 3G@22_8 22_8 1M_6
SUS_ON_G SUSD
SUSD (24)
3
3
3
PR67
A 1M_6 A
(7,18,26) SUSON 2 2 2 2
PC68
PQ9 PQ8 PQ7 2200p/50V_4
PR68 PQ6 3G@2N7002K 2N7002K 2N7002K Quanta Computer Inc.
1
100K/F_6 DTC144EU
1
PROJECT : ZE8
1A
Discharge/1.8V
5 4 3 2 1
A B C D E
+3VPCU
+3VPCU
4 4
PR51 PR52 PR53 PR54 PR44

*0_6 *0_6 *0_6 *0_6 *0_6
GPU_VID4 GPU_VID3 GPU_VID2 GPU_VID1 GPU_VID0
+3V
PR50 Short_4 GFX_VR_EN
1
PR55
1.91K/F_4 PC53
*0.1u/50V_6
2
(18) HWPG_GFX
PR49
10K_4
GPU_VID4 (7)
GPU_VID3 (7)
GPU_VID2 (7)
GPU_VID1 (7)
GPU_VID0 (7)
33
32
31
30
29
28
27
26
25
FDE
VID4
VID3
VID2
PAD
PGOOD
AF_EN
VR_ON
PMON
PR46
3 150K/F_4 3
VIN
1 24
RBIAS VID1
1
5
6
7
8
PC46
PR39 2 1 2 23 +5V_S5
SOFT VID0
2
6.81K/F_6
0.015u/16V_4 PC42 4
PC33 ISL6263A_VO 3 PU3 22 1 2 PQ37
68p/50V_4 OCSET PVCC AO4468 PC3 PC2 PC151 PC5
PC39 PR42 ISL6263A 4.7u/6.3V_6 2200p/50V_6 10u/25V_1206 10u/25V_1206 0.1u/50V_6
5.62K/F_6 4 21 ISL6263A_LGATE
VW LGATE
PR28 374K/F_6 PC35 180p/50V_4 1000p/50V_4
3
2
1
5 20
COMP PGND PL8
1uH/DCR 9mR/11A_7X7X3
6 19 ISL6263A_PHASE +VGFX
FB PHASE
PR25 2.21K/F_4 Total capacitor : 465uF
7 18 ISL6263A_UGATE
VDIFF UGATE
5
6
7
8
PC38 ESR :4.5mΩ
1
+ f : 333k Hz
8 17 1 2 PR188
VSEN BOOT
4 (Peak 7.7A,AVG 5.775A)
DROOP
2.2_6
2
VSUM
PR35 1/F_6
VDD
0.22u/25V_6
RTN
DFB
VSS
VIN
OCP: 8A
VO
2
PR15 PC20
4.99K/F_4 560p/50V_4 PR30 PC141 PC140
9
10
11
12
13
14
15
16
10/F_6 PC149 0.1u/50V_6 220u/2.5V_3528
+5V_S5 2200p/50V_6
3
2
1
PC26 PQ38
PC28 AO4710
1000p/50V_4 PR24
1u/6.3V_4 OVP 8A
PC21 1.54K/F_4 Rocset(PR42)=8*7m/10uA~ 5.6K =5.62K
1000p/50V_4
2 VIN 2
PC17
1
PR11 PC22 330P/50V_4 PR19

*10/F_4 1000p/50V_4 10/F_6
PC19
2
+VGFX 0.1u/50V_6
PR7
PR18 ISL6263A_VSUM
1K/F_4
PR8 Short_4 7.68K/F_4
(9) GFX_VCCSENSE
PR173
3.57K/F_4
PR9 Short_4
(9) GFX_VSSSENSE
PR22
Parallel 4.53K/F_4
1
PR12 PC11
*10/F_4 0.1u/50V_6 PR176
10K _6 NTC
2
ISL6263A_VO
PC18
*0.1u/10V_4 PC23
0.068u/10V_4
PR165 0_8
VIN +VGFX
PR175 PR170
1M_6 22_8
GFX_VR_EN_G
1 1
3
3
PR182
GFX_VR_EN 2 1M_6 2
(7) GFX_VR_EN
PQ33
1
PQ35 DMN601K-7
1
PR184 DTC144EU
1
100K_4

2
PROJECT : ZE8
1A
1.05V_GFX
A B C D E
5 4 3 2 1
D D
DDR2 CLK (166/200/266MHz) DDR2 SO-DIMM

NORTH BRIDGE
SFF GS45 Page 16~17
CLK_MCH_BCLK
(166/200/266MHz) Page 6~11
LVDS CLK (112MHz) LED PANEL
Page 23
CLOCK GEN CK505
Page 3 CRT CLK (400MHz) CRT

DB
HDMI CLK (100MHz) HDMI
C
Penryn CPU FSB (266MHz)
Page 23
C
Page 4~5
GLAN
SCH SATA (100MHz) Y1(25 MHz)
DB
SCH DMI (100MHz) SOUTH BRIDGE
SFF ICH9-M SFF EC
SCH PCI (33MHz) (WPCE775C/FLASH)
Page 12~15 Y3(32.768 KHz)
SCH CLK48 (48MHz) Page 19
Y2(14.318MHZ) SCH CLK14 (14.31818MHz)

HD CLK (24MHz) AUDIO CODEC
SCH PCIE(100MHz) (ALC269X)
B Page 18 B
SDIO CLK (48MHz) CARD READER

Y1(12 MHz)
Page 22
PCIE CLK (100MHz) MINI CARD(WLAN)
Page 20
PCIE CLK (100MHz) MINI CARD(3G)

A A
Page 20
PROJECT : ZE8
1A
Clock Distribution Diagram
5 4 3 2 1
5 4 3 2 1
ISL6261A
VCORE
PU10 <VRON>
+5VPCU
<AC/DC Insert>
D D
2N7002K +5V_S5
+5VPCU
PQ15 <S5D>
AO3402 +5V
VIN
PQ22 <MAIND>
SYSTEM +3VPCU
<AC/DC Insert>
5V/3V
(RT8206B)
AO3402 +3V_S5
PQ11 <S5D>
PU2
+3VPCU
ADAPTER AO3402 +3VSUS
PQ20 <SUSD>
CHARGER
(ISL88731A) VIN POWER Distribution
C VCORE CPU C
BATTERY PU9 AO3404
+3V
PQ35 <MAIND> +5VPCU RTC, USB Connecter
+5V_S5 ICH9M Power

RT9025 +1.5V_S5 +5V ICH9M Power, CRT, Audio Codec, SATA HDD, Touch Pad ,HDMI
PU4 <S5D>
+3VPCU RTC, LED Power, CRT, EC, ID , SPI Flash , Green Adapter
+1.8VSUS +3V_S5 ICH9M Power, CR

<SUSON>
+1.8VSUS
+3VSUS 3G
+3V CLK_GEN Power, Thermal Sensor Power, NB Power, SB, DDRII Power, Audio Codec, LCD
VIN
Power, WLAN/WMAX, 3G, Card Reader, BT, EC, LED, CRT, CAMERA
AO4466
+1.5V
PQ32 <MAINON> +1.5V_S5 ICH9M Power
RT8207A +1.8VSUS NB Power, DDRII SO-DIMM
PU8 +SMDDR_VTERM
<SUSON>
+1.5V CPU, NB, SB, AUDIO Codec, WLAN/WMAX, 3G
B +SMDDR_VREF B
<SUSON> +SMDDR_VTERM DDRII SO-DIMM
+SMDDR_VREF DDRII SO-DIMM
+1.05V CLK_GEN, CPU, NB, SB
RT8202A +1.05V
PU5 <MAINON>
A A

PROJECT : ZE8
1A
Power Tree
5 4 3 2 1
1 2 3 4 5 6 7 8
CK505 Clock Setting Table

Differential CPU Clock
Pin Name Pin Net Name Description
CPU_0 61 CLK_CPU_BCLK
CPU_0# 60 CLK_CPU_BCLK# Differential CPU clock
CPU_1 58 CLK_MCH_BCLK
CPU_1# 57 CLK_MCH_BCLK# Differential NB GS45 clock
A A
PCI Express Clock

SRC0/DOT96 20 DREFCLK
SRC0#/DOT96# 21 DREFCLK# 96MHz DOT clock for NB GS45
LCDCLK/27M 24 DREFSSCLK
LCDCLK#/27M_SS 25 DREFSSCLK# Clock output for NB GS45 graphic contoller
SRC2 28 PECLK_SATA
SRC2# 29 PECLK_SATA# Differential Serial Reference Clock for SB ICH9M SATA
SRC3/CR#_C 31 PECLK_ICH
SRC3#/CR#_D 32 PECLK_ICH# Differential Serial Reference Clock for SB ICH9M
SRC4 34 PECLK_LAN
SRC4# 35 PECLK_LAN# Differential Serial Reference Clock for on board LAN
SRC6 48 PECLK_MINI2
SRC6# 47 PECLK_MINI2# Differential Serial Reference Clock for Mini Card 2
SRC7/CR#_F 51 No use
SRC7#/CR#_E 50 CLKREQ#_MINI2 Clock Request for Mini Card 2 (SRC6)
B SRC8/CPU_ITP 54 B
SRC8#/CPU_ITP# 53 No use
SRC9 37 PECLK_MINI1
SRC9# 38 PECLK_MINI1# Differential Serial Reference Clock for MINI CARD 1
SRC10 41 PECLK_3GPLL
SRC10# 42 PECLK_3GPLL# Differential Serial Reference Clock for NB GS45
SRC11/CR#_H 40 CLKREQ#_MCH Clock Request for NB GS45 (SRC10)
SRC11#/CR#_G 39 CLKREQ#_MINI1 Clock Request for Mini Card 1 (SRC9)
PCI Clock
PCI0/CR#_A 8 CLKREQ#_SATA Clock Request for SATA (SRC2)
PCI1/CR#_B 10 CLKREQ#_LAN Clock Request for on board LAN (SRC4)
PCI2 11 PCLK_DEBUG PCI clock for debug card
PCI3 12 No use
PCI4 13 PCLK_EC PCI clock for EC
PCI5 14 PCLK_ICH PCI clock for SB ICH9M
C C
Other Clock
USB_48 17 CLK48_ICH 48MHz for SB ICH9M
CLK48_CARD 48MHz for USB Card Reader
REF 5 CLK14_ICH 14.318MHz for SB ICH9M
Clock Request Table

CLKREQ# MAPPING Control
0 1
CR#_A SRC0 SRC2 SATA
CR#_B LCDCLK SRC4 LAN
CR#_C SRC0 SRC2 N/A
CR#_D LCDCLK SRC4 N/A
CR#_E SRC6 MINI2
CR#_F SRC8 N/A
CR#_G SRC9 MINI1
CR#_H SRC10 MCH
D D
PROJECT : ZE8
1A
Schematic Setting
1 2 3 4 5 6 7 8
5 4 3 2 1
Model REV DATE CHANGE LIST NOTE

PAGE23 :move LED touch Panel hall sensor to LAN DB ECN Release
A1A PAGE20 : reserve R179 , R183 for 3G wake up function
ZE8 PAGE5 : Del C128,C173,C149,C171,C130,C131,C133,C169,C181,C177,C132,C175,C140,C138,C185,C154,C135,C92,C184,C106,C117,C156,C186,C153
for placeing C386 in CPU BGA TOP side
PAGE18 :change U14 footprint to qfn48-7x7-5-58p-0_9h
PAGE23 :change CN18 PN to DFHD19MR053
D D
PAGE23 :Add L28 and L29 for CCD and Touch screen USB signals
PAGE23 :change CN18 footprint to hdmi-100042mr019m21hzr-19p-v
PAGE23 :change CN19 footprint to 85204-0500x-5p-l
PAGE23 :add 5V power trace to CN19 for touch screen IC
PAGE19 :FAE suggest that add R352 for VCC latch up
PAGE19 : FAE suggest that change C347 and C350 value from 15p to 6.8p
PAGE10 : add stitching caps C149,C153 and C154 for DMI signals
PAGE14 : add stitching caps C156,C169 and C171 for DMI signals
PAGE20 : add C431 for SIM Card to filter power noise.
PAGE20 : change U10 PN from AL001293003 to AL001293000
PAGE21 : reserve ESD protection U11 for SATA signals.
PAGE23 : del +5V signal of CN19
PAGE18 : add stitching caps C432,C438 for Audio signals
PAGE21 : del hole 19
PAGE22 : reserve C439, C440,C445,C446,C447,C448 for EMI
PAGE23 : reserve C106 for EMI
PAGE 19, 20 : del R179, R183 and 3G wake up signals of 3G wake up function
PAGE19 : add D30 for WLAN_LED# connect from WALN connector to EC
C
PAGE19 : add 3G_EC_LED# signal from EC to LED connector CN2 C
PAGE19 : change R233 to D31 for leakage issue.

PAGE22 : del C426 due to don't need 3G_MINI_LED# singal from 3G connector to LED connector CN2
PAGE21 : add EMI bypass caps
PAGE23 : HDMICLKP swap to HDMITX0P,HDMICLKN swap to HDMITX0N,HDMICLKP_C swap to HDMITX0P_C,HDMICLKN_C swap to HDMITX0N_C
6/13 : PAGE10 : change C63 and C208 value from 220u to 10u.
6/15 : PAGE18 : due to layout, add 9 GND pin for U14
6/15 : PAGE19 and 23 : add Touch_panel_HK signal for hot key on touch panel
6/16 : PAGE 23 : change R14 to C454 of CN18 for HDMI detect issue
6/18 : PAGE 23 : change CN5 PN to DFHD05MRD98
6/18 : PAGE 19 : change U14 PN to AKE38ZA0Q00
B1A
6/22 : PAGE 21 : change CN17 PN to DFHS04FR269
6/22 : PAGE 24 : change PJ1 PN to DFHD08MR085
6/23 : PAGE 22 : Per Acer request, use interrupt pin of G-sensor to detect panel status ,so , stuff R150, remove R151
6/25 : PAGE 19 : EC add +1.5V on power control net name to control 1.5V
6/25 : PAGE 22 : connect G-sensor interrupt signal to SB PIRQE#
6/26 : PAGE 26 : change V-core solution to Maxim IC
B 6/26 : PAGE 24 : add PD20 in TEMP_MBAT signal B
6/29 : PAGE 9 : change C212 from 330U to 10U for placement issue
6/30 : PAGE 16 : change DDR2 to DDR3
7/2 : PAGE 14 : LID_touch panel# change from GPIO19 to GPIO7 (SCI)
7/2 : PAGE 16 : change DDR3 connector footprint to H=5.2mm
7/6 : PAGE 18,21 : add RECOVER_BUTTON# signal in EC and CRT DB
7/7 : PAGE 18,21 : add RECOVER_LED# signal in EC and CRT DB
7/7 : PAGE 24 : add PD11 and PD12
7/7 : PAGE 25 : add PD13
7/7 : PAGE 20 : add nut on Hole 7, Hole 8 and Hole 11
7/7 : PAGE 18 : add R355 for power consumption issue,Vendor suggest to place it close to EC.
7/8 : PAGE 18 : add D30 for current leakage issue of 3G_EC_LED# signal.
7/9 : PAGE 18 : add D31 to prevent current leakage of Recover_LED# signal.
7/10 : PAGE 19 : change the direction of Q21 and Q22 to prevent the current leakage
7/10 : PAGE 3 : follow vendor suggestion to change C226 from 33p to 27p.
7/13 : PAGE 18 : follow vendor suggestion to change C337 and C343 from 6.8p to 15p.
A A

PROJECT : ZE8
1A
Change List01
5 4 3 2 1
5 4 3 2 1
Model REV DATE CHANGE LIST NOTE

7/23 : PAGE 20 : change CN17 footprint to usb-04wl4b-4p-r-v ECN Release
C1A 7/23 : PAGE 20 : add U38 re-driver IC for SATA connector
ZE8 7/29 : PAGE 19 : change JSIM1 pin define to solve SIM card not detect issue
7/31 : PAGE 20 : add parade solution of SATA re-driver IC
8/4 : PAGE 20 : change footprint of U38 to qfn20-4x4-5-21p-ps8511b
8/6 : because of DMI reference to GND, so, del C60 C67 C61 C150 C166 C153 CAPS
D D
8/6 : PAGE 20 : change Hole 18 footprint HG-C237D94P2, Hole 16 to H-C91D91N
8/10 : PAGE 19 : change JSIM1 PN to DFHS06FS017 and change footprint to simcard-sim-06lj3g-10p
8/11 : add C244 C245=220pF, add C243 =680pF,change C11= 1000pF,add C60=1000pF,change C307= 1000pF,add C363=0.1uF,change C10= 0.1uF,
R113 change to BLM18BA750SN1 ferrite bead,R252, R253 = ferrite bead (BLM18PG471SN1),R190, R194 = BLM21PG331SN1 for EMI
8/12 : change JSIM1 back to A2-test P/N and footprint.
8/13 : add C246,C247=220pF, add C471=0.1uF for EMI
8/28 : page13 : add pull high resister R160 in GNT3# pin for no video issue.
8/31 : page 22 : exchange V_BLIGHT and LCDVCC pin define
9/2 : page 19 : change PN and footprint of JSIM1 back to A1 type.
9/2 : page 21 : change G-Sensor footprint to sensor-3x3-5-16p-smt for SMT solder issue.
9/8 : page 23 : change battery connector footprint to bat-btj-08fg0b-8p-l-v for SMT issue.
9/8 : change R141,R303,R199,R259,R254,R174,R201,R172,R173,R217,R261,R168,R175,R249,R150,R15 to short pad
C3A 9/28 : change PU2 footprint from QFN28-5X5-5-33P to qfn28-5x5-5-33p-nb4
C C
B B
A A

PROJECT : ZE8
1A
Change List01
5 4 3 2 1
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Quanta Ze 8 R1a Schematics

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Quanta Ze 8 R1a Schematics

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5 4 3 2 1

ZE8 BLOCK DIAGRAM

Penryn SFF ULV DC/SC VCCP 1.05V

P16 VGA CRT Discharge

On Board USB0 Port 6 ICH9-M SFF P22 Atheros AR8131L

ZE8 Power On Sequence BOM naming rule

From EC MAINON >5ms

Quanta Computer Inc.

Clock Generator (CLK)

(14) CLKREQ#_SATA CLKREQ#_SATA R121 475/F_4 CR#_A 8 41 PECLK_MINI2 PECLK_MINI2 (19)

Y1 49 CR#_G SRC9 MINI1

C225 33p/50V_4 CG_XOUT

Penryn SFF - Host Bus (CPU)

+1.05V R286 51/F_4 ITP_BPM5# 56_4

CPU FAN CTRL(THM) CPU Thermal Monitor(THM)

+3V +5V C222 0.1u/10V_4

FAN_PWM_CN FANSIG 10K_4 R125 R128

*220p/50V_6 *220p/50V_6 +5V U6

CPUFAN# Size Document Number Rev

Penryn SFF - Power (CPU)

D30 P38 AY22 H12 AR25 V8 AE39 AC29

Cantiga SFF - Host Bus (CLG) U18A H_A#[3..35]

Cantiga SFF - DMI/VGA (CLG) U18B

Intel GS40/GS45 Strapping Signals and Configuration J43 RSVD1

DDR CLK/ CONTROL/COMPENSATION

J23 AF50 DMI_MTX_IRX_P0 (13) AD54

MCH_CFG19 CFG_18 PEG_TX_7

CL_CLK AK52 CL_CLK0 (14)

BE55 F32 DDPC_CTRLDATA R84:

1 BL4 R93 1.02K/F_4 CRT_IREF R95 10K_4 L_CTRL_CLK

TC7SH08FU R347 BH1 NC_20 R82 150/F_4 CRT_B

HDA_SDO HDA_SYNC_HDMI HDA_SDOUT_HDMI (12)

DDPC_CTRLCLK R294 2.2K_4

Cantiga SFF - DDRII (CLG)

(16) M_A_DQ[63:0] (16) M_B_DQ[63:0]

M_A_DQ35 SA_DQ_34 SA_DQS#_6 M_A_DQS#7 M_B_DQ35 SB_DQ_34 SB_DQS#_5 M_B_DQS#6

BF12 SA_DQ_47 SA_MA_10 BA21 AY4 SB_DQ_47 SB_MA_9 BH40

Quanta Computer Inc.

Cantiga SFF - VCC/NCTF (CLG) +VGFX +1.05V

AG40 BB28 AL19

VCC GFX NCTF

AC34 AR38 AA31 R18

AL25 VCC_58 VCC_NCTF_26 Y37 AD25 VCC_AXG_30 VCC_AXG_80 T15

(29) GFX_VCCSENSE AG13

Quanta Computer Inc.

Cantiga SFF - Power (CLG) +3V

C101 C102 C146 C131 C130 C148 C160

AW24 C106 C151

AR28 VCCA_SM_CK_NCTF_6 VCC_PEG_4 AA43

M46 VCCD_LVDS_1 VTTLF2 Y12

Cantiga SFF - GND (CLG) U18I AN25

AR43 VSS_95 VSS_194 N26 BB8 VSS_295 VSS_SCB_3 A55

RTC CRYSTAL ICH9M SFF - Host,SATA,HDA (CLG)

HD Audio Interface R71 1M_4 ICH_INTRUDER#

ICH_TP3 HDA_SDOUT Description

ICH9M SFF - USB/PCIE/DMI (CLG) Place TX DC blocking caps close ICH9.

Direct Media Interface

Pin Name Strap description Sampled Configuration PU/PD

SPI_MOSI Integrated TPM Enable 0 = INT TPM disable(Default) SPI_MOSI 8.2KX8

PCI_GNT#0 SPI_CS#1 Boot Location RP17

Date: Tuesday, September 29, 2009 Sheet 13 of 32

R327 2.2K_4 PDAT_SMB +3V

220p/50V_6 220p/50V_6 +5V U6

HD@2N7002E 1 5 R245 29.4K/F/4