Operational amplifiers

1. Objectives

Introduction to circuits based on Operational Amplifiers (Op-Amps). Evaluation of the no-

feedback and negative-feedback op-amp circuits.

2. Introduction
A structural design of the majority of operational amplifiers is similar to the one presented in the
preceding lab experiment: they have differential inputs (non-inverting input V+ and inverting
input V-) and single-mode output, VOUT. General-purpose op-amps have very large differential-
mode voltage gain (ADM) and very large suppression of the common-mode voltage. For
understanding functionality of the op-amps in circuits it is sufficient to use an idealized model:
infinite differential-mode gain, zero common-mode gain, zero input currents. For the circuit
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analysis we will stay with this model :
ADM ;ACM 0;I- 0;I+ 0 (1)
Typically op-amps utilize a bipolar power supply for operation with positive and negative signal
half-waves without using coupling capacitors. The output voltage swing in op-amps is limited by
the DC supply voltages, VCC and VEE. In these experiments we use VCC = +10 V and VEE = -10
V, therefore the op-amp output voltage can not exceed 10 V.

A. Op-amp circuit with no feedback

In the op-amp circuit without feedback the output voltage saturates at the values close to the
power supply rails, VCC or VEE, depending on the sign of the input voltage difference, V+ - V-.
Thus, the op-amp with no feedback performs a comparison of two input voltages.

VOUT VCC = +10 V for V+ > V- ; VOUT VEE = -10 V for V+ < V- (2)
This configuration finds use in Analog-to-Digital converters (ADC), pulsewidth modulators
(PWM). The circuit shown in Figure 1 performs conversion of the slowly varying (DC) input
signal into a square-wave output voltage with the constant frequency and varying pulse width
(duty cycle). The input voltage is compared with the saw-wave reference signal. For normal
operation the range of input voltage should be within the reference signal swing, |VIN| < VREF
max. For zero DC input voltage the output square-wave signal has 50 % duty cycle.

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A general purpose op-amp to be used in this experiment, type uA741, has the following typical parameters: the
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voltage gain ADM = VOUT/VDM = 10 (100 dB) in DC; the common-mode rejection ratio, CMRR = VCM/VOUT =
80 dB, the input current of 80 nA.
 VIN VOUT
uA741 4 VCC
Inverting input, V- 2 V- 1 10Vdc
- OS1
V 6 Output, Vout
OUT VEE

VREF 3
+ 7 OS2
5 V 10Vdc

V
U1 V+ 0

Non-Inverting input, V+

time

Figure 1.

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In the op-amp without feedback the linear range is negligibly small due to the large differential
gain. The uA741s output voltage 10 V is achieved at the voltage difference between the inputs
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of 0.1 mV or above .

B. Op-amp circuits with Negative feedback

Originally op-amps were designed for operation with analog signals in control systems utilizing
feedback. Figure 2 shows the op-amp circuit with a negative feedback.

virtual ground RF

R1 4 VCC
V-
A B2 - OS1 1 10Vdc

VS uA741 OUT 6 C Vout VEE

3 + 7 OS2 5 V 10Vdc
0 0 U1 V+ 0

Figure 2.

Suppose a small positive signal VS is applied to node A. This signal creates a positive voltage
difference between inputs V- and V+. The opamp quickly responds to this difference with large
negative output voltage. The output voltage with feedback resistor RF brings the voltage
difference between the inputs back to zero. Thus, the effect of the feedback is negative with
respect to changes of VS. For small source signals the op -amp changes VOUT synchronously
with VS to maintain the input voltage difference at zero. The circuit transfer function (voltage
gain) can be analyzed with the first golden rule

V- = V+ (3)

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when the output is proportional to the input difference, VOUT (V+-V-)
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Note, that starting with frequencies about 10 Hz, the differential gain falls with the rate of 20 dB per decade of
frequency. At very high frequencies the op-amp gain falls even faster than that.
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It states that the voltage difference between the op-amp inputs equals zero. The second golden
rule assumes that no currents are flowing into the op-amp input terminals (see eqn 1 above).
The input impedance of the opamp with no feedback is assumed to be infinite, because the
opamp inputs currents are zero at the finite input voltage. In contrast, in the opamp circuit with
negative feedback the equivalent input impedance between V- and ground is zero because the
opamp input voltage is zero. Node V- (point B in Figure 2) is called a virtual ground due to the
effect of negative feedback.
If the source amplitude is too large, the output voltage saturates at the 10 V levels and node B is
not the virtual ground anymore.
If one applies signal VS to the non-inverting input, V+ (Figure 3), the op- amp output changes
accordingly to maintain voltage at V- the same as VS in accordance with the first golden rule (3).
The output voltage is proportional to input signal VS.

RF

R1 4 VCC
V-
2 1 10Vdc
- OS1
6 Vout
uA741 OUT VEE
3 + 7 OS2 5 V 10Vdc

VS U1 V+ 0

0 0

Figure 3.

Thus, the op-amp with negative feedback turns into a linear amplifier with the transfer function
defined by external impedances R1 and RF. The large value of differential gain is traded for a
more accurate transfer function and a wider frequency bandwidth.

3. Prelab
1. Sketch the circuit diagram to obtain the PWM circuit similar to shown in Figure1
where the duty cycle decreases with increase of the input DC voltage. Label the
op-amp inputs. Illustrate the circuit operation with the timing diagrams. Sketch
the chip layout and show the wiring connections.
2. Using the golden rules, find the voltage gain for the circuits in Figures 2 and 3.
Illustrate the circuit operation with the timing diagrams. Sketch the chip layout
and show the wiring connections.
3. Simulate in PSPICE the frequency response of the differential gain for uA741 op-
amp with no feedback in the frequency range from 1 Hz to 1 MHz. Find the gain-
bandwidth product. What would be the frequency bandwidth of the 741-based
amplifier shown in Figure 2 with R1 = 1 k, RF = 20 k?

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 4. Experiment
1. Assemble the circuit in part 1 of the prelab. Apply a saw-wave with the amplitude
of 1 V and the frequency of 100 Hz. Measure and plot the duty cycle in the input
voltage range from -1 to +1 V DC. Find the coefficient between the duty cycle of
the output square-wave signal and the input DC voltage.
2. Assemble the circuit in Figure 2 for the voltage gain of -5. Do not use resistors
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with the values below 1 k and larger 100 k . Find the phase difference between
the input and output voltages. Measure the actual voltage gain in the frequency
range from 10 Hz to 1 MHz using the signal with the amplitude of 200 mV.
Determine the gain-bandwidth product from the measurements. Increase the input
signal amplitude to 4 V. Sketch the signal waveforms at nodes A, B and C.
Explain the nature of the signal changes at node B when the output voltage
amplitude exceeds 10 V.
3. Demonstrate that node B acts as virtual ground for small input signals. This can
be done by measuring dependence of the output signal on additional testing
resistance placed between node B and the ground. Get an idea about the input
impedance of the opamp with negative feedback: connect resistors of various
values between node B and the ground gradually reducing the value of resistance
(1k, 100, 10, 1 Ohm) and monitor the output amplitude at node C. When you see
the effect of the testing resistance on the output amplitude, the circuit input
impedance is comparable to the probe impedance.
4. Change the voltage source ground in the circuit in Figure 2 in accordance with
Figure 3 and determine the voltage gain and phase difference by measuring the
voltages at nodes A and C.

5. Report

The report should include the lab goals, short description of the work, the experimental and
simulated data presented in Bode plots with indication of -3 dB cutoff points, and
conclusions.

6. The op-amp chip pinout.

-10 V
KEY

+10 V
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Small resistances make an excessive load to the op-amp output. Large resistances require taking into account the
op-amp input current and/or provide non-adequate impedance at high frequencies.
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