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- Electrical and Electroluminescence
Breakdown mechanisms in AlGaN/GaN HEMTs: Characteristics of AlGaN/GaN High
Electron Mobility Transistors Operated in
An overview Sustainable Breakdown Conditions
Matteo Meneghini, Alberto Zanandrea,
Fabiana Rampazzo et al.
To cite this article: Gaudenzio Meneghesso et al 2014 Jpn. J. Appl. Phys. 53 100211 - Reliability and parasitic issues in GaN-
based power HEMTs: a review
G Meneghesso, M Meneghini, I Rossetto
et al.

- Breakdown mechanisms in AlGaN/GaN


View the article online for updates and enhancements. high electron mobility transistors with
different GaN channel thickness values*
Ma Xiao-Hua, Zhang Ya-Man, Wang Xin-
Hua et al.

Recent citations
- Device characteristics of enhancement
mode double heterostructure DH-HEMT
with boron-doped GaN gate cap layer for
full-bridge inverter circuit
A. Mohanbabu et al

- Hot electron assisted vertical


leakage/breakdown in AlGaN/GaN
heterostructures on Si substrates
Anqi Hu et al

- Efficient III-Nitride MIS-HEMT devices with


high- gate dielectric for high-power
switching boost converter circuits
A. Mohanbabu et al

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Japanese Journal of Applied Physics 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS
http://dx.doi.org/10.7567/JJAP.53.100211 Progresses and Future Prospects in Nitride Semiconductors

Breakdown mechanisms in AlGaN/GaN HEMTs: An overview


Gaudenzio Meneghesso, Matteo Meneghini, and Enrico Zanoni
Department of Information Engineering, University of Padova, via Gradenigo 6/B 35131 Padova, Italy
E-mail: gauss@dei.unipd.it; matteo.meneghini@dei.unipd.it
Received March 10, 2014; revised April 24, 2014; accepted May 13, 2014; published online September 3, 2014

This paper reviews the physical mechanisms responsible for breakdown current in AlGaN/GaN high electron mobility transistors (HEMTs).
Through a critical comparison between experimental data and previously published results we describe the following mechanisms, which can be
responsible for the increase in drain current at high drain voltage levels, in the off-state: (i) sourcedrain breakdown, due to punch-through effects
and/or to a poor depletion of the buffer; (ii) vertical (drain-bulk) breakdown, which can be particularly prominent when the devices are grown on a
silicon substrate; (iii) breakdown of the gatedrain junction, due either to surface conduction mechanisms or to conduction through the (reverse-
biased) Schottky junction at the gate; (iv) impact ionization triggered by hot electrons, that may induce an increase in drain current due to the
lowering of the barrier for the injection of electrons from the source. 2014 The Japan Society of Applied Physics

exposure to high temperature/power levels, which may


1. Introduction result in additional charge trapping and leakage processes.16)
Thanks to the recent advancements in the growth and (iv) time-dependent degradation processes,8) due to the
fabrication processes, the performance of high electron generation of defects within the AlGaN/GaN heterostructure.
mobility transistors (HEMTs) based on GaN has signi- Besides these mechanisms, power devices operated at
cantly improved. The main advantages of using GaN as a high drain voltages may show important breakdown (BD)
material for the realization of HEMTs are (i) the high sheet processes;9,1725) breakdown consists in a rapid increase in
charge density (>1013 cm2) of the two-dimensional elec- drain current, which occurs in the off-state when the
tron gas (2DEG), which results in a low on-resistance of drain voltage reaches a critical value. Breakdown may
the transistors; (ii) the high thermal conductivity of GaN be catastrophic (i.e., induce a sudden failure of the devices);
(>2 W cm1 K1), which permits to reach high levels of this typically happens when BD measurements are carried
power dissipation while keeping the channel temperature out in voltage controlled mode, by increasing the drain
low; (iii) the high breakdown eld (3.3 MV/cm1)), which voltage until a un-controllable increase in drain current is
allows to fabricate devices with breakdown voltages in the triggered. A sustainable breakdown condition can be reached
order of hundreds or thousands of volts, depending on gate if the measurements are carried out in current-controlled
drain spacing and on buffer thickness. These unique features mode:25,26) by using this method it is possible to separately
make GaN an almost perfect material for the manufacturing evaluate the contribution of gate, source, and bulk leakage
of high power transistors: thanks to the recent efforts of the to the overall BD current, thus extracting information on
scientic and industrial communities, GaN-based transistors the physical origin of breakdown for several operating
with breakdown voltages in excess of 1.51.9 kV have been conditions.
recently demonstrated,2,3) thus clearing the way for the As can be understood, breakdown represents an important
adoption of HEMTs in power electronics. Moreover, thanks problem for high power/high voltage HEMTs: for this
to the low (on-resistance) (device capacitance) product, reason, over the past years several groups have investigated
GaN-based power HEMTs can reach high switching fre- the physical origin of BD,9,1725) with the aim of developing
quencies (>40 MHz4)), and can therefore be used for the models to explain this phenomenon, and of proposing
fabrication of high efciency power conversion systems: technological improvements to increase the robustness of
converters with efciencies in excess of 9698% have the devices. This paper reviews the physical mechanisms
already been demonstrated,4,5) thus proving the superiority responsible for breakdown in GaN-based power transistors:
of GaN with respect to more conventional semiconductors for to this aim, original results are compared with data taken
power electronics. from the literature. The following, relevant, breakdown
Despite the high performance of GaN-based HEMTs, the mechanisms are discussed in detail:
lifetime of these devices can be shorter than expected, due to : Sourcedrain breakdown, due to short-channel effects,
the existence of a number of physical mechanisms respon- and/or punch-through.
sible for device degradation. Recent studies demonstrated : The presence of relatively high breakdown current
that GaN HEMTs may degrade due to the following proc- components at the gate, which can be either related to
esses: (i) degradation of the gate Schottky junction, induced the leakage through the Schottky junction, or to surface-
by off-state stress.611) This mechanism induces an increase in related conduction.
the gate leakage current, due to the generation of localized : Vertical breakdown, which can be due to a poor
shunt paths in proximity of the gate edge; (ii) semi-permanent compensation of the buffer, to the use of a con-
or permanent degradation due to hot electrons;1214) this ductive substrate, and can be limited by the adoption
mechanism occurs when the devices are operated in the of suitable back barrier or heterostructure congura-
on-state, and in most of the cases results in a decrease tions.
in drain current, due to the accumulation of negative charge : Impact ionization mechanisms, that may induce a signi-
close to the gate edge and/or in the gatedrain access cant increase in drain current due to the generation
region.15) (iii) delamination of the passivation, due to the of electronhole pairs close to the gate.
100211-1 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

500 500
2. Experimental methods VG=-3 V VG=-4 V

Drain Current ( A/mm)

Drain Current ( A/mm)


ID ID
The original results described within this paper were obtained 400 400
IG IG
on AlGaN/GaN HEMTs, grown on silicon carbide or on
300 IS 300 IS
silicon substrate by metalorganic chemical vapor deposition
(MOCVD). For the investigation we used both devices 200 200
with single heterostructure and HEMTs with double hetero-
100 100
structure (AlGaN/GaN/AlGaN); gatedrain spacing ranges
between 2 and 10 m, depending on the analyzed set of 0 0
devices. Breakdown was characterized by means of drain
0 50 100 150 200
current vs drain voltage (IDVD) measurements, which were 0 50 100 150 200
Drain Voltage (V) Drain Voltage (V)
carried out in current-controlled mode (as described in
Refs. 25 and 26), to avoid the catastrophic failure of the
devices induced by the measurements. Electroluminescence 500 500
VG=-5 V VG=-6 V
(EL) was also used to investigate the luminescence mech-

Drain Current ( A/mm)


Drain Current ( A/mm)
ID ID
anisms induced by hot electrons when the devices are 400 400
IG IG
operated in sustainable breakdown conditions. IS 300 IS
300
The data collected within this paper were compared to the
results present in the literature, to provide a critical review of 200 200
the individual breakdown processes.
100 100
3. Results and discussion
0 0
3.1 Introductory considerations on sustainable
0 50 100 150 200 0 50 100 150 200
breakdown measurements: IDVD curves and EL
Drain Voltage (V) Drain Voltage (V)
characterization
Figure 1 reports the typical results of current-controlled
(sustainable) breakdown measurements, carried out at several Fig. 1. (Color online) Results of current-controlled IDVD measurements
carried out on AlGaN/GaN HEMTs, with varying gate voltage. IS, IG, and ID
gate voltage levels. The measurements were taken on represent the source, gate, and drain current respectively. The pinch-off
AlGaN/GaN HEMTs grown on a silicon carbide substrate; voltage of the analyzed devices is 2.6 V.
the devices have a gatesource distance of 0.8 m, a gate
drain distance of 4 m, a gate length of 0.5 m, and a gate
width of 100 m. The pinch-off voltage of these devices is of this mechanism is given in Fig. 2, which reports a false
equal to 2.6 V; the measurements were taken by means of a color image of the distribution of EL on device surface,
semiconductor parameter analyzer (Agilent E5260), with gate together with the corresponding current-controlled IDVD
voltages between 3 and 6 V. From Fig. 1, several con- curves. EL signal is emitted due to the relaxation of energetic
sideration can be made: (i) for all the analyzed gate voltages, electrons, which are accelerated by the high electric eld.
drain current shows a remarkable increase when drainsource Several papers discussed the origin of EL in AlGaN/GaN
voltage (VDS) becomes higher than VBR = 150 V (breakdown HEMTs:2732) according to Ref. 32, EL may be generated
voltage), indicating the existence of signicant break- either due to intra- or inter-valley transitions (Fig. 3). In
down processes; (ii) for VDS < VBR (i.e., below the break- the rst case, the electrons accelerated by the electric eld
down voltage), drain current is almost equal to gate current, reach a high-energy non-equilibrium condition, within the
indicating that for moderate VDS levels drain current is valley; light emission occurs due to the relaxation of these
dominated by gatedrain leakage; (iii) when gate voltage is hot electrons, via optical transitions which may involve
close to the pinch-off [e.g., in the case VG = 3 V, Fig. 1(a)], phonons or ionized impurities. On the other hand, in the
and for VDS > VBR, source current shows a strong increase, case of inter-valley processes, the accelerated electrons may
becoming signicantly higher than gate current. As a con- acquire enough energy to be injected into the satellite valleys
sequence, breakdown (drain) current almost completely of the conduction band; this process is favored by the
originates from drainsource leakage. Off-state drainsource inelasitic scattering with phonons. These electrons then
conduction can be due to short-channel effects and/or punch- relax towards the valley, thus emitting photons (energy
through of electrons from the source to the drain, due to the conservation is guaranteed by the interaction with optical
non-optimized depletion of the channel. These parasitic phonons). As shown by the EL micrographs in Fig. 2, under
conduction processes, and the related remedies, are discussed sustainable breakdown conditions luminescence is emitted in
in detail in Sect. 3.2. (iv) drainsource sub-threshold leakage proximity of localized spots; these regions may correspond
can be almost completely suppressed by going towards more to the presence of defects, where the injection of highly
negative gate voltages [e.g., Fig. 1(d)], thanks to a better energetic electrons and thus light emission may be
depletion of the buffer. In these conditions, breakdown locally favored.
(drain) current almost completely originates from gatedrain
leakage. The mechanisms responsible for gatedrain leakage 3.2 Drainsource sub-threshold leakage: physical origin
and breakdown will be discussed in detail in Sect. 3.3. and remedies
When operated in sustainable breakdown conditions, As described in Sect. 3.1, when AlGaN/GaN HEMTs are
HEMTs can emit a weak luminescence signal. A description operated in the off-state, with a gate voltage relatively close
100211-2 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

500 VG=-6 V
VG=-5.5 V
VG=-5 V

Source Current ( A/mm)


400 VG=-4.5 V
VG=-4 V
I=600 A/mm 300
VG=-3.5 V
VG=-3 V

(a) 200
Decreasing VGS
Drain
100

Gate 0

-20 0 20 40 60 80 100 120 140 160 180 200


800
Drain Voltage (V)
Drain Current ( A/mm)

600
Fig. 4. (Color online) Variation of drainsource (sub-threshold) leakage
with varying gate voltage, on a device with LGD = 4 m submitted to current-
400 controlled breakdown measurements. The pinch-off voltage of this device is
2.6 V.

200

VGS=-6V, (b)
0
0 50 100 150 200
Drain-Source Voltage (V)

Fig. 2. (Color online) (a) EL micrograph taken on a device operated in


sustainable breakdown conditions at a current of 600 A/mm, with a gate
voltage of 6 V; (b) IDVD measurements taken on the same devices with a
gate voltage of 6 V, in current controlled mode. Solid lines are guides to the
eye.

Conduction band
Inter-valley
Intra-valley
Fig. 5. Equally spaced contours of the magnitude of the current density,
calculated for a device with gate length 0.17 m, with VG = 6 V and
VDS = 20 V. Material boundaries are marked by solid lines, with the
exception of the GaN/AlGaN interface, which is marked with a ne dashed
line. The gate bias is sufcient to prevent conduction in the channel beneath
the gate; however, the combination of high VDS and poor carrier connement
beneath the channel (which arises from the low NA = ND of 1.5 1016 cm3)
allows current to ow deep into the GaN buffer. In the channel beyond the
Valence band gate, the current density is up to a factor of 100 higher than in the current
loop beneath the gate. However, the contours in the channel are very closely
spaced, because the channel is narrow, and appear as a solid black line in the
-valley
gure. 2006 IEEE. Reprinted with permission from Ref. 20.

Fig. 3. (Color online) Mechanisms responsible for hot-carrier


electroluminescence in AlGaN/GaN HEMTs according to the model LG < 1 m), and are usually ascribed to a poor depletion of
proposed in Ref. 32. the region under the gate, which results in current ow within
the GaN bulk.20,21,25) Uren et al.21) provided an extensive
description of this process, by characterizing HEMTs with
to the pinch-off voltage, breakdown current is dominated a 30 nm Al0.25Ga0.75N barrier and with gate length in the
by drainsource (sub-threshold) leakage [see the case in range 0.170.27 m; they demonstrated that at high drain
Fig. 1(a)]. Drainsource leakage is strongly dependent on the voltages current ows in a loop deep within the GaN, far
voltage applied to the gate during the sustainable breakdown from the AlGaN/GaN heterointerface (see Ref. 21 and
measurements [Figs. 1(a)1(d)]: Fig. 4 gives a more quanti- Fig. 5). High drain voltages can overwhelm the conning
tative description of the inuence of gate-bias on the drain potential required for HEMT operation:21) this mechanism is
source breakdown current in AlGaN/GaN HEMTs (same usually referred to as drain induced barrier lowering (DIBL)
devices as in Fig. 1). For a drain bias of 160 V, drainsource or punch-through, and can be partly avoided by varying the
current is almost completely suppressed by changing the gate density of doping in the buffer (see Ref. 21 for details).
voltage from 3 to 6 V (the pinch-off of this device is Punch-through current components can be effectively
2.6 V), i.e., by improving the depletion of the buffer with reduced through the adoption of a double heterostructure
more negative gate voltages. These effects are particularly conguration, as widely discussed in Refs. 22, 24, and 34:
prominent on short-channel devices (with gate length in this case, an AlGaN backbarrier is placed below the
100211-3 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

-3
10

-4 Single
10
heterostructure
Drain Current (A/mm)

-5
10

-6 Double
10 heterostructure

LGD=1m
-7
10
LGD=2m
-8 LGD=3m
10
LGD=4m
-9
10
0 20 40 60 80 100 120 140 160 180 200
Drain-Source Voltage (V)

Fig. 6. (Color online) Current-controlled IDVD curves measured on


devices with single (lines) and double (lines with symbols) heterostructure
devices.
Fig. 8. Negative gate leakage current, IG, vs the gatedrain voltage as a
function of the temperature. The curves were measured at 20, 70, 100, 130,
160, and 200 C. Copyright 2002 AIP Publishing LLC. Reprinted with
(a) (b) permission from Ref. 17.

value increases linearly with the gatedrain distance (as


extensively described in Ref. 33). Bidimensional simulations
(see Fig. 7 and Ref. 24) indicate that the use of a double
heterostructure can signicantly improve the depletion of
the buffer, thus reducing the electron density and limiting
the punch through current components. The thickness of
the GaN channel region must be carefully optimized with the
aim of achieving both a high electron density in the 2DEG,
and a good connement of the electrons in the channel.

3.3 Gate-related breakdown current components


When the HEMTs are biased in the off-state, with a high
drain voltage, the gatedrain junction is exposed to a high
reverse-bias. In absence of drainsource leakage (i.e., if
the gate voltage is sufciently low to avoid punch-through
Fig. 7. (Color online) Electron density in HEMT devices with (a) GaN
current components, or in the case of DH devices) drain
buffer layer (single heterostructure, SH), and (b) with Al0.1Ga0.9N buffer current is dominated by the reverse leakage of the gate
layer (double heterostructure, DH). Simulations were done with VG = 6 V Schottky junction [see for instance Fig. 1(b)]. Gate break-
and VDS = 30 V. 2009 Wiley-VCH Verlag GmbH & Co. KGaA. down can be due to several mechanisms: Tan et al.17)
Reproduced with permission from Ref. 24. discussed the role of surface gatedrain leakage in determin-
ing drain current breakdown. They suggested that surface
states created by defects or contamination may generate
channel region, whose thickness is limited to few tens of a signicant surface conduction, due to hopping. When the
nanometers. A typical comparison of the breakdown proper- devices are in pinch-off, with a high drain bias, electrons can
ties of single- and double-heterostructure (SH and DH, tunnel from the gate to these surface states, thus generating
respectively) devices is shown in Fig. 6, for devices with gatedrain leakage. Breakdown (i.e., a sudden increase in
increasing gatedrain distance. The SH HEMTs have a 20 nm drain current) is reached due to thermal runaway, when
AlGaN barrier (with a 23% indium content), on top of the power dissipation at device surface exceeds a certain
a 2400 nm GaN buffer layer; in the case of DH HEMTs, threshold (see Fig. 8).17) This kind of breakdown mechanism
the heterostructure consists in a 1840 Al5Ga95N buffer, a has a negative temperature coefcient, i.e., breakdown
thin (15 nm) GaN channel layer, and an AlGaN barrier voltage decreases with increasing temperature. Surface
layer (thickness: 20 nm, Al content: 23%). The results in leakage components can be reduced by adopting advanced
Fig. 6 indicate that independently of the gatedrain passivation schemes: many groups are currently adopting
distance the devices with single heterostructure show a in-situ (i.e., MOCVD or MBE) nitride as a passivation
soft-breakdown, related to the existence of high drainsource layer;34,35) this allows to reduce the reverse-gate leakage of
punch-through components; this effect is signicantly smaller several orders of magnitude, thus signicantly improving the
for the DH devices, for which the (current-controlled) IDVD behavior of the devices in breakdown conditions. The role of
curves show a signicantly higher breakdown voltage, whose surface states in the breakdown process was conrmed also
100211-4 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

Fig. 9. (Color online) Current-controlled breakdown curves measured on


a double heterostructure HEMT with MIS-gate. Fig. 10. (Color online) Vertical IV measured across bulk GaN/Si with
bias applied at the top electrode. The breakdown enhancement is small (11%)
for increasing the GaN thickness and large (50%) for increasing the buffer
thickness. 2011 IEEE. Reprinted with permission from Ref. 40.
by Saito et al.;36) they indicated that the presence of positive
charge (e.g., due to nitrogen vacancies) at the AlGaN layer
surface increases the electric eld over the AlGaN barrier,
thus favoring tunneling and impact ionization processes. They demonstrated a breakdown eld of 2.3 MV/cm (very
As a consequence, leakage current (breakdown voltage) close to the theoretical value of 3 MV/cm) for epilayers
increases (decreases) with increasing concentration of grown by MOCVD with a total thickness of 5.5 m.
charged defects at the surface of the AlGaN layer. Another promising technique for reducing vertical leakage
Even if the surface is carefully optimized, other mecha- has been recently demonstrated for GaN HEMTs grown on
nisms may signicantly contribute to gatedrain leakage n-SiC substrates.41) The idea is to split the vertical voltage
through the AlGaN barrier: the most relevant are defect- drop between the nitride layers and the upper layers of the
assisted tunneling,37) thermionic emission at the Schottky SiC substrate. Hilt et al.41) proposed to use Ar-implantation
gate,37) PooleFrenkel emission,37) and the existence of to render isolating the top-most part (some hundreds of
leakage paths due to the presence of extended defects.11) nanometers) of the SiC substrate. The implantation-induced
These leakage components can reduce the breakdown voltage damage in the SiC crystal is still present after MOCVD
of HEMTs; in general, gate-related leakage can be almost nitride growth; dynamic properties of the HEMTs are not
completely suppressed through the use of a metalinsulator altered by this procedure. A breakdown voltage of 880 V was
semiconductor (MIS) scheme as an alternative to the demonstrated with a gatedrain distance of 18 m by means
conventional Schottky-gate structure.38) of this technique.
Lu et al.42) proposed to remove the Si substrate to further
3.4 Vertical (bulk-related) breakdown increase the breakdown voltage of the HEMTs; by trans-
As described in the previous sections, gate- and source- ferring the HEMT on an insulating carrier wafer, such as
related breakdown current components can be signicantly polycristalline AlN or glass, they demonstrated a signicant
reduced through the use of optimized device structures, i.e., reduction of vertical leakage conduction, and breakdown
MIS-HEMTs (for lowering gate-induced leakage current) and voltages in excess of 1500 V, by simply using HEMTs with
double heterostructure devices (for lowering drainsource a 2 m total epilayer thickness. In case the substrate is
punch-through). Devices with high gatedrain spacing can removed, heat dissipation must be optimized through the
reach breakdown voltages in excess of 5001000 V. Under use of carrier layers with high thermal conductivity, such as
these conditions, vertical (drain-bulk) leakage may become polycristalline aluminum nitride wafers. A similar approach
relevant. Figure 9 reports the current-controlled breakdown was proposed by Herbecq et al.,43) who were able to
curves measured on a MIS-HEMT with gatedrain spacing demonstrate a breakdown voltage of 1.9 kV (with a buffer
of 10 m; while drainsource and gate current are below the thickness of less than 2 m), after removing the substrate
detection limit, the drain (breakdown) current originates locally between gate and drain.
entirely from vertical leakage. Another mechanism which can be responsible for vertical
These current components can be reduced by improving leakage was proposed in 2010 by Umeda et al.;44) they
the insulating properties of the buffer: a simple and effective suggested that the blocking voltage of the HEMTs can be
approach is to use AlGaN (instead of GaN) for the fabrication limited by the fact that a sheet of electrons is formed at
of the buffer layer.39) Since AlGaN has a bandgap higher than the interface between GaN and the silicon substrate. This
GaN, this results in an increase in the vertical breakdown inversion layer can lead to a signicant leakage current, at
voltage. Another possibility is to use thick GaN-buffer layers; the edges of the devices. They proposed to implant acceptor
Rowena et al.40) demonstrated that a signicant improvement atoms in the silicon wafer, to create two p+ regions in
of the breakdown voltage can be obtained by increasing proximity of the edges of the transistor. This allows one
the thickness of the GaN buffer layer on which i-GaN is to prevent the ow of electrons towards the edges of
grown (Fig. 10). This is partly due to the fact that with the devices, thus signicantly reducing vertical leakage. The
increasing buffer thickness the density of dislocations (in implanted regions (referred to as channel stoppers) permit
GaN grown on a thick buffer) shows a signicant decrease. to drastically increase the breakdown voltage; Umeda et al.44)
100211-5 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

quence, at high temperatures high electric elds are required


to give to the electrons the energy required to reach impact
ionization. In bi-dimensional simulations, the carrier gen-
eration rate due to impact ionization is usually expressed as
n jJn j p jJp j
G ; 1
q
where n and p are the ionization rates for electrons
and holes, Jn and Jp are the electron and hole current
(a) (b)
densities, and q is the electron charge. n and p are
expressed as
Fig. 11. Electron and hole density proles for a HEMT bias with  
VDS = 410 V and VG = 8 V. 2014 Wiley-VCH Verlag GmbH & Co. Bn
n An exp  ; 2
KGaA. Reproduced with permission from Ref. 47. jEj
 
Bp
p Ap exp  : 3
jEj
achieved an off-state BDV of 1340 V with a total epitaxial Here E is the electric eld, while An, Bn, Ap, Bp are
thickness of GaN of 1.4 m. coefcients whose values can be deduced from the theoretical
More recently, Zhou et al.45) investigated the conduction work by Bulutay.50) It is clear that to reduce the contribution
mechanisms responsible for vertical leakage and breakdown, of impact ionization to breakdown it is necessary to limit
based on temperature-dependent transient backgating meas- the electric eld; this is possible through the use of suitable
urements. They demonstrated that the vertical leakage is source-eld plates, through the optimization of the dielec-
dominated by space-charge limited current (SSLC); moreover trics,47,48) and through an accurate design of gate head.
they showed that the presence of donor and acceptor traps It is worth noticing that, although possible at theoretical
within the buffer/transition layer can signicantly inuence level, further work must be done to demonstrate the role
the dynamic behavior of the devices under breakdown of impact ionization in inducing the breakdown of AlGaN/
conditions. GaN HEMTs. In GaAs devices impact ionization can be
easily identied, since it generates a signicant increase in
3.5 Breakdown and impact ionization gate current, and a measurable electroluminescence signal
Most of the mechanisms described so far (gatedrain leakage, due to electronhole recombination;51) on the other hand,
drainsource punch-through, vertical leakage, etc.) involve in GaN-based transistors the contribution of impact ioniza-
only electrons, which are the majority carriers in the weakly tion to gate current and band-to-band electroluminescence
n-type GaN substrates, and can be injected from the gate, is signicantly lower, and still has to be extensively
from the source, or from the bulk. Recent studies19,4649) described.
suggested that also holes generated through impact ionization
may contribute to the breakdown of AlGaN/GaN HEMTs. A 4. Summary
negative effect of the intrinsic n-type doping of the buffer is In summary we have described the main mechanisms
the DIBL; simulations indicate that the height of the barrier responsible for high breakdown current in AlGaN/GaN
for the injection of electrons from the source to the buffer based HEMTs. The results described within this paper
decreases with increasing depth. Recent studies46) suggested demonstrate that breakdown voltage (dened as the drain
that under off state conditions the electrons can be voltage required to reach a given drain current level) can be
injected from the source to the high-eld region (gate edge on limited by the presence of a number of leakage mechanisms.
the drain side), thus initiating impact ionization in the At high drain bias, drain current may show a signicant
channel. This may lead to a strong increase in drain current: increase, due to (i) the punch-through of electrons injected
Hanawa et al.,47,48) based on bidimensional simulations, pro- from the source; (ii) the presence of high gate-leakage current
vided a quantitative description of this effect (see Fig. 11). components, due either to surface conduction, or to the
They showed that when VDS is close to the breakdown tunneling of electrons through the AlGaN barrier; (iii)
voltage, impact ionization may occur in the region between vertical conduction through the substrate, due to the use of
gate and drain; this results in the generation of electron/hole conductive silicon substrates, to the intrinsic defectiveness of
pairs; as a consequence, the density of holes in the buffer the buffer layer, or to the parasitic conduction mechanisms
layer can be very high (>1015 cm3), particularly at the related to the presence of an inversion layer between the
source side, where also the electron densities are high. The Si substrate and the nitrides; (iv) impact ionization, which
holes generated by impact ionization can ow into the buffer, may generate holes, thus locally decreasing the barrier for
and be captured by deep donors; this leads to a decrease in the injection of electrons from the source. These breakdown
the negative space charge in the buffer, and to the reduction mechanisms have been discussed based on the data presented
of the barrier for the injection of electrons to the GaN, thus in the literature, and on original results. A hard degradation
resulting in a signicant increase in drain current. Typically, occurs due to positive-feedback mechanisms, such as thermal
if breakdown is due to impact ionization, VBR has a positive runaway or avalanche processes, for very high drain voltages.
temperature coefcient:19,49) this is due to the fact that The results described within this paper indicate that
the electron mean free path, which is limited by phonon breakdown current can originate from a number of parasitic
scattering, is shorter at higher temperatures. As a conse- mechanisms, that in most of the cases can be limited
100211-6 2014 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

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100211-7 2014 The Japan Society of Applied Physics


Jpn. J. Appl. Phys. 53, 100211 (2014) SELECTED TOPICS IN APPLIED PHYSICS

Matteo Meneghini received the Laurea degree Gaudenzio Meneghesso received the B.S. degree in
(summa cum laude) in electronics engineering, with electronic engineering, working on the failure
a thesis on the electrical and optical characterization mechanism induced by hot electrons in MSFET and
of gallium nitride light-emitting diodes (LEDs), and HEMTs, and the Ph. D. degree in electrical and
the Ph. D. degree in the optimization of GaN-based telecommunication engineering from the University
LED and laser structures from the University of of Padova, Padova, Italy, in 1992 and 1997,
Padova, Padova, Italy, in 2004 and 2008, respec- respectively. In 1995, he was with the University of
tively. He is currently assistant professor with the Twente, Enschede, The Netherlands, with a Human
Department of Information Engineering, University Capital and Mobility fellowship (within the
of Padova. He has been involved in several national SUSTAIN Network) working on the dynamic
and European projects on GaN LEDs and high-electron mobility transistors behavior of protection structures against electrostatic discharge (ESD). Since
(HEMTs). He is currently engaged in the electrooptical characterization and 2011, he has been a Full Professor with the Department of Information
modeling of the performance and reliability of InGaN LEDs and lasers and in Engineering, University of Padova. He has published about 600 technical
the characterization of power HEMTs and E-mode transistors. He published papers, of which more than 60 are invited papers and eight have won Best
more than 200 journal and conference proceedings papers and presented Paper Awards at the 1996, 1999, 2007, and 2009 European Symposium on
several invited presentations. His current research interests include the Reliability of Electron Devices, Failure Physics and Analysis (ESREF) and at
characterization, reliability, and simulation of compound semiconductor the 2006 Electrical Overstress/Electrostatic Discharge Symposium. His
devices. He was a recipient of the Carlo Offelli Award for Best Young research interests include electrical characterization, modeling, and reliability
Researcher from the Department of Information Engineering (DEI), of microwave and optoelectronic devices on IIIV and IIIN; electrical
University of Padova, in 2008. He was also a recipient of Best Paper Awards characterization, modeling, and reliability of RF MEMS switches for
at the European Symposium on Reliability of Electron Devices, Failure recongurable antenna arrays; development of ESD protection structures for
Physics and Analysis (ESREF), in 2009 and 2012, and at the International CMOS and SmartPower integrated circuits; and the characterization and
Workshop on Nitrides, in 2012. He is a member of the IEEE International reliability of organic semiconductor devices. Dr. Meneghesso was the
Electron Device Meeting committee, of the Solid State Device Research recipient of the Italian Telecom award for his thesis work in 1993. For several
Conference (ESSDERC) 2013 and 2014 Technical Program Committee and years, he has served on the Executive Committee of the IEEE International
of the technical subcommittees of the ESREF. Electron Devices Meeting as the European Arrangements Chair in 2006 and
2007. He has been serving on the Technical Program Committee (TPC) of the
Enrico Zanoni was born in Verona, Italy, in 1956. IEEE International Reliability Physics Symposium since 2005 and on the
He received the Laurea degree in physics (cum Management Committee since 2009. He is in the Steering Committee of
laude) from the University of Modena and Reggio several international conferences, including the European Solid-State Device
Emilia, Modena, Italy, in 1982, after a student Research Conference, the ESREF, the Workshop on Compound Semi-
internship with the S. Carlo Foundation, Modena. conductor Devices and Integrated Circuits (WOCSDICE), and the European
During 19851988, he was an Assistant Professor Workshop on Heterostructure Technology (HETECH), and has been serving
with the Faculty of Engineering, University of Bari, on the TPC of several international conferences. Since 2007, he has been an
Bari, Italy. From 1988 to 1993, he frequently visited Associate Editor of the IEEE ELECTRON DEVICES LETTERS for the
the U.S. and established research collaborations with compound semiconductor devices area. He has been nominated to IEEE
Bell Laboratories; Hughes Research Laboratories; Fellow Class 2013, with the following citation: for contributions to the
IBM T. J. Watson Research Center; Massachusets Institute of Technology, reliability physics of compound semiconductor devices. In 2010, he joined
Cambridge, MA, USA; TRW (currently, Northrop Grumman); University of the Administrative Committee of the IEEE Electron Devices Society.
California, Santa Barbara, CA, USA; and many other industrial and academic
laboratories. During 19961997, he was a Full Professor of industrial
electronics with the University of Modena and Reggio Emilia. He is currently
with the University of Padova, Padua, Italy, where he was an Assistant
Professor during 19881992, an Associate Professor of electronics during
19921993, a Full Professor of microelectronics during 19931996, and has
been a Full Professor of digital electronics with the Department of
Information Engineering since 1997. He has been a Representative of the
University of Padova for the European project MANPOWER and
Manufacturable Power Monolithic Microwave Integrated Circuits for
Microwave Systems Applications, a European Coordinator for the subproject
Reliability of the European project EUREKA PROMETHEUS (automotive
electronics), a Principal Investigator of the European project Procedures for
the early phase evaluation of reliability of electronic components by the
development of European Committee for Electrotechnical Standardization
(CENELEC) Electronic Components Committee rules on qualication and
reliability of integrated circuits, and a European Coordinator of the
subproject Reliability of the European Defence Agency project Key
Organization for Research on Integrated Circuits in GaN Technology. He is
nationally or locally responsible for several Italian research projects, such as
the Italian Space Agency, the Italian Research Ministry Projects, and the
Italian National Council of Research. He is the author or coauthor of
approximately 450 papers in refereed international journals and conference
roceedings, including more than 35 invited papers. His microelectronics
group is composed of ve professors, three assistant professors, and, on
average, 15 Ph. D. students and two postdoctoral researchers. This research
group publishes approximately 80 papers each year on a wide range of
research topics, including analog and RF signal CMOS design, biochip
development, the analysis of radiation hardness, and the reliability of
electronic devices and circuits. His research interests include microelec-
tronics, particularly concerning the design, characterization, reliability, and
failure analysis of electronic devices and circuits.

100211-8 2014 The Japan Society of Applied Physics