Index Number: ______________________

Specimen Paper

TEE 208/05 Analog Electronics

Time: 3 Hours

Instructions to candidates:

1. Please check that this question paper consists of seven (7) printed pages
before you begin the examination.
2. Answer any 5 questions in the answer booklet provided.
3. All necessary working must be shown clearly. Omission of essential working
will result in loss of marks.
4. Non-programmable electronic calculator may be used.
5. You are not allowed to remove this question paper from the examination
venue.

Copyright 2012 WOU

2/-
 2 TEE 208/05

Question 1 (20 marks)

(a) Sketch the IV curves of an ideal diode and a real silicon diode. Label the
sketched diagrams clearly. [6 marks]

(b) A circuit is shown in Fig. 1. The diodes are silicon type with forward biased
voltage of 0.7V.

Fig. 1

(i) Calculate the diode currents ID2 and ID1, [8 marks]

(ii) Determine the biasing conditions of diodes D 1 and D2. [2 marks]
(iii) Calculate the voltages at points A and B. [4 marks]

3/-
 3 TEE 208/05

Question 2 (20 marks)

(a) A first order inverting Active High Pass filter circuit that has a gain of
10, a low frequency cut-off point of 159Hz and an input impedance of
5k. A non ideal operational amplifier is used in this circuit.

(i) Design the filter by calculating the required values for the
components.

[5 marks]

(ii) Draw the circuit with the calculated values.

[3 marks]

(iii) Sketch the frequency response curve of this filter.

[5 marks]

(b) An op-amp circuit is built as shown in the figure below. All the resistors R1,
R2 and R3 have the same value of R.

Fig.2

(i) Show that the transfer function for the op-amp circuit shown in Fig.2
is vo/vi = 1.
[5 marks]
(ii) Find the voltage gain if the resistor connected to the non-inverting
input of the op-amp is shorted to ground and resistor R2 is
removed.
[2 marks]
 4 TEE 208/05

4/-

Question 3 (20 marks)

. (a) An enhancement n-MOS transistor has the following parameters: Threshold
voltage VTh=0.8V, K=20A/V2 =nCOX, where n is mobility of electron, C OX
gate oxide capacitance.
(i) Find W/L ratio for gate voltage VG=2.8V, drain voltage, VD=5V,
source voltage VS=1V and drain current ID=0.24mA.
[6 marks]
(ii) Calculate drain current I D for gate voltage VG=5V, drain voltage VD=4V,
source voltage VS=2V
[4 marks]
(b) For the n-channel EMOSFET used in circuit below, threshold voltage
VTh=1V, K=0.3mA/V2. Find
(i) V0 (as shown in figure below) [6 marks]
(ii) If V0=2V, find the new K value [4 marks]

Fig.3

5/-
 5 TEE 208/05

Question 4 (20 marks)

A single transistor amplifier circuit is shown in the figure below. The circuit is
operating at room temperature with V BE=0.7V and VT=26mV. Assume the output
resistance of the transistor, ro is much bigger than Rc.

Fig. 2

(a) State the amplifier configuration of this circuit. [2

marks]

(b) Calculate the base current IB and collector current IC. [6 marks]

(c) Calculate the voltage across the collector and the emitter (V CE). [2 marks]

(d) Draw the equivalent simplified, low-frequency small signal model for this
amplifier. Label your diagram clearly. [6 marks]

(e) Find the small signal voltage gain of this amplifier. [4 marks]
 6 TEE 208/05

6/-

Question 5 (20 marks)

(a) Construct the Bode plots for the transfer function
200 j
H ( )
( j 2)( j 10)
[11 marks]

(b) Use the network below with the parameters: C =36pF, C=4pF,CCe=1pF,
CWi=6pF and Cwo=8pF. The other parameters are Cs=10F, CE=20F,
CC=1F, RS=1K, R1=40K, R2=10K, RE=2K, RC=4K, RL=2.2K,
=100, r0=, VCC=20V.
Determine; (i) fHi(High cut-off frequency at input side) and fHo (High cut-off
frequency at output side) [3 marks]
(ii) f and fT (Transit frequency) [3 marks]
(iii)Sketch the response for the low-and high frequency regions.
[3 marks]
 7 TEE 208/05

Fig.5

7/-
Question 6 (20 marks)
The figure below shows an amplifier with current mirror as active load. The
MOSFETs have the following parameters: Vtn=Vtp=0.6V, kn=200A/V2,
kp=65A/V2, VA(NMOS)=20V, VA(PMOS) =10V, VT=26mV, R1=7k, R2=10k, L=0.4m
and W=4m. The base-emitter forward voltage, V BE of transistor Q4 is 0.7V. The
forward voltage drop for both D 1 and D2 is 0.7V. The supply voltage, VDD=3V.
Assume the base current of Q4 is negligible compared to emitter and collector
currents of Q4 with all the transistors biased in the active region.
 8 TEE 208/05

Fig. 6

(a) Identify the transistors forming the current mirror. [2 marks]

(b) Calculate the value of IREF. [2 marks]

(c) Calculate the output resistances of transistors Q1 and Q2. [4 marks]

(d) Calculate the gate to source voltage of Q1. [6 marks]

(e) Calculate the small-signal voltage gain, vout/vin. [6 marks]

 9 TEE 208/05

END OF QUESTION PAPER