Lab Report 1

SUBMITTED BY-

Sagar Biswas

CSB16029

DEPT of CSE
Content:

1. Objectives.
2. Theory
3. Observation Table
4. Observation
5. Inference
Objectives:

1. To get acquainted to-

a. The register set of P 8086 and its basics structure
b. The emulator emu8086
c. The basic structure of Assembly Language Instructions and Machine
Instructions.
2. To observe execution of simple instructions with register operands (byte and word size).

Theory:

Register Set and Basic structures:

It is comprised of 16-bit registers. They are-

(i) General purpose register: There are 8 general purpose registers, i.e., AH, AL,
BH, BL, CH, CL, DH, and DL. They can individually store 8-bit data and can
store 16-bit data in pairs.
(ii) Special purpose register: They are used as segment registers, pointers, index
registers, or as offset registers for particular addressing modes.
(iii) Segment registers: There are 4 segment registers, i.e., CS, DS, ES, SS. It holds
the addresses of instructions and data in memory, which are used by the
processor to access memory locations.
(iv) Flag registers: It is modified automatically by mathematical operations, this
allows to determine the type of the result, and to determine conditions to transfer
control to other parts of the program.
Essential features of the emulator emu8086-

The most prominent features of a 8086 microprocessor are as follows

(i) It was the first chip to use a 16-bit transfer bus making it much faster and software
friendly.
(ii) It has an instruction queue, capable of storing 6 instruction bytes, resulting in faster
processing.
(iii) The speed of the processor was faster than previous chips, up to 10 MHz.
(iv) It uses two stages of pipelining, i.e., Fetch Stage and Execute Stage.

Basic structure of Assembly Language Instructions and Machine Instructions-

An assembly language program has six fields: Memory Address, Machine Code, Opcode,
Operands, and Comments.

Memory Address: These are 16-bit addresses of the user memory in the system, where the
machine code of the program is stored.

Machine Code: Also called as instruction code. These are the hexadecimal numbers represents
instructions that are stored in the respective memory addresses.

Label: A label is a symbol or group of symbols used to represent an address of specific

statement. Labels are usually followed by a colon. Labels are not required in a statement; they
are just inserted where they are needed.

An instruction is divided into two parts: Opcode and Operand.

Opcode (Operation Code): Opcode are the abbreviated symbols to indicate the type of
operation or function that will perform by the machine code.

Operand: The operand field of the statement contains the 8-bit or 16-bit data, the memory
address, the port address, or the name of the registers on which the instruction is to be
performed.

Mnemonic: An instruction, called a mnemonic or mnemonic instruction is formed by

combining Opcode and Operand. A mnemonic is just the letters which are usually initials or a
shortened form of the English words for the operation performed by the instruction.
 Comments: This field is not become a part of the program, it simply a part of the proper
documentation of a program to explain or remind of the function that this instruction or group of
instructions performs in the program. These are separated by a semicolon (;) from the instruction
on the same line.

Observation Table:

Instruction Byte/ Operand 1 Operand 2 Result Flags Comments

Word Reg Value Reg Value Reg Value OF SF ZF AF CF
Add Word AX 2356 BX 4531 CX 6887 0 0 0 0 0 No signed or
unsigned
overflow,
result is non-
zero, and
positive.
Byte AL AE BL D3 CL 81 0 0 0 1 0 AF=1: there
is an
unsigned
overflow for
low nibble
Word AX ABCD BX BCDE CX 68AB 1 0 0 1 1 OF=1: there
is signed
overflow
AF=1: there
is an
unsigned
overflow for
low nibble
CF=1: there is
unsigned
overflow
Word AX 8888 BX 7788 CX 0000 0 0 1 1 1 ZF=1: the
result is zero
AF=1: there
is an
unsigned
overflow for
low nibble
CF=1: there is
unsigned
overflow
 Sub Word AX CF27 BX CD12 CX 0215 0 0 0 0 0 No signed or
unsigned
overflow,
result is non-
zero, and
positive.
Byte AL 27 BL 32 CX FFF5 0 1 0 0 1 SF=1: the
result is
negative
CF=1: there is
unsigned
overflow
Byte AH 21h BH 32h CX EF08 0 1 0 1 1 SF=1: the
result is
negative
AF=1: there
is an
unsigned
overflow for
low nibble
CF=1: there is
unsigned
overflow
Word AX CF27 BX CF27 CX 0000 0 0 1 0 0 ZF=1: the
result is zero

Observations:

Effect of instruction execution on Instruction Pointer(IP):

The instruction pointer is incremented after fetching an instruction, and holds the memory
address of the next instruction that would be executed. While moving, adding, and
subtracting, IP was incremented by 2 while it was incremented by 1 in the nop instruction.

Effect of instruction execution on Flags.

The flags dont chance while the mov instruction was executed, but they changed after add, or
sub operations were executed. This is because the flags might change only after the arithmetic
operations are completed.
Inference:

The basic operations like mov, add, and sub of assembly language have been implemented
on both bytes and words using different values. The corresponding results, register values
and flags have been observed.