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me/abcdelectrical
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Contents
Manual for K-Notes ................................................................................. 2
Diodes ..................................................................................................... 3
Transistor Biasing .................................................................................. 11
Transistor Amplifier .............................................................................. 19
Feedback Amplifiers .............................................................................. 25
Operational Amplifiers (OP-AMP) ......................................................... 29
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Why K-Notes?
Towards the end of preparation, a student has lost the time to revise all the chapters
from his / her class notes / standard text books. This is the reason why K-Notes is
specifically intended for Quick Revision and should not be considered as comprehensive
study material.
A 40 page or less notebook for each subject which contains all concepts covered in GATE
Curriculum in a concise manner to aid a student in final stages of his/her preparation. It
is highly useful for both the students as well as working professionals who are preparing
for GATE as it comes handy while traveling long distances.
It is highly recommended to use K-Notes in the last 2 months before GATE Exam
(November end onwards).
Once you finish the entire K-Notes for a particular subject, you should practice the
respective Subject Test / Mixed Question Bag containing questions from all the Chapters
to make best use of it.
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Diodes
Representation:
A: Anode K : Cathode
The voltage at which the charged particles start crossing the junction is called as cut in voltage
or Threshold voltage.
It is represented as VAK V .
When VAK V , depletion region exists and no charge carriers cross the junction, therefore
I 0
D
When VAK V , number of charged particles crossing the junction increases & the current
through the diode increase, non linearly or exponentially.
Diode in the condition is said to be forward biased.
VAK
VT
ID IS e 1
I = reverse saturation current
S
KT
V = Thermal voltage =
T q
K = Boltzmann constant
T = Temp. in k
q = charge of one e
V = 26mv at room temperature
T
= intrinsic factor
When V 0 , diode is said to be in reverse biased condition & no majority carriers cross the
AK
depletion region, hence I 0
D
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Characteristics of Diode
Forward Bias
Reverse Bias
Diode Resistance
1) State or DC Resistance
V
R AK
DC I
D
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2) Dynamic or AC Resistance
dV V
R D T
AC dI I
D D
Diode Applications
Clippers
It is a transmission circuit which transmits a part of i/p voltage either above the reference
voltage or below the reference voltage or b/w the two reference voltages.
Series Clippers
i) Positive Clippers
V V When V V => V V
m R i R O i
V V When V V => V V
m R i R o i
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Shunt Clipper
i) Positive Clipper
When V V , D is ON
i R
V V
o R
When V V , D is OFF
i R
V V
o i
ii) Negative Clipper
When V V , D is ON
i R
V V
o R
When V V , D is OFF
i R
V V
o i
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CLAMPERS
These circuits are used to shift the signal either up words or down words.
Negative Clampers
When V 0
R
+ve peak is shifted to 0
-ve peak is shifted to 2V
m
When V 0
R
+ve peak is shifted to V
R
-ve peak is shifted to -2 V V
m R
Positive Clampers
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When V 0
R
-ve peak is shifted to 0
+ve peak is shifted to 2V
m
When V 0
R
-Ve peak is shifted to V
R
+ve peak is shifted to 2V V
m R
Rectifier
R
V V sin t L
0 m R R
f L
R = diode resistance
f
V 0
0
V
V
0 avg
m
4 RL
100%
2 R f RL
V
V
0 RMS
m
2
V
Form Factor = RMS 2
V
avg
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R
V V t L
o R 2R
L f
R
V V t L
o R 2R
L f
2V
Vo avg
m
8 1
100%
2 R
f
1 2
R
L
V
V
o RMS
m
2
FF
2 2
PIV V
m
Zener Diode
A heavily doped a si diode which has sharp breakdown characteristics is called Zener Diode.
When Zener Diode is forward biased, it acts as a normal PN junction diode.
For an ideal zener diode, voltage across diode remains constant in breakdown region.
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Voltage Regulator
I I I
z L
V
I z
L R
L
I I I
max z max L
I I I
min z min L
I I I
z max max L
I I I
z min min L
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Transistor Biasing
Bipolar Junction Transistor
NPN Transistor
PNP Transistor
Region of Operation
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I I I
C nc o
I : injected majority carrier current in collector
nc
I
nc
I
E
I I I 1
I B o ; I B I
C 1 E
1 1 o
Current gain (common emitter)
I I 1 I
c B o
;
1 1
These relations are valid for active region of operations.
Characteristics of BJT
input V , I
BE E
output V , I
CB C
Input characteristics
V vs I when V cons tant
BE E CB
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Output characteristics
inputs V , I
BE B
outputs V , I
CE C
Input characteristics
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Output characteristics
Transistor Biasing
V I R V 0
cc B B BE
V V
I cc BE
B R
B
Assuming active region of operation
I I
c B
V V I R
CE CC C C
Verification
If V V V Active Re gion
CE sat CE CC
If not ; then saturation region
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By KVL
cc
c B c B B
V I I R I R V I R 0
BE E E
V I I R I R V I I R 0
cc c B c B B BE C B B
Assuming active region
I I
c B
V V
I cc BE ; I I
B
R 1 R R
B C E c B
CE CC C B
V V I I R R
C E
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FET Biasing
JFET
When V is negative, depletion layer is created between two P region and that pinches the
GS
2
V
I I 1 GS
D DSS
V
GS OFF
When V 0, I I
GS D DSS
When V V , I 0
GS GS OFF D
Pinch of voltage, V V
p GS OFF
V 0 & V 0
p GS
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JFET Parameters
1) Drain Resistance
V
r DS
d I
DS
2) Trans conductance
I dI
g D D
m V dV
GS GS
2
V
I I 1 GS
D DSS V
GS OFF
dI 2I V
D g DSS 1 GS
dV m V V
GS GS OFF GS OFF
3) Amplification factor
V
DS g r
V md
GS
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Depletion MOSFET
Types of MOSFET
Operating characteristics
I 0 for V V
D GS T
cut off region
V2
I C
D
W
n ox L GS
V V V DS
T DS 2
(linear region)
V
GS
V and V
T DS
V V
GS T
2
I C
W VGS VT (saturation region)
D n ox L 2
V
GS
V and V
T DS
V V
GS T
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Transistor Amplifier
Small signal analysis for BJT
V hI h V
1 i1 r 2
I h I h V
2 f1 o 2
I
current gain, A 2
I I
1
h R
A f L
I 1h R
o L
V
Input Impedance, Z 1 h h A R
i I i r I L
I
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AR
Voltage gain, A I L
V Z
i
1
Output impedance, Z
o hh
h f r
o h R
i s
V h e
Voltage gain A o f R R
v V he c L
i i
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Hybrid - parameters
Ic Q KT
1) g ; V ,
m V T q
T
h
2) r fe
b'e g
m
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r = open circuited.
b'c
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All internal and external capacitance are neglected, so gain is independent of frequency.
I
Trans conductance, g D
m V
GS
In non saturation region
I W
g D C .V
m V n ox L DS
GS
In saturation region
g
ms
C
W
V V
n ox L GS
T
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Feedback Amplifiers
Ideal Amplifier
Z
in
Z 0
o
Positive feedback : V V V
i s f
Negative Feedback : V V V
i s f
V A
For negative feedback, o
V 1 A
s
V A
For positive feedback, o
V 1 A
s
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i) Sensitivity
A
Without feedback =
A
A
With feedback = f
A
f
A 1 A
f
A
f
1 A A
Without feedback = Z
i
With feedback = Z
if
Z Z 1 A
if i
Without feedback = Z
o
With feedback = Z
of
Z
of
Z
o
1 A
Negative feedback also leads to increase in band width
.
Output Input
Voltage Series
Voltage Shunt
Current Series
Current Shunt
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V V
f o
I V
f o
= Trans conductance
V I
f o
= resistance
I I
f o
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Circuit Topologies
1) Voltage series
2) Voltage shunt
3) Current series
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4) Current shunt
Parameters of OPAMP
Voltage applied between input terminals of OP AMP to null or zero the output.
Difference between current into inverting and non inverting terminals of OP AMP.
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5) Slew Rate
Maximum rate of change of output voltage per unit time under large signal conditions.
dV
SR o V s
dt max
In an OP AMP with negative feedback, the potential at non inserting terminals is same as the
potential at inverting terminal.
Applications of OP AMP
1) Inverting Amplifier
R
V f V
o R in
1
2) Inverting Summer
V V V
V R a b c
o f R R R
a b c
R
V 1 f V
o R in
1
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If R R R R
a b c
V R2
V a
V R2
b
V R2
c
1 R R R R2 R R2
2
V
Va Vb Vc
1 3
R V V V
V 1 f a b c
o R 3
1
5) Differential Amplifier
By Super position
R R
V 1 f 3 V
ob R R R b
1 2 3
R
V f V
oa R a
1
V V V
o oa ob
6) Integrator
1 t
o RC o in
V V dc
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7) Differentiator
dV
V RC in
o dt
V
I in
L R
V R I
out p IN
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R V
V 1 f in
o R 1 j2fRC
1
V A
o f
V f
in 1 j
f
H
R 1
A 1 f R ; f
f 1 H 2RC
V R j2fRc
o 1 f
V R 1 j2fRC
in 1
j f f
L
A
f f
1 j
f
L
R
A 1 f
f R
1
1
f
L 2RC
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This circuit provides full wave rectification with a gain of R R
1
R
V V
m R m
1
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V V
o IN
V V V
o IN p
V = peak value of V
p IN
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16) Comparators
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R1
UTP V V
sat R1 R 2 R
R1
LTP V V
sat R1 R 2 R
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R R R
Upper trigger Point UTP 2 V , Lower triggering point LTP 2 V , 2
R sat R sat R
1 1 1
Hysteric voltage = UTP LTP 2V
sat
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R
2
R R
1 2
1
T 2RCln
1
1 1
f
T 1
2RCln
1
555 Timer
Pin Diagram
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c
T 0.69 R R c
1 2
T 0.69R c
d 2
c d 1
T T T 0.69 R 2R C
2
1 1
f
T 0.69 R 2R C
1 2
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