Documentos de Académico
Documentos de Profesional
Documentos de Cultura
Amplifiers
and Comparators
Power/Motor
Control Circuits
Voltage References
Data Conversion
Interface Circuits
Communication Circuits
Consumer
Electronic Circuits
Automotive
Electronic Circuits
Surface Mount
Technology
Packaging Information
MCMXCVII
Quality and
Reliability Assurance
Applications Literature
9
What's Different
New Additions:
AM26LS30 MC 10324 MC34118*
CA3146 MC33033 MC34151
LF441C/442C MC33035 MC341 52/53
LM2935T MC33077 MC34163
MC1382 MC33120* MC34164
MC13B3 MC331 78/79 MC34166
MC1384 MC33272/74 MC44602
MC2830 MC3382/84 TCA0372
MC3335 MC34066 UAA2016
MC3361B MC34114* UC2844/2845
MC10322 MC34117* UC3844/3845
Deletions:
MC3480 TBA120C
MC6108 TCA4500A
MC13014P TCA55S0
MC13021 TCF7000
MC34061, A TDA1190P
MC34062 TDA1285A
MC35082/83 TDA3333
This publication presents technical information for the broad line of Linear and Interface Inte-
grated Circuit products. Complete device specifications are provided in the form of Data Sheets
which are categorized by product type into ten chapters for easy reference. Selector Guides by
product family are provided in the beginning of each Chapter to enable quick comparisons of
performance characteristics A Cross Reference chapter lists Motorola direct replacement and
functional equivalent partnumbers for other industry products.
A chapter provided to illustrate Package Outline and mounting hardware drawings, and
is
includes information on Surface Mount Devices (SMD}, and Industry Package Cross Reference
Guide.
Additionally, chapters are provided with information on Quality program concepts, high-
reliability processing, and abstracts of available Technical Literature.
The information in this book has been carefully checked and is believed to be accurate; however,
no responsibility is assumed for inaccuracies-
Motorola reserves the right to make changes without further notice to any products herein to
improve reliability, function or design. Motorola does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Motorola products are not authorized for use as
components in life support devices or systems intended for surgical implant into the body or
intended to support or sustain life. Buyer agrees to notify Motorola of any such intended end use
whereupon Motorola shall determine availability and suitability of its product or products for the
use intended. Motorola and @) are registered trademarks of Motorola, Inc. Motorola, Inc. is an
Equal Employment Opportunity /Affirmative Action Employer.
Series G
Second Printing
MOTOROLA INC.. 1990
Previous Edition ^1988
Printed in U.S.A. "All Rights Reserved"
C-QUAM* Designer's, MDTL, MECL, MECL 10.000. MONOMAX, MOSAIC, MRTL,
MTTL, SENSEFET and Switchmode am trademarks of Motorola Inc.
.
Index/Cross Reference
In Brief . .
Alphanumeric Index
Device Device
Number Function Page Number Function Page
AM26LS30 Dual Differential/Quad Single-Ended Line 7-10 LM209 Positive Voltage Regulator 3-1
Driver
LM211 High-Performance Voltage Comparator 2-54
AM26LS31 Quad EIA-422 Line Driver with 7-21
LM217 3-Terminal Adjustable Positive Voltage 3-21
Three-State Output
Regulator
AM26LS32 Quad EIA-422/3 Line Receiver with 7-24
LM217L 3-Terminal Adjustable Positive Voltage 3-29
Three-State Output
Regulator
CA3054 Dual Differential Amplifier 9-9
LM223.A 3-Ampere, 5 Volt Positive Voltage 3-37
CA3059 Zero Voltage Switch 4-9 Regulators
CA3079 Zero Voltage Switch 4-9 LM224 Quad Low-Power Operational Amplifier 2-60
CA3146 1 -Differentially Connected and 3-lsolated 9-11 LM237 3-Terminal Adjustable Negative Voltage 3-43
Transistor Array Regulator
DAC-08 High-Speed 8-Bit Multiplying 6-5 LM239.A Quad, Single-Supply Comparators 2-66
D-to-A Converter
LM248 Quad MC1 741 Operational Amplifier 2-70
LF347 Family of BIFET Operational Amplifier 2-15
LM250 3-Terminal Adjustable Positive Voltage 3-66
LF351 Family of BIFET Operational Amplifier 2-15 Regulator
LF353 Family of BIFET Operational Amplifiers 2-15 LM258 Dual, Low-Power Operational Amplifier 2-76
LF355.B Monolithic JFET Operational Amplifiers 2-17 LM285 Micropower Voltage Reference Diode 5-4
LF356.B Monolithic JFET Operational Amplifiers 2-17 LM293,A Dual Comparators 2-82
LF357.B Monolithic JFET Operational Amplifiers 2-17 LM301A General-Purpose Adjustable Operational 2-45
LF411C Low Amplifier
Offset, Low Drift JFET Input 2-27
Operational Amplifier LM307 Internally Compensated Operational 2-87
LF412C Low Amplifier
Offset, Low Drift JFET Input 2-27
Operational Amplifier LM308.A Precision Operational Amplifiers 2-49
LF441C Low-Power JFET Input Operational 2-30 LM309 Positive Voltage Regulator 3-16
Amplifier
LM311 High-Performance Voltage Comparator 2-54
LF442C Dual, Low-Power JFET Input Operational 2-30
LM317 3-Terminal Adjustable Positive Voltage 3-21
Amplifier
Regulator
LF444C Quad, Low-Power JFET Input Operational 2-30
LM317L 3-Terminal Adjustable Positive Voltage 3-29
Amplifier
Regulator
LM11C.CL Precision Operational Amplifiers 2-38
LM317M 3-Terminal Adjustable Positive Voltage 3-74
LM101A General-Purpose Adjustable Operational 2-45 Regulator
Amplifier
LM323,A 3-Ampere, 5 Volt Positive Voltage 3-37
LM108.A Precision Operational Amplifiers 2-49 Regulators
LM109 Positive Voltage Regulator 3-16 LM324.A Quad, Low-Power Operational Amplifiers 2-60
LM111 High-Performance Voltage Comparator 2-54 LM337 3-Terminal Adjustable Negative Voltage 3-43
LM117 3-Terminal Adjustable Positive Voltage 3-21 Regulator
Regulator 3-Terminal Adjustable Negative Voltage 3-82
LM117L 3-Terminal Adjustable Positive Voltage 3-29 Regulator
Regulator LM339.A Quad, Single-Supply Comparators 2-66
LM123.A 3-Ampere, 5 Volt Positive Voltage 3-37 LM340.A 3-Terminal Positive Fixed Voltage 3-50
Regulators Regulators
LM124 Quad, Low-Power Operational Amplifier 2-60 LM348 QuadMC1741 Operational Amplifier 2-70
LM137 3-Terminal Adjustable Negative Voltage 3-43 LM350 3-Terminal Adjustable Positive Voltage 3-66
Regulator Regulator
LM139.A Quad, Single-Supply Comparators 2-66 LM358 Dual, Low-Power Operational Amplifier 2-76
LM140.A 3-Terminal Positive Fixed Voltage 3-50 LM385 Micropower Voltage Reference Diode 5-4
Regulators
LM393.A Dual Comparators 2-82
LM148 Quad MC1741 Operational Amplifier 2-70
LM833 Dual, Low-Noise, Audio Operational 2-91
LM150 3-Terminal Adjustable Positive Voltage 3-66 Amplifier
Regulator
LM2900 Quad, Single-Supply Operational Amplifier 2-1 98
LM158 Dual, Low-Power Operational Amplifier 2-76
LM2901 Quad, Single-Supply Comparator 2-66
LM193.A Dual Comparators 2-82
LM2902 Quad, Low-Power Operational Amplifier 2-60
LM201A General-Purpose Adjustable Operational 2-45
LM2903 Dual Comparator 2-82
Amplifier
LM2904 Dual, Low-Power Operational Amplifier 2-76
LM208.A Precision Operational Amplifiers 2-49
Device Device
Number Function Page Number Function Page
Low Dropout Voltage Regulator 3-89 MC1514 Dual Differential Voltage Comparator 2-97
LM2931
LM2935T Low Dropout Dual Regulator 3-96 MC1508 8-Bit Multiplying Digital-to-Analog Converter 6-1
MC8T26A Quad Three-State Bus Transceiver 7-27 MC1537 Dual Operational Amplifier 2-1 05
MC8T28 Noninverting Bus Transceiver 7-32 MC1539 High-Slew-Rate Operational Amplifier 2-1 09
MC8T96 Hex Three-State Buffer/Inverter 7-37 MC1554G 1 -Watt Power Amplifier 2-1 23
MC1330AP Low-Level Video Detector 9-13 MC1558S High-Slew-Rate Dual Operational Amplifier 2-1 38
9-19 MC1568 Dual 15 Volt Regulator 3-109
MC1350 IF Amplifier
MC1357 IF Amplifier and Quadrature Detector 9-23 MC1590G Wideband Amplifier With AGC 2-1 50
2-105 Amplifier
MC1437 Dual Operational Amplifier
2-109 MC3325 Automotive Voltage Regulator 1 0-6
MC1439 High-Slew-Rate Operational Amplifier
2-117 MC3334 High Energy Ignition Circuit 10-10
MC1445 Wideband Amplifier
MC1454G 1-Watt Power Amplifier 2-123 MC3335 Low-Power Narrowband FM Receiver 8-36
MC1468 Dual 15 Volt Tracking Regulator 3-109 MC3359 Low-Power Narrowband FM IF 8-50
MC1472 Dual Peripheral Positive NAND Driver 7-45 MC3361B Low-Voltage Narrowband FM IF 8-56
MC1488 Quad MDTL Line Driver 7-48 MC3362 Low-Power Dual Conversion FM Receiver 8-58
MC1489.A Quad MDTL Line Receivers 7-54 MC3363 Low-Power Dual Conversion FM Receiver 8-65
1-3
P L
Device Device
Number Page Number Function Page
MC3403 Quad Differential-Input Operational 2-208 MC3558 Dual, Low-Power Operational Amplifier 2-230
Amplifier
MC4558,AC,C Dual High-Frequency Operational 2-241
MC3405 Dual Operational Amplifier plus Dual 2-214 Amplifiers
Voltage Comparator
MC4741.C Quad MC1 741 Operational Amplifiers 2-245
MC3417 Continuously- Variable-Slope Delta
MC6875.A M6800 2-Phase Clock Generator/Driver 7-1 50
Modulator/Demodulator
MC6880A Quad Three-State Bus Transceiver 7-27
MC3418 Continuously-Variable-Slope Delta
Modulator/Demodulator MC6885 Hex Three-State Buffer/Inverter 7-37
MC3423 Overvoltage Sensing Circuit 3-121 MC6887 Hex Three-State Buffer/Inverter 7-37
MC3425 Power Supply Supervisory/Over, Under- 3-127 MC6888 Hex Three-State Buffer/Inverter 7-37
voltage Protection Circuit MC6889 Noninverting Bus Transceiver 7-32
MC3430 High-Speed Quad Comparator 2-222 MC7800 Three-Terminal Positive Voltage Regulators 3-1 35
MC3431 High-Speed Quad Comparator Series
2-222
MC3432 High-Speed Quad Comparator 2-222 MC78L00.A Three-Terminal Positive Voltage Regulators 3-148
Series
MC3433 High-Speed Quad Comparator 2-222
MC78M00 Three-Terminal Positive Voltage Regulators 3-1 54
MC3437 Hex Unified Bus Receiver 7-62
Series
MC3440A Quad Interface Bus Transceiver 7-65
MC78T0O Three-Ampere Positive Voltage Regulators 3-1 62
MC3441A Quad Interface Bus Transceiver 7-65 Series
MC3446A Quad Interface Bus Transceiver 7-69 MC7900 Three-Terminal Negative Fixed Voltage 3-171
MC3447 Series Regulators
Bidirectional Instrumentation Bus 7-72
Transceiver MC79L00.A Three-Terminal Negative Fixed Voltage 3-1 80
MC3448A Quad Three-State Bus Transceiver Series Regulators
7-78
MC3450 Quad Line Receiver 7-83 MC79M00 Three-Terminal Negative Fixed Voltage 3-185
Series Regulators
MC3452 Quad Line Receiver 7-83
MC10318P High-Speed 8-Bit D/A Converter 6-27
MC3453 Quad Line Driver 7-90
MC10319 High-Speed 8-Bit A/D Flash Converter 6-39
MC3456 Dual Timing Circuit 11-41
MC10320 Triple 4-Bit Color Palette Video DAC 9-77
MC3458 Dual, Low-Power Operational Amplifier 2-230
MC10320-1 Triple 4-Bit Color Palette Video DAC 9-77
MC3467 Triple Preamplifier 7-94
MC13001XP Monomax Black-and-White TV Subsystem 9-94
MC3469P Floppy Disk Write Controller 7-99
MC13002XP Monomax Black-and-White TV Subsystem 9-94
MC3470P.AP Floppy Disk Read Amplifier System 7-109
MC10321 High-Speed 7-Bit A/D Flash Converter 6-57
MC3471 Floppy Disk Write Controller/Head Driver 7-123
MC3476
MC 10322 8 Bit Video DAC with TTL Inputs 6-75
Programmable Operational Amplifier 2-236
MC3479
MC 10324 8 Bit Video DAC with ECL Inputs 6-76
Stepper Motor Driver 4-14
MC13010P TV Parallel Sound IF/AFT 9-1 03
MC3481 Quad, Single-Ended Line Driver 7-134
MC13020P C-QUAM AM 9 " 1 08
MC3484S2 Integrated Solenoid Driver 10-21 Stereo Decoder
MC3484S4 Integrated Solenoid Driver 10-21 MC13022 Advanced Medium Voltage AM Stereo 9-113
Decoder
MC3485 Quad, Single-Ended Line Driver 7-134
MC3486
MC 13023 AM Stereo Front End and Tuner Stablizer 9-117
Quad EIA-422/3 Line Receiver 7-139
MC13024 Low- Voltage Motorola C-QUAM 9 " 1 23
MC3487 Quad EIA-422 Line Driver With Three-State 7-142
Output AM Stereo Receiver
Device Device
Number Function Page Number Function Page
MC33063 DC-to-DC Converter Control Circuit 3-212 MC34013A Speech Network and Tone Dialer
MC33063A DC-to-DC Converter Control Circuit 3-218 MC34014 Telephone Speech Network with Dialer
Interface
MC33064 Undervoltage Sensing Circuit 3-227
MC34017 Telephone Tone Ringer
MC33065 High-Performance Dual Channel Current 3-232
Mode Controller MC34018 Voice Switched Speakerphone Circuit
MC33072 Dual, High-Performance Single-Supply 2-306 MC34060A Switchmode Pulse Width Modulation 3-200
Operational Amplifier Control Circuit
MC33074 Quad, High-Performance Single-Supply 2-306 MC34063 DC-to-DC Converter Control Circuit 3-21
Operational Amplifier
MC34063A DC-to-DC Converter Control Circuit 3-21
MC33077 Dual, Low-Noise Operational Amplifier 2-250
MC34064 Undervoltage Sensing Circuit 3-227
MC33078 Dual, Low-Noise Operational Amplifier 2-261
MC34065 High-Performance Dual Channel Current 3-232
MC33079 Quad, Low-Noise Operational Amplifier 2-261 Mode Controller
MC33120 Subscriber Loop Interface Circuit MC34066 High-Performance Resonant Mode 3-245
High-Performance Current Mode Controller 3-253 Controller
MC33129
High-Speed Dual MOSFET Driver 3-266 MC34071 High-Performance Single-Supply 2-306
MC33151
Operational Amplifier
MC33152 High-Speed Dual MOSFET Driver 3-274
MC34072 Dual, High-Performance Single-Supply 2-306
MC33153 High-Speed Dual MOSFET Driver 3-274
Operational Amplifier
MC33160 Microprocessor Voltage Regulator and 3-279
MC34074 Quad, High-Performance Single-Supply 2-306
Supervisory Circuit
Operational Amplifier
MC33163 Power Switching Regulator 3-287
MC34080 2 " 322
3-297
High-Speed Decompensated (AyCL ^ 2)
MC33164 Undervoltage Sensing Circuit
JFET Input Operational Amplifier
MC33166 Power Switching Regulator 3-302
MC34081 High-Speed JFET Input Operational 2-322
MC33171 Low-Power, Single-Supply Operational 2-270 Amplifier
Amplifier
MC34082 Dual, High-Speed JFET Input Operational 2-322
MC33172 Low-Power, Single-Supply Operational 2-270 Amplifier
Amplifier
MC34083 Dual, High-Speed Decompensated 2-322
MC33174 Low-Power, Single-Supply Operational 2-270
(AyCL - 2) JFET ln P ut Operational
Amplifier Amplifier
Device Device
Number Function Page Number Function Page
MC34166 Power Switching Regulator 3-302 NE592 Video Amplifier 2-342
MC34181 Low-Power JFET Input Operational 2-333 OP-27 Ultra-Low-Noise Precision, High-Speed 2-347
Amplifier Operational Amplifier
MC34182 Dual, Low-Power JFET Input Operational 2-333 SAA1042.A Stepper Motor Driver 4-103
Amplifier
SE592 Video Amplifier 2-342
MC34184 Quad, Low-Power JFET Input Operational 2-333
SG1525A Pulse Width Modulator Control Circuit 3-304
Amplifier
SG1526 Pulse Width Modulator Control Circuit 3-311
MC35001 JFET-lnput Operational Amplifier 2-299
SG1527A Pulse Width Modulator Control Circuit 3-304
MC35002 JFET-lnput Operational Amplifier 2-299
SG2525A Pulse Width Modulator Control Circuit 3-304
MC35004 JFET-lnput Operational Amplifier 2-299
SG2526 Pulse Width Modulator Control Circuit 3-311
MC35060 Switchmode Pulse Width Modulation 3-188
Control Circuit SG2527A Pulse Width Modulator Control Circuit 3-304
MC35060A Switchmode Pulse Width Modulation 3-200 SG3525A Pulse Width Modulator Control Circuit 3-304
Control Circuit SG3526 Pulse Width Modulator Control Circuit 3-311
MC35063 DC-to-DC Converter Control Circuit 3-212 SG3527A Pulse Width Modulator Control Circuit 3-304
MC35063A DC-to-DC Converter Control Circuit 3-218 SN75172 Quad EIA-485 Line Driver with 7-186
MC35071 High-Performance Single-Supply 2-306 Three-State Output
Operational Amplifier SN75173 Quad EIA-485 Line Receiver with 7-188
MC35072 Dual, High-Performance Single-Supply 2-306 Three-State Output
Operational Amplifier SN75174 Quad EIA-485 Line Driver with Three-State 7-186
MC35074 Quad, High-Performance Single-Supply 2-306 Output
Operational Amplifier SN75175 Quad EIA-485 Line Receiver with 7-188
MC35080 High-Speed Decompensated 2-322 Three-State Output
(Avcl ^ 2) JFET Input Operational TCA0372 Dual Power Operational Amplifier 2-356
Amplifier
TCA5600 Universal Microprocessor Power Supply 3-318
MC35081 High-Speed JFET Input Operational 2-322 Controller
Amplifier TCF5600 Universal Microprocessor Power Supply 3-318
MC35084 Quad, High-Speed JFET Input Operational 2-322 Controller
Amplifier TCF6000 Peripheral Clamping Array 10-27
MC35085 Quad, High-Speed Decompensated TDA1085A Universal Motor Speed Controller 4-108
2-322
JFET TDA1085C Universal Motor Speed Controller 4-115
(Avcl ^ 2) Input Operational
Amplifier TDA1185A Triac Phase Angle Controller 4-125
MC35171 Low-Power, Single-Supply Operational 2-270 TDA1524A Stereo Tone Control System 9-161
Amplifier TDA3190P TV Sound System 9-166
MC35172 Dual, Low-Power, Single-Supply 2-270 TDA3301B TV Color Processor 9-169
Operational Amplifier
TDA3303 TV Color Processor 9-169
MC35174 Quad, Low-Power, Single-Supply 2-270 TDA3330 TV Color Processor 9-183
Operational Amplifier
TDA4601 Flyback Converter Regulator Control Circuit 3-330
MC35181 Low-Power JFET-lnput Operational 2-333 TL061 Low-Power JFET-lnput Operational 2-359
Amplifier
Amplifier
MC35182 Dual, Low-Power JFET Input Operational 2-333 TL062 Dual, Low-Power JFET-lnput Operational 2-359
Amplifier
Amplifier
MC35184 Quad, Low-Power JFET Input Operational 2-333 TL064 Quad, Low-Power JFET-lnput Operational 2-359
Amplifier
Amplifier
MC44301 System 4 High-Performance Color TV IF 9-147 TL071 Low-Noise, JFET-lnput Operational 2-367
MC44602 Current Mode Controller 3-303 Amplifier
MC44802 PLL Tuning Circuit With 1 .3 GHz Prescaler 9-153 TL072 Dual, Low-Noise, JFET-lnput Operational 2-367
Amplifier
MC75107 Dual Line Receiver 7-168
TL074 Quad, Low-Noise, JFET-lnput Operational 2-367
MC75108 Dual Line Receiver 7-168 Amplifier
MC75S110 Dual Line Driver 7-173 TL081 JFET Input Operational Amplifier 2-374
MC75125 Seven-Channel Line Receiver 7-178 TL082 Dual, JFET Input Operational Amplifier 2-374
MC75127 Seven-Channel Line Receiver 7-178 TL084 Quad, JFET Input Operational Amplifier 2-374
MC75128 Eight-Channel Line Receiver 7-182 TL431.A Programmable Precision References 5-17
MC75129 Eight-Channel Line Receiver Series
7-182
MCC3334 High Energy Ignition Circuit 10-10 TL494 Switchmode Pulse Width Modulation 3-336
Control Circuit
MCCF3334 High Energy Ignition Circuit 10-10
... .
1-6
ALPHANUMERIC INDEX - CONTINUED
Device Device
Number Function Page Number Function Page
TL594 Switchmode Pulse Width Modulation 3-347 UC3845 High-Performance Current Mode Controller 3-377
Control Circuit 7-41
ULN2001A Peripheral Driver Array
TL780 Three-Terminal Positive Voltage Regulator 3-358 7-41
ULN2002A Peripheral Driver Array
UAA1016B Zero Voltage Controller 4-134 7-41
ULN2003A Peripheral Driver Array
UAA1041 Automotive Direction Indicator 10-31
ULN2004A Peripheral Driver Array 7-41
Number" being searched for are not included in this Cross Reference table. Please refer to
the Alphanumeric Index on pages 1-1 to 1-6.
1-8
CROSS REFERENCE - CONTINUED
1-10
CROSS REFERENCE - CONTINUED
Number" being searched tor are not included in this Crass Reference table. Please refer to
the Alphanumeric Index on pages 1-1 to 1-6.
1-14
CROSS REFERENCE - CONTINUED
Number" being searched for are not included in this Cross Reference table. Please refer to
theAlphanumeric Index on pages 1-1 to 1-6.
Part Number Replacement Replacement Page Part Number Replacement Replacement Page
1-24
P
LM217K 3-21
(IA702DC MC1733C 2-162
UA217UV
MC1455U 11-5 U.A702DM MC1733 2-162
HA2240DC
MC1455P1 11-5 U.A702FM MC1733 2-162
|iA2240PC
s 1-25
CROSS REFERENCE - CONTINUED NOTE: All Motorola Direct Replacement" devices which have part numbers identical'to the "Part
Number" being searched for are not included in this Cross Reference table. Please refer to
the Alphanumeric Indexon pages 1-1 to 1-6.
LM317T 3-21
HA78M05UC MC78M05CT 3-154
HA78GU1C
LM317T 3-21 |W8M06CKC MC78M06CT 3-154
JW8GUC
MC7805CK 3-135 |IA78M06CKD MC78M06CT 3-154
HA78H05KC
MC78L05ACG 3-148 |iA78M06UC MC78M06CT 3-154
|iA78L05ACJG
Amplifiers
and Comparators
Selector Guide
Operational Amplifiers 2-2
High Frequency Amplifiers 2-8
In Brief . .
Miscellaneous Amplifiers 2-9
Comparators 2-10
For over two decades, Motorola has continually
refined and updated integrated circuit technologies, 2-11
Alphanumeric Listing
analog circuit design techniques and processes in
response to the ever-expanding needs of the market
place. The enhanced performance of present day oper- Related Application Notes 2-14
ational amplifiers and comparators have come into
being through innovative application of these technol- Data Sheets 2-15
ogies, designs and processes. Some early designs,
though of inferior performance by today's standards,
are still available but are rapidly giving way to the new,
higher performance operational amplifier and compar-
ator circuits. Motorola has pioneered in JFET inputs,
low temperature coefficient input stages, Miller loop
compensation, all NPN output stages, dual-doublet fre-
quency compensation and analog "in-the-package"
trimming of resistors to produce superior high perfor-
mance operational amplifiers and comparators, oper-
ating in many cases from a single supply, with low input
offset, low noise, low power, high output swing, high
slew rate and high gain-bandwidth product at reason-
able cost to the customer.
Present day operational amplifiers and comparators
find application in all segments of society to include
motor controls, instrumentation, aerospace, automo-
tive, telecommunication, medical and consumer
products.
Amplifiers and
Comparators
Operational Amplifiers
Motorola offers a broad line of bipolar operational in a variety of temperature ranges and package styles.
amplifiers to meet a wide range of applications. From Most devices may be obtained in unencapsulated
low-cost industry-standard types to high precision cir- "chip" form as well. For price and delivery information
cuits, the span encompasses a large range of perfor- on chips, please contact your Motorola Sales Repre-
mance capabilities. These linear integrated circuits are sentative or Distributor.
available as single, dual, and quad monolithic devices
Noncompensated
Commercial Temperature Range (0C to +70C)
LM301A 0.25 7.5 10 50 25 1.0 0.5 3.0 18 General Purpose H, N/626, J/693
LM308 7.0 7.5 15 1.0 25 1.0 0.3 3.0 18 Precision H, N/626
LM308A 7.0 0.5 5.0 1.0 80 1.0 0.3 3.0 18 Precision H, N/626
MC1439 1.0 7.5 15 100 15 2.0 4.2 6.0 18 High Slew Rate G/601, P1
MC1709C 1.5 7.5 15 500 15 1.0 0.3 3.0 18 General Purpose G/601, P1, U
MC1748C 0.5 6.0 15 200 20 1.0 0.5 3.0 18 General Purpose G/601, P1, U
BW SR Supply
IB VlO TCviO iio AV ot (A v = 1) (A V = D Voltage
MA mV tiMTC nA V/mV MHz Vl/is V Package
Device Max Max Typ Max Min Typ Typ Min Max Description Suffix
Internally Compensated
Commercial Temperature Range (0C to + 70C)
LF351 200 pA 10 10 100 pA 25 4.0 13 5.0 18 JFET Input N/626
LF355 200 pA 10 5.0 50 pA 50 1.0 5.0 5.0 18 JFET Input H/601, J/693
LF355B 100 pA 5.0 5.0 20 pA 50 2.5 5.0 5.0 22 JFET Input H/601, J/693
LF356 200 pA 10 5.0 50 pA 50 2.0 15 5.0 18 JFET Input H/601, J/693
LF356B 100 pA 5.0 5.0 20 pA 50 5.0 12 5.0 22 JFET Input H/601, J/693
LF357 200 pA 10 5.0 50 pA 50 3.0 75 5.0 18 Wideband FET Input H/601, J/693
LF357B 100 pA 5.0 5.0 20 pA 50 20 50 5.0 22 JFET Input H/601, J/693
LF441C 100 pA 5.0 10 50 pA 25 2.0 6.0 5.0 18 Low Power JFET Input N/626
LM11C 100 pA 0.6 2.0 10 pA 250 1.0 0.3 3.0 20 Precision H, N/626, J/632,
J -8/693
LM11CL 200 pA 5.0 3.0 25 pA 50 1.0 0.3 3.0 20 Precision H, N/626, J/632,
J -8/693
LM307 0.25 7.5 10 50 25 1.0 0.5 3.0 18 General Purpose N/626
MC1436 0.04 10 12 10 70 1.0 2.0 15 34 High Voltage G/601, U
MC1456 0.03 10 12 10 70 1.0 2.5 3.0 18 High Performance G/601, PI, U
MC1733C 30 5.0 mA 80 90 4.0 8.0 Differential Wideband G/601, L, P/646
Video Amp
MC1741C 0.5 6.0 15 200 20 1.0 0.5 3.0 18 General Purpose G/601, PI, U
MC1741SC 0.5 6.0 15 200 20 1.0 10 3.0 18 High Slew Rate G/601, P1
MC1776C 0.003 6.0 15 3.0 100 1.0 0.2 1.2 18 /iPower, Programmable G/601, P1, U
MC3476 0.05 6.0 15 25 50 1.0 0.2 1.5 18 Low Cost G/601, P1, U
fiPower, Programmable
MC34001 200 pA 10 10 100 pA 25 4.0 13 5.0 18 JFET Input G/601, P/626, U
MC34001B 200 pA 5.0 10 100 pA 50 4.0 13 5.0 18 JFET Input G/601, P/626, U
MC34071 0.5 5.0 10 75 25 4.5 10 + 3.0 + 44 High Performance, P/626, U
MC34071A 500 nA 3.0 10 50 50 4.5 10 + 3.0 + 44 Single Supply P/626, U
MC34080 200 pA 1.0 10 100 pA 25 16 55 5.0 22 Decompensated P/626, U
MC34080A 200 pA 0.5 10 100 pA 50 16 55 5.0 22 MC34081 for A v s=2 P/626, U
MC34081 200 pA 1.0 10 100 pA 25 8.0 30 5.0 22 High Speed, JFET Input P/626, U
MC34081A 200 pA 0.5 10 100 pA 50 8.0 30 5.0 22 High Speed, JFET Input P/626, U
MC34181 0.1 nA 2.0 10 0.05 25 4.0 10 2.5 18 Low Power JFET Input P/626
OP-27F 0.055 0.06 0.3 50 1000 8.0 2.8 4.0 22 Low Noise, Precision P/626
OP-27G 0.08 0.1 0.4 75 700 8.0 2.8 4.0 22 Low Noise, Precision P/626
TL061AC 200 pA 6.0 10 100 pA 4.0 2.0 6.0 2.5 18 Low Power JFET InDut P/626
TL061C 200 pA 15 10 200 pA 4.0 2.0 6.0 2.5 18 Low Power JFET Input P/626
TL071AC 200 pA 6.0 10 50 pA 50 4.0 13 5.0 18 Low Noise, JFET Input P/626, JG
TL071C 200 pA 10 10 50 pA 25 4.0 13 5.0 18 Low Noise, JFET Input P/626, JG
TL081AC 200 pA 6.0 10 100 pA 50 4.0 13 5.0 18 JFET Input P/626, JG
TL081C 400 pA 15 10 200 pA 25 4.0 13 5.0 18 JFET Input P/626, JG
BW SR Supply
'IB VlO TCviO '10 AV ol (A v = 1) (A v =1) Voltage
MA mV Atvrc nA V/mV MHz V/^s V Package
Device Max Max Typ Max Min Typ Typ Min Max Description Suffix
Internally Compensated
Military Temperature Range ( - 55C to + 125C)
MC1536 0.02 5.0 10 3.0 100 1.0 2.0 15 40 High Voltage G/601, U
MC1556 0.015 4.0 10 2.0 100 1.0 2.5 3.0 22 High Performance G/601, 693/U
MC1733 0.2 ~ 3.0 nA 90 90 4.0 8.0 Differential Wideband G/603, L
Video Amp
MC1741 0.5 5.0 15 200 50 1.0 0.5 3.0 22 General Purpose G/601, U
MC1741S 0.5 5.0 15 200 50 1.0 10 3.0 22 High Slew Rate G/601, U
MC1776 0.0075 5.0 15 3.0 200 1.0 0.2 1.2 18 jitPower,Programmable G/601, L
MC35001 100 pA 10 10 100 pA 25 4.0 13 5.0 22 JFET Input G/601, U
MC35001B 100 pA 5.0 10 50 pA 50 4.0 13 5.0 22 JFET Input G/601, U
MC35071 0.5 5.0 10 75 25 4.5 10 + 3.0 + 44 High Performance, U
MC35071A 500 nA 3.0 10 50 50 4.5 10 + 3.0 + 44 Single Supply U
MC35080 200 pA 1.0 10 100 pA 25 16 55 5.0 22 Decompensated U
MC35080A 200 pA 0.5 10 100 pA 50 16 55 5.0 22 MC35081 for A v s=2 U
MC35081 200 pA 1.0 10 100 pA 25 8.0 30 5.0 22 High Speed, JFET Input U
MC35081A 200 pA 0.5 10 100 pA 50 8.0 30 5.0 22 High Speed, JFET Input U
MC35171 0.1 4.5 10 20 50 1.8 2.1 + 3.0 + 44 Low Power, Single U
Supply
MC35181 0.1 nA 2.0 10 0.05 25 4.0 10 2.5 18 Low Power JFET Input U
OP-27B 0.055 0.06 0.3 50 1000 8.0 2.8 4.0 22 Low Noise, Precision z
OP-27C 0.08 0.1 0.4 75 700 8.0 2.8 4.0 22 Low Noise, Precision z
TL061M 200 pA 6.0 10 100 pA 4.0 2.0 6.0 2.5 18 Low Power JFET Input JG
TL081 200 pA 9.0 10 100 pA 25 4.0 13 5.0 18 JFET Input JG
Noncompensated
Commercial Temperature Range (0C to + 70C)
MCI 437 500 3.0 18 Dual MC1709
Military Temperature Range |-55C to +125C)
|
MC1537 | 0.5 | 5T0" Dual MC1709
Internally Compensated
Commercial Temperature Range (0C to + 70C)
LF353 200 pA 10 10 100 pA 25 4.0 13 5.0 18 JFET Input N/626
LF442C 100 pA 5.0 10 50 pA 25 2.0 6.0 5.0 18 Low Power JFET Input N/626
LM358 0.25 6.0 7.0 50 25 1.0 0.6 1.5 18 Single Supply H, N/626, J/693
+ 3.0 + 36 (Low Power
Consumption)
LM833 1.0 5.0 2.0 200 31.6 15 7.0 2.5 18 Dual, Low Noise, Audio N/626
MCI 458 0.5 6.0 10 200 20 1.1 0.8 3.0 18 Dual MC1741 G/601, P1, U
MC1458C 0.7 10 10 300 20 1.1 0.8 3.0 18 Dual General Purpose G/601, P1
MC1458S 0.5 6.0 10 200 20 1.0 10 3.0 18 High Slew Rate G/601, P1, U
MC1747C 0.5 6.0 10 200 25 1.0 0.5 3.0 18 Dual MC1741 G/603, L, P2
MC3458 0.5 10 7.0 50 20 1.0 0.6 1.5 18 SplitSupplies G/601, PI, U
+ 3.0 + 36 Single Supply
(Low Crossover
Distortion)
BW SR Supply
"IB V|0 TC V IO l|0 Avol (Av = 1) (A v = 1| Voltage
MA mV mV/C nA V/mV MHz V//is V Package
Device Max Max Typ Max Min Typ Typ Min Max Description Suffix
BW SR Supply
'IB V|0 TC V |0 ho A V ol (A v = 1) (A v = 1) Voltage
/"A mV (ivrc nA V/mV MHz V//*s V Package
Device Max Max Typ Max Min Typ Typ Min Max Description Suffix
Internally Compensated
Commercial Temperature Range (0C to + 70C)
LF347 200 pA 10 10 100 pA 25 4.0 13 5.0 18 JFET Input N/646
LF347B 200 pA 5.0 10 100 pA 50 4.0 13 5.0 18 JFET Input N/646
LF444C 100 pA 10 10 50 pA 25 2.0 6.0 5.0 18 Low Power JFET Input N/646
LM324 0.25 6.0 7.0 50 25 1.0 0.6 1.5 16 Low Power J/632, N/646
+ 3.0 + 32 Consumption
LM348 0.2 6.0 50 25 1.0 0.5 3.0 18 Quad MC1741 J/632, N/646
MC3401/ 0.3 1.0 5.0 0.6 1.5 18 Norton Input J/632, N/646
LM3900 + 3.0 + 36
MC3403 0.5 10 7.0 50 20 1.0 0.6 1.5 18 No Crossover L, P/646
+ 3.0 + 36 Distortion
MC4741C 0.5 6.0 15 200 20 1.0 0.5 3.0 18 Quad MC1741 L, P/646
MC34004 200 pA 10 10 100 pA 25 4.0 13 5.0 18 JFET Input L, P/646
MC34004B 200 pA 5.0 10 100 pA 50 4.0 13 5.0 18 JFET Input L, P/646
MC34074 0.5 5.0 10 75 25 4.5 10 + 3.0 + 44 High Performance, L, P/646
MC34074A 500 nA 3.0 10 50 50 4.5 10 + 3.0 + 44 Single Supply L, P/646
MC34084 200 pA 12 10 100 pA 25 8.0 30 5.0 22 High Speed, JFET Input P/646
MC34084A 200 pA 6.0 10 100 pA 50 8.0 30 5.0 22 High Speed, JFET Input P/646
MC34085 200 pA 12 10 100 pA 25 16 55 5.0 22 Decompensated P/646
MC34085A 200 pA 6.0 10 100 pA 50 16 55 5.0 22 MC34084 for A v s=2 P/646
MC34184 0.1 nA 10 10 0.05 25 4.0 10 2.5 18 Low Power JFET Input P/646
TL064AC 200 pA 6.0 10 100 pA 4.0 2.0 6.0 2.5 18 Low Power JFET Input N/646
TL064C 200 pA 15 10 200 pA 4.0 2.0 6.0 2.5 18 Low Power JFET Input N/646
TL074AC 200 pA 6.0 10 50 pA 50 4.0 13 5.0 18 Low Noise JFET Input J/632, N/646
TL074C 200 pA 10 10 50 pA 25 4.0 13 5.0 18 Low Noise JFET Input J/632, N/646
TL084AC 200 pA 6.0 10 100 pA 50 4.0 13 5.0 18 JFET Input J/632, N/646
TL084C 400 pA 15 10 200 pA 25 4.0 13 5.0 18 JFET Input J/632, N/646
LM224 0.15 5.0 7.0 30 50 1.0 0.6 1.5 16 Split or Single J/632, N/646
+ 3.0 + 32 Supply OP Amp
LM248 0.2 6.0 50 25 1.0 0.5 3.0 18 Quad MC1741 J/632, N/646
BW SR Supply
IB V|0 TCviO '10 Av0 |
(A v = 1) (A v = 1) Voltage
MA mV juV/C nA V/mV MHz Vl/is V Package
Device Max Max Typ Max Min Typ Typ Min Max Description Suffix
amplifiers for radio and TV receivers, and transmitter circuit can function as a high pass, low pass, or band
power output control. Many uses will be found in med- pass filter. This feature makes the circuit ideal for use
ical instrumentation, remote monitoring, video/graph- as a video or pulse amplifier in communications, mag-
ics processing, and a variety of communications equip-
netic memories, display and video recorder systems.
ment. The family of parts using the same basic die MC1733/MC1733C
Video Amplifier
(identical circuit with slightly different test parameters) and output amplifier provides three
Differential input
is listed in the following table. fixed gain options with bandwidth to 120 MHz. External
MCI 545/1 445 Gated 2-Channel Input resistor permits any gain setting from 10 to 400 V/V.
Extremely fast rise time (2.5 ns typ) and propagation
and output amplifier with gated 2-
Differential input
delay time (3.6 ns typ) makes this unit particularly useful
channel input for a wide variety of switching purposes.
as pulse amplifier in tape, drum, or disc memory read
Typical 50 MHz bandwidth makes it suitable for high
applications.
CMOS Bipolar
MC14573: Quad Programmable Operational Amplifier MC3505/MC3405: Dual Operational Amplifier
MC 14574: Quad Programmable Comparator and Dual Comparator
MC14575: Dual Programmable Operational This device contains two Differential Input Opera-
Amplifier and Dual Programmable tional Amplifiers and two Comparators each set capable
Comparator of single supply operation. This operational amplifier-
These low power devices are designed for applica- comparator circuit will find its applications as a general
tions such as active voltage reference circuits,
filters, purpose product for automotive circuits and as an in-
function generators, oscillators, and limit set alarms. dustrial "building block."
Bipolar
CMOS
MC14573
MC14574 0.001 30 0.0001 1.0 10* 3.0 to 15 1.5 to 7.5 D/751B, P/648
MC14575
Propagation Delay
VOLTAGE GAIN versus FREQUENCY (R L = 16 OHMS)
Gain Option #1 AV = 36 V7V
S
Power Amplifiers Variable Gain z
30
^
'
Gain Option #2 18 V7V
III
III
o in
MC1554G TA = -55 to + 125C, Case 603C Gain Option #3 10 V7V,
ffi
o |
nt
One-watt Power Amplifier for single or split supply > 1 J]
tTj
i
pO = 1.0WRU/IS
It RL = 16 OHMS [
operation. Typical voltage gain of 10, 18, or 33 V7V with > 5
V(:c = 16 tl
* 'I II ...
0.4% THD. 1.0 k 2.0 k 5.0 k 10 k
I
f, FREQUENCY (Hz)
Single
BIPOLAR
LM111 0.1 3.0 0.01 200 k 8.0 200 + 15, -15 With strobe, will operate -55 to +125 H, J-8
LM211 0.1 3.0 0.01 200 k 8.0 200 + 15, -15 from single supply -25 to +85 H, J-8
LM311 0.25 7.5 0.05 200 k 8.0 200 + 15, -15 to +70 H, N/626, J-i
CMOS
MC14578 1.0 pA 50 + 3.5 to +14 Requires only 10 /xA from - 30 to + 70 D/751B,
single-ended supply P/648
Dual
BIPOLAR
LM193 0.1 5.0 0.025 200 k 6.0 1300 1.5 to Designed for single or split -55 to +125 H
LM193A 0.1 2.0 0.025 200 k 6.0 1300 18 or supply operation, input -55 to +125 H
LM293 0.25 5.0 0.05 200 k 6.0 1300 + 3.0 to +36 common mode includes -25 to +85 H
LM293A 0.25 2.0 0.05 200 k 6.0 1300 ground (negative supply) -25 to +85 H
LM393 0.25 5.0 0.05 200 k 6.0 1300 to +70 H, N/626
LM393A 0.25 2.0 0.05 200 k 6.0 1300 to +70 H, N/626
LM2903 0.25 7.0 0.05 200 k 6.0 1500 - 40 to + 85 N/626
MC3405 0.5 10 0.05 200 k 6.0 1300 1.5 to This device contains two to +70 L/632, P/646
MC3505 0.5 5.0 0.05 200 k 6.0 1300 7.5 or op amps and two -55 to +125 L/632
+ 3.0 to 15 comparators in a single
package
CMOS
MC14575 0.001 30 0.0001 20 k 3.0 1.5 to This device contains two - 40 to + 85 P/648
7.5 or op amps and two D/751B
+ 3.0 to 15 comparators in a single
package
Quad
BIPOLAR
LM139 0.1 5.0 0.025 200 k 6.0 1300 1.5 to Designed for single or split -55 to +125 J
LM139A 0.1 2.0 0.025 200 k 6.0 1300 18 or supply operation, input -55 to +125 J
LM239 0.25 5.0 0.05 200 k 6.0 1300 + 3.0 to +36 common mode includes - 25 to + 85 J, N/646
LM239A 0.25 2.0 0.05 200 k 6.0 1300 ground (negative supply) -25 to+85 J, N/646
LM339 0.25 5.0 0.05 200 k 6.0 1300 to +70 J, N/646
LM339A 0.25 2.0 0.05 200 k 6.0 1300 to +70 J, N/646
LM2901 0.25 7.0 0.05 100 k 6.0 1300 - 40 to + 85 N/646
MC3302 0.5 20 0.5 30 k 6.0 1300 - 40 to + 85 P/646
MC3430 40 6.0 1.0 Typ 1.2 k 16 33 + 5.0, -5.0 High speed comparator/ to +70 L, P
MC3431 40 10 1 .0 Typ 1.2 k 16 33 + 5.0, -5.0 sense-amplifier to +70 L, P
MC3432 40 6.0 1.0 Typ 1.2 k 16 40 + 5.0, -5.0 to +70 L, P
MC3433 40 10 1 .0 Typ 1.2 k 16 40 + 5.0, -5.0 to +70 L, P
CMOS
MC14574 0.001 30 0.0001 20 k 3.0 1.5 to Externally programmable - 40 to + 85 P/648
7.5 or power dissipation with one D/751B
+ 3.0 to +15 or two resistors
Miscellaneous Amplifiers
Device Function Page
MC1454G 1-Watt Power Amplifier 2-123
MC1554G 1-Watt Power Amplifier 2-123
MC3405 Dual Operational Amplifier plus Dual Voltage Comparator 2-214
MC3505 Dual Operational Amplifier plus Dual Voltage Comparator 2-214
TCA0372 Dual Power Operational Amplifier 2-356
COMPARATORS
Device Function Page
LM111 High Performance Voltage Comparator 2-54
LM139.A Quad Single Supply Comparators 2-66
LM193,A Dual Comparators 2-82
LM211 High Performance Voltage Comparator 2-54
LM239,A Quad Single Supply Comparators 2-66
LM293,A Dual Comparators 2-82
LM311 High Performance Voltage Comparator 2-54
LM339,A Quad Single Supply Comparators 2-66
LM393.A Dual Comparators 2-82
LM2901 Quad Single Supply Comparator 2-66
LM2903 Dual Comparator 2-82
MC1414 Dual Differential Voltage Comparator 2-97
MC1514 Dual Differential Voltage Comparator 2-97
MC3302 Quad Single Supply Comparator 2-66
MC3405 Dual Operational Amplifier plus Dual Voltage Comparator 2-214
MC3430 High Speed Quad Comparator 2-222
MC3431 High Speed Quad Comparator 2-222
MC3432 High Speed Quad Comparator 2-222
MC3433 High Speed Quad Comparator 2-222
MC3505 Dual Operational Amplifier plus Dual Voltage Comparator 2-214
FAMILY OF BIFET
JFET INPUT OPERATIONAL AMPLIFIERS OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
These low cost JFET input operational amplifiers combine two
state-of-the-art linear technologies on a single monolithic inte-
grated circuit. Each internally compensated operational amplifier
has well matched high voltage JFET input devices for low input N SUFFIX
offset voltage. The BIFET technology provides wide bandwidths PLASTIC PACKAGE
and fast slew rates with low input bias currents, input offset cur- CASE 626
rents, and supply currents. (LF351, LF353 0nly)
These devices are available in single, dual and quad operational
amplifiers which are pin-compatible with the industry standard
MC1741, MC1458, and the MC3403/LM324 bipolar devices. D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-8)
Input Offset Voltage of 5.0 mV Max (LF347B) (LF351, LF353 0nly)
-18
V rjjPV
VEE +
NOTES: (continued)
3. Input bias currents of JFET input op amps approximately double for every 10C rise in junct on temperature. To maintain junction temperatures as
close to ambient as is possible, pulse techniques are utilized during test.
MONOLITHIC JFET
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
MONOLITHIC JFET INPUT INTEGRATED CIRCUITS
OPERATIONAL AMPLIFIERS
These internally compensated operational amplifiers incorporate
highly matched JFET devices on the same chip with standard
The JFET devices enhance the input charac- H SUFFIX
bipolar transistors.
METAL PACKAGE
teristics of these operational amplifiers by more than an order
CASE 601
of magnitude over conventional amplifiers.
This series of op amps combines the low current characteristics
typical of FET amplifiers with the low initial offset voltage and
offset voltage stability of bipolar amplifiers. Also, nulling the offset
voltage does not degrade the drift or common mode rejection.
- (Top View)
Low Input Offset Current 3.0 pA
Low Input Offset Voltage - 1 .0 mV
Temperature Compensation of Input Offset Voltage
3.0 AtV/C
MAXIMUM RATINGS
LF355B/
Rating Symbol 356B/357B LF3S5/356/357 Unit
Supply Voltage vcc + 22 + 18 V
VEE -22 -18
Differential Input Voltage V|D 40 30 V
Input Voltage Range (Note 1) V IDR 20 16 V
Output Short-Circuit Duration TS Continuous
Operating Ambient Temperature Range TA Oto +70 c
Operating Junction Temperature Tj 150 c
Storage Temperature Range T stg -65 to +150 c
Note 1. Unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply
voltage.
CIRCUIT SCHEMATIC
LF355B/6B/7B LF355/6/7
- 3.0 20 - 3.0 50 PA
(Tj =s 70C) 1.0 2.0 nA
Input Bias Current (Vqm = > Note 3 'IB
(Tj = 25C)
( >
- 30 100 - 30 200 PA
(Tj =s 70C) 5.0 8.0 nA
Input Resistance (Tj = 25C) n
1012 1012 n
Large Signal Voltage Gain AVOL V/mV
(Vo = 10 V, R[_ = 2.0 k, Vqc = 15 V,
V EE = -15 V)
(Ta = 25C) 50 200 25 200
(0CTa +70C) 25 15
Characteristic Symbol Min Typ Max Min Typ Max Min Typ Max Unit
Input Capacitance Ci
- 3.0 - - 3.0 - - 3.0 - PF
(1) Unless otherwise specified, the absolute maximum negative input tudes increasing or decreasing simultaneously, in accordance with
voltage is equal to the negative power supply. common practice.
(2) The temperature coefficient of the adjusted input offset voltage (5) The Min. slew rate limits apply for the LF356B and the LF357B, but
changes only a small amount (0.5 jtV/C typically) for each mV of do not apply for the LF356 or LF357.
adjustment from its original unadjusted value. Common-mode re- (6) Settling time is defined here, for a unity gain inverter connection
jection and open loop voltage gain are also unaffected by offset using 2.0 k resistors for the LF355/6. It is the time required for the
adjustment. error voltage (the voltage at the inverting input pin on the amplifier)
(3) The input bias currents approximately double for every 10C rise in to settle to within 0.01% of its final value from the time a 10 V step
junction temperature, Tj. Due to limited test time, the input bias input is applied to the inverter. For the LF357, Av = - 5.0, the feed-
currents are correlated to junction temperature. Use of a heat sink back resistor from output to input is 2.0 k and the output step is 10
is recommended if input bias current is to be kept to a minimum. V (see settling time test circuit).
(4) Supply voltage rejection ratio is measured for both supply magni-
2 V
- V CC = 5V,V EE = -5V
LF356/7
0.1 1
= + 15 V
vcc
V EE = -15V
LF3E 6/7
TA =
'5
25C
Free Air
30
R L = 2k
RL k C3 = 25C
lA
5
LF356f7
< 20
With Heat Sink
lf; 55 >
Free Air
~ o
10
o
5 with
I Heat Sink
4.0
1-
cc
3.0
> TC = 25C
a.
3
2.0 TC = 2 5C_
V CC V EE SUPPLY VOLTAGE
, , ( VOLTS) V cc V EE SUPPLY VOLTAGE (V0LTS)
, ,
< tzj
o
-5.0 -10 -15 -20 -25 -30 -35 -40 5.0 10 15 20 25 30 35 40
FIGURE 9
POSITIVE COMMON-MODE FIGURE 10
NEGATIVE COMMON-MODE
INPUT VOLTAGE LIMIT INPUT VOLTAGE LIMIT
TC = 25C
15
10
" ?5C
TA =
12
&
1.0 10
V cc V EE SUPPLY
, , VOLTAGE (t VOLTS) RL . OUTPUT LOAD RESISTANCE (kO)
LF355
v cc = 10 V, v EE = -
10 V
LF356 |
6.0
vcc = 15 V, V EE = 15V V CC =10V,V EE = 10V
^V CC =15V,V EE = 15V
-55 -35 -15 5.0 25 45 65 85 105 125 -55 -35 -15 5.0 25 45 65 85 105 !25
T A AMBIENT
, TEMPERATURE (C) TA ,
AMBIENT TEMPERATURE (C)
- TA = 25C
LF355 > V CC = 15V
> 10
. TA
I
= 25C
I
H
10m J /
m 1
10 rr V //
1
V CC 15V
T
-
= 1 mV ii
Ve E--' 5.0
<
< ii i *
.
1 mV
> >
1 mV S in, V
s
mV "V,
g -5.0
V
On V
10 1
*\
0.5 1.0 2.0
o
0.5 1.0
^ 2.0
t
s ,
SETTLING TIME M s) ( t ,
SETTLING TIMERS)
s
15 V 1 "0
v EE = -15V - v t C= 15
S 90 E = -1E
LF356/7
<
^ .
70
o
>
LF355
S 50
o
5 30
o
o 10
<
_ -10 ]
i
T ^w
LF355
"y ^> -*JV*-.
P hase
J
vcr
vee
= 16
= -1 5V
V
o
100
%
Gain
_ -5
<
i
oa
|
2k
s ,0
f-10
< 3
u-15
2
K A v =1 iLF355-
i i
-20 V CC =15V .
in
-e: Vcc = -i5 v:
-25 - Av = 1
-
-T * = 2 5C
~x r
'
-30 1 III
" "
1 III ttl 1 1 1
-35 | | 1 1
10 k 100 k 1M
10 20
f, FREQUENCY (MHz)
f, FREQUENCY (Hz)
125
v cc 15V S 10
10 phn = 100 _ = Av =100
5.0
V E[ = -15V
V
v
=10
Gain
J 50 g
^-5.0 25 o A..= 1
..
2k
j-10 o a
-15 -25
|
-20
20
j -50"
~T>-
4^
-25 -75 r +!!!
- + s^ -100 +
'
&>:::
-30
-35
1 "
-125
X...
-150 1 1 I I I I i IUIII 1. 1. 1 1
-40 | | 1 1
10 20 100 k
Ri in
60 S llllll
<= Mill
25 I
: 15 c
2 k
-25
| 10
5.0
-5.0 (~)
* I
-50
-75
-100
|
a
r
J
3> -/V^r-t
5
-10
-15
_L
Jf-
-125
-150
LF357
" II II
-20 I -175
1
1
1
1
1
1
I
III M I
I
I
I
Mil
I
llllll
I
II
I
II
I I
II
I
10 k 100 k
RL = 2k
1
"^ 25C
TA = 25C 74 -
v cc = 15V
V CC =15V - V EE = -15 V
V EE = -15 V RL = 2k
?n
A,= 1
LF355
J <r/ Dist.
IB -3t_ LF3 56
LF357 -i
LF355/6 ^V v lf: 57
n
10 100 1k 10 k 100 k 1M 10 M 100 k
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
o J
V CC =15V <
V EE
Positive
80 <^ LF35B/7
< 60
Negative X
LF3
> 40 -
N
lf; 55
^\.
,
n I
I l I
25C
= 15 V
-- V EE = -15 V
\^ LF355
"Ss
LF356/7 -
~7TT |
500 Ik 50 k
LF355/6 R = 5.0 k
LF357 R = 1.25 k
T | 0.01 MF
VEE
Due to a unique output stage design these amplifiers have the .ir.^v^
ability to drive large capacitive loads and still maintain stability.
C L (max) =0.01MF.
Overshoot < 20% For distortion < 1% and a 20 Vp-p VQ ut
Settling time (t s ) = 5.0 Ms swing, power bandwidth is: 500 kHz.
FIGURE 33 INPUT OFFSET VOLTAGE ADJUSTMENT FIGURE 34 SETTLING TIME TEST CIRCUIT
vCc
10 V j
1 2 k, 0.1/
*A = -5 for LF357
FIGURE 35 NONINVERTING UNITY GAIN FIGURE 36 INVERTING UNITY GAIN FOR LF357
OPERATION FOR LF357
(27r)(5 MHz)
B2 + Re
A V(DC) = 1
f-3dB 5MHz
TYPICAL APPLICATIONS
FIGURE 37 WIDE BW, LOW NOISE,
LOW DRIFT AMPLIFIER FIGURE 38 ISOLATING LARGE CAPACITIVE LOADS
R2 5. 1 k
RL i J_c L
1 k ? T~ 0.5 fiF
V I
Overshoot 6%
t
s =10us
When dr iving large C L the V out slew
, rate is determined by C L
FIGURE 39
8-BIT D/A WITH OUTPUT CURRENT
FIGURE 40 PRECISION CURRENT MONITOR
TO VOLTAGE CONVERSION
vccf
13 O
A4(
MC1408L-8
A5 <
A6 <
A7 <
V = 5 R1/R2 (V/mA of l
3 s)
v (n (
[
+ + + + + + * LowV|
R 14 I 2 4 8 16 32 64 128 256
Adjust V ref R14 or R Q so that Vq with
,
,12
I
1k 4 8 16 32 64 128 256 J
FIGURE 42 HIGH IMPEDANCE, LOW DRIFT
., 255 l
= 10V = 9.961 V INSTRUMENTATION AMPLIFIER
(256j
O v ou
*v Clear
Polycarbonate or
Polystyrene Capacitor
V ut = R3/R[2R2/R1 + 1]
Design Example: 1 00 Second Timer AV, Vg + 2 V s Vj n common-mode s Vqc
VR =10V C = 1 MP R3=R4=144M System V|o Adjusted via A2 V|o Adjust
Trim R3 to Boost up CMRR to 120 dB
R6 = 20 k R5=2k R1 = R2=1k
MOTOROLA LF411C
SEMICONDUCTOR LF412C
TECHNICAL DATA
SINGLE/DUAL JFET
OPERATIONAL
AMPLIFIER
LOW OFFSET, LOW
DRIFT JFET INPUT
OPERATIONAL AMPLIFIER SILICON MONOLITHIC
INTEGRATED CIRCUIT
Through innovative design concepts and precision matching
this monolithic high speed JFET input operational amplifier family
offers very low input offset voltage as well as low temperature
coefficient of input offset voltage. The amplifier requires less than
3.4 mAper amplifier of supply current yet exhibits greater than
2.7 MHzof gain bandwidth product and more than 8.0 V//xs slew
rate. Through the use of JFET inputs the amplifier has very low
input bias currents and low input offset currents. The amplifier
utilizes industry standard pinouts which afford the user the oppor-
tunity to directly upgrade circuit performance without the need
for redesign.
The LF411C and LF412C are available in the industry standard
N SUFFIX
plastic 8-pin DIPand SO-8 surface mount packages, and specified
PLASTIC PACKAGE
over the commercial temperature range.
CASE 626
Low Input Offset Voltage: 2.0 mV Max (Single)
3.0 mV Max (Dual)
c
Low T.C. of Input Offset Voltage: 10 mV/ C
Low Input Offset Current: 20 pA
Low Input Bias Current: 60 pA
Low Input Noise Voltage: 18 nV/vfiz D SUFFIX
Low Input Noise Current: 0.01 pA/VHz PLASTIC PACKAGE
CASE 751
Low Total Harmonic Distortion: 0.05%
(SO-8)
Low Supply Current: 2.5 mA
High Input Resistance: 10 12 U
Wide Gain Bandwidth: 8.0 MHz
High Slew Rate: 25 V//u.s (Typ) LF411C
Fast Settling Time: 1.6 /us (to within 0.01%)
Offset Null jT FJnc
[T 3 v cc
"
Invt Input
LF412C
W v cc
Output 1 (T l]
ORDERING INFORMATION TJ Output 2
Test Temperature Inputs
Op Amp 1
Range Package (I
Function
Single
Device
LF411CD 0C to + 70C SO-8
Plastic DIP
v eeE kl 3 Inputs 2
LF411CN
Top View)
I
(Dual,
Dual LF412CD 0C to + 70C SO-8
LF412CN Plastic DIP
I
LF411C,LF412C
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltages v C c. + 18 Volts
!Vee'
Input Differential Voltage Range (Note V IDR -30
1) Volts
Input Voltage Range (Note 1) V|R + 15 Volts
Output Short-Circuit Duration (Note 2) ts Indefinite Seconds
Maximum Junction Temperature Tj + 150 C
Operating Ambient Temperature Range TA to 70 C
Thermal Resistance LF411CN 412CN R HJA 100 C Watt
(Junction to Ambient) LF41 1CD 412CD 180
Storage Temperature T stg 60 to - 1 50 C
Maximum Power Dissipation PD (Note 2) mW
NOTES:
1. Input voltages should not exceed Vfjc or
V^E
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not
exceeded.
3. Measured with Vqc and Vf simultaneously varied.
Output
* I
Bias Circuitry
Common to All
Amplifiers
2-28
1
LF411C, LF412C
LF41 TA
1 = 25 C 0.6 200 PA
TA = 0C to 70C
4.0 nA
LF412 T A - 25C - 0.5 200 PA
TA = 0C to 70C 4.0 nA
-1.0 RL V
Output Voltage Swing (V| D = V, - 10 kit)
LF411 v - 12 13.9
-14.7 -12
LF412 V + 12 14
v - -14 -12
V
Common Mode Input Voltage Range (Vq - V; V|CR
-11 + 14 -11
LF411
- 14
+ 11 + 15 -11
LF412
-12
LF411
1 1
70 90 -
LF412 70 100
-
LF411 70 86
LF412 70 100
.. -
|
|
LF41
- 2.5 3.4
2.8 6.8
LF412
10 V, Rl = 2.0 Ay = SR V,>s
Slew Rate - 10 V to - k<), + 1.0)
LF411
(V| N
8.0 25 -
LF412 8.0 13
LF411
!!, f
- 30 -
25
LF412
Equivalent Input Noise Current (f = 1.0 kHz) 'n
pA\ Hz
- 0.01
LF411
LF412
0.01 _
MOTOROLA LF441C
SEMICONDUCTOR LF442C
TECHNICAL DATA
LF444C
Inputs 2
Jflflt "^
N SUFFIX D SUFFIX
PLASTIC PACKAGE PLASTIC PACKAGE
CASE 646 CASE 751
(SO-14)
Output 1 rr 3 Output 4
ORDERING INFORMATION
Op Amp
Function Device
Tested
Temperature Range Package
Inputs 1 I
3>^ Inputs 4
Veen j3V EE
LF441CD SO-8
Single
LF441CN 3
LF442CD
Plastic
SO-8
DIP Inputs 2
IE bj r< 3/ Inputs 3
!
Dual + 70C
LF442CN to
Plastic DIP
Output 2 E H Output 3
LF444CD SO-14 (G uad, Top Vie KV)
Quad
LF444CN Plastic DIP
2-30
LF441C, LF442C, LF444C
MAXIMUM RATINGS
Rating Symbol Value Unit
NOTES:
1. Differential voltages are at the noninverting input terminal with respect to the inverting input terminal.
2. The magnitude of the input voltage must never exceed the magnitude of the supply or 15 volts, whichever is less.
3. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded. (See Figure 1.)
Inputs
f Wv f'VVS/-O Output
D1
OVE E
1.5 Ml
-W\ O v EE
1600 TA = 25C
SO-14 PKG.
1200 10
--S D-i PK
5.0
n
-55-40 -20 20 40 60 80 100 120 140 16 -5.0 5.0
FIGURE 3 INPUT BIAS CURRENT versus TEMPERATURE FIGURE 4 SUPPLY CURRENT versus SUPPLY VOLTAGE
1000
Vcc = +15V
100 -
V EE
VCM = ov
10
125C
?5C
i-o ' ^'
/
!
c
5 * -55"C
/
'
0.01
0.001
25 50 75 5.0 10 15 20
T A AMBIENT TEMPERATURE
, (C) vcc. Wee!, supply voltage (volts)
FIGURE 5 POSITIVE INPUT COMMON-MODE VOLTAGE FIGURE 6 NEGATIVE INPUT COMMON-MODE VOLTAGE
RANGE versus POSITIVE SUPPLY VOLTAGE RANGE versus NEGATIVE SUPPLY VOLTAGE
-55C TA s 125C
y
FIGURE 7 OUTPUT VOLTAGE versus OUTPUT SOURCE FIGURE 8 OUTPUT VOLTAGE versus OUTPUT SINK
CURRENT CURRENT
VfX = + 15V
I I
125C
-55C
-55C 25C"\ 125C 5C\
10
5.0
\ \
2.0 3.0 4.0 5.0 6.0 2.0 4.0 8.0
6.0 10 12 14 16 18 20
Iq, OUTPUT SOURCE CURRENT fmA) -
, OUTPUT SINK CURRENT ImA)
Rl = 10 wi
-55C TA 125C
=?26
^>'"'
S 24
tD
o 18 VE : = -15
o T
**
16 I
FIGURE 11 NORMALIZED GAIN BANDWIDTH FIGURE 12 OPEN-LOOP VOLTAGE GAIN AND PHASE
PRODUCT versus TEMPERATURE versus FREQUENCY
-V(X = + 15V
CO
V EE = -15V
Rl = 10 kil z
= 00 pF
< Pha se
CL l0
s
2
o
- ... V CC = +15 V c ain
o
^V EE = -15
_ Rl = 10 wi
o
< -20 CL
Ta
=
=
100 pF
25C
I
2.5
vE e = -15 V
20
2 TA = 25C
7.0
,,
^'
s
z
o
S
t
1.5
CO
6.0
I
1.0
=3
vc C= +1 5V * o
5.0
= -i bV o Ay = 10b^y
vee
0.5
RL = 10 kf1
AV = +1. 1
Ay = 10^ ^
40
-75 -50 -25 25 50 75 100 125 100 1.0K
TA AMBIENT TEMPERATURE
, (C) f, FREQUENCY (Hzl
-B.30 -o
*
^
<
\
o
1
to = -t 15V >
^EE 15V a- Vcc = +15 V
\ = 10 V EE = -15 V
Ay = + 1.0 z Rl = 10 kn
%T HL) TA = 25C
== 25 c
TA o
3-
f, FREQUENCY (Hz!
f, FREQUENCY (Hz]
^25C -^
|
1.0K 5.0 10 15 20
f, FREQUENCY (Hz|
VCC v EEl. SUPPLY VOLTAGE (VOLTS]
l
S 250
l<
5(1
10 mV / .OmV
z
20
2
150
fcr
/
\ \Vi.OmV
AV == 100 AV = )/fi> J =
1 1
1
10 mV \
:x
10K 1 1.0 in
f, FREQUENCY (Hz) SETTLING TIME
t
s, (
M s)
ol t3
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage Vcc to Vee 40 Vdc
Differential Input Current (Note 1) "ID 10 mA
Output Short-Circuit Duration (Note 2) ts Indefinite
Power J SUFFIX
Dissipation (Note 3) PD 500 mW CERAMIC PACKAGE
Operating Junction Temperature Tj 85 C CASE 632
Storage Temperature Range Tstg C
Metal and Ceramic Packages -65 to +150 N.C. [T m] n.c.
V-
ORDERING INFORMATION lnpu,sJ!If>3
N
\\L-\y^ jo] ou.pu.
Operating Ambient Guard* [jF IT] Compens
Device Temperature Range Package
LM11CLN, CN
VE E
Ll jD nc
Plastic 8-Pin DIP
LM11C LM11CL
Characteristics Symbol Min Typ Max Min Typ Max Unit
Input Resistance n
- ion - - ion n
Input Offset Voltage Drift AV|Q/AT 2.0 5.0 3.0 mV/C
"How t0 T hiqh
Input Offset Current Drift AI| /AT 10 50 f/VC
T low t0 T hiqh
Input Bias Current Drift AI|B/AT 0.8 3.0 1.4 pA/C
T| w t0 T hiqh
Large Signal Voltage Gain AVOL V/mV
V S = 15V,V 0Ut = 12V, 100 300 25 300
l
out = 2.0 mA
50 15
"How to T high N te 5) -
V S = 15V,V ou t = 12V,
<
'out
= 0 5 mA -
voltage is in
The inputs are shunted by back-to-back diodes for over-voltage protection. Excessive current will flow if the input differential
excess of 1.0 V if no limiting resistance is used. Additionally, a 2.0 kil resistance in each input is suggested to prevent possible
latch-up
SCHEMATIC DIAGRAM
Compensation
-o v C c
3.0 pF =t Q17Jt R? 18
Inputs
Output
2r
o V EE
40
< 30
Cur\ e1,Vcc Vff-hb20 V
I
20
Vcc% V /- 2,V CC /V EE = 2.5V
10
|
o
m
v
-10
\ =
cc/Vee 1 j
= -30 \
1 /
-40
" 50 "25 25 50 75 100 125 150 -50 -25 25 50 75 100 125 150
Tc, CASE TEMPERATURE (C) CASE TEMPERATURE
Tc, (C)
VL VCC' V EE - 15 V
A = -25 to 125 C
./" = 10 Rs-100 kn
160
3.0
o< > 120
o
80
J
a.
40
16
24
-4.0 -2.0 2.0 40 1.0 k 10 k
VCC^EE = 1
AV| = 00 nV
CMSL >
s ,
1
CMf fl \^
2.5 V5V S S 20 V
2
AV|0 = 10 ^v
E
o
2
1 10 Ne ative
VEE^
50 100 100 1.0 k 10 k 100 k 1.0 M
vcc-^
3.1 Hz
Vsa t = 1.5 V
i2Vs(k
r
2.5VsVss15 V -
: aV|0 = 10mV
AVin-20uV (125 -j\
vee-x
1 >
1.0 8.0 12 16 20 2.0 3.0
Case Temperature
"
1=25C
. 2 = 125C
3=-55C
1
^Jj
'2
40 " V CC ^ 3
20
-20
10 100 10 k 10 k 100 k 1.0 M 10 M 4.0 8.0 12 16
I, FREQUENCY (Hz)
VCC^EE. SUPPLY VOLTAGE V) (
FIGURE 11 - OPEN LOOP VOLTAGE GAIN AND PHASE FIGURE 12 - SLEW RATE versus
versus FREQUENCY EXTERNAL COMPENSATION CAPACITOR
-O-v
s ,\s
1
"w.
Curves Cc =0 ~
Vs
1
100 l, UC = 1UUU ph
N^ :;;
a
^X ~\
"S ^\ VCC^EE = 2o"k
^
I
S \ U
20 N
\N \
20 V
-o
k 1 =
sN
x.x
20
10 100 1.0 k 10 k 100 k 1.0 M
i i mini i i
100 1.0 k
f. FREQUENCY (Hz)
Cc, EXTERNAL COMPENSATION CAPACITOR (pF)
vcc/vee = 15 V
s' / = 1000
'out
== 1.0 mA
/ AV = .0
APPLICATIONS INFORMATION
Due to the extremely low input bias currents of this cations, a 14-pin dual in-linepackage is available with
device, it may be tempting to remove the bias current guard pins (internally unconnected) adjacent to the
compensation resistor normally associated with a sum- inputs for minimal package leakage effects.
ming amplifier configuration. Direct connection of the Electrostatic shielding is suggested in high-imped-
inputs to a low impedance source or ground should be ance circuits.
avoided when supply voltages greater than approxi- Error voltages in external circuitry can be generated
mately 3.0 volts are used. The potential problem by thermocouple effects. Dissimilar metals along with
involves reversal of one supply which can cause exces- temperature gradients can set up an error voltage rang-
sive current to flow in the second supply. Possible ing in the hundreds of microvolts. Some of the best
destruction of the IC could result if the second supply thermocouples are junctions of dissimilar metals made
is not current limited to approximately 100 mA or if up of IC package pins and printed circuit boards. Prob-
bypass capacitors greater than 1.0 /^F are used in the lems can be avoided by keeping low level circuitry away
supply bus. from heat generating elements.
Disconnecting one supply will generally cause rever- The LM11C is internally compensated, but external
sal due to loading of the other supply within the IC and compensation can be added to improve stability, par-
in external circuitry. Although the problem can usually ticularly when driving capacitive loads.
be avoided by placing clamp diodes across the power
supplies of each printed circuit board, a careful design
will include sufficient resistance in the input leads to
The suggested printed circuit board layout for input same potential as the sensitive inputs to reduce surface
guarding is shown in Figure 14. Guard ring electrical leakage paths. Bulk leakage is reduced less, and
connections for common operational amplifier config- depends more on guard ring width.
R1
Input OVvV-
""<=
1
Output
Output Output
Input O Input o
Input O
Output
Output
Input
Input o
Output
Input O TJ
^ i
Output
v Cc
Minimum
Adjustment Range R
(mV) a
0.4 1.0 k
+ 1.0 3.0 k
Inputs Output 2.0 10 k
5.0 100 k
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
A general
purpose operational amplifier that allows the user to
SILICON MONOLITHIC
choose the compensation capacitor best suited to his needs. With
INTEGRATED CIRCUIT
proper compensation, summing amplifier slew rates to 10 VVs
can be obtained.
Low Input Offset Current 20 nA Maximum Over
Temperature Range
N SUFFIX J SUFFIX
External Frequency Compensation for Flexibility PLASTIC PACKAGE CERAMIC PACKAGE
CASE 626 CASE 693
Class AB Output Provides Excellent Linearity
(LM201Aand LM301A)
Output Short Circuit Protection
Guaranteed Drift Characteristics
iwFii
FIGURE1 - STANDARD COMPENSATION FIGURE 2 - DOUBLE-ENDED LIMIT
AND OFFSET BALANCING CIRCUIT DETECTOR
D SUFFIX
PLASTIC PACKAGE
CASE 751
VUT -
(SO-8)
8] Compensation
Ivcc
~e\ Output
~s\ Balance
(Top View)
V, < V LT ot v, -.
V UT H SUFFIX
Pins Not Shown Are Not Connected METAL PACKAGE
CASE 601
Inputs
ORDERING INFORMATION
Temperature
Device Range Package
< < LM101AH
-55C to +125C
Metal Can
LM101AJ Ceramic DIP
LM201AD SO-8
LM201AH - 25C
Metal Can
to + 85C
LM201AN Plastic DIP
LM301AD SO-8
* vE e LM301AH
0C to + 70C
Metal Can
250 Balance o LM301AN PlasticDIP
LM301AJ Ceramic DIP
MAXIMUM RATINGS
VALUE
Rating Symbol LM101A LM201A LM301A Unit
Power Supply Voltage vcc- Vee 22 22 18 Vdc
Input Differential Voltage V|D * 30 - Volts
Input Common-Mode Range (Note 1 V|CR
Volts
Output Short-Circuit Duration ^
S
Power Dissipation (Package Limitation) PD
Metal Can * mW
Derate above T"a = +75C mW/C
Plastic Dual In-Line Package (LM201A/
-
625 625 mW
Derate above T/\ = + 25C 301A) 5.0 5.0 mW/C
Ceramic Package mW
Derate above 25C -* 6.6 mW/C
Operating Ambient Temperature Range ta -55 to +125 -25 to +85 to +70 C
Storage Temperature Range Tstg C
Note 1. For supply voltages less than 15 V, the absolute maximum input voltage is equal to the supply voltage.
ELECTRICAL CHARACTERISTICS (Ta = + 25C unless otherwise noted.) Unless otherwise specified, these specifications apply
for supply voltages from 5.0 V to 20 V for the LM101A and LM201A, and from 5 V to
15 V for the LM301A.
LM101A
LM201A LM301A
Characteristics Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (R$ =s 50 kn) V|0 0.7 2.0 2.0 7.5 mV
Input Offset Current
ho - 1.5 10 3.0 50 nA
Input Bias Current l|B
- 30 75 70 250 nA
Input Resistance
n 1.5 4.0 0.5 2.0 _ Megohms
Supply Current Ico'ee mA
VCC^EE = 20V - 1.8 3.0 -
VCC^EE = 15 V 1.8 30
L_
Large Signal Voltage Gain Ay 50 160 25 160 V/mV
<VCC/VEE = 15 V, V = 10 V,
R|. > 2.0 kn)
TYPICAL CHARACTERISTICS
(Vqc = + 15 V, Vg = - 15 V, Ta = + 25C unless otherwise noted.)
FIGURE 4 MINIMUM INPUT VOLTAGE RANGE FIGURE 5 MINIMUM OUTPUT VOLTAGE SWING
I I I
I
|| LM101A p0
Po sitive ana
M M
:
I**:; 5S: :
Minimum
M; LM101A S|
\ LM201A
-
Negative
SSKSw:
^C Minimu m
Wi on| v
S-S
-R|. = 2
5.0 10 15 5.0 10 15
Vqc and (
- Vee), SUPPLY VOLTAGE IVOLTS) VC C AND - V E E), SUPPLY VOLTAGES
(
IVOLTS)
Operating Temperature
. "-
LM101A ,.,,
:. ;' :
and jg;
:*:: an d -
.::
: '
8;S :
only Sjij
S:S on v
5.0 10 15 5.0 10 15
Vcc AND - Vee, SUPPLY VOLTAGES (VOLTS) Vcc AND - V E e) SUPPLY VOLTAGE (VOLTS)
(
+ 120 270
C
+60
+40
+20
J
V
Gain
fe;
y
\
\, 135^
90
45
8
<
3
1 5.0
o
=
C
-<
^s
^ o CI 30 pF
1.0 k 10 k 100 k
X ~'
100 k
fl
I I I
Single-Pole Compensation
Feedforward Compensation
+ 8.0
+ 120
+ 6.0
+ 4.0 r + 100
+ 2.0 input
"
M
i
i
i Output
-2.0 y
o +40
-4.0
^"
+ 20
Gain X.
Feedforward Compensation
i r i
. +8.0
Output
+ 6.0
\
o +4.0 "17-1 c
input
+ 2.0 \
<
o +8.0
-2.0 1
-4.0
~S\s
-6.0
o
-8.0
n -10
1.0 M 3.0 4.0 6.0 6.0 7.0 8.0 9.0
f, FREQUENCY (Hz)
t, TIME bis)
R3
+ V| VW
R1 + R2
Cs = 30 pF
NC id 3 14 NC
COMPEN A 2C 3 13 NC
Inverting
Input
.^^ GUARD 3C D12 COMPEN B
5C J^>L 31 o OUTPUT
Non- INPUTS
Inverting
ln P ut
Compen GUARD 6C D9 NC
VgE 7C ]8 NC
(Top View)
> Output
J-8 SUFFIX
CERAMIC PACKAGE
BOOpFYy
^10 pF CASE 693
fj\
Compen ^r
D SUFFIX
PLASTIC PACKAGE
CASE 751 8
ORDERING INFORMATION 1
(SO-8)
Device Temperature Range Package
LM108AH, H Metal Can
-55 to +125C I <u 1_ COMPEN
LM108AJ, J, AJ-8, J-8 Ceramic DIP 1C 38 B
Metal Can 2C-f^\ 3 7 V CC
LM208AH, H L
LM208AJ, J, AJ-8, J-8 Ceramic DIP 3L-V^~ 36 OUTPUT
-25 to +85C VEE 4C 35 NC
LM208AN, N Plastic DIP
Value
Rating Symbol LM108. LM108A LM208, LM208A LM308, LM308A Unit
Power Supply Voltage Vcc Vee -20 20 18 Vdc
Input Voltage (See Note 1) V| -4 15 *- Volts
Input Differential Current (See Note 2) *n
l|D ^ mA
Output Short-Circuit Duration ts -* Indefinite
Operating Ambient Temperature Range ta -55 to +125 -25 to +85 Oto +70 c
Storage Temperature Range T stg -* 65 to +150 C
Junction Temperature Tj C
Metal, Ceramic Package
Plastic Package
Note 1. For supply voltages less than 15 V, the maximum input voltage is equal to the supply voltage.
Note 2. The inputs are shunted with back-to-back diodes for over-voltage protection. Therefore, excessive current will flow if a differential input voltage
in excess of 1.0 V is applied between the inputs unless some limiting resistance is used.
ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of +5.0 V Vcc *
+ 20 V and -5.0 V * V EE s= -20 V, TA = +25C.)
LM108A LM108
LM208A LM208
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage V|0 0.3 0.5 0.7 2.0 mV
Input Offset Current he-
0.05 0.2 0.005 0.2 nA
Input Bias Current lm 0.8 2.0 0.8 2.0 nA
Input Resistance n 30 70 30 70 Megohms
Power Supply Currents 'co'ee
0.3 0.6 0.3 0.6 mA
Vcc = +20V, V EE = -20 V
Large Signal Voltage Gain AVOL 80 300 50 300 V/mV
V CC = NeeI = +15 V, Vo = 10 V,
R[_ 5* 10 kn
ELECTRICAL CHARACTERISTICS (Unless otherwise noted these specifications apply for supply voltages of +5.0 V Vcc *
+ 15 V and -5.0V sV
EE s= -15 V, Ta = +25C.)
LM308A LM308
Characteristic Symbol Min Typ Max Min Typ Max Unit
Average Temperature Coefficient of AV| /AT " 1.0 5.0 6.0 30 M,V/C
-ov EE
TYPICAL CHARACTERISTICS
- -1
LM308A 1 M3na -.. ,
'10
LM308
LM108, LM208
LM30 8A, LM308
IB !
1
LM308A
I"-
r -
o
=
0.10
LM108A, LM108 LM108A, LM208A
LM208A, LM208
"-^J llR
LM108A,LM108^-
l|0
-^ 400
T/\ = 0C Ta = -55C
+ 25C 300 ax
>-
-55C
+ 70C CL. + 25C
o 100 S 200
+ 125C + 70C
= + 125C
CF
= ^100
f 100 Hz
5.0 10 15 20 5.0 10 15
V(X = IVeEi. SUPPLY VOLTAGES (VOLTS) V(X = IVeeI, SUPPLY VOLTAGES (VOLTS)
+ 120
--- V CC - +15V. ...
+ 100 = -15 V
m - VEE
TA f2 5C
2+80 [l
z \C = 3.0 pF
F
2+60
8.0
g+40
> VC F = 3.0 pF
gl + 20
^C F
= 30 pF
CF = 30 pF^
CF = 100 pF^
-20
1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M 10 k 100 k
"
pi
;r t. pie -
Output
+^s^ Output
1.0(xF(1) 7k 9 ^ 30 pF
or equiv
INPUT GUARDING
Special caremust be taken in the assembly of printed
circuitboards to take full advantage of the low input
currents of the LM108,A amplifier series. Boards must
be thoroughly cleaned with alcohol and blown dry with
compressed air. After cleaning, the boards should be
coated with epoxy or silicone rubber to prevent Guard
(Bottom View)
contamination.
Even with properly cleaned and coated boards, leak-
age currents may cause trouble at + 125C, particularly guard, which is a conductive ring surrounding the in-
since the input pins are adjacent to pins that are at puts, connected to a low-impedance point that is at
is
supply potentials. This leakage can be significantly re- approximately the same voltage as the inputs. Leakage
duced by using guarding to lower the voltage difference currents from high-voltage pins are then absorbed by
between the inputs and adjacent metal runs. Input the guard.
guarding of the 8-lead TO-99 type package is accom- The pin configuration of the dual in-line package is
plished by using a 10-lead pin circle, with the leads of designed to guarding, since the pins adjacent
facilitate
the device formed so that the holes adjacent to the in- to the inputs are not used (this is different from the
puts are empty when it is inserted in the boards. The standard MC1741 and LM101A pin configuration).
R1 R2 R2
Input -VW-a wv wv
R3(1)
i
4 ^>-o-i-9 Output
Frtr Input
must be an impedance.
(1) Used to compensate for large source resistances. R1 + R 2
N SUFFIX
PLASTIC PACKAGE
CASE 626
(LM311 Only)
J-8 SUFFIX
Ground- Referred Load
>v C c
Load Referred to
Negative Supply
CERAMIC PACKAGE
CASE 693 fWN
68 D SUFFIX
Inputs
^X^ 7 PLASTIC PACKAGE
3^Pj'' CASE 751
Output ^19
(S0-8)
L Oui
4 |Rl (LM211/LM311 Only)
vE e Gnd 1 d >D8 V CC
Input polarity Is reversed when reversed when 2C-Kj-D7 Output
Gnd pin is used as an output
Input polarity
Gnd pin is
is
used as an output.
inputs
3c ^y -,
6 Balance/Strobe
Vee 4C^ p5 Balance
Load Referred to Strobe Capability (Top View)
Positive Supply
vcci
LM111
Rating Symbol LM311 Unit
LM211
Total Supply Voltage vCc + Iv eI
E 36 36 Vdc
S
LM111
LM211 LM311
s
Characteristic Symbol Unit
Min Typ Max Min Typ Max
Input Offset Voltage (Note 3) V|0 mV
Rs=S50kn, Ta=+25C - 0.7 3.0 - 2.0 7.5
*
RS s 50 kl, T| 0W ^ TA ^ T h ig h 4.0 10
Input Offset Current (Note 3) Ta = +25C '10 1.7 10 1.7 50 nA
T low^ T A< Thigh* _ 20 70
Input Bias Current, Ta = +25C l|B
45 100 45 250 nA
T low^ TA^ T high* 150 300
Voltage Gain AV 40 200 - 40 200 - V/mV
Response Time (Note 4) - 200 - - 200 - ns
Input Voltage Range (T| ow ^ Ta < Thigh*) V|R -14.5 -14.7 to 13.0 -14.5 -14.7 to 13.0 V
13.8 13.8
NOTES:
* T|
ow =-55CforLlv1111 T high = +125C for LM1 11 3. The offset voltages and offset currents given are the maximum
= -25C for LM2 1 1 = +85C for LM2 1 values required to drive the output within a volt of either supply with
= 0C for LM31 1 = +70C for LM31 a 1 .0 mA load. Thus, these parameters define an error band and take
1 Offset voltage, offset current and bias current specifications apply for into account the "worst case" effects of voltage gain and input
a supply voltage range from a single 5.0 volt supply up to 1 5 volt supplies. impedance,
2. This rating applies for 1 5 volt supplies. The positive input voltage 4. The response time specified is for a 100mV input step with 5.0 mV
limit is 30 volts above the negative supply. The negative input volt- overdrive.
age equal to the negative supply voltage or 30 volts below the
limit is
5. Do not short the strobe pin to ground; it should be current driven at
positive supply, whichever is less. 3.0 to 5.0 mA.
o V EE
<
80 2.0
Q- NorrnaU
V
* 40 1.0
Normal
+25 +50 +75 +100 +125 +25 +50 +75 +100 +125
TA , TEMPERATURE (C) TA , TEMPERATURE (C)
FIGURE 4 - INPUT BIAS CURRENT versus FIGURE 5 COMMON MODE LIMITS versus
DIFFERENTIAL INPUT VOLTAGE TEMPERATURE
140
vcc
120 v l c - +15 V-
Helerrei to Supply Voltages
V Et i j
^T 100 o
Z
*\
i 80
J-1.5
m 60
a
a J
r n
V
I 40 X ? +0 4
m ^
20
VEE I
-16 -12 -8.0 -4.0 4.0 8.0 +25 +50 +75 +100 +125
DIFFERENTIAL INPUT VOLTAGE (V) TA , TEMPERATURE (C|
FIGURE 6 - RESPONSE TIME FOR VARIOUS FIGURE 7 RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES INPUT OVERDRIVES
...
i r >
+5.0 V
I
t: 5.0
o
* 4.0
/5.0mV \-i-OV "
3.0
20 mV-
.. 5UUU 20 mV A I -c
O
o
2.0
10
2.0 mV ~> 1
fr ( 2.0
V mV
V'
_
|
|
\
V C C = +15 V
g 100
Vge = -15 V V CC = +15V
50 "T A = +25C 1 V EE = -15V
t T A = +25C
1 1
FIGURE 8 - RESPONSE TIME FOR VARIOUS FIGURE 9 - RESPONSE TIME FOR VARIOUS
INPUT OVERDRIVES INPUT OVERDRIVES
> 1 1 1
vnr
S 15 15
<
b /
1
> Vin
O- it~] -
o
10
20 mV N
7 )VCC
10
^^
=*
2.
5.0
o //
5.0 mV^
O
5.0 '
v\ \ H +J -V-ov
>
o -5.0 Y
v
2.0 mV
-5.0 x
*\ sN ,,5.0 mV 2.0 k
V </
\
,_d 20 mV 2.0 mV
5
2.0 k
_ -15 -15
E EC 1
"Vcc- + is v-
1
^ -100
TA = f 25 C
| J
1.0 1.0
< T A = +25C
125
r\
|ioo f\
? JJ*2 P& T A = -55C
1 75 I
0.45 11 0.45
/
S || 0.30 ^
50
/
/
/
Sh irt Hir 0.30 ot
^ *A ^ T
y <? K*
' A = +25C
i 25 // 7^
/ A
/**
T A = +125C
r I I I
5.0 10 16 24 32 40 48
Vq, OUTPUT VOLTAGE (V) Ig. OUTPUT CURRENT (mA)
LM111,LM211, LM311
Tft = +25C
1.8
65 85
n J 5.0 10 15 20 25
TA , TEMPERATURE (C) V CC- V EE. POWER SUPPLY VOLTAGE (V)
vcc = +15V
2.6
p ostive Sup ply Ou put Low VEE = -15 V
i n
+25 +50 +75 +100 +125
TA TEMPERATURE |C)
,
APPLICATIONS INFORMATION
7 OUtpUt Output
y
_- n vw
/vv ik
-" '
OM
1
A-15V iO.1
v T 510k
_L mF
"i
APPLICATIONS INFORMATION
Techniques for Avoiding Oscillations in Comparator Applications
sine wave, or if the signal source impedance is high (1 .0 kfl to possible, and should be essentially surrounded by ground foil on
100 kfi), the comparator may burst into oscillation near the all sides, to guard against capacitive coupling from any fast high-
crossing-point. This is due to the high gain and wide bandwidth level signals(such as the output). If Pins 5 and 6 are not used, they
of comparators like the LM111 series. To avoid oscillation or should be shorted together. If they are connected to a trim-pot,
instability in such a usage, several precautions are recom- the trim-pot should be located no more than a few inches away
mended, as shown in Figure 15. from the LM111, and a 0.01 nF capacitor should be installed
The trim pins(Pins 5 and 6) act as unwanted auxiliary inputs. If across Pins 5 and 6. If this capacitor cannot be used, a shielding
these pins are not connected to a trim-pot, they should be shorted printed-circuit foil may be advisable between Pins 6 and 7. The
together. If they are connected to a trim-pot, a 0.01 ^F capacitor power supply bypass capacitors should be located within a
(C1 between Pins 5 and 6 will minimize the susceptibility to ac
) couple inches of the LM1 1 1.
coupling. A smaller capacitor is used if Pin 5 is used for positive A standard procedure is to add hysteresis to a comparator to
feedback as in Figure 15. prevent oscillation, and to avoid excessive noise on the output.
Certain sources will produce a cleaner comparator output In the circuit of Figure 16, the feedback resistor of 510 kfl from
waveform if a 100 pF to 1000 pF capacitor (C2) is connected the output to the positive input will cause about 3.0 mV of
directly across the input pins. When the signal source is applied hysteresis. However, if R2 is larger than 100fl, such as 50 kfl, it
through a resistive network, R1, it is usually advantageous to would not be practical to simply increase the value of the positive
choose R2 of the same value, both for dc and for dynamic (ac) feedback resistor proportionally above 510 kfl to maintain the
considerations. Carbon, tin-oxide, and metal-film resistors have same amount of hysteresis.
all been used with good results in comparator input circuitry, but When both inputs of the LM1 1 1 are connected to active signals,
inductive wirewound resistors should be avoided. or if high-impedance signal is driving the positive input of the
a
When comparator circuits use input resistors (e.g., summing LM 1 1 1 so that positive feedback would be disruptive, the circuit
resistors), their value and placement are particularly important. of Figure 1 5 is ideal. The positive feedback is applied to Pin 5 (one
In all cases the body of the resistor should be close to the device of the offset adjustment pins). This will be sufficient to cause 1 .0
or socket. In other words, there should be a very short lead length to 2.0 mV hysteresis and sharp transitions with input triangle
or printed-circuit foil run between comparator and resistor to waves from a few Hz to hundreds of kHz. The positive-feedback
radiate or pick up signals. The same applies to capacitors, pots, signal across the 82 fl resistor swings 240 mV below the positive
etc. For example, if R1 = 10 kfl, as little as 5 inches of lead between supply. This signal is centered around the nominal voltage at Pin
the resistors and the input pins can result in oscillations that are 5, so this feedback does not add to the offset voltage of the com-
very hard to dampen. Twisting these input leads tightly is the parator. As much as 8.0 mV of offset voltage can be trimmed out,
best alternative to placing resistors close to the comparator. using the 5.0 kfl pot and 3.0 kfi resistor as shown.
FIGURE 17 - ZERO-CROSSING DETECTOR DRIVING FIGURE 18 - RELAY DRIVER WITH STROBE CAPABILITY
CMOS LOGIC
V cc = +15 V
Inputs
Output
to CMOS Logic
*Zener Diode D1
protects the comparator
VE e = -15 V from inductive kickback
-^.. and voltage transients
on tne V CC2 supply line.
Strobe
QUAD DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS
QUAD LOW POWER OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
The LM124 Series are low-cost, quad operational amplifiers INTEGRATED CIRCUIT
with true differential inputs. These have several distinct advan-
tages over standard operational amplifier types in single supply
applications. The quad amplifier can operate at supply voltages
as low as 3.0 Volts or as high as 32 Volts with quiescent currents
about one fifth MC1741 (on a per
of those associated with the
amplifier basis). The common mode input range includes the neg-
ative supply, thereby eliminating the necessity for external biasing
components in many applications. The output voltage range also J SUFFIX N SUFFIX
includes the negative power supply voltage. CERAMIC PACKAGE PLASTIC PACKAGE
Short Circuited Protected Outputs CASE 632 CASE 646
(LM224, LM324,
True Differential Input Stage
LM2902 Only)
Single Supply Operation: 3.0 to 32 Volts
D SUFFIX
Low Input Bias Currents: 100 nA Max (LM324A) PLASTIC PACKAGE
Four Amplifiers Per Package CASE 751A
Internally Compensated (SO-14)
Out ,_ -. Out
MAXIMUM RATINGS (T A = + 25C unless otherwise noted) 1 LL 3 4
Rating Symbol
LM124
LM224
LM324.A LM2902 Unit
Inputs j
1
E
IE
vcc E
> -< $\
mf
Inputs
4
X o o o o
in o CJ o
CO
s cn in 3s o CO
o o q cn
s 1 1
1 1
> 1 1 1 1 1
CO 1 1 1 ! 1 1 1 to
CM
o a O o o o
91
> O o o o o o o O o
S s
1
CM
E K
1 i
7 i 1 1 1
1 P-* 1 1
in *t CN CN 00 1 1 1
c o o o o oq
2 1 1 1 i i 1 i i
o o 1 1 1 1 in o as 1
i
1 1 1
X o q o o
in o o
IB
s r^ oS 1
gs 1
CO
co cm (J
> 1 1 1 1 i
CO
CO 1 1
o 1 1 1 1 1
o
CO
q cm
1 1
CM o o o
n q o o o o o oo o
s S I p^ S i 1 1 1
1 1
o 1 1 8 lh ^ o
CM cm in
oo i i
c m OO o q
i i i i i 1 i i
o o 1
in
1 (D
in o co r^
CM <N 1 -
cm
in - i i i
X o o
o o
o U
CO q q o o in
o 2 CJ CO o o q cm
CM ^
co
s r-*
> i i 1 i i
CO 1 1 CM 1 1 i i i CO CO r-^
a o o
CM
> q o CM o o o O O o o o o
CO
s 5 l
S i
T ' 1 1 1
1 i r-. 1 1 S in Tf CN CN 00 ^
_l
o c m OO o q
c S I l i i i 1 1 1
o o 1
in in
1 CO CO o CO p-
i
cm
1 i i
o o o o
o
1 a s in
s
CJ
CJ
CO o o O CM
CM s i 1
> i i 1 i 1
CO 1 1 1 1 1 1 1 CO CO ^
o s o o O o
a.
> o s o s q * o
o CN oq m
o o
CM
H i
S 1
7 I 1 1 1
1 i 1 1 cn oo 1 1
c
I e o o o o o q
-1
S i i I 1 1 1 i I
o o 1 m in
cm 1 to o to (--
l
cn
1 1 1
O H r-
o < cc cc cc X
E O o
Q
m Q d cc
5
cc
cc
o o d +
O _o
CJ
i en
> > <1
> > 1
u
en
a. > > > p
"O
c
O
LU CD o
>
LU a)
3 z o
G o 3 o z > ^- K
> o > u K
o
1o i 1"
q II
c o 1
CO 1! i 1- Scr
CN O]
II
cc O O - o o CJ CJ 5>
CJ 2
*~ O JZ. - CJ
> Oo
CN -*
o a 3 o
Z > T3
o
o><m
G "
>
_c
Q. II
o j ii ii
> o
ll
< c - O
(0
5
OJ
1 ? en
ecer
1
q o .p>
o II "o O
f
""-
.-
1
ii
_,5 z CD . 8
1-
t/>
a
O > co
c P
CO
p CD
a>
coo u
_
cc o ^' < ac K?3 "
c o 5 ^ 0>
cc a >> 1
a) en en
o> CM CN 3
C7)
1 G
' 3
UJ
t-
Is
O 2
o| %
z oz
o
z
S 5
-
5
-
cc
lil Q.
c
cc
c cc ill i ^ 5
O
O o 1
o 1 1
eg '3
CJ
>^ o > ai o c o ""
ii
s tit
< I 0) 3 3 co 3 3 o S ii 5 I o 5 o ii
o
c "-
cc o o
?>> * >
> > O CO o CJ K II
> ^ U
3 - o CO A\ II ,-,
< K S^ o c '6T CO
ir
*- > S >
'5
X o'o ~ TO
t o
>g CO <D .9 S cc '5T
to
cc cc
1 CO CO 1
u o >' is>
o i: <- .c <5 s s 1 2 cc
&>" % -p>~
o
_l S > cy
^o>
-
c
E
^c "
f
- j=
a
>>
Poo
a.
c 1
a*~
V/
>-
Is 2oi>o >o O "u c
c3 -
"~
P
m -p^
S'o
c ao
< in ,-c E 3 | nn Sol5 to a. TO
|nh 9
?o
-
u a> f a; v/ a. -g co co
o" e a co in
*H - >-H >s
N > l
E 2>CM N 3
K II '
ai
TO
*""
O II II
c w < s5
||
CO > II II II
to ii
II II
.. CO CO II II
O) O 55 uo I W O
a O
ll II O) II ii
II
3 " U 3 3 3 " 3
3 U O S, _|i- a o ej O a
H< H<
fc c q <5
_i a.
UJ
_l a> > = l<
al- a> >
CO
.c
*" i
o 3 = 3>> 3 > s-
3 5^ > 3
111 < _p < _p c b CJ CJ a. O o o o o O a.
NOTES:
(1) T| 0W = -55Cfor LM124 T high = +125Cfor LM124
= -40Cfor LM2902 = +85Cfor LM224
= - 25C for LM224 = +70Cfor LM324,A
= 0C for LM324.A = + 105C for LM2902
(21 The input common-mode voltage or either input signal voltage
should not be allowed to go negative by more than 0.3 V. The
upper end of the common-mode voltage range is Vqq - 1.7 V.
(31 Short circuits from the output to Vcc c a n cause excessive heating
and eventual destruction. Destructive dissipation can result from
simultaneous shorts on all amplifiers.
HI ji
~1
rw
H -o
~
v E e1
* V EE
S 14 i 1 80
>
12
a S < 60
< Neg tive IE H-
ti 10 < ->
_l o
o Ji> 40
2 8.0
<s
To sitive z 20
2.0
14 550
R kS2 .
= 15V
vcc
= Gnd
VEE
R| = 1 k2
RF = 100 kH .
Tfl = 25C
R =
< 90
3
<
5 0.6 m
o
S 0.3
VcC, POWER SUPPLY VOLTAGE (VOLTS) VCC. POWER SUPPLY VOLTAGE (VOLTS)
APPLICATIONS INFORMATION
Vref
2 TT RC
For f
Q = 1 kHz
Vo = 2.5V(1 + R = 16 kfl
C = 0.01 MF
V inL !
V inH
Vref
IVQH-Vrefl* V ref
e = C (1 + a + b) (e2 - el
OH - v OL>
V ref = r V CC
(-v c
Choose Value !, C
R1
2 A(f Q )
R1 B3
4Q^ R1 - R3
Qo'c
<0.1 Where f Q and BW are expressed in Hz
BW
If source impedance varies, filter may be preceded with voltage
CASE 646
- JfPi u
Rating Symbol Value Unit
Power Supply Voltage LM139, A/LM239, A/ vcc + 36 or 18 Vdc
LM339A/LM2901 J. L SUFFIX
iS^ tU
Input Differential Voltage Range
MC3302
V|DR
+ 30 or 15
Vdc
CERAMIC PACKAGE
CASE 632
WWmi
J^IJltL
LM139, A/LM239, A/LM339, A/LM2901 36
MC3302 30
Input Common Mode Voltage Range V|CR -0.3 to Vcc Vdc
14
^^
^<F-'
D SUFFIX
PLASTIC PACKAGE
CASE 751
Output Short-Circuit to Gnd (Note 1) Continuous
'sc
(SO-14)
Input Current (Vj n < -0.3 Vdc) (Note 2) in 50 mA
Power Dissipation (a TA = 25C PD
Ceramic Package 1.0 Watts
Derate above 25C 8.0 mW/C PIN CONNECTIONS
Plastic Package 1.0 Watts
Derate above 25C 8.0 mW/C
Junction Temperature Tj C
Ceramic & Metal Package 175
Plastic Package 150
Operating Ambient Temperature Range ta C
LM139, A -55 to +125
LM239, A -25 to +85
MC3302 -40 to +85
LM2901 -40 to +105
LM339, A Oto +70
Storage Temperature Range T stg - 65 to + 1 50 C
|
(Top View)
ORDERING INFORMATION
Temperature
Device Range Package
LM139J, AJ -55Cto +125C Ceramic DIP
LM239D, AD SO-14
LM239J, AJ -25Cto + 85C Ceramic DIP
LM239N, AN Plastic DIP
LM339D, AD SO-14
LM339J, AJ 0Cto +70C Ceramic DIP
LM339N, AN Plastic DIP
LM2901D SO-14
-40C to +105C
LM2901N Plastic DIP
o 8 P 8 p O
8 8 8 o
S > i
1
1 1 1 ' 1
i 1 > i r- >
CN CN
O a p O
<<> p o " o CO
>
(>> 8 o 8 CO
p 1 I 1 1 1
u 1-
1 1
1 '
w
Z S
c o c
o o
S 1 l l 1 1 l 1
cb 1 1
i 1 1 I 1 I 1
o p o q 8 CJO p o
a in
8 8 8
S > i
1 l ' 1 1
I +1 +i > i >
o a p o
p 00o " o o.
0>
CM > 8 1
6 ~ 8 8 s d 1 i I 1 1 1 1
S S
c
c o P
s i 1 i I 1 1 1
2 1 I 1 o 1 1 l 1 to 1 1
p o o o o oo 8
ce p |
8 8 <->c\i
p >"
S > i
i l 1 1 1
0) s > 1
CO
o CO
CO a p p CO
8 " o a
>
>
1- 8 1
p
|
'
8 to
d
0) 1 I 1 1 1 1 1
0) +1 +1
CO
CN S c
2 c
o o o
1 l 1 1 1 i l 1 1 1
S 1 I 1 1 1 1
p 8 8
uin p 1
o
8 8 oo
Ofsj 8 p o
u
2 +1 > 7 i I 1 1
1 1
I > 1 >
0)
a p " o CO a
co
> p 8 d 8 8 to
CO
d > 1 I I 1 1 1 1
i +l
1
'
i T +
r a= .|
c o c
o I
o 1 o
i 1 i 1 i 1 1
1 I i 1 i 1
CO 1 1
U
o o o o p oo 8 o
< p 1
< p o
01 1 > V i I 1 1
1 1
en s +i ><->CN I >
CO
to
CO CO
a
i
Srt> >l
"Co
4 > p 8
a p 00 1
8 8 CO o <
3 1
0)
1
6 ' 2 d en I-
1 I
I 1 1 1 1
| a o, A 6 II
ii
J.2 ^
pi
C] ,,-Fi!
CN
2 c o p S c t fell I
81
o o o|l
1 1 l 1 1 1 I 1 1 1
i 1 I I 1 1 1
O E e S SC3H-
p 8 8 p o
8 8 oo o
o p o
o =? O.SS8
o.- S S ~
i
C S > 1 i 1 1
1 1
<
i
<
1
Ssl
9)
a p p " CO o a a !!li
| 8 1
6 '
8 8 d 1 I i 1 1 1 1
"O
i
c o
i iiJl Pi
o o o t
I l 1 1 1 I 1
CO 1 1
1 I
i 1 1 1
o *'o|j
C II!
" a
u g o > 8 &)
yi
"5 o
o m o m g o a 8 I "5 + ?
> g o _o ? c
> o > > _p >
I 1
1 > COS
-c
< O * "* >5?
2, = <? 3 <* * ^. tt CO
'* 3 *r 3- lc
a E
ii
p 0.2
> o -o
u 3 1 =E
o a.E " -o " "
>
< <
3 = E S c 5 J !il
to
o > E
1
E 3
O
O g BOhh 111
o o I E
P p o 5 1 S
(O
V/ c Ml i 5 c "P o x en 2
JI 3 a
i O e
o oc c
o 525 2 ECS!
1- > > > m rr
to LM139 LM239
ill
z Io ?
is TES:
OC c -p c z > c T
< a z > co > z O- -* in <o
X u z (c M
> u > 1> CN CO
c 1 o 1 *> 1 =
c >
HH
o c ">
O)
c 2 > .
2 5
15 V P >5 4
3
< > o c
I? u
s > o |I
o
a 3
c
5
I
|
H>
" 8
Sit; H O
s - F Z s8"
<3
55 A
c + ^
1 A
i
E 1?
i A\
2 A\
o m- o u c " o s o E>
u 3
3
3 a _j j & A\
_| & S _i a a! a
CD
~ a -% 3
it
3 O aT
3
-s.
111
a. as a or a: > > s> O5 > COi> o5 > a a I? 3 >
Ui c c w > oc
fe
CO o 5
Rref
Vref
+ v cc
<i ov
V CC R1
Vref + R1
Rref
Vref *
R r6 f R2 * R1//R ref
R2 +
R2R re f//R1
TYPICAL CHARACTERISTICS
(Vcc = + 15 Vdc, T/\ = +25C (each comparator) unless otherwise noted.)
48
42
SJ 120 f 36 Ta = -55C
"""^ +25C
> 30
|
1 i-oo
I 24 -T A = +
CO
t- 18
< Cu
1 S
o
z
0.80
-* X m . 12
6.0
nun -
TA = + 25C
T A = -5 5C /
TA = H25C
//
/
//
VREF
VccO
Rs -
Source Resistance
R1 =* R S
VCC L
LOGIC DEVICE Volts kI2
APPLICATIONS INFORMATION
V IN
V|N
R4 > R5 .
?1 220 k S 220 k ;
ov k.
p
/
vo
v cc~ 1
v o- 1
1 -A0
D1 prevents input from going negative by more than 0.6 V.
1
R1 + R2- R3
(QUAD MC1741)
DIFFERENTIAL INPUT
(QUAD MC1 741) OPERATIONAL AMPLIFIERS
OPERATIONAL AMPLIFIERS SILICON MONOLITHIC
The LM148 series is a true quad MC1741. Integrated on a single INTEGRATED CIRCUIT
monolithic chip are four independent, low power operational
amplifiers which have been designed to provide operating
charac-
teristics identical to those of the industry
standard MCI 741, and
can be applied with no change in circuit performance. In addition,
the total supply current for all four amplifiers is comparable
the supply current of a single
offset currents and input
theMC1741 industry standard.
The LM148 can be used in applications where
or high packing density is
MC1741. Other
bias currents
to
features include input
which are much less
amplifier matching
important. Other applications include high
than
0m J SUFFIX
CERAMIC PACKAGE
CASE 632
Out VJ
1
1 14
pk
2 13
'
Inputs
EQUIVALENT CIRCUIT SCHEMATIC 1 |
3 12
(1/4 of Circuit Shown)
V CC 4 11
10
Inputs I
Inputs
NON INVERTING '
'
INPUT
ri*] 9
3
Out
2
7
'
f, 8
(Top View)
ORDERING INFORMATION
Device Temperature Range Package
LM148J -55 to +125X Ceramic DIP
LM248J Ceramic DIP
-25 to +85C
LM248N Plastic DIP
LM348D SO-14
LM348J to + 70C Ceramic DIP
LM348N Plastic DIP
NOTE: Any of the amplifier outputs can be shorted to ground indefinitely; however, more than one should not be sin lultaneously shorted
or the maximum junction temperature will be exceeded.
TYPICAL CHARACTERISTICS
^15 Vdc, V EE = -15 Vdc. T A = + 25C unless otherwise noted).
Nil III
*
K
t
\ 3
t
\\ 3
3
+40
T HD< 5% \
1 +20
\ t
\
s"
-?n
1.0 k
1.0 k 10 k 100 k
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
FIGURE 3 - POSITIVE OUTPUT VOLTAGE SWING FIGURE 4 - NEGATIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE versus LOAD RESISTANCE
I
!
I I
I I II
15 V SUPPLIES
15 V SUPPLIES
12 V
-9.0 + 1? V
9V
-7
-6.0 9V
-5.0
6 V
3.0
6V
1 I
500 700 1.0 k 2.0 k 5.0 k 7.0 k 10 k 500 700 1.0 k 2.0 k 5.0 k 7.0 k 10 k
R|_, LOAD RESISTANCE (OHMS) RL, LOAD RESISTANCE (OHMS)
+27 V
+24 V
+21 V
+ 18 V
+ 15 V
+ 12 V
+9.0
+6.0
+5.0
V
V
V 1
100
-
S 96
/ w OUTPUT
if qn
J,
<
ti 85
J
J o
>
ii\ PUT i w
10ms/DIV 70
2 4 6.0 8.0 10 12 14 16 18 20
VCC IVEEI. SUPPLY VOLTAGES (VOLTS)
APPLICATIONS INFORMATION
Vref
R = 16 kft
Vn 2.5 V(1 +
C= 0.01 MF
1
H /sterea
OH
I
vo
'OL V ir L V nH
J
Vref
v ref " ~ V CC
4CR f R1
R = 160kn
c = o.ooi mf Notch Output
R1 = 1.6 Mfi
R2 = 1.6 Mfl
Vref Tgp = Center Frequency Gain
R3 = 1.6 MH =
Tfvj Passband Notch Gain
MSD6150
500
ws>
k
*
0.5 MF 2
ii^
1 M Common
Mode
ir
-
Adjust
-
LM 148> Polarity
v Cc
J D>
LM148 Quad Op-Amp
VEE
MOTOROLA
SEMICONDUCTOR LM158, LM258,
TECHNICAL DATA LM358, LM2904
DUAL DIFFERENTIAL
DUAL LOW POWER OPERATIONAL AMPLIFIERS INPUT
Utilizing the circuit designs perfected for recently introduced
OPERATIONAL AMPLIFIERS
Quad Operational Amplifiers, these dual operational amplifiers
SILICON MONOLITHIC
feature low power drain, 2) a common mode input voltage range
1)
INTEGRATED CIRCUIT
extending to ground/VEE, 3) Single Supply or Split Supply operation
and 4) pin outs compatible with the popular MC1558 dual operational
amplifier. The LM158 Series is equivalent to one-half of an LM124.
These amplifiers have several distinct advantages over standard
operational amplifier types in single supply applications. They can
operate supply voltages as low as 3.0 Volts or as high as 32 Volts
at
with quiescent currents about one-fifth of those associated with the
MC1741 (on a per amplifier basis). The common mode input range 8" "\
includes the negative supply, thereby eliminating the necessity for
external biasing components in many applications. The output voltage
H SUFFIX
range also includes the negative power supply voltage. METAL PACKAGE
Short Circuit Protected Outputs CASE 601
True Differential Input Stage
Single Supply Operation: 3.0 to 32 Volts
Low Input Bias Currents
J SUFFIX
CERAMIC PACKAGE
Internally Compensated CASE 693
Common Mode Range Extends to Negative Supply
Single and Split Supply Operation
N SUFFIX
Similar Performance to the Popular MC1558 PLASTIC PACKAGE
CASE 626
D SUFFIX
PLASTIC PACKAGE
MAXIMUM RATINGS CASE 751
(T A = +25C unless otherwise noted
(SO-8)
LM158
LM258 Output a (T l] Vcc
Rating Symbol LM358 LM2904 Unit
Power Supply Voltages
Vdc iti-K. I 3 Output b
Single Supply v cc 32 26
Split Supplies + 16 puts B
vcc.Vee 13 V EE /Gnd[4
Input Differential Voltage Range V IDR
^"j[)
(1 32 26 Vdc (Top Vii
Input Common Mode Voltage Range (2) V ICR -0.3 to 32 -0.3 to 26 Vdc
Input Forward Current (3) -
if 50 mA ORDERING INFORMATION
(V, < -0.3 V)
NOTES:
(1) T|ow = -55Cfor LM158 T h igh = + 125C for LM158
= -40C for LM2904 = + 105C for LM2904
= - 25C for LM258 = +85C for LM258
= 0C for LM358 = +70C for LM358
(3) Short circuits from the output to Vcc can cause excessive heating
and eventual destruction. Destructive dissipation can result from
simultaneous shorts on all amplifiers.
3.0 V to V cc (Max)
^
'|l v Cc v cc_4
l 1.5 V to v cc (Max)
n o
[
a
B t o
- 1.5 V to V EE (Max)
r
vEe
I v EE /Gnd
\r
V EE /Gnd
20
1I8
a*'
uj 12
S Negi tive
5 10
o
* 8.0
| 6.0
\o sitive
> 4.0
2.0
100 1.0 k 10 k
2.0 4.0 6.0 8.0 10 12 14 16
f, FREQUENCY (Hz)
Vcc/VEE, POWER SUPPLY VOLTAGES (VOLTS)
< 400
^Output
>
t-
|
o
350
300
250
s
200
a
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
10 100
f, FREQUENCY (kHz)
t.TIMEM
2.4
| |
TA - 25C
2.1
Rl
WO
1.8
1.5
1.2
0.9
IbO
0.6
0.3
un
2.0 4.0 6.0 8 10 12 14 16 18 20
5.0 10 15 20 25 30
POWER SUPPLY VOLTAGE (VOLTS) VCC. POWER SUPPLY VOLTAGE (VOLTS)
VCC.
APPLICATIONS INFORMATION
50 k
""X\4 i c>
5.0 k I
! I
Vref
2n RC
Vref = ~ V cc
For f
Q = 1 kHz
V = 2.5 V(1 +^) R = 16 kil
C = 0.01 mF
H ysteres is
OH
OL V in L I
V nH
Vref
(V <-- v r.f>*V r . f
HWR2
VinH =
WTVRl (v H-v ref ).v ref
e = C (1 + a + b) (e2 - e1)
R1
H =
Rl + R2 OH - Vni
(VnH OL )
Vref = = V CC
R1 = 1.6 Mil
Where T BP = Center Frequency Gain
Vref R2-1.6M
TN = Passband Notch Gain R3 - 1 6 Mil
4 CRf R1 R2 + R1
f
Q
= Center Frequency
Gain at Center Frequency
Choose Value f . C
Then
2 A(f )
R1 R3
4Q 2 R1 - R3
Qn<r,
?<0.1 Where f n and BW are expressed in Hz
N SUFFIX
PLASTIC PACKAGE
FIGURE 1 -CIRCUIT SCHEMATIC CASE 626
(Diagram shown is for 1 comparator)
D SUFFIX
Vcc +lnput -Input Output PLASTIC PACKAGE
CASE 751 s^P>
(SO-8)
^ R4 y>*
Q3pWV-r
i
rE
ORDERING INFORMATION
Temperature
Device Range Package
LM193AH.H -55 to +125C Metal Can
8~L
LM293AH.H Metal Can
-25 to +85C
LM293D SO-8
LM393AH,H Metal Can
MAXIMUM RATINGS
Rating Symbol Value Unit
*LM193/193A 0W =
T| -55C, T high = +125C
LM293/293A T| ow = -25C, T h g h i
= +85C
LM393/393A 0W =T| 0C, Thigh = +70C
LM2903 T|ow = -40C, T h g h i
= +105X
Supply Current
R|_ = Both Comparators,
'CC mA
0.4 1.0 0.4 1.0 0.4 1.0
T A =25C
R|_ = = Both Comparators, " 25 - 25 : 2.5
V CC = 30 V
NOTES:
(1) The max. output current may be as high as 20 mA, independent of
(4) Dueto the PNP transistor inputs, bias current will flow out of the
the magnitude of V
cc output short circuits to Vcc can ca "se ex-
,
inputs, this current is essentially constant independent of the output
cessive heating and eventual destruction.
no loading changes will exist on the input lines.
state, therefore,
(2) This magnitude of input current will only
occur if the input leads are (5) Input common mode of either input should not be permitted
driven more negative than ground or the negative supply voltage. to go
more than 0.3 V negative of ground or minus supply. The upper limit
This is due to the input PNP collector base junction becoming for-
of common mode range is Vcc ~ 1.5 V.
ward biased, acting as an input clamp diode. There is also a lateral
PNP parasitic transistor action on the IC chip. This phenomena can Response time is specified with a 100
cause the output voltage of the comparators to go to the
(6) mV
step and 5.0 of ov- mV
Vcc voltage erdrive. With larger magnitudes of overdrive faster response times
level (or ground if overdrive is large) during the time the
input is are obtainable.
driven negative. This will not destroy the device and normal output
(7) The comparator will exhibit proper output state if one of the inputs
states will recoverwhen the inputs become > -0.3 V of ground or become greater than Vcc. th e other input must remain within the
negative supply.
common mode range. The low input state must not be less than
(3) At output switch point, Vrj = 1.4 Vdc, R = fi with V C c from 5.0 -0.3 volts of ground of minus supply.
s
Vdc to 30 Vdc, and over the full input common-mode range (0 volts
to Vcc = -1.5 volts)
FIGURE 2 - INPUT BIAS CURRENT versus FIGURE 5 INPUT BIAS CURRENT versus
POWER SUPPLY VOLTAGE POWER SUPPLY VOLTAGE
1
- 40C
ta = -55C
50 Ta = o c ,
1 1
= oc
TA
T A = +25C
'
1
-i
T/V = +25 : '
'
30 J_A_ |
z Ta^85 C
- 20
T/>
= +125 c
10
35 40 10 15 20 25 30 35 40
10 15 20 25 30
V CC SUPPLY VOLTAGE
. (Vdc)
Vcc- SUPPLY VOLTAGE (Vdc)
Saturati
I
Out of /
"\ _
Out a f
Saturatio n
^^"\
/
5 1.0
T A = + 125C
TA = h85C
1 I ^
0.1
CD TA = +25C .
T A = +25C
< >
\ < 0.01
<^ P^ A = 0C
T A = -55C
^\
1.01 0.1 10 10
^
01
^/ta
01
= -40C
10 10
l
s i nk . OUTPUT SINK CURRENT |mA)
l
sink , OUTPUT SINK CURRENT (mA)
FIGURE 4 - POWER SUPPLY CURRENT versus FIGURE 7 POWER SUPPLY CURRENT versus
POWER SUPPLY VOLTAGE POWER SUPPLY VOLTAGE
1.0
F I
T A = -55C -*0'
A =
-T A = C _ -T A = 0C
_ 0.8
- U.b
^ 25C_
_T A = +25C
cc - TA = +70C_
o
I
-T A = + 12b"b
-T A = -.
85C~
0.4
fc
o
- 0.2 \~- DC RL = -
5 10 15 20 25 30
10 15 20 25 30 35 40
5.0
V cc SUPPLY VOLTAGE (Vdc)
,
APPLICATIONS INFORMATION
These dual comparators feature high gain, wide bandwidth
It is good design practice to ground all unused pins.
characteristics. This gives the device oscillation
tendencies if
the outputs are capacitively coupled to the inputs
Differential input voltages may be larger than supply voltage
via stray without damaging the comparator's inputs. Voltages more
capacitance. This oscillation manifests itself during
output negative than -0.3 V should not be used.
transitions (Vol to Voh)- To alleviate this situation input re-
sistors < 10 kO should be used. The addition of positive feed-
back (< 10 mV) is also recommended.
i ov
v in
y
p /
'
O
v cc-
i
r
M
D1 prevents input from going negative by more than V
0.6 V. ~l i
*- a<9
R1 + R2 - R3
Vee
"3<5| for small error ,n zero crossing
IVCC
vcc
vo
vcc
vo "ON" for t a to + At
where: . .. ,
= RC Vref
At in I
)
VCC
RS = R1 II
R2
(VCC - Vref) R1
Vth1 = Vref +
R1 + R2 + Rl
(Vref - VQ Low) R1
Vth2 = Vref -
R1 + R2 + Rl
INTERNALLY COMPENSATED
MONOLITHIC OPERATIONAL AMPLIFIER
Internally Compensated
Low Offset Voltage: 7.5 mV max
Low Input Offset Current: 50 nA max
Low Input Bias Current: 250 nA max
N SUFFIX
PLASTIC PACKAGE
CASE 626
TYPICAL APPLICATION
HIGH IMPEDANCE BRIDGE AMPLIFIER PIN CONNECTIONS
(Top View)
ORDERING INFORMATION
Temperature
Device Range Package
LM307N 0C to + 70C Plastic DIP
CIRCUIT SCHEMATIC
EQUIVALENT CIRCUIT
Inputs g
Pins 1, 5, and 8
5.0 k 520 k;:
no connection.
LM307
LM307
Characteristics Symbol Min Typ Max Unit
Input Offset Voltage
RS 50 kn, Ta = + 25C
VlO mV
7.5
R S^ 50 kfl, TA = T| 0W to T high
10
Input Offset Current
TA = +25C
'10 nA
50
TA = T low t0 T high
70
Input Bias Current
TA = +25C
250
TA = T low to Thigh
300
Input Resistance
2.0 Mn
Supply Current
VS = 15 V, TA = + 25C
1.8 mA
Large-Signal Voltage Gain
V S = 15 V, Vo = 10 V, R L V/mV
> 2.0 kfl, TA = +25C
VS = 15 V, Vp = 10V, R L ^2.0 kil. TA = T| ow
Average Temperature Coefficient of Input Offset Voltage
TCVio 6.0 30
T low sTA s Thigh u.V/C
NOTES:
1 For supply voltages less than 1 5 V, the absolute maximum input The H package is derated based on a thermal resistance of + 150C/
voltage is equal to the supply voltage.
W, junction to ambient, or +45C/W, junction to case.
2. For operating at elevated temperatures, the device must be derated
3. Unless otherwise noted, these specifications apply for:
based on a maximum junction temperature of 100C for the LM307.
5.0VsV CC/V EE s 15V,T| 0W = 0C,T nigh = +70C
TYPICAL CHARACTERISTICS
< V CC = +15V, VgE = -15 V, Ta = +25C unless otherwise noted.)
FIGURE 1 MINIMUM INPUT VOLTAGE RANGE FIGURE 2 MINIMUM OUTPUT VOLTAGE SWING
20 20
Applies over specified
Applies over specified I |
Range Range
6
^
o
16
'
o
I 12
1 ^
2 <
8.0 5 8.0
Rl. = 2.0 Ml
= 4.0 o 4.0
y/\b jative
d
5.0 10 15
5.0 10 15
Range
2.0
94
1.0
82
0.5
76
n
70
5.0 10 15
5.0 10 15
Vcc AND - Vee). SUPPLY VOLTAGES (VOLTS)
(
o
\
o
\
o
< \
1 +60 o
>
? +40
+ 20 o
-20
100 k
1.0 k 10 k 100 k 1.0 M 10 M 100 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
LM307
+ 8.0
+6.0
+4.0 r- '
~J
/
Input
: +2.0
1
/Output
-2.0
-4.0
/
-6.0
4
-8.0
-iJ- I
30 40 50 80 90
t, TIME M
DUAL OPERATIONAL
AMPLIFIER
DUAL, LOW NOISE, AUDIO
OPERATIONAL AMPLIFIER SILICON MONOLITHIC
INTEGRATED CIRCUIT
The LM833 is a standard low-cost monolithic dual general-
purpose operational amplifier employing Bipolar technology with
innovative high-performance concepts for audio systems appli-
cations. With high frequency PNP transistors, the LM833 offers
low voltage noise (4.5 nV/VHz), 15 MHz gain bandwidth product,
7.0 V/jus slew rate, 0.3 mV
input offset voltage with 2.0 ^.V/C
temperature coefficient of input offset voltage. The LM833 output
stage exhibits no deadband crossover distortion, large output
voltage swing, excellent phase and gain margins, low open-loop
high frequency output impedance and symmetrical source/sink
ac frequency response. N SUFFIX
PLASTIC PACKAGE
The LM833 is specified over the vehicular temperature range
CASE 626
and is available in the plastic DIP and SO-8 packages (P and D
suffixes). For an improved performance dual/quad version, see
the MC33079 family.
MAXIMUM RATINGS
Rating Symbol Value Unit
NOTES:
1. must not exceed the magnitude of Vcc or V EE
Either or both input voltages
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not
FIGURE 1 MAXIMUM POWER DISSIPATION FIGURE 2 INPUT BIAS CURRENT versus TEMPERATURE
versus TEMPERATURE
1000
p 600
-VC C= +1 V
v E E= -15 V
vc M - OV
KA tr
3
o
600
\
i 200
VA
a.
400 ^
-=^200
\
V
50 100
-25 25 50 75
TA AMBIENT TEMPERATURE
, (C>
Ta, AMBIENT TEMPERATURE CO
FIGURE 3 INPUT BIAS CURRENT versus SUPPLY VOLTAGE FIGURE 4 SUPPLY CURRENT versus SUPPLY VOLTAGE
800 10
1
v cc
RL =
8.0 -
(k = 25C
~ 600
>A
CC
O
<g 400
CO
-^ 5V
^
4.0
v E
m200
2.0
/
/
(1
10 15 20 5.0 10 15
V CC ,
|V EE |, SUPPLY VOLTAGE (VOLTS) V C c, IVeeI- SUPPLY VOLTAGE (VOLTS)
FIGURE 5 DC VOLTAGE GAIN versus TEMPERATURE FIGURE 6 DC VOLTAGE GAIN versus SUPPLY VOLTAGE
110
RL = 2.0 kfl
Vcc = +15V
= -15 "T A = 25C "
Vee V
Kl - Z.U KS
10 15
-55 -25 25 50 75 100 125
TA AMBIENT TEMPERATURE
,
(CI VCC. v EeI- SUPPLY VOLTAGE (VOLTS)
I
FIGURE 7 OPEN-LOOP VOLTAGE GAIN AND PHASE FIGURE 8 GAIN BANDWIDTH PRODUCT
versus FREQUENCY versus TEMPERATURE
20
5
o
ZD
15
Q
o "^. '-^^
10
o
<
m Vcc = +15 V
V EE = -15 V
1 5.0
= 100 kHz
f
I
n
100 1.0K 10K -25 25 50 75
f = 100 kHz
TA = 25C
?fl
10
5 1 ) 5 20
1
-25 26 50 75 100
VCO |V
EE |, SUPPLY VOLTAGE (VOLTS) T A AMBIENT TEMPERATURE
, (C)
FIGURE 11 SLEW RATE versus SUPPLY VOLTAGE FIGURE 12 OUTPUT VOLTAGE versus FREQUENCY
10
35
Rl = 2.0 kn
AV = + 1.0
30
TA =
FALLING
J- 25
3. ~
RISING ID
m 6.0
20
2 o
s
3 40 I 15
n HcS> ^>Vo
vi
i 10
2.0 b
I
1 1
_Rl =
I
10 kn Vq+
IS
Ta = 25C
10
"~-
^^7
?0
5 1 ) 1 20 25 50 75
v CO SUPPLY VOLTAGE (VOLTS)
IVeeI. TA AMBIENT TEMPERATURE
, |C)
LM833
140
vcc == +15V oAVcc
I I I I
vcc = + 15V av cm r
:
^\
100
V EE =
Ia = 25C
-15V - %
140
120
v CM = ov
~i_|+ X AV
-PSR + 'SR
II 80
60
+ F SR = 2 OLog
i'av Q/A m\
40 V " V CU /"I
1 II II 1 1 1 II
20
-F SR = 2 OLog
{<WE E /
i 1 i ?n
1.0K 10K 100K 10K 100K
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
FIGURE 17 TOTAL HARMONIC DISTORTION FIGURE 18 INPUT REFERRED NOISE VOLTAGE versus
versus FREQUENCY FREQUENCY
1.0 1 1 III
llll
Vcc = + 15V
I II
I
I I
T
T
V EE = -15 V f
j = T
vo RL 2. OlcJ 1
Ay^~ TA = 2 C tn t
*L T
0.1 I it
T JTJ
T
--
J
lllll
V EE = -15 V
1
0.01
I rs = 100 n
v = 1 0V r nsL 1 TA "=
L
1
II 1 1 1 ] J
v Vrms
(XII 1
7 )'l
100 1.0K 10K 100 1.0K
FIGURE 19 INPUT REFERRED NOISE CURRENT FIGURE 20 INPUT REFERRED NOISE VOLTAGE
versus FREQUENCY versus SOURCE RESISTANCE
f Illlllll
Vcc = + 1 5\
II mttH MHH ftj
<"
V n (total) = (i
n R s )2 + e n2 + V4KTRS
Vff- = +1 5V ]
1.0 T \ = 25
rr V EE = -1 V
<J
> T
C/3
0.7
o
*
Q 05 "ffflt"
04 li
QC
1
0.3
r
Z
-F 0? I III
2.0 kn
H Cl = o pf _!
_L_ i.
Ay = +1.0 1 / i !
1 TA = 25C
i \
L i
./.
:
V 1
P
/' J
- i
;.J .
i t.i __l
t, TIME (2.0 ms/DIV TIME
t, (2.0 Ms DIVj
|Ta = 25C
!
I
i
-
t T \
,,..,
iPt~
;"
-|
1
,i -...J
1" t
t"""
1~
i
I.J QV ZOftru J !
PIN CONNECTIONS
Outputs
ELECTRICAL CHARACTERISTICS (V Cc = +12 Vdc, V EE = -6.0 Vdc, T A = 25C unless otherwise noted.) (Each Comparator)
MC1514 MC1414
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage
VlO mVdc
(V = 1.4 Vdc, TA = 25C) - 1.0 2.0 1.5 5.0
<V = 1.8 Vdc, T A = T|ow*) 3.0 - 6.5
(V = 1.0Vdc.TA = T hiah ) 3.0 6.5
Temperature Coefficient of Input Offset Voltage AV|o/AT 3.0 _ 5.0 /xV/C
Input Offset Current
ho /xAdc
(Vo = 1 .4 Vdc, TA = 25C) 1.0 3.0 - 1.0 5.0
(V = 1.8Vdc,T A = T, ow )
- 7.0 7.5
(V = 1.0Vdc,TA = T hiah ) 3.0 7.5
Input Bias Current
IB /uAdc
(V = 1.4 Vdc, TA = 25C) - 12 20 - 15 25
(V = 1.8 Vdc, T A = T| 0W ) 45 18 40
(V = 1.0Vdc,T A = T hiah ) 20 40
Open Loop Voltage Gain Avol V/V
(TA = 25C) 1250 1700 - 1000 1500 -
< TA = T low t0 T hiqh< 1000 800
Output Resistance Ro 200 200 Ohms
Differential Voltage Range V IDR 5.0 5.0 Vdc
High Level Output Voltage VOH 2.5 3.2 4.0 2.5 3.2 4.0 Vdc
(V| D s 5.0 mV, lo 5.0 mA)
Low Level Output Voltage vol Vdc
(V|D * -5.0 mV, Iqs = 2.8 mA) -1.0 -0.5
(V|D 3= -5.0 mV, Iqs = 1.6 mA) -1.0 -0.5
Output Sink Current
!OS 2.8 3.4 1.6 2.5 mAdc
(V|D * -5.0 mV, Vol =5 - 4 v,
T A = T low t T hiqh>
Input Common Mode Voltage Range V ICR 5.0 5.0 - - Vdc
(V EE = -7.0 Vdc)
Common-Mode Rejection Ratio CMRR 80 100 70 100 - dB
(V EE = -7.0 Vdc, Rs 200 fl)
Total Power Supply Current, Both Comparators !CC 12.8 18 12.8 18 mAdc
(V 0) lEE 11 14 11 14
Total Power Consumption, Both Comparators PD - 230 300 - 230 300 mW
*T| w - -55C for MC1514, 0C for MC1414
Thigh + 125Cfor MC1514, +75C for MC1414
V b = 95 mV - V|
Output
MC1414, MC1514
TYPICAL CHARACTERISTICS
(Each Comparator)
FIGURE 3 - VOLTAGE TRANSFER CHARACTERISTICS FIGURE 4 - INPUT OFFSET VOLTAGE versus TEMPERATURE
3.0
I
r --55C
J.Ui
AV
V
-+ 25(
+ 125
.,
^
2.0 \Y
\\ ^MC1414
\
\
V
.
+ 125C- MC1514
^ _CH-'
^-
+ 25C-
\
FIGURE 5 INPUT OFFSET CURRENT versus TEMPERATURE FIGURE 6 INPUT BIAS CURRENT versus TEMPERATURE
1" 1 20
z Z
5= 3.0
=3
u O
DO
o 2.0
i
Z3 z
Z * 10
-1.0
5.0
T A AMBIENT TEMPERATURE
,
("CI T A AMBIENT TEMPERATURE
, TO
V EE = - 7.0 Vdc
-6.0 Vdc
- 2000 2000
-5 OVdc
MC15 14
g 1000 1500
V1C1414
1000
11 12 13 -55 -25 25 50 75 100 125
Vco POSITIVE SUPPLY VOLTAGE (Vdc) TA AMBIENT TEMPERATURE
, (C)
o 2.0
3:
E
20 mV 0\ erdrive z
I
\\V~ 5.0 mV Overdrive - o
250
10mVO verdrive
1\\\ I
5
20mV( verdrive
T\\\r 9
5
en
200
Q
150
20 40 60 80 100 120 -55 -25 25 50 75 100 125
t, TIME (ns)
Ta, AMBIENT TEMPERATURE (C)
^>-p^^<>|MRTl)o:i
3.0
10 2.0
--^rmWMRT L
1.0
Med Power >
- IV
1.0
0.1 0.2 0.5 1.0 2.0 5.0 10 -50-25 25 50 75 100 125
FIGURE 13 CROSSTALKt
3.0
/
Z 20 1
ein = 50 mV PT-TU
o
" 1.0 1
/
I
-1.0
T j
^
^ 2.0
TIME, 50 ns/div
signal at amplifier #1.
-o * o
U SUFFIX
CERAMIC PACKAGE
CASE 693
r
D SUFFIX
PLASTIC PACKAGE
FIGURE 2 TYPICAL NONINVERTING XI CASE 751
VOLTAGE AMPLIFIER (SO-8)
2
Input '
vee L
ORDERING INFORMATION
Device Temperature Range Package
MC1436CD.D SO-8
MC1436P1.CP1 Plastic DIP
MC1436CG.G
0Cto +70X Metal Can
MC1436CU.U Ceramic DIP
MC1436C
Characteristic Symbol
Input Bias Current
TA = +25C
TA " T|ow to T m9n (See Note 1)
T A =+25CtoT mgh
T A = T| ow to +25C
Input Offset Voltage
TA = +25C
TA T low IO T high
Gain Margin
t Output Curi
(V - O)
Note 3: Either or both input voltages must not exceed the magnitude of Vcc or V EE + 3 " volts.
_ bU
f+28V
> 76
2JV
o
O 40
* o
> c- sn- ?4 ;10k
tr
i .... .
-
o
>
Drift flue to bias current
is typically 8 mV s
f, FREQUENCY (kHz)
FIGURE 5 PEAK OUTPUT VOLTAGE SWING versus FIGURE 6 OPEN-LOOP FREQUENCY RESPONSE
POWER SUPPLY VOLTAGE
Jb
<
Q. 1
30 T
o
> 25
CD
I 20 .
= 5kf
5
1 '
.0
+-
3
5.0
O
6
10 20 30 40
f. FREQUENCY (Hz)
FIGURE 7 OUTPUT SHORT-CIRCUIT CURRENT FIGURE 8 INPUT BIAS CURRENT versus TEMPERATURE
versus TEMPERATURE
32 3.Z
I o
J 28 a 2.8
t
QC
2.4
SOUR :e
O
20 - 2.0
t-
z
S
oc
1.6
SINK <J
g
"
eo
5 0.8
a,
g 4.0 * 0.4
Z2
Z1 (-1
-i. 2
fT^ t-.
ex ;
.
2|
t z 0\ V '0
r3 :
M
,V 2 3
11
^ i
IF A u)-~ '"
Ao
1+Z
M Z]
i
VERY HIGH
2/Z,
V Z2
A U "v7
"
Z|
A U -
V
^=l + Z 2/ Z
,
When
A <)
z -0
A (ut
CURRENT DRAIN.
ID * 100 mAdc @
R1 = 51 n
Di,D2, D3= 1N4001
COMMON
HEAT SINK
V = 48 Vp.p
P = 72W (rrm) {5) RL = 4 S2
P = 36 W (rms @
,
RL = 8 !2
0.1 F
INVERTING
2 O
l
VW
[
OFFSET
1 ADJUST
m
Large Output Voltage Swing -
14 V typical @15 V Supply
-65 to +150
Input Lag A [3 Tj] Output B
Storage Temperature Range T stg C
Input Lag A |_4^
111 Input Lag B
Non Inv.rT" T-
hV
V CC 9 14 ?11 Input Lag 1
InputLL, l^r 9 Non Input Inv.
v E e[ ^r- _U Input
-TTl Inv.
Input Lag O- 1
Non-Inverting o_^
Input
Inverting Input o-
-|
J^ L SUFFIX
CERAMIC PACKAGE
CASE 632
Inverting Input o
Non- Inverting 2
Input 2 <
Input Lego
ORDERING INFORMATION
Device Temperature Range Package
MC1437L Ceramic DIP
0Cto + 70C
3 Input Lag 2 MC1437P Plastic DIP
MC1437, MC1537
ELECTRICAL CHARACTERISTICS - Each Amplifier (V
cc = +15 Vdc, V EE = -15 Vdc. TA = + 25C unless otherwise noted.)
Input Impedance
*i 150 400 - 50 150 - kS2
(f = 20 Hz)
Output Voltage Range V R v peak
(R|_ = 10 kS2) + 12 + 14 - 12 14 -
(R[_ = 2.0 kil) + 10 + 13
(
Gain = 10, 10% overshoot, ) TLH 0.6 06 MS
! R 1 - 1 kS2, R2 = 10 kU, 'PLH-tPHL 0.34 - 0.34 MS
J
(R3= kU.C! =500pF,C 2 20pF SR - -
1.5 = J 17 1.7 V/ M s
1 Gain = 1, 5% overshoot, ) l
TLH 2.2 2 2 MS
Rl = 10k<>. R 2 = 10ks>, tPLH-tPHL 13 13 MS
J
Channel Separation e o1
(f = 10 kHz) - 90 - - 90 - dB
eo2
OUTPUT
TEST CONDITIONS
FIGURE CURVE VOLTAGE NOISE
NO. NO. GAIN Rl() R 2 (!l) R 3 (S2) C,(pF) C 2 (pF) (mV&mat
+60 1 mi MM rt
L
cu RV E4 II
+10 nil |
CURVE 1
V 2 3&4
_ + 50
CO
z+40 I!
< 3
u
+30
f ,<
<
i-
/ +20
/
f <
2
+10
/ II
1
j
I -5.0 1 III I || 1 ||
( RL = -)
300
c UF VE1 2 3 4 5 p = 0VO
100
50
MC1437, MC1537
? 16
TA = 25C
S 14
3
,2
S VlCR-/"
<
^
o 10
>
o l
^v|CR +
2 B
o
_..
>
n n
VCC and Vee, POWER SUPPLY VOLTAGE (VOLTS) Vcc and Vee, POWER SUPPLY VOLTAGE (VOLTS)
Av
It
1000 C]
S\^^>
= 10 pF
^J=
C2
+1
-v f\
3.0 pF
;
= =
-j- hr [j
ij_,
1
I
~~~ -
Av = 10 Ci = 510 pF C 2 = 20 pF Ri= 1.5
c r nnn en
-20 +20
1
n
Psr"
I \j
+40 +60 +80 +100 +120 +140 1.0k 10k
TA , AMBIENT TEMPERATURE (C> ^S, SOURCE RESISTANCE (OHMS)
e
0l
= 1.0 Vrms
'out2
VQ(dc) = V
100 k
Compensation
SR 2: 35/Vijs
(Top View)
10 k <Rc <100(Rt) (V rc )
"LP
rT i
-5lV z
i
10k
Ww ci
Device
ORDERING INFORMATION
Temperature Range Package
MC1439G Metal Can
0C to + 70C
MC1439P1 Plastic DIP
MC1539G -55Cto + 125C Metal Can
I
TCVio |
(R S = 50 a) - 3.0 - - 3.0 -
Step Response
I Gain = 1000, no overshoot, i
THL 130 130 ns
MC1439, MC1539
^) 4 O OUTPUT
7,10,12
3
10k
10k
5
10k
1.0 k
k 2200
2200
2200
t^vw-i
1.0 M !t>k 1000
6 1000
e
2200
,Tk
13
t
ALL 1
J]10k
'
10k
'
5.0k
I
390 10k 2200
,4 ALL 10 1.0k 10k 1 Ok 1 Ok 10k 2200
IS ALL 100 1.0 k 100 k 10k 10k 10 k 2200
16 ALL 1000 1.0k 1 OM 10k 30 k 10k 2200
MC1439, MC1539
(Vcc " +15 Vdc, VgE = -15 Vdc, T"a = +25C, unless otherwise noted.)
FIGURE 7 - LARGE-SIGNAL SWING versus FREQUENCY FIGURE 8 - OPEN-LOOP VOLTAGE GAIN versus FREQUENCY
24 110
22 TTTT
s 10
II
_ 20
Z 90 mil
S
S 18 R|_ = 2.0kOHMS Ml
> S
S
5 '6
i
v f
5
!
s -ARROWS INDICATE JJi \ 6
i 12 !s\ UNCOMPENSATED P
S
1"
6
!AN
2
N
3 > 4
IN
"
4.0 I I I
| 20
TrU
S5%1 HD it 1
2.0
II
10 k 100 k
J 10
0L lllllll llll
10 k
llll
100 k
II
2
I
1
30
I' I I III ^ 1
18 VOLT SUPPLIES
inn
_ 25 III III 6 ^ \1
R|_ = 2.0k OHMS
15 VOLT SUPPLIES
>
12
Mill
VOLT SUPPLIES
4
!
<
!
5
V
15
t-
a-
S 10
o
O I j
> fin = 1.0 k Hz
-
5.0
100 200 300 500 700 1.0k 2.0 k 3.0 k 5.0 k7.0 k 10 k 1.0k 10k 100 k 1.0 M
R|_, LOAD RESISTANCE (OHMS) f. FREQUENCY (Hz)
I
I iim^ I
R 4 = 0,
4
Ci = 10 pF
C1 = 1000 pF
fin = 10 kHz 50
I
RL=10kOHM Mini
K4 = 10kOHM , Ci = 2200 3h
5
? 40 i
y\ vcc'oo.k
<
CD
30
"V
_S
y^ VEE 4
If"vJ
^
i
10 k
T K4 = 1.0 k OHM Ci =2200p F
^v a
/ -^+Vn f ' -1
,.
20 !
!
"v
rA
-A-V- -f-Vo
9
'^ "W 1.0 k
r~
10
13 14 15
1
16
1
17
1
1.0 k
I
i 1 lllllll 1 1
"
1^ M
2
10 k 100 k 1.0 10 M
VCC^EE' POWER SUPPLY VOLTAGE (VOLTS) f, FREQUENCY (Hz)
*Aq|_ = Closed-Loop Gain
I
+15
+10
+5.0
i
10 k f
"
fv.
^T2200p
V 10 k
eo
F
AW
A->* riii
Ml
.
+25C
-55C
z
to
a. I
Hi
d . "\
_L 390
I
o
1 o
o
+20
Mill
1
\\
'
S -5-0 J \1 _L 10 k +25C
o
- 10
Pea lint can beeli min at dby \ "
^ *^ inn
y^ ^2200
Ji u sing heavier compensation
\
u
<
-15
a t the expense of slight band-
rid th educ tion.
H 125 C
-
x
i 1.0 k
pF 125C
FIGURE 15 -A CL = 100 RESPONSE versus TEMPERATURE FIGURE 16 - ACL = 1000 RESPONSE versusTEMPERATURE
65 . , , i
'__''' '" 85 I 1 1 1 1 II Ml 1 Mil
I
60
e n #-^/w-e-6 -^sl (10
-^
fi?*
^S.6 ^>-o*#e
'o
5 50
^08
< <
" 45 1.0 \J\ !200 pF t .1. i okp'^^PiooopfJ
o i ( i) 10 k -55C o 30 k
S 40 3 60 ,
Q
| 35 c +25 C
o
6 t
". 30
u Jf
\
f\
I I
i? ^c
1 ^ + ' 5C [
< 25
rT t
20
+125C
15 ll III 35 J LL...1.
10 100 1.0 M 10 100 1.0 M 101
FIGURE 17 - SPECTRAL NOISE DENSITY FIGURE 18 - OUTPUT NOISE versus SOURCE RESISTANCE
i
Nil'!. 100 1 11
L
RS=10k
r~ >
llll 1
1.0 k 10 k 1.0 10
MC1439, MC1539
v =
120
110
100
90
^^""V.
I I
i
|
+25C |
1.0 k 10 k 13 14 15 16
5.0 10 15 20
TIME ((is)
TYPICAL APPLICATIONS
2| n >40MOHMS
eo = " 61
+ e2 + e3
ST ri;
R1.R2 Rl Ft2
ForR3 :
R1 + R2 Properly Compensated
'Properly Compensated
Return #- - Vq Return
TYPICAL APPLICATIONS
L SUFFIX
CERAMIC PACKAGE
CASE 632
V C C9 ? V EE
PIN CONNECTIONS
RF.-|e
Input
Output \_\_
Gate [V
Noninv. Input B |
3 -
Inv. Input B [4 -
-rIf Audio Input Noninv. Input A 5 -
Modulation Adjust '-Vi
5.0 k Open Inv. Input A |
6 -
Output [~7
?V EE
ORDERING INFORMATION
Device Temperature Range Package
5.0 k
MC1445L 0Cto + 75C Ceramic DIP
Bias Adjust
ELECTRICAL CHARACTERISTICS (V Cc = +5.0 Vdc, V EE = -5.0 Vdc, at TA = +25C, specifications apply to both input channels
unless otherwise noted.)
AV
1
- - -
17 15 15 mV
(Gate Input Voltage Change: +5.0 V to V)
Common-Mode Rejection Ratio 9,18 CMRR - 85 - - 85 - dB
(f = 50 kHz)
Input Common-Mode Voltage Range 18 VlCR - 2.5 - _ 2.5 _ Vp
Gate Characteristics 8 0.40 0.70
V|L(G) 0.2 0.4 Vdc
Gate Input Voltage - Low Logic State (Note 1
Gate Input Voltage - High Logic State (Note 2) V IH(G) 1.5 2.2 1.3 3.0
Gate Input Current Low Logic State 18 - - - -
'lL(G) 2.5 4.0 mA
(V, UG , =0V)
Gate Input Current - High Logic State 18 'lH(G)
- - 2.0 - - 4.0 MA
< V IH(G) =+5.0V)
Step Response 19 tPLH 6.5 10 6.5 ns
(e in = 20 mV) tPHL - 6.3 10 6.3 -
*TLH 6.5 15 - 6.5
l THL 7.0 15 7.0
Wideband Input Noise 10,20 en - 25 - - 25 - /uV(rms)
(5.0 Hz - 10 MHz, R s = 50 ohms)
20
15
I
10
5.0
n
-25 *-25 +50 +75
25
15
f
" 50 kHz
10 III
VCC VEE. POWER SUPPLY VOLTAGE (Vdc) RL. LOAD RESISTANCE (k OHMS)
FIGURE 5 - INPUT Cp AND Rp versus FREQUENCY FIGURE 6 - OUTPUT IMPEDANCE versus FREQUENCY
(BOTH CHANNELS)
7.0 200
1
2.0 > o 60
m /
- V|| rm s) 1.0
'
40
J
|
5.0 10 1.0
80 -
10 4 105 10 6
1 00
90
\ s
B ant width = 5.0H z t o 10ft(IHz
an
70
R0
50
40
in
n
0.01 0.1 1.0 10 10 100 1.0 k 10 k 100 k
Q -5.0 V
CS < <
FIGURE 13 - OUTPUT VOLTAGE SWING TEST CIRCUIT FIGURE 14 - INPUT IMPEDANCE TEST CIRCUIT
5.0 V O O -5.0 V
f = 50 kHz
V| = 50mV(rms>
f = 50 kHz
Vi = 200 mV(rms)
FIGURE 15 - OUTPUT IMPEDANCE TEST CIRCUIT FIGURE 16 - INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT TEST CIRCUIT
5.0 V ft O -5.0 V
V5.0 V Q O "5.0 V
AV Q = Change in V2 Reading
Switch S and readjust R for V., = +5.0 V
1 1
FIGURE 19 - PROPAGATION DELAY AND RISE AND FIGURE 20 - POWER DISSIPATION AND WIDEBAND
FALL TIMES TEST CIRCUIT INPUT NOISE TEST CIRCUIT
V.
mV
>X %
^^ ^ To
L
"B" Channel
V, = 20 7
" of Scope
tTLH = tTHL < 50 n L
1
C[_ = 15 pF including probe and
P D = 5 ('CC +
jig capacitance 'EE>
1-WATT
1-WATT POWER AMPLIFIERS POWER AMPLIFIER
INTEGRATED CIRCUIT
SILICON MONOLITHIC
EPITAXIAL PASSIVATED
. designed to amplify signals to 300-kHz with
. .
External
Compensation
Low Total Harmonic Distortion - 0.4% (Typ) @ 1 Watt
VEE
Low Output Impedance - 0.2 Ohm
External
Excellent Gain Temperature Stability
Compensation
Gain
Options (top view)
G SUFFIX
METAL PACKAGE
CASE 603C
f, FREQUENCY (Hz)
1 ow
( 75 H.
& 10
i<n
0. :5Vi
0.1 w
I
10
Characteristic Definitions
(Linear Operation)
FIGURE 1 FIGURE 3
FIGURE 2
FIGURE 5
"v-iio y Vol*). ^
ftr*E 12
TYPICAL CONNECTIONS
FIGURE 6 - SPLIT SUPPLY OPERATION VOLTAGE FIGURE 7 - SINGLE SUPPLY OPERATION VOLTAGE
GAIN (Av) = lO.fLow^ 251^ GAIN A V> = 10 ^LOW* 100 Hz
< >
6 100 /(F
g
-+rt^
C2
01,tF
J-
T ^ I-
"IT
RECOMMENDED OPERATING CONDITIONS
In order to avoid local VHF Instability, the following set of rules must be 3, Lead lengths from the external components to pins 7, 9, and 10 of the
adhered to: package should be as short as possible to insure good VHF grounding
for these points.
1. An RC 10 ohms) should be
stabilizing network (0.1 / ( F in series with
placed directly from pin 9 to ground, as shown in Figures 6 and 7, using
short leads, to eliminate local VHF instability caused by lead inductance Due to the large bandwidth of the amplifier, coupling must be avoided be-
to the load. tween the output and input leads. This can be assured by either (a) use of
2. Excessive lead inductance from the Vcc supply to pin 10 can cause high short leads which are well isolated, (b) narrow-banding the overall amplifier
frequency instability. To prevent this, the Vcc by-pass capacitor should by placing a capacitor from pin 1 to ground to form a low-pass filter in com-
be connected with short leads from the VcCP m to ground. If this capaci- bination with the source impedance, or (c) use of a shielded input cable. In
tor is remotely located a series R-C network (0.1 /iFand lOohms) should applications which require upper band-edge control the input low-pass filter
be used directly from pin 10 to ground as shown in Figures 6 and 7. is recommended.
TYPICAL CHARACTERISTICS
FIGURE 8 - TOTAL HARMONIC DISTORTION FIGURE 9 - TOTAL HARMONIC DISTORTION
versus LOAD RESISTANCE versus FREQUENCY
1
f = 1 kH i llllllll
Av = 36 V/ V 1
Av = 36, R L = 10n
1{
91
AXP0VI/ERO UTP UT
%M *XP0Vl/ER C UTP UT
"I
~Ti
|
|||
I
36, 16 n
18 VA iiiiii
^
| l
i
18, ion
llllllll |
I6n
jQ s
18,
in IN
*^S
^ v^
^s.
^.
1 1 MINI
io,
10, 16
ion
n
1
^- p out = w (rms)
SO
5+4.0
E 1
j
RL = 16 0HMS
a
z V C C-8Vdc
<
S +2.0
o
30 <
25
o
>
20 18V/V =>
t-
IS |
O
10V/V
S-20
o
s
n
a
-i-4.0
s 25 53 7 ) 100 125
1 -
55 25 25 50 75 100 125
Ta .AMBIEN r TEMPER *TURE<( )
T A AMBIENT TEMPERATURE
, <C)
A V = 36V/V
V = 12 Vp-p
V CC = 16V
(See Figure 7)
f, FREQUENCY (Hz)
-40 o
-60 r
-76 uj
-90
0.7 u <
r-25 -
-40 | f 1 10
*
0.5
-60
18V *~
-80 z -125
BV Z
14V -100 ^
SUPPLY VO LTAC E. |V
CC + |V E 1=1 v
m
l
"
sl 1
1 1 1 II
2.0 5.0 10 20 50
OPERATIONAL AMPLIFIER
INTERNALLY COMPENSATED, HIGH PERFORMANCE SILICON MONOLITHIC
OPERATONAL AMPLIFIER INTEGRATED CIRCUIT
P1 SUFFIX U SUFFIX
PLASTIC PACKAGE CERAMIC PACKAGE
TYPICAL INPUT BIAS CURRENT AND INPUT CASE 626 CASE 693
OFFSET CURRENT versus TEMPERATURE for MCI 556
Offset Null (T T] N.C.
H CH56C
r
ORDERING INFORMATION
Device Temperature Range Package
26
INPUT FFSETC JRRENT MC1456G.CG Metal Can
L 0C to +70C
MC1456CP1.P1 Plastic DIP
5 -25 +25 +50 +76 +100 +12 5
MC1556G Metal Can
T A AMBIENT TEMPERATURE (C) -55Cto +125C
,
MC1556U Ceramic DIP
340
2 fts/DIVISION
7.7 k :M f
1 k 5 39k h k i 7.7 k 39 k i^O Vcc
ELECTRICAL CHARACTERISTICS <Vcc =" + '5 Vdc .vee = - 1 5 Vdc T A = +25C unless othervtfise noted).
TYPICAL CHARACTERISTICS
(Vcc = +15 Vdc, Vee = -15 Vdc, Ta = +25C unless otherwise noted).
21
l|
18
^x- :
12 1 M
,+15 V
:i0k$ M -V
/C
V
8W=10Hi
= ,
15V . ."Ml
i_i ,
n |
1.0 k
3.0 6.0 9.0 12 15 18 21
MC1456
100 M ;1456C
80
_ < 300 k
40 _j 100 k
?n
.26 +25 +50 +75 +100 +125 +150 +175
1.0 k 10 k 100 k 1.0 M 10 M 100 M
Ta, AMBIENT TEMPERATURE (C>
f, FREQUENCY (Hz)
5.0 10 15 20
1.0 k 10 k 100 k
I 45
t-
CO AC 1456
B -45 5
QC
40 * 1 AC1456 c
-*
QC
35
3
5
o
30
| -in
25
|
20 SINK
|
-135 15
"
'
10 SOURCE
1b.O
-180
o
~~
10 10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M -75 -50 -25 +25 +50 +75 +100 +125 +150 +175
f. FREQUENCY (Hz) T A AMBIENT TEMPERATURE CO
,
*N,
24 V
\
> 20 \
a v
f Ifi
\
>
)-
3 12 I
V
\
o
6
8.0 E L
+ ^s^
__X v
1 ^ 1
1
1
Vullll
1 1 1 llllll
1
10 100 1.0k
500 1.0 k 2.0 k 5.0 k 10 k
f, FRE 1UE NCY (kh z)
RL. LOAD RESISTANCE (OHMS)
V =
S 5.0
4.0
d
a.
3.0
2.0
TYPICAL APPLICATIONS
Where values are not given for external components they must be selected by the
designer to fit the requirements of the system.
O v
is typically 8 mV/s
VQ = -10V|
100 k
Vj >0 vw
Vq = Kiln (K2Vi)
OFFSET
ADJUST
MOTOROLA
MC1458
SEMICONDUCTOR MC1458C
TECHNICAL DATA MC1558
(DUALMC1741)
DUAL
(DUALMC1741) OPERATIONAL AMPLIFIERS
INTERNALLY COMPENSATED, SILICON MONOLITHIC
HIGH PERFORMANCE INTEGRATED CIRCUIT
DUAL OPERATIONAL AMPLIFIERS
. . . designed for use as a summing amplifier, integrator, or ampli-
fier with operating characteristics as a function of the external G SUFFIX
feedback components. METAL PACKAGE
CASE 601
No Frequency Compensation Required
Short Circuit Protection
Wide Common Mode and Differential Voltage Ranges
(Top View)
ORDERING INFORMATION
Device Temperature Range Package
MC1458CD.D SO-8
MC1458CG,G Metal Can
0to +70C
MC1458CP1,P1 Plastic DIP
Note 1. Input pins of an unused amplifier must be grounded for split supply operation or biased at least 3.0 V above V EE for single supply operation.
FIGURE 1 - BURST NOISE versus SOURCE RESISTANCE FIGURE 2 - RMS NOISE versus SOURCE RESISTANCE
ou
FFH-
DH Z
N= 1
,,
* 1
' DkH z rr' til T"
N= 1.0 Hz to 1.0 kHz
10
z U|~-
i _,_
I 1.0 =: = 2S3=:
3 =1 '-+t
itt
- I
01 _ I 111 II
i mil i 11
100 1.0 10 k 100 k 1.0 M
,0 100 1.0 k 10k 100k 1.0 M
RS, SOURCE RESISTANCE (OHMS)
RS, SOURCE RESISTANCE (OHMS)
10 k 100 k 1.0 k 10 k
1.0 k
100 k
To Pass/Fail
Indicator
TYPICAL CHARACTERISTICS
(V CC = +15 Vdc, V EE = -15 Vdc, T - + 25C unless
A otherwise noted).
-J
| ^^
L
\
\
( /OLTA GE FC LLO WER) \
i HD-r 5% |
II \\
"^
L
|
1.0 k
100 1.0k 10k 100k 1.0
\
M 10 M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
-; j.-( i i. -
_
14
13
/
r 15 VSUPPLIES
{2 12 .15 VSUPPLIES
? 11
/
12 V >
< -9
^/ 12 V
,t
9 V
i- 7
> -7 /
6.0
50
-6
/ 9 V
{'
4.0 6 V
> s /
3.0
1.C
-1.0
'00 200 500 700 1.0 k 2.0 k 100 200 500 700 1.0 k 2.0 k 5.0 k 7.0 k 10 k
R|_, LOAD RESISTANCE (OHMS) LOAD RESISTANCE (OHMS)
RL,
+27 V
22
20
I
100 MP
If-
1 k
vCc
10 k
1R +21 V
k ->"i
i
16
+ 18 V
14
V 200 k>
+ 15V < '7
10 50 k 2
an 100 mF
+ 12 V
~[ 50 k
60
+9.0 V 200 kS -Lm
40 3
70
! 1
+6.0
+5.0
V
V
2. 3. D 4. 3 5. ) 6. 7 8 9
1
1 ]
T4
r
Rl LOAD RESIST ANCE
,
km
/ .OUTPUT
./
/
t
INPUT
To Scope |
|
(Output)
/p c u
$ X
tuu
\ 90
j 8b
70
20 40 6.0 8.0 10 12 14 16 18 20
VCC IVEEl. SUPPLY VOLTAGES (VOLTS)
PI SUFFIX
MSB A1 5< * V ref PLASTIC PACKAGE
A2 6 <
CASE 626
A3 7 (
(MC1458S Only)
A4 8 c
MC1508L-8 V cc = 15 V
MC1408L
A5 9 <
Series
A6 10C
A7 11 c s r^ U SUFFIX
CERAMIC PACKAGE
LSB A8 12 C
CASE 693
Moninverting r
3
Theoretical Vg Input A I
Adjust V ref Rl
, or R so that V with all digital inputs at high level
(Top View)
is equal to 9.961 volts.
V = V
2
<5k)
8 16 32 64 128 256
[2551 9961 V
MC1458SG
MC1458SP1
0"Cto +70C
Metal Can
Plastic DIP
2^6-f MC1458SU Ceramic DIP
MC1558SG Metal Can
MC1558SU -55Cto +125X
Ceramic DIP
Note 1 . For supply voltages less than 15 Vdc, the absolute maximum input voltage is equal to the supply voltage.
Note 2. Supply voltage equal to or less than 15 Vdc.
MC1558S MC1458S
Characteristic Symbol Typ Typ
Power Bandwidth (See Figure 31 BW D
A- = 1,RL = 2.0kn, THD = 5%, V = 20 V(p=-p)
Large-Signal Transient Response
Slew Rate (Figures 10 and 1 1
V(-l to V(+)
20 20
V(+l to V(-)
12 12
Settling Time (Figures 10 and 1 11
'setlg 3.0 3.0
(to within 0.1%)
Small Signal Transient Response
(Gain = 1, E ln = 20 mV, see Figures 7 and
8)
Rise Time
l
TLH 0.25 0.25
Fall Time
THL 0.25 0.25
Propagation Delay Time
tPLH.'PHL 0.25 0.25
Overshoot OS 20 20
Short-Circuit Output Currents
'OS
Open-Loop Voltage Gain (R L - 2 kn) (See Figure 4) AVOL
V +10 V --
200.000 20,000
Output Impedance (f = 20 Hz)
Input Impedance (f = 20 Hz)
Output Voltage Swing V V pk
R|_ 10 kn
14
Rl :
2 kn
13
ELECTRICAL CHARACTERISTICS (V Cc = + 15Vdc,V EE = -15Vdc,TA = -55 to +125X for MC1558S and TA = to 70C
for MC1458S, unless otherwise noted.)
MC1558S MC1458S
Characteristic Symbol Min Typ Max Min Typ Max Unit
Open Loop Voltage Gain A VOL ~ -
25,000 15,000 " V/V
V = 10 V
Output Voltage Swing
R L = 10 kH
RL = 2 kn
v
12 - " 12 - -
V
10 10
Input Common-Mode Voltage Range V ICR 12 - - _ _ v ok
Commo.i-Mode Rejection Ratio = 20 Hz) CMRR - - -
(f
70 _ _ dB
Input Bias Current
'IB nA
TA = 125C 200 500 " "
TA = -55C " 500 1500
TA = to 70C
800
Input Offset Current
'(0 nA
TA = 125C 30 200 "
TA = -55C - "
500
TA = to 70C
300
ViO - " "
Rs < 10 kn
6.0 7.5 mV
DC Power Consumption PC - - - -
200 - mW
V = V
PositivePower Supply Sensitivity ~ - "
PSS+ 150 " - jiV/V
V EE = -15 V
Negative Power Supply Sensitivity ~
p ss- 150 - - - MV/V
V cc = 15 V
TYPICAL CHARACTERISTICS
(Vqc = +15 Vdc, Vee = -15 Vdc, T^ = +25C unless otherwise noted.)
FIGURE 1 - OFFSET ADJUST CIRCUIT FIGURE 2 - INPUT BIAS CURRENT versus TEMPERATURE
V CC
350
300
250
'A MC1558S
Inputs or
200
14 MC1458S ^_,
c
^r^ s\
* Not available with G and 100
PI Suffix Packages.
] lOkli
Offset Null ]
4 T, TEMPERATURE (C)
+ 100
+80
v <
<r +5.0 to +60
o
<
S <Z
+40
i o
>
o S+20
> -5.0
K -10
-20
1.0 k 10 k 100 1.0 k 10 k 100 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
f 3.0
>
20
o
>
'-5
o ^
z
t- 1.0
Av = 1
j
-
1.0 k 10k
TYPICAL CHARACTERISTICS
|V CC = +15 Vdc, V EE = -15 Vdc, TA = +25C unless otherwise noted.)
V
'cc '
0.1 mF
>
Outp
MCISSSS^X,
Input 1^014585^^
"="
2k: >L = r 100
Output 50%
I f
0.1 /iF pF
t
TLH Overshoot V os
Rise Time
FIGURE 9 - LARGE-SIGNAL TRANSIENT WAVEFORMS
+ io v
FIGURE 8 - POWER CONSUMPTION versus POWER
SUPPLY VOLTAGES
50% l
100
70
S
I
50
4 -^ v = o
9 30
I 20
6.0 10 14 18
Vcc and VE, POWER SUPPLY VOLTAGE (V0 LTS)
1 k |o.oi[
+ 1% j
/IF-T- =p*2.2 JiF
Fal ~T ..
L>
I 1N916 Inputs of Amplifier Not Under
Summing (*)
'
*^_ TorEquivale Test Should Be Grounded.
Node T y*^:iN9i6
ringing while a value too large will degrade slew rate and x = amplifier settling time (to be determined)
settling time.
y = false summing junction settling time
SETTLING TIME MEASUREMENT z = oscilloscope settling time
In order to accurately measure the settling time of an It should be remembered that to settle within 0.1%
operational amplifier, it is suggested that the "false" requires 7RC time constants.
summing junction approach be taken as shown in
The 0.1% factor was chosen for the MC1558S
Figure 11. This is necessary since it is difficult to de- settling time as it is compatible with the 1/2 LSB
termine when the waveform at the output of the op- accuracy of the MC1508L 8 digital-to-analog converter.
erational amplifier settles to within 0.1% of it's final This D-to-A converter features 0.19% maximum error.
value. Because the output and input voltages are ef-
fectively subtracted from each other at the amplifier
inverting input, this seems like an ideal node for the
measurement. However, the probe capacitance at this
TYPICAL APPLICATION
critical node can greatly affect the accuracy of the FIGURE 13 - 12.5 WATT WIDEBAND POWER AMPLIFIER
actual measurement.
+ 15 V
MCL1304
FIGURE 11 - WAVEFORM AT
FALSE SUMMING NODE
( I nverting Mode)
or Equivalent
(Current
Limiting
5
Diode)
MJE1100
or Equivalent
1.0ns/DIV
10k
Delivers 12.5 watt into 4.0 ohms with less than 1" , THD to 100 kHz.
Pins not shown are not connected.
P SUFFIX
PLASTIC PACKAGE
CASE 626
MAXIMUM RATINGS (T/v = +25C unless otherwise noted)
Rating Symbol Value Unit
Power Supply Voltage vcc + 18 Vdc
Output Supply vo + 18 Vdc PIN CONNECTIONS
AGC Supply V2(AGC) vCc Vdc
Differential Input Voltage V| 5.0 Vdc
yi Output
Operating Temperature Range TA -40 to +85 C ( + )
BNon-lnv.
Input
Input
Reflection ISnl 0.95 0.93
Coefficient #11 -7.3 -16 C
Output
Reflection IS22I 0.99 0.98
Coefficient 822 -3.0 -5.5 C
Forward
Transmission IS21I 16.8 14.7
Coefficient 21 128 64.3 C
Substrate A 7
Reverse
Pins 3 and 7 should both be connected to circuit ground.
Transmission Sl2 0.00048 0.00092
Coefficient 12 84.9 79.2 c
TYPICAL CHARACTERISTICS
' v 2 (AGC) = > V CC = 12 V^c.Ta = +25C unless otherwise noted)
Hi 1 1 1 1 1 1 11 III
RL i.o kn VCC 12 Vdc
VC l/dt
60
4
s
50
<
40 *Z 30
o n
> F L 10C
o
30 a 1
2U
z
<"_ 10 |
111
L = 10 n
<
n :
I ll |
f. FREQUENCY (MHz)
f, FREQUENCY (MHz)
FIGURE 3
DYNAMIC RANGE: OUTPUT VOLTAGE versus FIGURE 4
VOLTAGE GAIN versus FREQUENCY
INPUT VOLTAGE (Video Amplifier, See Figure 21) (Video Amplifier, See Figure 21)
v cc = 12 Vdc
'cc 6.3 Vdc
V2(AGO
RL = 1 k 2
o 1.0
a 0.7
5 30
m 0.5
0011
100 n
; 0.07
'
0.05
+ 10 n
x |
50 100 300
0.3 0.5 1.0 3.0 5.0 10 30
FIGURE 5
VOLTAGE GAIN AND SUPPLY CURRENT versus FIGURE 6 TYPICAL GAIN REDUCTION
SUPPLY VOLTAGE (Video Amplifier, See Figure 21) versus AGC VOLTAGE
45 24
=
V
f MHz
21 10
HL - 1.0 Ul
VfKAGC) 5
S*v _ 20 "yl ovw-o- MC1490P ^>.
18
| R AGC
E 3
15 30
I |
12 = 40 1
R AGC * ""> kH
a i
x 'cc
9.0 i * 50
<
6.0 "\
<=
60 I
R AGC = "
III
RAGC = 5.6kn
80 r
1
6.0 9.0
1 1
12 15
1
18 21
FIGURE 7 TYPICAL GAIN REDUCTION FIGURE 8 FIXED TUNED POWER GAIN REDUCTION versus
versus AGC CURRENT TEMPERATURE (See Test Circuit, Figure 19)
00 <R / -55C
^0C
3 .in ( 1
x
o +75C^ L/ +25C
40 ! ,
a +125C^'
a
50
EC
<
a 60
vrC - Vdc
f =60 MHz
70
ag C =5.6 kn
I I
20 40 60 80 100 120 140 160 5.4 5.6 5.8 6.0 6.2 6.4
(
AGC AGC CURRENT ( M A) VR(AGC) AGC VOLTAGE (VOLTS)
.
f = 6 MHz
60
/
J!> Op
RS imi ed
far mu TlN F
10
n
J
4.0 6.0 8.0 10 12
25 30 35 40 50 60 70 80 90 100
VCC. POWER SUPPLY VOLTAGE (Vdc)
f, FREQUENCY (MHz)
RGURE 11 NOISE FIGURE versus SOURCE RESISTANCE FIGURE 12 NOISE FIGURE versus AGC GAIN REDUCTION
40 I
f = 30 MHz
'cc
= 1 2 V dc
f
= 105 MHz
= '0
i
^
1 -o
ng a Source Resistance
Optim zed for Best Noise Figure.
40
I
f = 10.7 MHz
Modulation: 90% AM, m f 1.0 kHz
Load at Pin 5 = 2.0 ki! 76C mVpp
| 20
>- 1- Eo = 2 400 mVp J / /240 mVpp
- "i 1C
Ha
zo
30 40 50
GAIN REDUCTION (dB)
VR(AGC)
TYPICAL APPLICATIONS
FIGURE 19 60 MHz POWER GAIN TEST CIRCUIT FIGURE 20 PROCEDURE FOR SETUP
USING FIGURE 19
input u,
(50 n> " -*r i
"
VIDEO AMPLIFIER
FIGURE 21
* 0.001 j*F
i
0.001
VR(AGC) 1.0 mF ^k T^uF
LI = 7 Turns, #20 AWG Wire, 5/16" Dia., C1,C2,C3 = (1-30] pF
5/8" Long C4 = (1-10) pF
L2 = 6 Turns, #14 AWG Wire, 9/16" Dia.,
3/4" Long
0.001 rf
im 0.001 n?
(30 MHz)
Rl = 50 n
Input ,/
(50 Jl) lv
+ 12 Vdc
0.002 ^F ^ 10 mH
(T44-6)
Core, (T44-6)
Secondary = 2 Turns #20 AWG Wire
8 1
G SUFFIX
METAL PACKAGE
CASE 601
MAXIMUM RATINGS (T A = +25C unless otherwise noted)
Storage Temperature Range T stg -65 to +150 C Single-Ended 922 0.05 0.1 mmhos
Output Admittance b2 2 0.5 1.0
Junction Temperature TJ + 175 C
Forward Transfer Y21 175 150 mmhos
Admittance 921 -30 -105 "C
(Pin 1 to Pin 5) (Polar)
Input
' '
3
Inputs
^ ^ Reflection S11 0.95 0.93
Coefficient 11 -7.3 -16 C
Output
Reflection S 22 0.99 0.98
Coefficient 922 -3.0 -5.5 C
ELECTRICAL CHARACTERISTICS (Vcc = + 12 Vdc, f = 60 MHz, BW = 1.0 MHz, TA = -55C to + 125C unless
otherwise noted)
FIGURE 1 - UNNEUTRALIZED POWER GAIN versus FREQUENCY FIGURE 2 - VOLTAGE GAIN versus FREQUENCY
(Tuned Amplifier, See Figure 24) (Video Amplifier, See Figure 26)
70 1 1 1 mi ITTH"
v c c- c RL = 1 Okn vet 12V dc
S 6" "^
III N,
>
< 50
\
CD a. '
s = I
IS 40
p L 10 on
si 1
nJ| 30 I
| V
t; i 20 A
|
V
F L = 1( n >
i
1 I \ \
(.FREQUENCY (MHz)
f, FREQUENCY (MHz)
MC1590G
TYPICAL CHARACTERISTICS
< v 2 (AGO = 0, V cc = 12 Vdc, TA = +25C unless otherwise noted)
FIGURE 3 - DYNAMIC RANGE: OUTPUT VOLTAGE versus FIGURE 4 - VOLTAGE GAIN versus FREQUENCY
INPUT VOLTAGE (Video Amplifier, See Figure 261 (Video Amplifier, See Figure 26)
_
7.0
5.0
10
- mw^ = vcc
|
= 6.3 Vdc
2(AGC)
f
=
2.0
40
RL = 1.0kn
o 1.0 !'
0.7
0.5 - R|_ = 1.0 kn- 5 30
0.2
i
ioo n
o.i
it on
;
: 0.07
j
0.05
'
0.02
0-1 0.2 0.5 1.0 2.0 5.0 10 20 50 10 0.5 1.0 3.0 5.0 10 30 50 100
ej, INPUT VOLTAGE (mVRMS)
f, FREQUENCY (MHz)
FIGURE 5 - VOLTAGE GAIN AND SUPPLY CURRENT versus FIGURE 6 - TYPICAL GAIN REDUCTION
SUPPLY VOLTAGE (Video Amplifier, See Figure 26) versus AGC VOLTAGE
V
'R(AGC I 2
MC1590GJ>.
R AGC
,_ z 30
t-
17 a 411 - A
bO
1
9.U z
<
E.O 60
R AGC = n flAGC = 5.6kn
3.0
n
70
80 Mill
3.0 6.0 9.0 12 15 18 21 24 27
V CC SUPPLY VOLTAGE (VOLTS) VR(AGC), AGC VOLTAGE (Vdc)
,
+50
f
10
+40
20
/ -55C
^0C
m r
- 30
i
z +7SC-^ \s +25C
o |+20
CD
40
OC
1 .
a +125C^
S+IO
50
z
2 60
v r c =12 Vdc
f =60 MHz
70
"AG C =5.6 kn
1
120 140 160 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0
l
AGC AGC CURRENT (mA)
VR(AGC) AGC VOLTAGE (VOLTS)
.
FIGURE 9 - POWER GAIN versus SUPPLY VOLTAGE FIGURE 10 - REVERSE TRANSFER ADMITTANCE versus
(See Test Circuit, Figure 24) FREQUENCY (See Parameter Table, Page 1)
80
70
f = 6 MHz
_ 60
5 50
<
s
o
; 30 /
JH
CD
20
f >12
^
y
10
912 0 _
30 40 50
Vcc. POWER SUPPLY VOLTAGE (Vdc) f, FREQUENCY (MHz)
FIGURE 11 - NOISE FIGURE versus FREQUENCY FIGURE 12 - NOISE FIGURE versus SOURCE RESISTANCE
20
9.0 18
'cc
= 12 Vdc
8.0 16
I 7.0 3 14
f
= 105 MHz
1 6.0 E 12
CD
50 1 10
MH z^
-H f = 60
o 4.0
to
R< Op
min
imi ed
mum Nf |
M
f " 10 MHz
Sfe 3.0 Z~ 6.0
z
2.0 4.0
1.0 2.0
f = 30MHz
3 25
cc
3 20
80
z 70
< 6.0
?!
o
* 4.0
^^ 922
1
I
-
3.0
2.0
1.0
^ 1
60 80 100
f, FREQUENCY (MHz) f, FREQUENCY (MHz)
I
1
f = 10.7 MHz
Modulation: 90%AM,f m = 1.0 kHz
Load at Pin 5 = 2.0 Ml 760mVpp
_ o
zo
os 10
5 160 ^>
1*21
E "s
- 140 s = |
u_ Z
< 120
s O 90
a S.
<
135 <r .
-^
2
/I 1 5 'no 180= z
i J z < n -225
|
1 gPl T Pin
60
C UIPU r- Pin
-270 3
z
315^
'-160
360'
J-200
1 | 405
TYPICAL APPLICATIONS
FIGURE 24 60 MHz POWER GAIN TEST CIRCUIT FIGURE 25 PROCEDURE FOR SETUP
USING FIGURE 24
,c J- -L 0.001 J.
0.001 U F
VR(AGC)
VR(AGC)
10ik
-wv
h!>
J
s
AWG
LI 7 Turns,#20 Wire, 5/16" Oia., C1.C2.C3 = (1 30) pF
VW
^> MC1590G
5/8" Long
12 6 Turns, #14
3/4" Long
AWG Wire, 9/16" Oia.,
C4 = (M0)pF VR(AGC)
e;
1.0
1(
mF
2
^
J-0 sS^\t_
L_|^J 1
^> ,.0,F
0.001 cF
F
FIGURE 27
30 MHz AMPLIFIER
0.001
VAGC"6-0V
Input from
Local Oscillator Jj'd-IOIpF
(70 MHz) , 00 (1-30) pF
-" j ^* * IF Output
f
(1-10) pF
RL = 50 S2
Signal Input }( c
5.6 k
0.002 AiFt
l v R(AGC) = +12Vdc
LI = 12 Turns #22 AWG Wire on a Toroid Core,
(T37-6 Micro Metal or Equiv) LI = 5 Turns, #16 AWG Wire, 1/4" 10,
5/8" Long
T1 :
Primary - 1 7 Turns #20 AWG Wire on a Toroid Core,
(T44-6 Micro Metal or Equiv) L2 = 16 Turns, #20 AWG Wire on a Toroid
Secondary = 2 Turns #20 AWG Wire Core, (T44-6 Micro Metal or Equiv)
24 pF
Input
(50 il) 2H(-
-I ic
1^ <>
"=r
0u tput
(50
(5 Si)
(1-10 pF)
(1-10) pF -M
- 0.002 uF^/
y ooolAlF
^
T1: Primary Winding = 15 Turns, #22 AWG Wire, 1/4" ID Air Core T2: Primary Winding = 10 Turns, #22 AWG Wire, 1/4" ID Air Core
Secondary Winding = 4 Turns, #22 AWG Wire, Secondary Winding = 2 Turns. #22 AWG Wire,
Coefficient of Coupling a 1.0 Coefficient of Coupling * 1.0
MC1590G
Output of Q1's output only when these peaks are greater than
15 iif
V r = 7.0 Volts. The resulting output is filtered by C x ,
Input
Rx -
FIGURE 31 - OUTPUT VOLTAGE versus INPUT VOLTAGE TABLE 1 DISTORTION versus FREQUENCY
SEE FIGURE 30 R1 = 100kfi---
0.7 DISTORTION DISTORTION
FREQUENCY
_ 0.5 10 mV e. 100 mV e; 10 mV e; 100 mV ej
R1 = 15kfi- -"
100 Hz 3.5% 12% 15% 27%
o
> 300 Hz 2% 10% 6% 20%
uj 0.2
CD R1=0 1.0kHz 1.5% 8% 3% 9%
1- 10 kHz 1.5% 8% 1% 3%
100 kHz 1.5% 8% 1% 3%
1- 0.07
Notes 1 and 2 Notes 3 and 4
f: 0.05
o Decay = 300 ms
Attack = 20 ms
Meas jred from 100 H to 10 kHz C x = 7.5nF
0.02 forV alues ot A ta ckt mm
R x =0 (Short)
3.0 to 4.0ms
II
(3) Decay = 20 ms
I II
Attack = 3 ms
I
.0 3.0 5.0 10
INPUT VOLTAGE (mV)
C x =0.68mF
jj,
R x = 1.5 kn
(Top View)
MAXIMUM RATINGS 0a = +25C unless otherwise noted.)
COMPENSATION
ORDERING INFORMATION
Device Temperature Range Package
MC1709CG Metal Can
MC1709CU 0C to + 70C Ceramic DIP
MC1709CP1 Plastic DIP
ELECTRICAL CHARACTERISTICS (unless otherwise noted, +9.0 V =s V Cc 15 V, -9.0 V? V EE >- 15V,TA = 25C)
MC1709A MC1709
Characteristic Symbol Min Typ Max Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (unless otherwise noted, +9.0 V V Cc * 15 V, -9.0 V ^ V EE s* -15 V, TA = -55C to + 125C)
MC1709A MC1709
Characteristic Symbol Min Typ Max Min Typ Max Unit
Power Consumption PC mW
(V C c = 15, V EE =-15 V)
(T A = -55C) - 81 135 - -
(T A = 125C) 63 90 1
ELECTRICAL CHARACTERISTICS (unless otherwise noted, VCc == +15V, Vee = -15 V, TA = 25C)
MC1709C
Characteristic Symbol Min Typ Max Unit
Input Offset Voltage V|0 - 2.0 7.5 mV
(R s < 10 kn, 9.0 V < 15 V.-9.0 V >V EE >-15V)
Input Offset Current
ho - 100 500 nA
Input Bias Current
'IB
- 300 1500 nA
Input Resistance r\ 50 250 - kn
Output Resistance r
o
- 150 - n
Power Consumption PC - 80 200 mW
Large Signal Voltage Gain AV 15 45 - V/mV
(R L > 2.0 kn, Vq = 10 V)
MC1709C
Parameter Symbol Min Typ Max Unit
Input Offset Voltage V| - - 10 mV
(R S < 10 kn,9.0 V < V cc < 15 V.-9.0 V > V EE > 15 V)
Input Offset Current
ho - - 750 nA
Input Bias Current
<ib
- - 2.0 MA
Large Signal Voltage Gain AV 12 - ~ V/mV
(R(_ > 2.0 kn, V = 10 V)
Input Resistance ri 35 - ~ kn
TYPICAL CHARACTERISTICS
FIGURE 2 - TEST CIRCUIT
(V C C = +15 Vdc, V EE = -15 Vdc, T A = +25C)
Fig. Test Conditions
Curve No.
No. R,(a) R 2 (a) R 3 (n) C,(pF) C,(pR
3 l 10 k 10 k 1. 5 k 5.0 k 200
2 10 k 100 k 1. 5 k 500 20
3 10 k 1.0 M 1. 5 k 100 3.0
4 1.0 k 1.0 M 10 3.0
4 1 1.0 k 1.0 M 10 3.0
2 10 k 1.0 M 1.5 k 100 3.0
3 10 k 100 k 1. 5 k 500 20
4 10 k 10 k 1.5 k 5. k 200
5 1 CO 1.5 k 5. k 200
2 1.5 k 500 20
3 1. 5 k 100 3.0
4 10 3.0
\^ 121)
R
_
\ \
g. 20
> 3
\
T i
1C
\ \
\ 60
!
4
<
\ j
3
>
R| = t lkn 20
2
4.0
CD 1
>
-?n
1.0 k 10 k 100 k 1.0 M 10 M 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
Rl
90
4" 80
5 40
1 2
3^
fill
?n
m
r
-OVq
2.0
1.0 CL100pF
0.5
0.2
10 100
MOTOROLA MC1733
SEMICONDUCTOR
TECHNICAL DATA MC1733C
DIFFERENTIAL VIDEO
DIFFERENTIAL VIDEO AMPLIFIER WIDEBAND AMPLIFIER
SILICON MONOLITHIC
INTEGRATED CIRCUIT
... a wideband amplifier with differential input and differential out-
put. Gain is fixed at 10, 100, or 400 without external components
or, with the addition of oneexternal resistor, gain becomes
adjustable
from 10 to 400.
G SUFFIX
METAL PACKAGE
FIGURE 1 -BASIC CIRCUIT FIGURE 2 - VOLTAGE GAIN CASE 603
ADJUST CIRCUIT
GAIN SELECT
VCC GiaGh
D SUFFIX
PLASTIC PACKAGE
0.2 F
CASE 751
((
f
OUTPUT
(SO- 14)
-| ( t OUTPUT
L SUFFIX
CERAMIC PACKAGE
CASE 632
L<=r>] INPUT
NC
2
1
2
14
13
NC 6 9
OUTPUT 2
7 8
7k (Top View)
GAIN J"" $590
SELECT J Gib
ORDERING INFORMATION
Device Temperature Range Package
MC1733G Metal Can
-55Cto +125C
1.4 k 1 300 1 400 ?400 MC1733L Ceramic DIP
MC1733CD SO-14
MC1733CG Metal Can
0Cto +70"C
MC1733CL Ceramic DIP
MC1733CP Plastic DIP
ELECTRICAL CHARACTERISTICS (V CC = +6.0 Vdc, VEe = -6.0 Vdc, at Ta " +25C unless otherwi se noted.)
MC1733 MC1733C
Characteristic | Symbol Min Typ Max Min Typ Max Units
V/V
Differential Voltage Gain
300 400 500 250 400 600
Gain 1 (Note 2) A vd
90 100 110 80 100 120
Gain 2 (Note 3)
9.0 10 11 8.0 10 12
Gain 3 (Note 4)
Gain 2 20 30 10 30
Gain 3 250 250
- 2.0 - - 2.0 - pF
Input Capacitance (Gain 2) Cjn
- 0.4 3.0 - 0.4 5.0 MA
Input Offset Current (Gain 3) I'lOl
- 9.0 20 - 9.0 30 ma
Input Bias Current (Gain 3) <IB
(R s = 50f2, Vn - 12 ~ ~ 12 jiV(rms)
Input Noise Voltage
BW= 1 kHz to 10 MHz
1.0 - - 1.0 - - V
Input Voltage Range (Gain 2) Vin
MC1733 MC1733C
Characteristic Symbol Min Typ Max Min Typ Max Units
Differential Voltage Gain
Avd V/V
Gain 1 (Note 2) 200 - 600 250 600
Gain 2 (Note 3) 80 120 80 120
Gain 3 (Note 4) 8.0 12 8.0 12
Input Resistance R in 8.0 - - 8.0 - - kn
Gain 2
Input Offset Current (Gain 3)
Hiol - _ 5.0 _ _ 6.0 ma
Input Bias Current (Gain 3)
'IB
- - 40 _ _ 40 >xA
Input Voltage Range (Gain 2) V in 1.0 - - 1.0 _ _ V
Common-Mode Rejection Ratio CMRR 50 - - 50 - - dB
Gain 2 ( VC m
= 1 V, f < 100 kHz)
Supply Voltage Rejection Ratio PSRR 50 - - 50 - - dB
Gain 2 <AV S = 0.5V)
Output Offset Voltage v o V
Gain 1 - - 1.5 - - 1.5
Gain 2 and Gain 3 1.2 1.5
Output Voltage Swing (Gain 2) Vo 2.5 _ _ 2.5 _ Vp-p
Output Sink Current (Gain 2) <o 2.2 - _ 2.5 _ _ mA
Power Supply Current (Gain 2) ID I - ,
- 27 - - 27 mA
*
T low = C for MC1733C, -55C for MC1733
T high = +70C for MC1 733C, +1 25C for MC1 733
(Vcc = +6-0 Vdc, Vee = -6-0 Vdc, Ta = +25C unless otherwise noted.)
<
105
GAIN 2
I.U t 30
o
>
LU 20
"""
a GAIN 3 ,-'
0.90 ^ 10 "O^
0.85
z
"i
<
"
V\
onn
+20 +60 10 100
CD
CD
<
GAI
>
< 100
GAIN I ~ZZ".'.'.
UJ
GAIN 1^ it
o
<
10
= 1.0kn
1
50
<
- 8. )V CD
vcc/vee
\
< 40
+30
\
)i\
-J
>
Q
30
20
6.0 V
CD
I I I 10
I I L
3.0 V
<
-1(1
-10
10 100
o GAIN 3
r^ ^
S+0.8
GAIN
N >
2 /
P"
> ^nr//
7 // 5+0.4
3.0 V
^GAI M
Vk
1
t-
o
o
-0.4
_. -0.4
-15 -10 -5.0 +5.0 +10 +15 +20 +25 +30 +35 -15 -10 -5.0 +5.0 +10 +15 +20 +25 +30 +35
t, TIME (nil
t.TIME(ns)
GAIN 2
Rl = 1.0 k a
> GA N2
+1.2 E
T \ - -55C
o CD
i <
*m
r
1
< g 120
> . i
z
5 +0.4 o
a.
(-
o
ir
if 40
B
-0.4
-15 -10 -5.0 +5.0 +10 +15 +20 +25 +30 +35 10 20 30 40 60 60 70
t.TIME(ns)
OVERDRIVE RECOVERY TIME (ns)
T
GA N2
X N, t
V
\| t
,\ V GAII 13
J
^ T
\S
[
\GAIN 1 1 1
2 4 6 8 10 100
70 G AIN2
70 ||
GA BW HO MHz
60 _ 60 II
I
S 50 > 50
u
z
*o < 40
I
o
Jf 30 2 30
=3
i
2"
S*
^s o
z 20
10
S 7* z
10
II
11
FIGURE 21 - OUTPUT VOLTAGE SWING and FIGURE 22 - OUTPUT VOLTAGE SWING versus
B.U
Q. <
g b.U
s 1
*4.0
-J z
o 35
^ ^ ""f^
3.U
II 2.U
6S
>
n
6.0 100 1.0 k
5.0
FIGURE 23 - OUTPUT VOLTAGE SWING versus FREQUENCY FIGURE 24 - COMMON-MODE REJECTION RATIO
1 III
_ 100 II
RL = 1.0 kn G ain;
_ 90
<
o 80
B 70
o 60
2.0 s 50
E
o
1 30
10 100 1.0 M 10 M
APPLICATIONS INFORMATION
vcc
TAPE,DRUM OR DISC MEMORY READ AMPLIFIERS sign. For purposes of comparison, the MLM301 has
than a 40 dB open-loop gain at 100 kHz; the
slightly less
The first of several methods to be discussed is shown in MC1 741 a compensated op-amp, has approximately 20 dB
,
Figure 27. This block diagram describes a simple Read open loop gain at 100 kHz; the MC1733 has approximately
cir-
cuit with no threshold circuitry. Each block represents 33 dB of gain out to 100 MHz
a (depending on gain option
basic function that must be performed by the Read circuit. and loading).
The block, referred to as "amplfiication", increases
first
There are a number of ways to implement the peak
the level of the signal available from the Read head
to a detector function. However, the simplest and most widely
leveladequate to drive the peak detector. Obviously, these used method is a passive differentiator that generates "zero-
signal levels will vary depending on factors
such as tape crossings" for each of the data peaks in the Read signal.
speed, whether the system used is disc or tape, and the
The actual circuitry used to differentiate the Read sig-
type of head and the circuitry used. For a representative
nal varies from LC type in disc systems to a
a differential
mV for the signal from the
tape system, levels of 7 to 25
simple RC type and cassette systems. Either type,
in reel
Read head and 2 V for the signal to the peak detector are of course, attenuates the signal by an amount depending
typical. These signal levels are "peak-to-peak" unless on the circuit used and system specifications. A good
otherwise specified. On the basis of the signal levels men-
approximation of attenuation using the RC type is 20 dB.
tioned above, the overall amplification required is 38 to
Thus, the 2 V signal going into the differentiator is reduced
49 dB. to 200 mV.
How the overall gain requirement implemented will
is The next block Figure 27 to be discussed is the
in
depend somewhat on the system used. For instance, a
zero-crossing detector. In
most cases detection of the zero-
tape cassette system with variable tape speed may utilize
crossings combined with the limiter. These functions
is
a first stage for gain and a second stage primarily for
gain serve to generate a TTL compatible pulse waveform
with
control. Thus, a typical circuit would utilize 35 dB in the "edges" corresponding to zero-crossings. For low transfer
first stage and
10 to 15 dB in the second stage. rates, the circuit often used consists of an
operational
Devices suitable for use as amplifiers fall into one of amplifier with series or shunt limiting. For higher transfer
two categories, operational amplifiers or
wideband video rates (greater than 100K B/S) comparators are used.
amplifiers. Lower speed equipment with low transfer rates The method described above is often modified to in-
commonly uses low cost operational amplifiers. Examples clude threshold sensing. In Figure 28, the function called
of these are the MC1 741 MC1 458, MC1 709, and MLM301
,
"double-ended, limit-detector" enables the output NAND
Equipment requiring higher transfer rates, such as disc gate when either the negative or positive data peaks of the
systems normally use wideband amplifiers such as the Read signal exceed a predetermined threshold. This func-
MC1733. The actual cross-over point where wideband tion can be implemented in either of two ways. One
amplifiers are used exclusively varies with equipment de-
method first rectifies the signal before it is applied to a
FIGURE 27 - TYPICAL READ CIRCUIT (METHOD comparator with aset threshold. The other method utilizes
1)
two comparators, one comparator for positive-going peaks
and the other for negative-going peaks. These comparator
outputs are then combined in the output logic gates.
FIGURE 28 - READ CIRCUIT (METHOD 2) may be implemented with two comparators and two
passive differentiators.
Each of the methods shown offer certain intrinsic ad-
vantages or disadvantages. The overall decision as to which
method to use however often involves other important
considerations. These could include cost and system re-
quirements or circuitry other than simply the Read cir-
Another common technique is shown in Figure 29. cuitry. For instance, if cost is the predominate overall
factor, then approach one may be the only feasible
The branch labeled rectifiers, peak detector, etc., provides
alternative.
a clock transition of the D flip-flop that corresponds to
the peak of both the positive and negative-going data Method four was included as a design example because
Positive
Crossing c
Detector
Q
Threshold D
Detector
Peak C
The technique shown in Figure 30 uses separate cir- Q
cuits with threshold provisions for both negative and Threshold D
positive peaks. The peak detectors and threshold detectors
MOTOROLA MC1741
SEMICONDUCTOR
TECHNICAL DATA MC1741C
OPERATIONAL AMPLIFIER
INTERNALLY COMPENSATED, HIGH PERFORMANCE
OPERATIONAL AMPLIFIERS SILICON MONOLITHIC
INTEGRATED CIRCUIT
.
designed for use as a summing amplifier, integrator, or amplifier with
. .
G SUFFIX
METAL PACKAGE
MAXIMUM RATINGS (TA = +25C unless otherwise noted) CASE 601
Rating Symbol MCI 741 C MC1741 Unit
Power Supply Voltage + 18
vcc + 22 Vdc
VEE -18 -22 Vdc
P1 SUFFIX
Input Differential Voltage
V|D 30 Volts PLASTIC PACKAGE
Input Common Mode Voltage (Note 1) V ICM 15 Volts
CASE 626
Output Short Circuit Duration (Note 2) ts Continuous
Operating Ambient Temperature Range TA Oto +70 | -55 to +125 C
Storage Temperature Range T stg C
Metal and Ceramic Packages -65 to +150 U SUFFIX
Plastic Packages
NOTES:
-55 to +125
$TO CERAMIC PACKAGE
CASE 693
1. For supply voltages less than +15 V, the absolute maximum input voltage is equal to the
supply voltage.
2. Supply voltage equal to or less than 15 V.
D SUFFIX
PLASTIC PACKAGE
CASE 751
EQUIVALENT CIRCUIT SCHEMATIC (SO-8)
PIN CONNECTIONS
Offset Null E 3nc
Invt Input
3vcc
Noninvt lnput[T
3 Output
v E eE 3 Offset Null
(Top View)
ORDERING INFORMATION
Temperature
Device Alternate Range Package
MC1741CD SO-8
MC1741CG LM741CH, Metal Can
M741HC
MC1741CP1 0Cto +70C
LM741CN, Plastic DIP
^A741TC
MC1741CU Ceramic DIP
MC1741G - 55C to Metal Can
MC1741U + 125C Ceramic DIP
- 1.4 - - 1.4 - pF
Input Capacitance Ci
- + 15 - - + 15 - mV
Offset Voltage Adjustment Range V|OR
+ 12 + 13 - 12 13 - V
Common Mode Input Voltage Range V|CR
Av 50 200 - 20 200 ~ V/mV
Large Signal Voltage Gain
(V = +10 V, R L >2.0k)
Output Resistance fo
- 75 - - 75 - n
CMRR 70 90 _ 70 90 dB
Common Mode Rejection Ratio
(R s <10k)
PSRR - 30 150 30 150 /W/V
Supply Voltage Rejection Ratio
(R s <10k)
v V
Output Voltage Swing
+ 12 + 14 - 12 14
(R L 2M0k)
+ 10 + 13 10 13 _
(R L >2k>
- 20 - - 20 - mA
Output Short-Circuit Current 'os
MC1741 MC1741C
Characteristic Symbol Min Typ Max Min Typ Max Unit
id
mA
Supply Currents -
- 1.5 2.5 " -
(T A = 125C)
2.0 3.3
(T A = -55C)
Power Consumption (T A = +125C) PC 45 75 mW
- 60 100 - - -
(T A = -55C)
'high
= 125C for MC1741 and 70C for MC1741C
= -55C for MC1741 and 0C for MC1741C
R OkH
10
1.0
100
m IttL 1 1 nun III' llll
1-0k 10 k 100 M 100
k 1.0 1.0 k 10 k 100 k 1.0 M
RS, SOURCE RESISTANCE (OHMS) RS. SOURCE RESISTANCE (OHMS)
FIGURE 3 - OUTPUT NOISE versus SOURCE RESISTANCE FIGURE - SPECTRAL NOISE DENSITY
4
IU
100
10
01 '0.
.o:
0.01 llll
1 IIIII
100 1.0 k 10 k 100 k 1.0 M 1.0 k 10 k 100 k
RS, SOURCE RESISTANCE (OHMS) FREQUENCY
f, (Hz)
To Pass/Fail
Indicator
TYPICAL CHARACTERISTICS
< V CC = +15 Vdc V EE -
x - 15 Vdc T A '
- + 25C unless otherwise noted)
\
> ,
uj 20
<
> \
\\
o <\ OLTA GEFC LLO erk
6 8.0 1 HD< 5%
>
\
4.0 III
V
FIGURE 8 - POSITIVE OUTPUT VOLTAGE SWING FIGURE 9 -NEGATIVE OUTPUT VOLTAGE SWING
versus LOAD RESISTANCE versus LOAD RESISTANCE
-15
. l-Ul-1-4-4-
"15 -14
VSUP PLIE.
-13
15 V SUPPLIES
> -"
12 V |
9V
i
o -8-0
>-7.0
9V
-6.0
I
- -b.O
6V |
> 6V
-3.0
-2.0
8.0 +12 V
6.0 200 k^
+9.0 V
4.0
2.0 +6.0 V
+5.0 V
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10
/ ^OUTPUT
/
/
INPUT
To Scope
pe
n
I
(Inpu
To Scope
(Output)
100
z
5 90
<
5 85
o
> 80
75
70
2.0 4.0 6.0 8.0 10 12 14 16
VCC. IVEEI. SUPPLY VOLTAGES (VOLTS)
High Slew Rate - 10 V/jus Guaranteed Minimum (for unity gain only)
No Latch-Up
(Top View)
V ref - 2 Vdc
R1 fl2 =1 D SUFFIX
Rn - 5.0 k!! P1 SUFFIX PLASTIC PACKAGE
PLASTIC PACKAGE CASE 751
CASE 626 (SO-8)
ORDERING INFORMATION
Device Temperature Range Package
MC1741SCD SO-8
MC1741SCG 0Cto +70C Metal Can
MC1741SCP1 Plastic DIP
Theoretical Vn
OF lv EE >-15V
A2 A3 A4 A5 A6 + A7 A8
+ + + + + +
.Vref ,A1
Vrj (R n )
1
"
R1 ' '
2 4 64 128 256
8 16 32
MC1741S LARGE-SIGNAL TRANSIENT RESPONSE STANDARD MC1741 versus MC1741S RESPONSE COMPARISON
l-Opi/DIV 10(is/DIV
CIRCUIT SCHEMATIC
<
Value
Rating Symbol MC1741SC MC1741S Unit
Power Supply Voltage
vcc +18 +22 Vdc
-18 -22
Differential Input Signal Voltage
V|D 30 Volts
Common-Mode Input Voltage Swing (See Note 1) V ICR 15 Volts
Output Short-Circuit Duration (See Note 2) s Continuous
Power Dissipation (Package Limitation) PD
Metal Package
680 mW
Derate above TA = +25C 4.6 mW/C
Plastic Dual In-Line Package 625 mW
Derate above TA = +25C 5.0 mW/C
Operating Ambient Temperature Range TA Oto +75 | -55 to +125 C
Storage Temperature Range T stg C
Metal Package
-65 to +150
Plastic Package -55 to +125
Note 1 For supply voltages less than 1 5 Vdc, the absolute maximum
. input voltage is equal to the supply voltage
Note 2. Supply voltage equal to or less than 1 5 Vdc.
z
150
no kn
uj
"^
100
>
OFFSET NULL t- ,
<
TERMINALS 50
V EE
5 -50 -25 +25 +50 +7 5 +1C +12
T,TEMPERATURE(C)
MC1741S, MC1741SC
ELECTRICAL CHARACTERISTICS (V cc = +15 Vd c, Vee = " 15 Vdc, TA = +25C unless otherwise noted.)
MC1741S MC1741SC I
BWp kHz
Power Bandwidth (See Figure 3)
150 200 - 150 200 -
A v = 1,R L = 2.0kn,THD = 5%, V = 20 V(p-p)
Large-Signal Transient Response
Slew Rate (Figures 10 and 11) SR
10 20 - 10 20 - V/ M s
V(-) to V(+)
10 12 10 12
V(+)to V(-l
3.0 3.0 MS
Settling Time (Figures 10 and 1 1 'setlg
vo Vpk
Output Voltage Swing
12 14 - 12 14
RL = 10kn,T A = T| ovv toT h igh (MC1741Sonly) -
10 13 10 13
RL = 2.0 kn, f A = +25C
10 10
RL = 2.0 kn, T A = T| 0W to T hiqh
12 13 12 13 Vpk
InputCommon-Mode Voltage Range V|CR
TA = T| ow toThi ah (MC1741S)
CMRR 70 90 70 90 dB
Common-Mode Rejection Ratio (f = 20 Hz)
T A = T| ow to Thigh (MC1741S)
Input Bias Current (See Figure 2) hB -
- 200 500 200 500
TA = +25C and T n gh
j
T A = T low t0 T high
PSS+ MV/V
Positive Voltage Supply Sensitivity
- 2.0 100 - 2.0 150
(Vee constant)
TA = T|
ow toT h g hOnMC1741S
i
PSS-
mV/v
Negative Voltage Supply Sensitivity
- 10 150 - 10 150
(Vcc constant)
TYPICAL CHARACTERISTICS
(Vcc = +15 Vdc, VgE = -15 Vdc, TA = +25C unless otherwise noted.)
+15
a
X
>- +10
S +80
z
o
V
te +5.0 \ <
a +60
V. o
I- b +40
o
o /' >
> -5.0 "5+20
t- r <
a.
5 -10 /
< -15 -20
1.0 k 10 k
100 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
% 120
3.0
>
uj 100
>
CD
E 2.5
< II
80
RS = 10 k
<
> 2.0
o
>
o 60 1.5
z
o
z
z 40 1.0
1 /Hltt a.
(-
" A =100
20 o
R = 100 0.5
J
0,
nun CL- m%$-
10 00
1( 1 0k 10C k 1 00 1.0 k 10 k 100
f FRE QUEN CY(Hz
R S, SOURCE 1ES STAN CE(OHMS)
TYPICAL CHARACTERISTICS
(V cc = +15 Vdc, Vee = -15 Vdc, T^ = +25C unless otherwise noted.)
5.0 10 15 20 ringing while a value too large will degrade slew rate and
settling time.
Vccand IVeeI. SUPPLY VOLTAGE (VOLTS)
SETT LING
~T voltage excursion to the oscilloscope. Because of the
""
TlHE
voltage divider effect, only one-half of the actual error
appears at this node. For extremely critical measure-
ments, the capacitance of the diodes and the oscilloscope,
and the settling time of the oscilloscope must be con-
FIGURE 11 -SETTLING TIME AND SLEW RATE TEST CIRCUIT
sidered. The expression
tsetlg = n/x 2 + v 2 + z2
1.0ms/DIV
FIGURE 13 -EXPANDED WAVEFORM AT
FALSE SUMMING NODE
LO^s/DIV
MOTOROLA MC1747
SEMICONDUCTOR MC1747C
TECHNICAL DATA
(DUALMC1741)
(DUAL MC1 741)
INTERNALLY COMPENSATED, DUAL
HIGH PERFORMANCE OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
. designed for use as summing amplifiers, integrators, or am-
. .
SILICON MONOLITHIC
plifiers with operating characteristics as a function of the external INTEGRATED CIRCUIT
feedback components. The MC1747L and MC1747CL are func-
tionally and electrically equivalent to the /iA747 and /uA747C
respectively.
G SUFFIX
No Frequency Compensation Required METAL PACKAGE
Short-Circuit Protection CASE 603
Wide Common-Mode and Differential Voltage Ranges N.C.
Low-Power Consumption
No Latch Up
Offset Voltage Null Capability Inv Inpu
VEE
FIGURE 1 - HIGH-IMPEDANCE, HIGH-GAIN
INVERTING AMPLIFIER
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-14)
P2 SUFFIX
PLASTIC PACKAGE
CASE 646
14 |" II
fl
1
3j^ ^ SUFFIX
mm{{ L
L
CERAM^FJOCAOE
PIN CONNECTIONS
(Offset
Inv Input [T -*\ A !*l Adj A
Offset nr 12]output A
Adj A Li
veeH Ti]n.c.
Offset rr B
to] Output
Adj. B \Z.
Non
Inv Input
Input
inv rr
IL
[T
K
l>~^
TjVcc
Tl f,set
JLI Adi B
B
-m*-
VccA and V CCB are not connect 3d internally.
ORDERING INFORMATION
Device Temperature Range Package
MC1747CD SO-14
MC1747CG Metal Can
0Cto +70C
MC1747CL Ceramic DIP
MC1747CP2 Plastic DIP
uV/V
V EE = Constant, Rg < 10 kn -
PSS+ 30 150 " 30 150
Vcc = Constant, Rs < 10 k2 PSS- 30 150 30 150
Power Supply Current (each amplifier)
'cc'ee mAdc
TA = +25C
1.7 2.8 - 1.7 2.8
TA " T| ow
- 2.0 3.3 2.0 3.3
T A = T hjgh
1.5 2.5 2.0 3.3
DC Power Consumption (each amplifier)
PC mW
TA = +25C
50 85 - 50 85
TA = T low - 60 100 60 100
TA = Thigh
45 75 60 100
CD For supply voltages of less than 15 V, the maximum differential input voltage equal to (V cc + |v E d)
is
For supply voltages of less than 15 V, the maximum input voltage is equal to the supply voltage (+V
CC . -|V EE |).
-55C for MC1747L
Thigh: +70Cfor MC1747CL
+ 125Cfor MC1747L
FREQUENCY
IV-e-^VW-f-o- + SHIFT
ii 01 *iF OUTPUT
^ '
piH 0.001 mf4s j-)|-|
" -15 V
" +16V "
15 V
V / \~" A
-
:-
Terminals not shown are not connected.
TYPICAL CHARACTERISTICS
VgE (V CC = +15 Vdc, = -15 Vdc, T/v = +25C unless otherwise noted.)
+ 100
S 115
1 110
* o
g 100 <
o O
95 >
90 <
1
J 85
-20
,0 10 100 1.0 k 10 k 100 k 1.0 M 10 M
6.0 9.0 12 15 18 21 24
3.0
f, FREQUENCY (Hz)
Vccand Vee. POWER-SUPPLY VOLTAGE (VOLTS)
30
C3
<
|j
o
16 11
> o
=j 12 HI 1 1
1
II
(Ea h ampl fier)
-
o
8.0 b V
o
> 1 HD<5% o 7-0
-
4.0
11 1
' a -
1 5.0
I'
I
11 3.0
1.0 k 10 k
II A=1000 |i ii
c
1 1
1
|
15 VOLT SUPPLIES Rl R 2
''' ''1
1
1.2 n> J
1l + R 2
/
*"
1 <-'
'
A
1
=
" |
12 VOLT SUPPLIES
E T "
Mill
/
\
1
A v =100
/
1 III
100 k
1 i<' ;
\1
12
10k r~ H,
5 *
-/^ vN
8.0 R3
-L l.
4.0
f= r- */^
-^ Rl
1
>
vo
1 1 1
THO<5.0'
1 1 ~r-r 1 1
-1 ZJ 1
"1 ']
.1 1
0.1
2 0 500 1.0 k 2.0 k 5.0 k
10k 10k
L. LOAD RESISTANCE [OHMS)
HS. SOURCE RESISTANCE (OHMS)
OPERATIONAL AMPLIFIER
Noncompensated MC1741
Single 30 pF Capacitor Compensation Required For Unity Gain
P1 SUFFIX U SUFFIX
Short-Circuit Protection PLASTIC PACKAGE CERAMIC PACKAGE
Offset Voltage Null Capability CASE 626 CASE 693
(MC1748COnly)j-
Wide Common-Mode and Differential Voltage Ranges
Balance |j_
8 I
Compensation
Low-Power Consumption ]]vcc
No Latch Up ^ Output
E-lt
6[ Balance
E
Compensation
NON-INVERTING J
INPUT
G SUFFIX
METAL PACKAGE v EE
CASE 601
-w-w-
ORDERING INFORMATION
Device Temperature Range Package
FIGURE 2 - OFFSET ADJUST AND FIGURE 3 - SINGLE-POLE COMPENSATION FIGURE 4 - FEEDFORWARD COMPENSATION
FREQUENCY COMPENSATION
mVdc
TA = +25C " -
1.0 5.0 1.0 6.0
TA = T low to T high
6.0 7.5
Differential Input Impedance (Open-Loop, f = 20 Hz)
Parallel Input Resistance "
Rp 0.3 2.0 0.3 2.0 - Megohm
Parallel Input Capacitance cp 1.4 1.4 pF
Common-Mode Input Impedance (f 20 Hz) Z;
n - 200 - - 200 Megohms
Common-Mode Input Voltage Swing
VlCR 12 - -
13 12 13 v pk
Common-Mode Rejection Ratio (f = 100 Hz) CMRR -
70 90 70 90 _ dB
Open-Loop Voltage Gain, (V = 10 V, R L = 2.0 k ohms)
"vol V/V
TA = +25C 50,000 200.00C 20,000 200,000 -
TA = T|
0W to T nign 25,000 15,000
Step Response (V in = 20 mV, C = 30 pF, R = 2 kil, C = 100 pF)
c L L
Rise Time
r 0.3 0.3 *is
Overshoot Percentage " - ~
5.0 5.0 - %
Slew Rate dV out /dt 0.8 0.8 V/ M s
Output Impedance (f = 20 Hz) - - -
*o 75 75 _ ohms
Short-Circuit Output Current - - -
'sc 25 25 _ mAdc
Output Voltage Swing (R L = 10 k ohms) v 12 14 12 14 " Vpk
RL = 2 k ohms (T A = T| ow to t nign ) 10 13 - i 10 13
Power Supply Sensitivity
nV/V
Ve = constant, R s < 10 k ohms S+ " 30 150 - 30 150
= constant,
Vcc Rs < 10 k ohms S- 30 150 30 150
Power Supply Current + -
'0 1.67 2.83 1.67 2.83 mAdc
id" _ 1.67 2.83 1.67 2.83
DC Quiescent Power Dissipation
Pd mW
<V o = 0l " "50 -
85 50 85
CD For supply voltages less than +15 V, the Ma urn Input Voltage is equal to the Supply Voltage.
T| OW : 0C for MC1748C
-55C for MCI 748
T high +70 for MCI 748C
+ 125C for MC1748
TYPICAL CHARACTERISTICS
(V cc = +15 V, Vee " -15 V, Ta = +25C unless otherwise noted.)
FIGURE 5 - MINIMUM INPUT VOLTAGE RANGE FIGURE 6 - MINIMUM OUTPUT VOLTAGE SWING
20
i-
> 16
'
APPLICABLb IU IMt SKtwritu
OPERATING TEMPERATURE
CD
RANGES
Z
2 12
< MINIMUM
t-
o
>
8.0 MCI 748 m
'.'
i
\.
\
4.U
Ei
MINIMUM
o
1
mm WmM
6 20
5 .0
Vcc and (-Vee), SUPPLY VOLTAGE (VOLTS) VCC AND (-VEE). SUPPLY VOLTAGES (VOLTS)
III 2.5
1 2.0
OPERATING TEMPERATURE
=
''"
->::
1 MC1748 ;||
^l ii
:
W- MC 748 i
i||:
iv m.
Hf
i$
:
:
:
:
:
:
:
:
:
:
:v:y:j: >: ; :-: : :-: : : : :v: : : : 1
5.0 10 15
5.0 10 15
- VEE>' SUPPLY VOLTAGE (VOLTS) VCC AND - V EE>- SUPPLY VOLTAGE (VOLTS)
Vcc AND ( I
SI JG .E POLE CO MP ENS AT ON
III
1
i
OpF
V C = 3
\
CI = 30p ks
1.0 k 10 k 100 k 10 k
i 100 k
--. it
1.0 M
_L ill
+6.0
+4.0
+2.0
>A
1 /\ JTPUT
\/
__ _
-, 1
30
10 k 100 k 1.0 M
t, TIME (ys)
f, FREQUENCY (Hz)
FEEDFORWARD COMPENSATION + IU
I
FEEDFORWARD COMPENSATION
*16 OUTPUT
+6.0
, \
+4.0 X /
INPUT
+2.0
/
An
-2.0 /'
X ^N--
1
40
N
-6.0
*.,
-8.0
,
...
-in
10 Dk
1.0 M 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
f, FREQUENCY (Hz)
t, TIME (jul
This extremely versatile operational amplifier features low power SILICON MONOLITHIC
consumption and high input impedance. In addition, the quiescent INTEGRATED CIRCUIT
currents within the device may be programmed by the choice of
Non-Inverting InputQ
U SUFFIX
CERAMIC PACKAGE
CASE 693
Typical R se t Values
D SUFFIX
Vf PLASTIC PACKAGE
V C C. V EE = 1.5 juA 'set
'set
160kS2
CASE 751
360 kl! + 1.5V 1.6 Mil
+6.0V 3.6 M!! (SO-8)
620 kJ2 +3.0V 3 6 Mil 360 kil
+iov 6.2 Mil
750 k!l 16.0 V 7.5MSI 750 kJ2
112V 7.5 MS2
20 Mil 2.0 Mil Offset Null [T 3D 'let
10 Mil 1.0 MS2 + 15 V
15V
Inverting Input [jF H vCc
ACTIVE PROGRAMMING Noninverting Input [T + ~E] Output
V EE [
ID Off set Null
FET CURRENT SOURCE BIPOLAR CURRENT SOURCE
(Top View)
ORDERING INFORMATION
Device Temperature Range Package
MC1776CD SO-8
Vdc
Vcc a nd IVeeI > 15 V 15
Offset Null to V Voltage
E VoffVEE 0.5 Vdc
Programming Current
'set 500 MA
Programming Voltage
Vset (V CC -2.0V) Vdc
(Voltage from set terminal to ground)
l
to
vcc
Output Short -Circuit Duration*
*s Indefinite s
Operating Temperature Range
TA C
MCI 776 -55 to +125
MC1776C to +70
Storage Temperature Range
T stg C
Metal and Ceramic Packages
-65 to +150
Plastic Package
-55 to +125
Junction Temperature
Tj C
Metal and Ceramic Packages
175
Plastic Package
150 I
SCHEMATIC DIAGRAM
OVcc
MC1776 MC1776C
Characteristic Symbol Min Typ Max Min Typ Max Unit
- 2.0 - - 2.0 - pF
Input Capacitance c.
MC1776 MC1776C
Characteristic Symbol Typ Min Typ Max Unit
Input Offset Voltage (R 10 kn)
s <.
V|0
T A = +25C mV
5.0 6.0
T low* < T A < T high *
6.0 7.5
Offset Voltage Adjustment Range v IOR 18
Input Offset Current
ho nA
TA = +25C
2.0 15 25
TA = Thigh 15 25
TA =
T|ow 40 40
Input Bias Current
TA = +25C
50 50
TA = Thigh
50 50
TA = T| ow
120 100
Input Resistance
Input Capacitance
5.0 Mn
2.0
PF
Input Voltage Range
V(D
T|ow< T A < T high
Large Signal Voltage Gain
A VOL V/V
R|_ > 5.0kn, V = 1 .0 V, TA = +25C 50 k 200 k 25 k 200 k
R L > 5.0 k, Vq - 1 1 .0 V, T| ow < T A < Thigh 25 k 25k
"
Output Voltage Swing V
R L >5.Qkn,T| 0w <T A < Thigh 2.1 2.0
Output Resistance
1.0
Output Short-Circuit Current
5.0 mA
Common-Mode Rejection Ratio CMRR
R S <1Qkn,T| 0w < T A < Thigh
86 70
Supply Voltage Rejection Ratio PSRR MV/V
R S < 1Qkn,T| 0w <T A < Thigh 25 200
Supply Current
'CC- 'EE
T A - +25C
130 160 170
T low< T A < Thigh
180 180
Power Dissipation
T A - +25C MW
780 960 1020
T low < T A < Thigh
1080 1080
Transient Response (Unity Gain)
V in - 20 mV, R L > 5.0 kn, C L - 100 pF
Rise Time
'TLH 0.6 0.6
Overshoot OS 5.0 5.0
Slew Rate (R L > 5.0 kn)
SR 0.35
V/ms
*
T low " -55C for MC1776 T high +125Cfor MC1776
0C for MC1 776C +70Cfor MC1776C
MC1776 MC1776C
Characteristic Symbol Min Typ Max Min Typ Max Unit
- 2.0 - - 2.0 - pF
Input Capacitance <M
V|D V
Input Voltage Range
10 - - 10 - -
Tlow * T A < Thigh
V/V
Large Signal Voltage Gain AVOL -
T A = +25C 200 k 400 k - 50 k 400 k
R L > 75 kn, V = 10 V,
T| 0W < T A < T h igh 100 k 50 k
R L > 75 kn, V = 10 V,
v V
Output Voltage Swing
12 14 12 14
R L > 75 kn,TA = + 25C +
10 _ 10 -
R L > 75 kn, T| 0W < T A < T h i
gh
- 5.0 - - 5.0 kn
Output Resistance r
o
- 3.0 - - 3.0 - mA
Output Short-Circuit Current 'os
CMRR dB
Common-Mode Rejection Ratio
70 90 - 70 90 -
R S < 10 kn, T| OW < T A < Thigh
PSRR MV/V
Supply Voltage Rejection Ratio
- 25 150 - 25 200
R S < 10 kn, T| ow : T A < Thigh
Supply Current
ma
'CC- 'EE
T A = +25C
" 20 25 20 30
30 : 35
T low < T A *= Thigh
Power Dissipation Pd mW
- 0.75 - - .0.9
TA +25C
=
: 0.9 1.05
Tlow < T A < Thigh
Transient Response (Unity Gain)
V in = 20 mV, R L > 5.0 kn, CL = 100 pF
- 1.6 - 1.6 - MS
Rise Time l TLH
OS ; %
Overshoot
SR - 0.1 - _ 0.1 V/ms
Slew Rate (R L > 5.0 kn) I
MC1776 MC1776C
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (Rg < 10 kn)
TA
VlO mV
+25C
= - 2.0 5.0 " 2.0 6.0
T low* * T A * T high*
6.0 7.5
Offset Voltage Adjustment Range v IOR - - -
18 18 - mV
Input Offset Current
ho nA
TA = +25C - 2.0 15 2.0 25
TA = T high
15 - 25
TA = T low
40 40
Input Bias Current
'IB nA
TA = +25C 15 -
50 15 50
TA = T high - 50 50
TA = T|ow 120 100
Input Resistance - - -
rj 5.0 5.0 _ Mn
Input Capacitance - - -
Cj 2.0 2.0 _ pF
Input Voltage Range
V|D V
T low < T A < Thigh 10 _ _ 10
Large Signal Voltage Gain
AvOL V/V
R L ;5.0kn, V 10 V, T A = +25C 100 k 400 - -
k 50 k 400 k
R L > 75 kn. V = 1 10 V. T, 0VU < T A < Th jg h 75 k 50 k
v V
R L >5.0kn. T A = +25C 10 13 - 10 "
13
R L ^ 75 kn.T, ovv <;T A < Thigh 10 10
- - - -
r
o 1.0 1.0 kn
Output Short-Circuit Current - - -
'os 12 12 _ mA
Common-Mode Rejection Ratio CMRR dB
R S < 10 kn. T, ow <: T A < Thigh 70 90 _ 70 90
Supply Voltage Rejection Ratio PSRR MV/V
R S < 10 kn.T low ^T A < Thigh _ 25 150 25 200
Supply Current
TA
!CC- 'EE ma
= +25C - 160 180 - 160 190
Tlow < T A <; Thigh 200 200
Power Dissipation
Pd mW
T A = +25C " " 5.4 " - 5.7
T low < T A < Thigh 6.0 6.0
Transient Response (Unity Gain)
V in = 20 mV, R L > 5.0 kn. C L = 100 pF
Rise Time - - " -
l
TLH 0.35 0.35 MS
Overshoot OS 10 10 %
Slew Rate (R L > 5.0 kn) - - "
|
SR
J
0.8 0.8 - V/ms
MC1776, MC1776C
TYPICAL CHARACTERISTICS
(Ta = +25C unless otherwise noted.)
1000
vcc = +15V
VEE = -1!> v
^ "set 10 vee
^
- Vcc
?L
= +3 V :
' '>
1.1 .
-vc C = +3V s 5T
Mf E = -3V
_"se ttoGNC T
FIGURE 3 - OPEN LOOP GAIN versus SET CURRENT FIGURE 4 - INPUT BIAS CURRENT versus SET CURRENT
10?
= :::
--
4m^-VCC = +15
inn
Rj. = 7 >k
'V E E = -15 V ^ ""==!
,
10 5
-- I- i n
'
0.1
10* 1
1.0 10
;
i I.0M
Vcc = + i
5 vee = -3V
^ 100 k
s^ "set = 1-5 mA K
l 12
&
S 10k
6.0 Iset
<
1.0k _ ...
-60 -40 -20 +20 +40 +60 +80 +100 +120 +140 1.0 10
T, TEMPERATURE CO l
set , SET CURRENT (jiA)
36 1
1 1
1.5 jjA* U BI % 15 uA
32
RL = 75k
28
24
20
\\ V
*V, i
set
= 15*jA
vcc = +15 V
v^ J
:VEE = -15 V
I
'set = 15 /uA
RL = 5k
12
vcc
8.0 = VEE = -3 V = :
4.0
n
2.0 4.0 6.0 8.0 10 12 14 16
1.0
V CC. IVEEI. SUPPLY VOLTAGES (V)
set. SET CURRENT M A) (
^
< 10
cc
UJ
cc
,0
s
o
0.1
0.1 1.0 0. )1 1 1 1 J 100
set. SET CURRENT (^A) SET CURRENT (jiA)
set.
APPLICATIONS INFORMATION
INPUT VW )( iO-
2ir RC
R = 16 k2
C = 0.01 m?
10 k
GATE* VW
Vin VW '^H
for a given:
l = canter frequency
A (f )
~ Gain at center frequency
Q = quality factor
R5 = -fV-
R1 =
2A (f l
02 = ftLM
4Q2R1-R5
To obtain lets than 10% error from the operational amplifier:
l!o_ <0 .,
GBW
where f and GBW are expressed in Hz. GBW is available from
Figure 6 as a function of Set Current, l
n t.
MOTOROLA
SEMICONDUCTOR MC3301 LM2900
TECHNICAL DATA MC3401 LM3900
QUAD
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
QUAD SINGLE SUPPLY OPERATIONAL AMPLIFIER INTEGRATED CIRCUIT
PIN CONNECTIONS
MAXIMUM RATINGS .
^\ NONINV
LM2900/ ^H NONINV
Rating Symbol LM3900 MC3301 MC3401 Unit
Supply Voltage vcc +32 + 28 + 18 V
Input Currents (lj
n + or lj
n
~)
in 5.0 5.0 5.0 mA
Output Current >0 50 50 50 mA
Power Dissipation (Ta = + 25C) PD 625 625 625 mW
Derate above T/^ = + 25C VRflJA 5.0 5.0 5.0 mWVC
Operating Ambient ta -40 to Oto +70 C
Temperature Range + 85 Input 3
LM2900 -40 to
+ 85 (Top Vie
LM3900 Oto +70
Storage Temperature Range Tstg -65 to -65 to -65 to C
ORDERING INFORMATION
+ 150 + 150 + 150
Temperature
Device Range Package
LM3900D
SO-14
MC3401D
0Cto +70C
LM3900N
MC3401P Plastic
LM2900N DIP
-40Cto + 85C
MC3301P
Output Current mA
Source 'source 6.0 10 6.0 10 5.0 10 5.0 10
Sink (Note 3) 'sink 0.5 0.87 0.5 0.87 0.5 0.87 0.5 0.87 -
Low Level Output Current 'OL 5.0 5.0 - 5.0 - 5.0
l
in
- = 5.0 /xA, V L = 10 V
Supply Current (All Four Amplifiers) mA
Noninverting Inputs Open 'DO
- 6.9 10 - 6.9 10 - 6.9 10 - 6.9 10
Noninverting Inputs Grounded 7.8 14 7.8 14 7.8 14 7.8 14
<DG
Power Supply Rejection (f = 100 Hz) PSRR 55 55 55 55 dB
l
in
+ =200/*A 0.90 1.0 1.1 0.90 1.0 1.1 0.90 1.0 1.1 0.90 1.0 1.0
A Mirror Gain (Ta = T| ow to Thigh; Notes 1, 4) AAj 2.0 5.0 2.0 5.0 2.0 5.0 2.0 5.0 %
20MA*ljn + 200mA
Mirror Current (Ta = T| ow to Thigh; Notes 1, 5) 10 -
500 10
500 10
500 10 500 ma
Negative Input Current (Note 6)
- 1.0 - - 1.0 - - 1.0 - 1.0 mA
NOTES:
1- T|ow = - *0C for LM2900, MC3301 Thigh = +85C for LM2900, MC3301
= 0C for LM3900, MC3401 + 70C ffor LM3900, MC3401
2. Open-loop voltage gain defined as voltage gain from the inverting input to the output.
is
3. Sink current is specified for linear operation. When the device is used as a comparator (non-linear operation) where the inverting input is overdriven,
the sink current (low level output current) capability is typically 5.0 mA.
4. This specification indicates the current gain of the current mirror which is used as the noninverting input.
5. Input Vbe match between the noninverting and inverting inputs occurs for a mirror current (noninverting input current) of approximately 10 jiA.
6. Clamp transistors are included to prevent the input voltages from swinging below ground more than approximately -0.3 volts. The negative input
currents thatmay result from large signal overdrive with capacitive input coupling must be limited externally to values of approximately 1.0 mA.
Negative input currents in excess of 4.0 mA will cause the output to drop to a low voltage. These values apply for any one of the input terminals.
If more than one of the input terminals are simultaneously driven negative, maximum
currents are reduced. Common-mode biasing can be used
to prevent negative input voltages.
7. When used as a noninverting amplifier, the minimum output voltage is the Vbe f tne inverting input transistor.
TYPICAL CHARACTERISTICS
(Vcc = +15 Vdc, R|_ = 5.0 kn, Ta = +25C
[each amplifier] unless otherwise noted.)
FIGURE 1 OPEN-LOOP VOLTAGE GAIN versus FREQUENCY FIGURE 2 OPEN-LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE
isnn
>inn
n
10 k 100 k 3.0 6.0 12
9.0 15 18 21 24 27 30
FREQUENCY (Hz)
SUPPLY VOLTAGE (Vdc)
FIGURE 3 OUTPUT RESISTANCE versus FREQUENCY FIGURE 4 SUPPLY CURRENT versus SUPPLY VOLTAGE
|
IDG ^*~
< (NONINVERTING INPUTS GROUNDED)^-?"
8.0
** 'DO
c 60
""^INONINVERTING INPUTS OPEN)
1.0 k :
100 ..
0.5 k 1.0 k 5.0 k 10 k 50k100k 500 k 1.0 M 5.0 M 3.0 6.0 9.0 12 15 18 21 24 27 30
FIGURE 5 LINEAR SOURCE CURRENT versus FIGURE 6 LINEAR SINK CURRENT versus
SUPPLY VOLTAGE SUPPLY VOLTAGE
20
16
1
1?
600
vo = 0.4\/dc
-
VQH = 0.4V dc
w 400
I
40
BASIC AMPLIFIER pled linear operation at the output. The sink current of
The basic amplifier is the common emitter stage the device can be forced to exceed the specified level
shown in Figures 7 and 8. The active load is buffered l-| by keeping the output dc voltage above = 1.0 volt re-
from the input transistor by a PNP transistor, Q4, and sulting in an increase in the distortion appearing at the
from the output by an NPN transistor, Q2. Q2 is biased output. Closed-loop stability is maintained by an on-the-
Class A by the current source I2. The magnitude of I2 chip 3-pF capacitor shown in Figure 10 on the following
(specified s n k>
l
j
is a limiting factor in capacitively cou- page. No external compensation is required.
7 c.
Q n(
j ^ Multiple emitter (8) transistor one emitter connected to each input.
A noninverting input is obtained by adding a current approximately equal to n + also. In operation this cur-
lj
mirror as shown in Figure 9. Essentially all current which rent flows through an external feedback resistor which
enters the noninverting input, lj n + flows through the , generates the output voltage signal. For inverting ap-
diode CR1. The voltage drop across CR1 corresponds plications, the noninverting input is often used to set
to this input current magnitude and this same voltage the dc quiescent level at the output. Techniques for
is applied to a matched device, Q3. Thus Q3 is biased doing this are discussed in the "Normal Design Pro-
to conduct an emitter current equal to lj n + Since the - cedure" section.
alpha current gain of Q3 1, its collector current is
Output
Input ^ Output
Inputs JH >- iJ I
( + )0 f g3*| in + J_
:LCR1
BIASING CIRCUITRY
The circuitry common to all four amplifiers is shown Q7 reduces base current loading. The voltage across
in Figure 11. The purpose of this circuitry is to provide resistor R2 is the sum of the voltage drops across CR2,
biasing voltage for the PNP and NPN current sources CR3 and CR4, minus the Vbe drops of transistor Q9 and
used the amplifiers.
in diode CR5 thus the current set is established by CR5 in
The voltage drops across diodes CR2, CR3 and CR4 all the NPN current sources (Q10,
etc.). This technique
are used as references. The voltage across resistor R1 results in current source magnitudes which are rela-
is the sum of the drops across CR4 and CR3 minus the
tively independent of the supply voltage. Q11 (Figure
Vbe of Q8. The PNP current sources (Q5, etc.) are set 7) provides circuit protection from signals that are neg-
to the magnitude Vbe/R1 by transistor Q6. Transistor ative with respect to ground.
O Output
Inputs
ing input to effect the biasing; as shown in Fig- dynamic range of the output voltage.
ures 12 and 13 (see the first page of this
specification). The high impedance of the collec- Reference Voltage other than Vcc see Figure 14)
<
tor of the noninverting "current mirror" transistor
The biasing resistor Rr may be returned to a volt-
helps to achieve the maximum loop gain for any
age (V r other than Vcc- B y setting Rf = R r (still
)
particular configuration. It is desirable that the
,
(Rf)(Aj)
*1.0 M --
Gain Determination
A. Inverting Amplifier The lower corner frequency is determined by the
The amplifier is normally used in the inverting coupling capacitors to the input and load resis-
tors. The upper corner frequency will usually be
mode. The input may be capacitively coupled to
avoid upsetting the dc bias and the output is nor- determined by the amplifier internal compensa-
mally capacitively coupled to eliminate the dc tion. The amplifier unity gain bandwidth is typi-
voltage across the load. Note that when the out- cally 4.0 MHz and with the gain roll-off at 20 dB
put is capacitively coupled to the load, the value per decade, bandwidth will typically be 400 kHz
of s n k becomes a limitation with respect to the
l
with 20 dB of closed-loop gain or 40 kHz with 40
j
load driving capabilities of the device. The limi- dB of closed-loop gain. The exception to this oc-
tation is less severe if the device is direct coupled. curs at low gains where the input resistor selected
is large. The pole formed by the amplifier input
In this configuration, the ac gain is determined
by the ratio of Rf to Rj, in the same manner as for capacitance, stray capacitance and the input re-
a conventional operational amplifier: sistor may occur before the closed-loop gain in-
tercepts the open-loop response curve. The in-
verting input capacity is typically 3.0 pF.
A = -*
5!
Ri
FIGURE 14
INVERTING AMPLIFIER WITH FIGURE 15 INVERTING AMPLIFIER WITH
ARBITRARY REFERENCE Av = 100 AND Vr = Vcc
510 k
AW
0.1 mF
Vin )| VVV
5.1 k
4
V
1.0 M
TYPICAL APPLICATIONS
Vcc = +12 V
Magnetic Pickup
Hysterisis Amplifier Pulse Averaging
C1
0.1 /iF
Magnetic
Pickup
Output
pT^RI (nonregulated) ~\>
MSD6100^
MQiifiinn
1.0 M 0.'
or enuiv
equiv '
wv i
10 k
21 + VCC
R2
150 k
+ Vqc = +15Vdc vw-
75 k
) 75 k
r wv
Q1
B
Wv
75 k
C f = A + B + C
V
V = VZ1 + 0.6 (1 + - V BEqi *
Jf)
NOTE:
For positive Tc zeners R2 and R1 can be
selected to give Tc output.
FIGURE 19 LOGIC "NAND" GATE (Large Fan-In) FIGURE 20 LOGIC "NOR" GATE
i+Vcc = +15Vdc
N-
J75k
B- a <
c
\4 | 1 W o-
D. |+
EH+ + Vcc = +15Vdc
f = A'B'C'D-E f=A+B+C+D
0.001 fif )l
1\-
100 k
-JVW
AVi,
-L^j-0.002^F 51k
T
Vcc = +15Vdc
VO(dc) - 7.0 Vdc
Output Rise Time = 0.22 ms
Input Change Time Constant 1.0 ms
v.
v in M
j| vw 51 k
0.1 mF
1.2 M
Ay = 10
V = 6.0 V(p.
p)
+ 15V
390 k
1(
0.005 ixF
300 k
^h
0.005 mF
100 k
-V\Ar-
300 k:
V
MJE800 5.0 V at 4.0 A
or equiv
Input
Output
Output LRTLL
MOTOROLA
SEMICONDUCTOR MC3403
TECHNICAL DATA MC3503
MC3303
QUAD LOW POWER OPERATIONAL AMPLIFIERS
The MC3503 quad operational amplifier with true
is a low-cost,
The device has electrical characteristics similar
differential inputs. QUAD DIFFERENTIAL
to the popular MC1741. However, the MC3503 has several
distinct INPUT
advantages over standard operational amplifier types in single OPERATIONAL AMPLIFIERS
supply applications. The quad amplifier can operate at supply
voltages as low as 3.0 Volts or as high as 36 Volts with quiescent
currents about one third of those associated with the MC1741 (on SILICON MONOLITHIC
a per amplifier basis). The common mode input range includes INTEGRATED CIRCUIT
the negative supply, thereby eliminating the necessity for external
biasing components in many applications. The output voltage
range also includes the negative power supply voltage.
Lv .=-1.5 V to 18 V
SJ> PIN CONNECTIONS
o- h~>
1.5 V to 18 V
W 14
MAXIMUM RATINGS
__
Power Supply Voltages
*
Rating
v EE , Gnd
3 ^^ 13
12
Single Supply
vCc 36
Split Supplies v Cc + 18
vEe -18 10
Input Differential Voltage Range (1) Inputs 1
V IDR 36 Vdc
Input Common Mode Voltage Range (1) (2) V ICR 18 Vdc
rt>| |-K
Storage Temperature Range T stg C
Ceramic Package -65 to +1 50 8
Plastic Package
-55 to +125
Operating Ambient Temperature Range TA 6C
MC3503 -55 +125
to OF tDERIIMG INFORMATION
MC3403 to +70
MC3303 Type Temperature Range Package
-40 to +85
Junction Temperature
MC3303D SO-14
Tj C MC3303L -40C to +85C Ceramic DIP
Ceramic Package 175 MC3303P Plastic DIP
Plastic Package 150
MC3403D SO-14
(1) Split Power Supplies. MC3403L 0C to + 70C Ceramic DIP
(2) For Supply Voltages less than 18 V, the absolute maximum MC3403P
input voltage is equal to the Plastic DIP
supply voltage.
MC3503L -55Cto +125C Ceramic DIP
ELECTRICAL CHARACTERISTICS (V CC - +15 V, V EE - -15 V for MC3503, MC3403; V CC " +14 v V EE " Gnd
-
for MCC3303.
Ta " 25C unless otherwise noted.)
" 30 50 30 50 30 75
Input Offset Current >IO
200 _ 200 - 250
f = 20 Hz
f 20 Hz
V R V
Output Voltage Range "
12 13.5 12 13.5 +12 +12.5
R L - 10 kn '-
R kn 10 13 1 10 13 + 10 +12
L - 2.0
10 10 +10
R kn, T A - T high to T| ow
L = 2.0
- + 13V-V EE + 13.5V-V EE - +12V-V EE +12.5V-V EE " V
Input Common-Mode Voltage Range VlCR +13 V -V EE + 13.5V-V EE
CMRR 70 90 ~ 70 90 70 90
Common-Mode Rejection Ratio
R S < 10 kn
- 0) - 2.8 4 - 2.8 7.0 2.8 7.0 mA
Power Supply Current IV 'CC.'EE
10 30 45 10 20 45 10 30 45
Individual Output Short-Circuit Current (21 'OS*
- 150 - 30 150 - 30 150 mv/v
Positive Power Supply Rejection Ratio PSRR+ 30
- 30 150 - 30 150 - - - MV/V
Negative Power Supply Rejection Ratio PSRR-
_ 50 50 50 pA/C
Average Temperature Coefficient of Input a|
|0 /^T
Offset Current
OS ~ 20 ~ - 20 " 20 %
Overshoot
Av = L R L" 10 kSi '
V o = 50mV
" - - 60 " 60 Degrees
Phase Margin ,m 60
AV " 1 R L - .
20 kU C L " 200pF
'
1.0 10 10
Crossover Distortion
(
in
- 30 mVp-p, V out = 2.0 Vp-p.
f = 10 kHz)
ID Thigh " '25C for MC3503, 70C for MC3403. 85C for MC3303
= - 55 c ,or MC3503. 0C for MC3403, -40C for MC3303
Tlow
CIRCUIT SCHEMATIC
(1/4 Shown
CIRCUIT DESCRIPTION
The MC3503/3403/3303 is made using four internally the negative supply or ground, in single supply
operation,
compensated, two-stage operational amplifiers. The first without saturating either the input devices or the dif-
stage of each consists of differential input devices
Q24 and ferential to single-ended converter.The second stage con-
Q22 with input buffer transistors Q25 and Q21 and sists of a standard current source load amplifier
stage.
the differential to single ended converter Q3 and Q4. The output stage is unique because it allows the output
The first stage performs not only the
first stage gain to swing to ground in single supply operation and
function but also performs the level shifting and trans- yet does
not exhibit any crossover distortion in split supply
conductance reduction functions. By reducing the trans- oper-
ation. This is possible because class AB operation
conductance a smaller compensation capacitor (only 5 pF) is utilized.
Each amplifier is biased from an internal-voltage regu-
can be employed, thus saving chip area. The transcon-
lator which has a low temperature coefficient thus giving
ductance reduction is accomplished by splitting the col- each amplifier good temperature characteristics
as well as
lectors of Q24 and Q22. Another feature of this input excellent power supply rejection.
stage is that the input common-mode range can include
Ml I
vcc* 5V
-VE = -15V.--
ta = 25C
50Ais/div.
U <-oV
o
>
CD
'^4 -15 V 10k
ia
<
t-
o
|
t >
__.
TA = 25' C -|j
{ o
o
5.0
>
10 k 100 k 2.0 4.0 6.0 8.0 10 12 14 16 18 20
FIGURE 5 - INPUT BIAS CURRENT versus TEMPERATURE FIGURE 6- INPUT BIAS CURRENT versus SUPPLY VOLTAGE
1 1
V C C=15V
VE = -15V
1/0
iin
-75 -55 -35 -15 5.0 25 45 65 85 105 125 2.0 4.0 6.0 8 10 12 14 16 18 20
APPLICATIONS INFORMATION
'ref = = V CC
For f
Q = 1 kHz
R = 16 kft
C = 0.01 mF
H ysteres is
OH
1
V<D
OL v in L V nH
J
Vref
'in L = R1
+R2
(V OL~ V re f) + V ref
R1
lnH= R1 (V H ~ Vref) + V f
e = C (1 + a + b) (e2 -el) + R2
h
-STTr2 <v oh-v ol >
R2 = - v ref = - v cc
R1 + RC R2 R1
4 CRf R1 B2 + R1
Choose Value f , C
Then:
R3
R1
2 A(f )
R1 R5
R2
4Q2R1-R5
BW
< 1 Where f D and BW are expressed in Hz.
L SUFFIX
CERAMIC PACKAGE
CASE 632
PIN CONNECTIONS
v_>
Out 1 i
Comp Op
1 Amp
2 13
1
r P SUFFIX
Inputs 1 V>-l PLASTIC PACKAGE
/ Inputs 4
<
~J
3 12 CASE 646
V CC 4 11 V EE /Gnd
Comp Op
2 Amp 2
10
Inputs 2 < Inputs 3
ORDERING INFORMATION
Device Temperature Range Package
MC3405L Oto +70C Ceramic DIP
MC3405P Oto +70C Plastic DIP
MC3405, MC3505
MC3505 MC3405
Characteristic Symbol Min Typ Max Min Typ Max Unit
CMRR 70 90 - 70 90 dB
Common Mode Rejection Ratio
PSRR - 30 150 - 30 150 MV/V
Power Supply Rejection Ratio
Vdc
Output Voltage vo -
(R L = 10kn) 12 13.5 12 13.5
(R L = 2.0 kn) 10 13 - 10 13
<R L = 2.0 kn, TA = T| 0W to Thigh) 10 10
(Note 4)
Output Short-Circuit Current 10 30 45 10 20 45 mA
'OS
Power Supply Current (Notes 2 and 3)
- 2.8 4.0 - 2.8 7.0 mA
"cc-'ee
0m - 60 - - 60 - Degrees
Phase Margin
Small-Signal Bandwidth BW 1.0 " 1.0 MHz
(A V = 1 , Rl = 10 kn, Vo = 50 mV)
BWp 9.0 9.0 kHz
Power Bandwidth
(A V = 1 , Rl = 2.0 kn, V = 20 V (p-p),
THD = 5%)
- 0.35 - - 0.35 - PS
Rise Time/Fall Time tTLH.tTHL
Overshoot (Av = 1 , Rj_ = 10 kn, OS 20 20 %
Vq = 50 mV)
SR - 0.6 - - 0.6 V//iS
Slew Rate
4. T| om = -55C for MC3505 Th = + 1 25C for MC3505
1 . Output will swing to ground i
gh
2. Not o exceed maximum package power dissipation.
1 0C for MC3405 = +70C for MC3405
3. For Operational Amplifier and Comparator.
MC3405, MC3505
COMPARATOR SECTION
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage-Single Supply
V CC 36 Vdc
Split Supplies
vcc-Vee 18
Input Differential Voltage Range
VlDR 36 Vdc
Input Common Mode Voltage Range
V|CR -0.3 to +36 Vdc
'sink 20 mA
Operating Ambient Temperature Range-MC3505 TA -55 to +125 "C
MC3405 to +70
Storage Temperature Range-Ceramic Package
T stg -65 to +150 C
Plastic Package -55 to +125
Operating Junction Temperature Range-Ceramic Package
Tj 175 C
Plastic Package 150
V < 1 .5 V)
vol mV
(V in ( + )=0V,V in (-) = 1.0V,
'sink = 4.0 mA) - 350 500 - 350 500
< TA = T| ow to Thigh) (Note 1
700 700
'OL MA
(V in + )>1.0Vdc,
( V in (-)=0,
Vq = 5.0 Vdc)
0.1 1.0 - 0.1 1.0
(T A = T| 0W to Thigh) (Note 1) _ 0.1 1.0 0.1 1.0
Large-Signal Response
300
Response Time (Note 3) - - 1.3 - -
1.3 MS
(V RL = 5.0 Vdc, R L = 5.1 kn)
2. V = 1 .4 V. RS - a with V CC from 5.0 Vdc to 30 Vdc, and over the input common mode range to V cc - 1 .7 V.
3. The response time specified is for a 100 mV input step with 5.0 mV overdrive. For larger signals 300 ns is typical.
1
St
O 3
CO o
H SE
5 o
O u.
tr o
W = 100 mi
1
/
i
i
Vcc= +15V
fVEE = -15 V
< z TA = 25C
aS
lil CD
< -"
-1 O
I n I m i il
z 20
-20 J 1
50/is/div.
Ta = 25C
?n
in
10 k 100 k
A \
1 1
1 |
FIGURE 5- INPUT BIAS CURRENT verws TEMPERATURE FIGURE 6 - INPUT BIAS CURRENT versus SUPPLY VOLTAGE
1 1
Vcc
- +15V
VEE = -15V
1/\ = 25 c
-
100
...
150
-75 -55 -35 -15 5.0 25 45 65 85 105 125
-
10 12 14 16 18 20
T, TEMPERATURE (C)
VCC AND. IVEEl, POWER SUPPLY VO LTAGES (VOLTS)
COMPARATOR SECTION
TYPICAL PERFORMANCE CURVES
- NORMALIZED INPUT OFFSET VOLTAGE FIGURE 8 - INPUT BIAS CURRENT
FIGURE 7
200
V CC -+15V _
V EE = Gnd
T A = -55C
< S, Z
o e 1.00 cc
120
w TA = +25C
<
S < 0.80 h-
TA = +125C
- 80
V = 3nd
:E
Slope Can Be Either Polarity.
40
6 .0 4 18 22 26 30
2 n 1 1
*" '
140 ZUU 400 600 800 1000
-60 ;
-4U _2 a o
u 20
'" 40 60 80 100 120
V 0L OUTPUT VOLTAGE (mV)
T A AMBIENT
,
TEMPERATURE (C)
APPLICATIONS INFORMATION
FIGURE 1 1 - PULSE WIDTH MODULATOR SCHEMATIC AND WAVEFORMS
(a) Oscillator Square Wave Output
v sw
Vcc-
->v Q ut V EE
V CC
1
Vcc-l
V TH =lv s (1 + R2/R1) + V EE VS = V CC -V EE
TL< V C < VTH
V TL = lv s (1 - R2/R1) + V EE
ity Cycle in %
Oscillator Frequency
R1 V TH - V TL/
f- \
4R f CR2
MC3405, MC3505
vc Adjust
Op Amp 2 v in
'CC
in> K- .2.7 k
i= -r Op Amp 1
IL Vcc R1 + R2 + R3
IH " CC R1 + r2 + R3
Oscillator
If R4 = R5 = R6
f = 0.72/R f C
"&&
X < V CC U "
- " Time
T A ^-r
T Set -
VEE
A N-
bH-
c N I
10kl |i
LSTTL |
~ Level Shift ' CMOS
|
V| L = 1.17 V I
G= A+B+C+D
V m= 1.80 V
ffp
This parameter, called Input Sensitivity, specif ies a minimum differ-
ential input voltage which will guarantee a given logic
state. Four
variations are offered in the comparator series. 16 I | I I "
Specified for
OUTPUT A F 3+ '
all 5% Power Supply Variations,
conditions of
~t>7l HZ)" ^OUTPUT 6
Operating Temperature Range, Input Common-Mode Voltage STROBE [7
Swing from -3.0 V to 3.0 V, and F?s < 200 ohms. OUTPUT C nr T5]v EE
INPUTS
c
+ [I
-E ^ TTJOUTPUT D
3-
INPUTS
D
TA MC3432
WORD OUTPU - to 70C H Off
WORD WORD WORD
MOS^.MEMORY MOS MEMORY L L
MOS \ EMORY MOs". V| D <-7.0mV MC3430
H Z
TA O
L On
- to 70C MC3432
H Off
r-Wv~*
Input Strobe Output Device
V| >l2mv L H
D H
MC3431
Z
VW -
L Off
TA - to 70C MC3433
H Off
L
Wv -12mV<V, 1
MC3431
[ H z
<*12mV L 1
TA - to 70C H
MC3433
Off
L L
V, D <-12mV H MC3431
Z
L On
TA = to 70C MC3433
H Oft
Only four devices are required for a
4-k word by 16-bit memory systen L - Low Logic State Z - Third (High Impedance)
H - High Logic State I - Indeterminate State
ns < 2oo n
(V CC = 5.25 V, V EE = -5.25 V)
45 60 45 60 mA
High Logic Level Supply Currents l
CC - -30 mA
- -17 -30 -17
(V CC = 5.25 V, V EE = -5.25 V) 'EE
T A = 25C 1
TA = to 70C
Differential Input lO Error Voltage
VlO Avol* Differential Input '10 Error Voltage
Voltage Required RS= 200 Generated Into
Type
12 Total VlO A vo |* Voltage Required Rs = 200
mV V/V for 3.0 V Output MA 200 n Source Sensitivity mV V/V
SJ Generated Into Total
Number for 3.0 V Output vA 200 n Source
Max Typ Change Sensitivity
Resistors mV Max Typ Change Max Resistors mV
MC3432 60
7.0
MC3431,
MC3433 10
12
MC1711C 5.0 1500 2.0 mV 15 3.0 mV 10 5.0 1000 mV
LM311
3.0 25 mV
5.0 13
7.5 200 k 0.01 5 mV 6.0- 0.0012 mV 7.516 10 100 0.030 mV 70"
k
0.014 mV 10^04
Typical values given. ss minimum gain no always specif ed '
**l|0 measured in nA
FIGURE 2 - GUARANTEED OUTPUT STATE versus FIGURE 3 - GUARANTEED OUTPUT STATE versus
DIFFERENTIAL INPUT VOLTAGE
INPUT VOLTAGE
'
..
Unce rtaint V r
He gion
,
Guaranteed -
3430 V0H
toe 3432 All device
I I types ~!
75 taint
Re gion
?n
MC
MC
431
433
V
VOH
1 s Guaranteed MC343I
_ VOL MC343
1 n
Only - \ 4.75 V<Vcc< 5.25 V
RS < 200 n
V
05 -L-L
^ -4.75 V;Vee> -5.25 V
-3.0 V<V|CR< 3.0
< Ta >s 70C
0C < Ta < 70C ~H
0C
_ Guaranteed |f3| 4.75 V<Vcc< 5.25 V"
VQl All devic s typ s
Y
_i 1 1 1
~1 -4.75 V >VE> -5.25 V
-35 -30 -25 -20 -15 -10 -5 5 10 15 20 25 30 35 -2.0 -1.0 1.0 2.0 3.0 4.0
DIFFERENTIAL INPUT VOLTAGE ImV)
Vin(A), INPUT VOLTAGE (VOLTS)
SWITCHING CHARACTERISTICS (V cc = +5.0 Vdc, V EE =-5.0 Vdc, T A = +25C un less otherwise noted.)
MC3430, MC3431 MC3432, MC3433
6,8-11 _ 20 45 27 50 ns
High to Low Logic Level Propagation Delay tPHL(D)
Time (Differential Inputs) 5.0 mV + V|g
6,8-11 _ 33 55 40 65 ns
Low to High Logic Level Propagation Delay tPLH(D)
Time (Differential Inputs) 5.0 mV + V|s
TEST CIRCUITS
and tPZHIS)
FIGURE 4 - STROBE PROPAGATION DELAY TIMES tp LZ ( S ). tpZL(S). tpHZ(S).
V1 V2 S1 S2 cL
100 mV GND Closed Closed 15 pF
'PLZIS)
100 mV GND Closed Open 50 pF
'PZL(S)
GND 100 mV Closed Closed 15 pF
PHZ<S)
'PZH(S) GND 100 mV Open Closed 50 pF
TLH
t and t TH L < 10 ns measured 10% to 90%.
PBR = 1.0 MHz
Duty Cycle = 50%
tPLZ(S)
v h-
Eo
3 0V ;
V-
tpZL(S) tPZH(S) <
VoH _.
I5.0V-VD-I
o \15V ~p:
vol -*
1+3.0
+5.0 V
E in
V
V
'PLHISl-
MC3432
v OH -
MC3433
I'
E} n waveform characteristics:
*TLH and tTHL < 10 ns measured 10% to 90%.
PRR= 1.0 MHz
Duty Cycle- 50%
Output of Channel B shown under test, other channe
5.0 V
^
f
o J 390 < 390 .
VREF + v is
MC3430 + 5.0 mV-
thru E V REF>
--5.0 '
in
MC3433
V-
-(n) 'PLHID)-
v OH "
Vol-
Ej n waveform characteristics:
Output of Channel B shown under test, other channels are *TLH and *THL * 1 n measured 10% to 90%.
PRR = 1.0 MHz
S1 at "A" for MC3430, MC3431 Device Vref mV Duty Cycle" 50%
SI at "B" for MC3432, MC3433 MC3430 11
C L = 50 pF total for MC3430, MC3431 MC3431
C L = 15 pF total for MC3432, MC3433 MC3432
MC3433
i.6k 120:-
-OOUTPUT
v eE o-
I I
X Vqh
' mV
3
!
^UV/
1
VOH
\# // V/
! 1
|
A
y
k/
/' //
"V s
mV- ^ NY v,^
\s
,
DmV
w 7 AX /
1(l
35 \\ V
W^
l\
w
1
b>">
vol
Vl. 7i v
> 'j
5.0mV- -100 mV-
1 VOL
100 mV 200 mV I I
tTLH n'
100 mV I I
1 1
-10 10 20 30 40 50
20 30 40 50 -20
.20 -10 10
TIME(ns)
TIME(ns)
/O
I I I
I I I I
Vcc=+50V Y l\ s
VEE -5.0V = ^ *
/ VEE
Ta
=
=
-5.0V
25C
\ \\ I
V L_
I
Ta = 25C
N /j i
Ak , 10 mV-
\\ A \J
50 m\
*s /
/A u \\ \^
\
' OmV
"
/A A
k
J
,
^>
\ \\
X
IJ^SW \\
>
// / / 0m\
/ 't / ...
\ L
vol ^Z / V J /
y
A- V-
vol
100 mV 200 mV
.6 ns
I
100 mV I I
.20 -10 10 20 30 40
10 20 30 40 50 60
TIME(ns)
TIME(ns)
30
_ <PLH _ tPLH
MC3432-33 MC3430-31
20
/ '
/
IU /
VE = -5.0 V tPHL tPH L
MC3430-31 MC343 233
V re f = 100 mV
b.U Overdrive = 100 mV
I I
25 50 75
AMBIENT TEMPERATURE <C)
AMBIENT TEMPERATURE CO
APPLICATIONS INFORMATION
Vlow
(O
2
-OV out v h igh
> VH
1
>
-^
V in (VOLTS)
w R2 tVQImax) - VREF'
Vhigh" v ref +
R1 + R2
Vref
R2 [V 0(min) - V REF ]
X"
5.0
'ref (high) O VvV-
- 4.0 V
- 3.0 V
1/4MC3432
MC3433
v out - 2.0 V
- 1.0 V
0.0 V
v ref (low) O VW- v ref v ref
(low) (high)
DUAL DIFFERENTIAL
INPUT
OPERATIONAL AMPLIFIERS
DUAL LOW POWER OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
Utilizing the circuit designs perfected for recently
introduced INTEGRATED CIRCUIT
Quad Operational Amplifiers, these dual operational amplifiers
feature 1) low power drain, 2) a common
mode input voltage range
extending to ground/V
EE 3) Single Supply or Split Supply operation
,
- - - 75 "
Output Impedance o 75
- 03 10 " 0.3 10
Input Impedance ' 0.3 1
f = 20 Hz
Output Voltage Range VOR " 12.5 -
12 13 5 12 13 5 12
R L = 10 kn
13 - 10 ;13 10 12
R L = 2.0 kn 10
10 10 10
R L 2.0 kn, T A = T high toT| ow ;
CMRR 70 90 - 70 90
Common-Mode Rejection Ratio
2.2 6 3.7 1 6
Power Supply Current (V = 0) 'cc'ee ' 1 6 1
RL = -
30 45 10 20 = 45
Individual Output Short-Circuit Current 121 'OS: slO
150 30 150 30 150 mV/V
PSRR + 30
PSRR- 30 150 30 150
Negative Power Supply Rejection Ratio
- - 50 - pA/C
- 50 50
Average Temperature Coefficient of Input -'io/ T
Offset Current
TA = Thigh toT| ow
10 10
Average Temperature Coefficient ot Input V, / T
Offset Voltage
Av 1. RL 10 kn, V = 50 mV
Slew Rate SR " 06 06
Av - 1, V, = -10V to+1QV
- 36 US
Rise Time 'TLH 35
A V 1.Rl = 10kII. V = 50mV
~ 35 ,.
Fall Time 'THL 35
Av = 1,R
L = 10 kn, V o >50mV
- 20 ~ ~ 20 20
Overshoot OS
A V" 1."L = 'Okn, V o = 50mV
0m 60 60
Phase Margin
Av = 1,R L = 20kn,C L = 200pF
1 "
1
Crossover Distortion
IV in 30mVp-p, V out - 2.0Vp-p.
f 10 kHz)
I ' I Thigh " 1 25C for MC3558. 70C for MC3458, 85C for MC3358
Tlow = "55C for MC3558. 0C for MC3458, -40C for MC3358
25C un ess other ivise noted
ELECTRICAL CHARACTERISTICS (v cc - 5 V V EE = Gnd, T A - I
MC3B58 MC3458
Typ Max Min Typ Max Min Typ Max Unit
Symbol Min
" 2 50 - 20 10 ~ 20 10 mV
Input Offset Voltage vio
30 50 75 nA
- -500 - -200 -500 - - -500 nA
-200
Input Bias Current 'IB
200 20 200 20
Large-Signal Open-Loop Voltage Gain A V OL 20
RL = 2.0 k
150 150 ItMN
Vp-P
Output Voltage Range (3) VOR " 3.5 '
3.5 3.3 3.5 3.3
R L 10 kn, V CC - 5.0 V 3.3
V CC -1.7V
V VCC"' V VcC-1-7 v
R L ' 10 kn, 5.0 V < V CC < 30 7
- 2.5 4.0 - 2.5 7.0 " 2.5 mA
Power Supply Current ice
~ _ -120 -120
Channel Separation
f - 1.0 kHz to 20 kHz Input Referenced)
I
^-OV EE (Gnd)
CIRCUIT DESCRIPTION
NVERTER PULSE RESPONSE
The MC3558 Series is made using two internally
compensated, two-stage operational amplifiers. The first
stage of each consists of differential input
devices Q24and
Q22 with input bufferQ25 and Q21 and
transistors
the differential ended converter Q3 and Q4.
to single
The first performs not only the first stage gain
stage
function but also performs the level shifting
and trans-
conductance reduction functions. By reducing the trans-
conductance a smaller compensation capacitor (only 5 pF
can be employed, thus saving chip area.
The transcon
ductance reduction is accomplished by splitting the col-
lectors of Q24 and Q22. Another feature
of this input
stage is that the input common-mode range can include
the negative supply or ground, in single supply operation,
without saturating either the input devices or the dif
ferential to single-ended converter. The second
stage con-
sists of a standard current source
load amplifier stage.
The output stage is unique because it allows the output
to swing to ground in single supply operation and yet does
not exhibit any crossover distortion in split supply oper-
ation. This is possible because class AB operation is utilized.
Each amplifier is biased from an internal-voltage regu-
lator which has a low temperature coefficient
thus giving
each amplifier good temperature characteristics as well
as
excellent power supply rejection.
A v- 1 DO VCC= +15V
Vcr - 1R V 4--
A TA == 25 C
'\ LARGESIGN
i/OLTAGEGA
)
/
<3
z 20
I
-20 i
I
50/is/div.
-5. Ta = 25C
30
>
CD
< 20
<
o
>
IU
s
=3
o
o
> 1
10k 100k
f, FREQUENCY (Hz)
Vcc AND VE. POWER SUPPLY VOLTAGES (VOLTS)
= + 15V_
3UU = -15V
VEE
'/k a 1/0
2UU
IbO
10U
4.0 6.0 8 10 12 14 16 18 20
125 2.0
-75 -55 -35 -15 5.0 25 45 65 85 106
Vcc AND IVEEI, POWER SUPPLY VOLTAGES (VOLTS)
T, TEMPERATURE (C)
APPLICATIONS INFORMATION
V ref =
^ V CC
Hyst ere is
OH
v
OL V ir V nH
L
V re f
= <V L- V ref>
VinL V ref
WTTW2 +
e = C (1 + a + b)
VinH=
RTT^ (v OH-v ref)tVref
(e2 - e1)
R1
H =
R2 Vnu
OH
( Vr>i
OL I
R1 +
v ref = x V CC
R1 - 1.6 Mil
Vref Wnere T BP " Center Frequency Gain R2=1.6Mft
Thj = Pastband Notch Gain ., _ . - ,.
Triangle Wave
Output a
R1 + Re B2 R1
f
= if R3 =
4 CRf R1 R2 + R1
V ln Wv ii
1^
f^c
Choose Value f Q C ,
Then:
2 A(f Q >
R1 R3
R2=
4Q2R1 _ R3
MOTOROLA
SEMICONDUCTOR MC3476
TECHNICAL DATA
V EE
R set to NEGATIVE SUPPLY
(Top View)
7 9 vcc
P1 SUFFIX
PLASTIC PACKAGE
CASE 626
560 kn
10jUA l
set = 15
360 kn
MA CERAMIC PACKAGE
CASE 693
^TO
f
+ 9.0 V 820 kn 560 kn
+ 12 V 1.0 Mn 750 kn
15 V 1.5 Mn i.o Mn
Offset Null |T
Inverting Input \2_
V EE [4
(Top View)
ORDERING INFORMATION
Device Temperature Range Package
MC3476G to + 70C Metal Can
MC3476P1 to + 70C Plastic DIP
QC
Storage Temperature Range T stg
Metal and Ceramic Packages
-65 to +150
Plastic Package -55 to +125
Tj c
Junction Temperature
175
Metal and Ceramic Packages
Package 150
Plastic
Short -Circuit to ground with Iset <S 15 mA. Rating applies up to ambient temperature of +70C.
-OVcc
2 ^
INPUTS
^h
30
100 OUTPUT
\S
> N 30 pF
>^<
OFFSET NULL
50
kl
c i-^1
vee
-o*
Characteristic
Symbol Min Typ Unit
Input Offset Voltage (R < 10 kn)
s vio
T A = +25C
0C< T A < 70C 6.0
7.5
Offset Voltage Adjustment Range
v IOR mV
Input Offset Current
T A = +25C ho nA
T A = 70C 25
T A = QC 25
40
Input Bias Current
T A = +25C <IB nA
T A = 70C 50
T A =0C 50
100
Input Resistance
Input Capacitance
Mfi
TYPICAL CHARACTERISTICS
(T"a = +25C unless otherwise noted.)
vcc = +15 V-
000
M
-W
V> VE-15 V
< 100
-6
=v C c = +i5v;
1.0 Ml
^ g: /- 10
sf
"r
n i
I
10 k
im .1 .0 100
1.0 10
FIGURE 3 - OPEN-LOOP GAIN versus SET CURRENT FIGURE 4 - INPUT BIAS CURRENT versus SET CURRENT
uu
10?
::: -V = +15 V
CC
RL =1 k
tb
10
10 6
1.0
10 5
10 4 n
'0.0' 0.1 1.0 10 100
1.0
l
set ,
SET CURRENT (mA) l
set , SET CURRENT U<A>
1U in m
1.0 1.0M = E
Vcc = +i
'
/EE--15V
b
0.1 == ::I 100 k
-444
0.01 10k
0.001 1 0k
1.0 1.0 10
= +15 40
vcc V
"T
= 24 set = '6mA .^'"_
V
?R
3 SIB ?4
- 5mA
set
?n "
R L = 10 k
5 <'2 ifi
S a
1?
5 6.0
t
> I
so
it
_ l. n
10k 100k
J
MC4558
Rating Symbol MC4558AC MC4558C Unit
PLASTIC PACKAGE
2.
supply voltage.
Short circuit may be to ground or either supply.
B^P CASE 751
(SO-8)
InvertinB^r
(Top View)
ORDERING INFORMATION
Temperature
Device Range Package
MC4558CD SO-8
FIGURE 1 - BURST NOISE versus SOURCE RESISTANCE FIGURE 2 - RMS NOISE versus SOURCE RESISTANCE
100 -H-HH
IUUU
> 0kHz
w = 1.0 Hz o 1
? 100 | 10 JL
-+-
OJ
-_. 10
1 1.0 =F
-4
1
t 0.1 I
ml 1 Hill 1 il il
n II
10 k 100 k
1.0 k 10 k 100 k
FIGURE 3 - OUTPUT NOISE versus SOURCE RESISTANCE FIGURE 4 - SPECTRAL NOISE DENSITY
1U
140
120
1
AV = 10. Rs = 100 kS2
111
i n
> i
1
Z 8a
"jt IL^.- i I
o i
1
T ^ 60
10
0.1
40
1.0-
~H
1
20
|
llll |
001 j 1 1 II
100 k
To Pass/Fail
Indicator
Unlike conventional peak reading or RMS meters, this system was The test time employed is 10 seconds and the 20 mV peak
especially designed to provide the quick response time essential to limit refers to the operational amplifier input thus eliminating
burst (popcorn) noise testing. errors in the closed-loop gain factor of the operational amplifier
under test.
FIGURE 6- OPEN LOOP FREQUENCY RESPONSE FIGURE 7- PHASE MARGIN versus FREQUENCY
180
+ 140
160
1 +120
< + 100
120
o +80
o +60
> 80
+40 k UNITY GAIN
< 60
+20
20
-20
'0 '0 100 1.0 k 10 k 100 k 1.0 M 10 M 10 10 100 1.0k 10 k 100k 1.0M 10 M
I. FREQUENCY (Hz)
f, FREQUENCY (Hz)
_ 13
12 V
12 V
<
>
9V qo
o -- 9V
= 7.0
.
5 --
o 6 V
> 6
3.0
>
~~
1.0 I
I
I
1.0
500 1.0 k 2.0 k 10 k 20 k 50 k 100 k
'UU 500 1.0 k 2.0 k 10 k 20 k 50 k 100 k
RL .
LOAD RESISTANCE (OHMS)
RL , LOAD RESISTANCE (OHMS)
To Scope
(Input)
W
T (Output)
(QUAD MC1741)
DIFFERENTIAL INPUT
OPERATIONAL AMPLIFIERS
(QUADMC1741) SILICON MONOLITHIC
OPERATIONAL AMPLIFIERS INTEGRATED CIRCUIT
P SUFFIX
Each Amplifier is Functionally Equivalent to the MC1741 PLASTIC PACKAGE
CASE 646
Class AB Output Stage Eliminates Crossover Distortion
Out VJ 14
Out
1 '
^
VCC
'
4
^^ 13
12
11
'
Inputs
V EE
10
Inputs I '
Inputs
>\
1
Out _
l<* ,
a
8
Out
2 ' 3
-*-
(Top View)
ORDERING INFORMATION
Device Temperature Range Package
MC4741CD SO-14
MC4741CL 0Cto +70C Ceramic DIP
MC4741CP Plastic DIP
TYPICAL APPLICATION
ELECTRICAL CHARACTERISTICS (V cc = +15 V, Vee = -15 V , Ta " 25C unless otherwise noted).
MC4741 MC4741C
Characteristic Symbol Min Typ Max Min Typ Max Unit
MC4741 MC4741C
Characteristic Symbol Min Typ Max Min Typ Max Unit
TYPICAL CHARACTERISTICS
(Vcc = + 15 Vdc, V EE - -15 Vdc. T A = + 25C unless otherwise noted).
llll [
{
z
<
\ CD
<
\ j
o
+40
ill -20
1.9 k
1.0 k 10 k 100 k
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
FIGURE 3 - POSITIVE OUTPUT VOLTAGE SWING FIGURE 4 - NEGATIVE OUTPUT VOLTAGE SWING
LOAD RESISTANCEi
versus LOAD RESISTANCE
1 1 1 1 II
"15 V SUPPLIES
-1? 15 V SUPPLIES
> 11
12 V
"
18
-m
< 9.0 1
-9 + 17V
8.8
> 9V
1
-8
in -7
o
68
5.0
4.0 6 V
-5.0
9V
4.0
U* J
3.0
i
6V
2.0
I
10 ;
+24 V
18 +21 V
16
14
+11 V / ^OUTPUT
1?
in .
,/
+15 V
8.0 +12 V
/
+9.8 V ir PUT
2.0 +6.8 V
+5,8 V
2.8 3.8 4.0 5.0 6.0 7.0
10/is/mv
Bl, LQAO RESISTANCE (k2)
I 95 To Scope I
(Input)
a 90 To Scope
(Output)
<
13
o
>
85 IT
^p c L
> 80
r
75
70
2.0 4.0 6.0 8.0 10 12 14 16 18 20
VCC. IVEEI. SUPPLY VOLTAGES (VOLTS)
MSD6150 500 k
vw
MSD6102
100 kS MC4745
v cc )N
P
Bridge Null Adjust
vee
PIN ASSIGNMENTS
V 3
6
J--HJ
rfi
n
"5 C, rv 10 Qi
hl
R1
0-15 r Q22
ORDERING INFORMATION
Q-18
R7 *R10 Ambient Test
JR20 Op Amp Temperature
Rl5 Function Device Range Package
MAXIMUM RATINGS
Rating Symbol Value Unit
R S = 10 n, V C M = V, V = V, Ta = -40C to + 85C
nA
Input Bias Current (Vcm = V, Vo = V) l|B
Ta = +25C
- 280 1000
1200
Ta = -40Cto + 85C
(Vqm = V, Vo = V)
Input Offset Current ho nA
Ta = +25C
- 15 180
240
Ta = -40Cto +85C
Common Mode Input Voltage Range (AV|o = 5.0 mV, Vo = V) V|CR 13.5 14 V
Large Signal Voltage Gain (Vo = 10 V, R|_ = 2.0 kn) AVOL V/V
rl = 10 kn v - -14.7 -14.3
VO = 2.0 Vp.
p 0.215 -
vo = 10 Vp.
p - 0.242
Av = 4000, f = 100 kHz
Vo = 2.0 V .
0.319
p p
vo = iov p . D 0.316
Open-Loop Output Impedance (Vo = V, f = f^i) izol 36 _ n
Differential Input Resistance (Vcm = V) R|N 270 kn
Differential Input Capacitance (Vcm = V) C|N 15 pF
Equivalent Input Noise Voltage (R = 100 n) en nV/VRz
f = 10 Hz - 6.7 -
f = 1.0 kHz 4.4
Equivalent Input Noise Current (f = 1.0 kHz)
'n pA/VRz
f = 10 Hz - 1.3 -
f = 1.0 kHz 0.6
_ Vr-M = nV
2000
<c 7 A = 25 C
600
z
1600
^
n" C3307 7P
1200
N w 400
1
800 J* C33077D
z
400
-60 -40 -20 20 40 60 80 100 120 140 160 180 5.0 7.5 10 12.5 15
TA AMBIENT TEMPERATURE
, (C)
VCC u EEl. SUPPLY VOLTAGE
l
(VOLTS)
1000
-vC c = + 15 V
VEE= -15V
VCM = OV
vc C = +15 V
VE E = -15 V
= 10 n
= 200
M = 0V
AV = +1.0
25 50 75 25 50 75 100
TA AMBIENT TEMPERATURE
, (C) T A AMBIENT TEMPERATURE
, (C)
FIGURE 5 INPUT BIAS CURRENT FIGURE 6 INPUT COMMON MODE VOLTAGE RANGE
versus COMMON MODE VOLTAGE versus TEMPERATURE
V CC 0.0
1 1
1 1
3 Vcc-0.5
'CC - +15V
\/
EE
= -15 V Z vcc-i.o
1r
A = 25C
o Range
V = 0V
v EE + 1-5
v EE +i.o
g v E e +0.5
V EE o.o
- 5.0 + 5.0 -55 25 50 75
VCC o
Vcc = + 15V_
VCC-2 ^^ VEE
V|D
= -15V
= + 1.0V.
< oon
-25C RL 1
-^^_S nk
Vcc-4 -55 uf
Vrr - + iV
1
^**'
v EE +4 25C
\
IV5^
v EE +2 .-55C-^
v EE o |
R L LOAD RESISTANCE TO
,
GROUND (kl) T A AMBIENT TEMPERATURE
, TO
MC33077
VCM = OV
L
=
n v
25 50 75 10K 100K
TA AMBIENT TEMPERATURE (C)
,
f, FREQUENCY (Hz)
Rl = 10 kfl.
S 44
_Cl = OpF '
f = 100 kHz
Ta = 25C
z:
40
V CC
20 V EE = -15 V
TA = 25C
ol II llll
100 1.0K 10K 5 10 15
f, FREQUENCY (Hz)
V CG IVeeI. SUPPLY VOLTAGE (VOLTS)
25 50 75 5.0 10 15
TA AMBIENT TEMPERATURE
, (C) v CO IVeeI. SUPPLY VOLTAGE (VOLTS)
MC33077
\
\
\
L
^
V C c= +15
J
/
Vee = -15\ \
,R|_= 2.0 kn
AV = +1.0
THD1.0%
Ta
1 1 1 li i
5.0 10 15
10K
f, FREQUENCY (Hz)
V C c, |VeeI. SUPPLY VOLTAGE (VOLTS)
600
v cc -
~ -15V 70
550 vee
R| =2 OKI G 60
f = 10 Hz
CJ
500 = -10 Vto
AVrj < 50
450 S 40
i
30
400 o
S 20
350
10
300 o
00 25 10K 100K
55 -2 5 3 2 5 E 75 1 1
160
.
Ai
...D
1 III
P^m 1 1 inn im- n mi
?0Vn.n
A V = +100..
iiiii
140
...TA = 25C 1
-L
-1
120
-I 1L
].. -I
V in
o J>U n i
; ::A \l
= + Oz:1
c S^OLog(^). llll
llll II
| 1 1 III! 1 l_L 1IU 1 1 I
1.0K
1.0K
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Vcc = +15V
--
100 kn 2.0 kn
.v* .* ^
z 0.5 \\
V EE
=
= -1 )V T
20 kHz
o
i v V VinO-+^
Vj
I ".I
Ay = +1000
o
0.05
s
cc
Ay = +1CK)
<
5 0.01
5 0.01
1
A V = +10
o
'Z- 0.005
+ 10--
0.001 p
FIGURE 23 SLEW RATE versus SUPPLY VOLTAGE FIGURE 24 SLEW RATE versus TEMPERATURE
,
T
I
-Vin = 2/3 (V
CC - V EE )
TA == 25C -vC c =
V EE = -15V
-
JTSVinT!^,M.^i --innnF
AV in = 20 V
L
> 11
I
J~L|VinH
2.0 kf1$ 4= 10 oF
FIGURE 25 VOLTAGE GAIN and PHASE FIGURE 26 OPEN-LOOP GAIN MARGIN and PHASE
versus FREQUENCY MARGIN versus OUTPUT LOAD CAPACITANCE
Vcc -
V EE _ -1KV
Phase =
RL 2.0 kn
TA = 25C
Gai
\
^V /N
<>
"
^ \
T
^v
\
'-
r
1.0K 10K 100K 1.0M 10 100 1000
f, FREQUENCY (Hz)
OUTPUT LOAD CAPACITANCE (pF)
Cl,
T 1
Mill vcc = + 15V
Vee - - isv
"jTiv-mn^T-J-oVc AVin = 100 mV ..
= t 2.0knfT CL
.Cl 100 pF
= ~
III
= +, 5V
Vcc C(. = 300 pF ut
Vee = -15 V
l
A = 2b X ttt
Cl = 500 pF tfj
-^ ^*^~^ o
-roV
IF
-5.0 +5.0
.0kft_
r 10
' -55C
100
|
FIGURE 29 INPUT REFERRED NOISE VOLTAGE FIGURE 30 TOTAL INPUT REFERRED NOISE VOLTAGE
and CURRENT versus FREQUENCY versus SOURCE RESISTANCE
_ 100 -.-.:
S Vcc = + 15Vtt
v E e = - 1 5vtt
TA = 25C
[I
im Cur ent--
Voltage
100 1.0K
1.0K 10K
FIGURE 31 PHASE MARGIN AND GAIN MARGIN FIGURE 32 INVERTING AMPLIFIER SLEW RATE
versus DIFFERENTIAL SOURCE RESISTANCE
VCC = +15V
vee = -15 V
Ay= -1.0
RL = 2.0 kft
Cl = 100 pF
TA = 25C
S 3
10 100 1.0K
t, TIME (2.0 ,*s/DIV.)
R T DIFFERENTIAL
, SOURCE RESISTANCE (ft)
gmgjjj
Vcc = +15V 1
V EE == -15V 1
BW = 0.1 H? to
:
10 Hz 1
TA = 25C ft I
SEEN OISE TEST CIRCUIT 1
(FIGUIIE 36) 1
2-258
MC33077
low offset voltage, high gain bandwidth product and swing, no crossover distortion and improved output
large output swing characteristics. Its outstanding high phase symmetry with output voltage excursions. Out-
frequency gain/phase performance make it a very put phase symmetry being the amplifiers ability to
attractive amplifier for high quality pre-amps, instru- maintain a constant phase relation independent of its
mentation amps, active filters and other applications output voltage swing. Output phase symmetry degra-
requiring precision quality characteristics. dation in the more conventional PNP and NPN transistor
The MC33077 utilizes high frequency lateral PNP output stage was primarily due to the inherent cut-off
input transistors in a low noise bipolar differential frequency mismatch of the PNP and NPN transistors
stage driving a compensated Miller integration ampli- (typically 10 MHz and 300 MHz respectively) used caus-
fier. Dual-doublet frequency compensation tech- ing considerable phase change to occur as the output
niques are used to enhance the gain bandwidth prod- voltage changes. By eliminating the PNP in the output,
uct. The output stage uses an all NPN transistor design such phase change has been avoided and a very sig-
which provides greater output voltage swing and nificant improvement in output phase symmetry as well
improved frequency performance over more conven- as output swing has been accomplished.
tional stages by using both PNP and NPN transistors The output swing improvement is most noticeable
(Class AB). This combination produces an amplifier when operation is with lower supply voltages (typically
with superior characteristics. 30% with 5.0 V supplies). With a 10 k load, the output
Through precision component matching and inno- of the amplifier can typically swing to within 1.0 V of
vative current mirror design, a lower than normal tem- the positive rail (Vcc). and t0 within 0.3 V of the negative
perature coefficient of input offset voltage (2.0 /xV/C as rail (Vee). producing a 28.7 V p . p signal from 15 V
opposed to 1 mV/C), as well as low input offset voltage, supplies. Output voltage swing can be further improved
is accomplished. by using an output pull-up resistor referenced to the
The minimum common mode input range is from 1 .5 Vcc- Where output signals are referenced to the posi-
volts below the positive rail (Vcc) to 1 5 volts above the
- tive supply rail, the pull-up resistor will pull the output
negative rail (Vee>- The inputs will typically common to dimng, the positive swing and during the neg-
Vcc
mode to within 1.0 volt of both negative and positive ative swing, the NPN output transistor collector will pull
rails though degradation in offset voltage and gain will the output very near Vee- This configuration will pro-
be experienced as the common mode voltage nears duce the maximum attainable output signal from given
either supply rail. In practice, though not recommended, supply voltages. The value of load resistance used
the input voltage may exceed Vcc bv approximately 30 should be much less than any feedback resistance so
volts and decrease below the VE rail b V approximately as to avoid excess loading and allow easy pull-up of the
0.6 volts without causing permanent damage to the output.
device. If the input voltage on either or both inputs is Output impedance of the amplifier is typically less
less than approximately 0.6 volts, excessive current than 50 ohms at frequencies less than the unity gain
may flow, if not limited, causing permanent damage to cross-over frequency (see Output Impedance versus
the device. Frequency curve). The amplifier is unity gain stable with
The amplifier will not latch with input source currents output capacitance loads up to 500 pF at full output
up to 20 mA, though in practice, source currents should swing over the -55C to + 125C temperature range.
4
be limited to 5.0 mA
so as to avoid any parametric Output phase symmetry is excellent with typically
damage to the device. If both inputs exceed \ZqC- tne total phase change over a 20 volt output excursion at
Through the use of dual-doublet frequency compen- to insure that one does not create a pole at the input of
sation techniques, the gain bandwidth product has the amplifier which is near the closed loop corner fre-
been greatly enhanced over other amplifiers using the quency. This becomes a greater concern when using
conventional single pole compensation. The phase and high frequency amplifiers since it is very easy to create
gain error of the amplifier remains low to higher fre- such a pole with relatively small values of resistance on
quencies for fixed amplifier gain configurations. the inputs. If this does occur, the amplifiers phase will
2-259
MC33077
degrade severely causing the amplifier to become imizes extraneous signal "pickup" at this node. Power
unstable. Effective source resistances, acting in con- supplies should be decoupled with adequate capaci-
junction with the input capacitance of the amplifier, tance as close as possible to the device supply pin.
should be kept to a minimum so as to avoid creating In addition to amplifier stability considerations, input
such a pole at the input (see Phase Margin and Gain
source resistance values should be low so as to take
Margin versus Differential Source Resistance curve).
full advantage of the low noise characteristics
of the
There is minimal effect on stability where the created
amplifier. Thermal noise (Johnson noise) of a resistor
input pole is much greater than the closed loop corner is generated by thermally-charged carriers randomly
frequency. Where amplifier stabilityis affected as a moving within the resistor creating a voltage. The rms
result of a negative feedback resistor in conjunction with
thermal noise voltage in a resistor can be calculated
the amplifier's input capacitance, creating a pole near
from:
the closed loop corner frequency, lead capacitor com-
pensation techniques (lead capacitor in parallel with the E nr = V4kTR x BW
feedback resistor) can be employed to improve stability. where:
The feedback resistor and lead capacitor RC time con- k = Boltzmann's constant (1.38 x 10 -2 3 joules/K)
such a value as to make the RC time constant larger voltage will be gained up in accordance to the ampli-
than the RC time constant of the uncompensated input fiers gain configuration. For this reason the selection
resistor acting in conjunction with the amplifiers input of input source resistance for low noise circuit appli-
capacitance. cations warrants serious consideration. The total
For optimum frequency performance and stability noise of the amplifier, as referred to its inputs, is typ-
ically only 4.4 nV/VHz'at 1.0 kHz.
careful component placement and printed circuit
board layout should be exercised. For example, long The output of any one amplifier is current limited and
unshielded input or output leads may result in thus protected from a direct short to ground. However,
unwanted input-output coupling. In order to reduce under such conditions, it is important to not allow the
the input capacitance, the body of resistors connected amplifier to exceed the maximum junction temperature
rating. Typically for 15 volt supplies, any one output
to the input pins should be physically close to the
input pins. This not only minimizes the input pole cre- can be shorted continuously to ground without exceed-
ation for optimum frequency response, but also min- ing the temperature rating.
0.1 ixF
4.7 ,uF :
DUAL/QUAD
LOW NOISE
LOW NOISE OPERATIONAL AMPLIFIERS
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
The MC33078/9 series is a family of high quality monolithic INTEGRATED CIRCUIT
amplifiers employing Bipolar technology with innovative high-
performance concepts for quality audio and data signal process-
ing applications. This family incorporates the use of high fre-
quency PNP input transistors to produce amplifiers exhibiting low
input voltage noise with high gain bandwidth product and slew MC33078
rate. The all NPN output stage exhibits no deadband crossover
distortion, large output voltage swing, excellent phase and gain
margins, low open-loop high frequency output impedance and
symmetrical source and sink ac frequency performance.
The MC33078/9 family offers both dual and quad amplifier ver- D SUFFIX
sions, tested over the vehicular temperature range and available PLASTIC PACKAGE
P SUFFIX
in the plastic DIP and SOIC packages (P and D suffixes). CASE 751
PLASTIC PACKAGE
CASE 626 < s - 8 >
veeE
G 35 JJ Output
Inputs 2
2
no.
Inputs ij^ !*$!]) Inputs 4
VCCE I3
V EE
|El^2 3^-01
Inputs 2
Output 2
^(<^H
E 1 I
JJ Output 3
s
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (Vcc to Vee) + 36
vs Volts
Input Differential Voltage Range V|DR (Note 1) Volts
Input Voltage Range V|R (Note 1) Volts
Output Short-Circuit Duration (Note 2) ts Indefinite Seconds
Maximum Junction Temperature Tj + 150 C
Storage Temperature T stg - 60 + 1 50
to C
Maximum Power Dissipation PD (Note 2) mW
Notes:
1. Either or both input voltages must not exceed the magnitude
of Vcc r V EE-
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not
exceeded (See power dissipation performance characteristic. Figure 1).
3. Measured with V Cc and V EE differentially varied simultaneously.
(Vcm =
Input Bias Current V, Vo = V)
TA = + 25C
750
TA = -40Cto +85C
800
Input Offset Current (Vcm = V, Vq V) llO
TA = + 25C
150
T A = -40Cto +85C
175
Common Mode Input Voltage Range (AVjq = 5.0 mV, Vq = V) V ICR 13
Large Signal Voltage Gain (Vo :10 V, R L = 2.0 kfl) A VOL
TA = + 25C
90
TA = -40Cto +85C 85
Output Voltage Swing (V|d = 1.0 V)
RL = 600 n V + 10.7
Rl = 6oo n v - -11.9
Rl = 2.0 kn V + 13.2 13.8
Rl = 2.0 kn v - -13.7 -13.2
Rl = 10 kfi V + 13.5 14.1
Rl = 10 kfi v - -14.6 -14
Common Mode Rejection (Vj n = 13 V) CMR 80 100
Power Supply Rejection (Note 3) PSR
Vcc/Vee = +15 V/- 15 V to +5.0 V/- 5.0 V
Output Short Circuit Current (V|q 1.0 V, Output to Ground) 'SC
Source + 15 + 29
Sink -20 -37
Power Supply Current (Vq = V, All Amplifiers)
ID
MC33078 TA = + 25C
5.0
Ta = -40Cto +85C 5.5
MC33079 Ta = +25C 8.4 10
TA = -40Cto +85C
11
2-262
1
MC33078, MC33079
fu
- 9.0 MHz
Unity Gain Frequency (Open-Loop)
CL = pF Am -11 dB
Gain Margin (Rl = 2.0 kil)
I
-6.0
CL = 100 pF
C L = OpF <*m
55 Deg
Phase Margin (Rl = 2.0 k(l)
c L = 100 pF 40
= 20 Hz to 20 kHz) CS - -120 dB
Channel Separation (f
= MHz) jz
37 n
Open-Loop Output Impedance (Vo = V, f 9.0 l
= en 4.5 nV/VHz
Equivalent Input Noise Voltage (Rs = 100 H, f 1.0 kHz)
= 1.0 kHz) in
0.5 pA/VHz
Equivalent Input Noise Current (f
TYPICAL CHARACTERISTICS
FIGURE 1 MAXIMUM POWER DISSIPATION INPUT BIAS CURRENT versus SUPPLY VOLTAGE
versus TEMPERATURE FIGURE 2
2400 I
Vrwi = V
Ma 3078P
^
NX
Si MC33079P TA = 25C
a 1C3307 9D
y< ^MCC 3078D
<
--
(x ^^
s.
^ 5
N
^ S.
10 15
-55-40 -20 20 40 60 80 100 120 140 160
FIGURE 3 INPUT BIAS CURRENT versus TEMPERATURE FIGURE 4 INPUT OFFSET VOLTAGE versus TEMPERATURE
1000
+ 2.0
= +15V
V CC
I I
V EE = -15 V UNIT 1
V cc= +
RS = 10
V EE= -1 SV
< 800
= V
v C m = o\
V CM
AV = +1
z *t-~-"~
UNIT 2 .
t 400
CD
-^ Uh IT 3
^ 200
,
(C)
FIGURE 5 INPUT BIAS CURRENT versus FIGURE 6 INPUT COMMON-MODE VOLTAGE RANGE
COMMON MODE VOLTAGE versus TEMPERATURE
-V
CM
FIGURE 7 OUTPUT SATURATION VOLTAGE versus FIGURE 8 OUTPUT SHORT CIRCUIT CURRENT
LOAD RESISTANCE TO GROUND versus TEMPERATURE
Sink
I
Vcc - +lbV
j I
V E E = -15 V
RL
V|[ = 1.0 V
So rce
1.0
-55 -25 25 50
2.0 3.0 75 100 125
LOAD RESISTANCE TO GROUND T A AMBIENT TEMPERATURE
,
(C)
RL, (kill
1
V CM = V
_ 8.0
15V
5.0V
^L 10 V RL =
Vp = OV
.c -
MMWC)
' MOV
1
VL.A 1C33078
+ 5.0V
2-264
1
MC33078, MC33079
RL = Okfl
fj
z
120
+ PSR = 20Log
/AV /Adm\
\ AVcc J
-PSR -
CSS")]
oAVcc
CL
f =
=
100 kHz
pF
o TA
10 + PSR *
h- "M/cc
80
cc
60
_ PSR
m Jill 1
40 1
1 vcc = +15V
cc
" 20
V E e ==
TA = 25C
-15V m\
II lllllll !
10K
J 100K
Hill
1.0M
n 1 n
f, FREQUENCY (Hz)
TA = 25C
|
s*Vo +
RL -
\ = 2.0 kf!
pL - m
=:v -
Rl = 2.0 kO
f=s 10 Hz
-AV = 2/3(V CC -Vee)
-T
A
:
<^
Vcc = +15V.
Vcc = -15 V
RL = 2.0 kfi
Ay = +1.0
THDs 1.0%
Ta = 25C
10 15
1.0K 10K 100K
V C c, v EeI, SUPPLY VOLTAGE (V)
f, FREQUENCY (Hz)
I
AV = -10 V to + 10V
_ TA = 25C tit
IB / /
tn '"
L /
''HI H
jjl
J
lit
"~
AV = 1000
"~JfAv = 100 / Ay = 10
A III/ 7
y ||
Ay = !nj
90
-55 -25 25 50 75 100K 1.0M
T A AMBIENT TEMPERATURE
, (C) f, FREQUENCY (Hz)
Vcc - +1RV
|
|[
vee = -15 V t
o Vo = 1.0 Vrm s t ,Vo
o TA - 25 rl>^T
:K S 2.0 Ml
I ('
Q ft ^
5 t
III
s I
< TT
-j 0.01
t
I
o f
n:
0.001 I
1.0K
f, FREQUENCY (Hz)
vcc = + 15\
.V in
i
= 2/3(Vcc-V EE )_
r
V EE = -15V
z 0.5 AV = 1000 TA = 25C
p ta = 25(^ I
AV = 100 Falling
1 0.1
o Rising
0.05
E Vin~
>^J2.0
< AV = 10 Xkn
5
< 0.01
o vo
AV =
o- 0.005
1.0
r-
JT|V ir
2.0 kil
0.001
2.0 3.0 4.0 5.0 6.0 7.0 10 15
V , OUTPUT VOLTAGE (Vrms) v CC.|VeeI, SUPPLY VOLTAGE (V)
VC c = + 15 V +1 5V
~>
\
CC=
= -15V
V EE
AVj n = 20 V \ \ \f
F
EE
L
= -15 V
= 2.0 kH
1
A = 25C
Falling *>
Rising -^ 90 <
6.0
\
\
>Lv c)
~JT, ?2.0
180
I
10K 10M
-25 25 50 75 100 10 100 1.0K
FIGURE 25 OPEN-LOOP GAIN MARGIN AND FIGURE 26 OVERSHOOT versus OUTPUT LOAD
CAPACITANCE
PHASE MARGIN versus LOAD CAPACITANCE
C L OUTPUT CAPACITANCE
,
(pF) Cl. OUTPUT LOAD CAPACITANCE (pF)
! 27 INPUT REFERRED NOISE VOLTAGE AND FIGURE 28 TOTAL INPUT REFERRED NOISE VOLTAGE
CURRENT versus FREQUENCY versus SOURCE RESISTANCE
- - -+- rn
+15V"
r cc== -15V"
EE
i
A = 25C ;.
"
^
-. =-*- I V jltage
*; ^^^
1
0.1
FIGURE 29
PHASE MARGIN AND GAIN MARGIN versus
DIFFERENTIAL SOURCE RESISTANCE
FIGURE 30 INVERTING AMPLIFIER SLEW RATE FIGURE 31 NON-INVERTING AMPLIFIER SLEW RATE
0.1 ixF
1/2 MC33078
1+\ 4.3 kH
22mF Scope
4.7 fiF ZZ
Low Supply Current: 180 /iA (Per Amplifier) Single, Top View
Wide Supply Operating Range: +3.0 V +44 V
to or 1 5 V JDvcc
to22V
Wide Input
Wide Bandwidth:
High Slew Rate:
Common Mode Range
1.8 MHz
2.1 V//is
Including Ground (V EE ) Inputs 1
m y |-3
K^j
Output 2
Inputs 2
D SUFFIX
PLASTIC PACKAGE
CASE 751
ORDERING INFORMATION (SO-14)
Op Amp Temperature
PIN ASSIGNMENTS
Device Package
Function Range
Output 1 (7 u) Output 4
Single MC33171D -40 to + 85C SO-8
MC35171U -55 to +125C Ceramic DIP Inputs 1
Inputs 4
MC33171P -40 to +85C Plastic DIP In jl
Dual MC33172D -40 to +85C VCCE
SO-8 I3VEE
MC35172U -55 to +125C Ceramic DIP
MC33172P -40 to + 85C (E 31
Plastic DIP Inputs 2 Inputs 3
Quad MC33174D -40 to +85C
E
SO-14
MC35174L
MC33174P
-55 to +125C
-40 to +85C
Ceramic DIP
Plastic DIP
Output 2
<R
? Output 3
MAXIMUM RATINGS
Rating Symbol Unit
Notes: 1. Either or both input voltages must not exceed the magnitude of Vrjc or Vee-
not exceeded.
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is
VEE'Gnd
Offset Null
(MC33171, MC35171)
T high = +125CforMC35171/MC35172/MC35174
= -40C for MC33171/MC33172/MC33174 = +85C for MC33171/MC33172/MC33174
SR V//ns
Slew Rate (V in = - 10 V + 10 = 10 C L = 100 pF)
Av + 1
to V, R[_ k,
1.6 2.1 -
2.1
Ay - 1
Gain Bandwidth Product (f = 100 kHz) GBW 1.4 1.8 - MHz
d>m Degrees
Phase Margin
R L = 10 k
- 60 -
45
R L = 10 k, C[_ = 100 pF
Am dB
Gain Margin
R L = 10 k
- 15 -
5.0
R L = 10 k, Cl = 100 pF
Equivalent Input Noise Voltage en 32 nV/
FIGURE 1 INPUT COMMON-MODE VOLTAGE RANGE FIGURE 2 SPLIT SUPPLY OUTPUT SATURATION
versus TEMPERATURE versus LOAD CURRENT
u
vcc- ^Vcc/Vee = +/ - Vto + /-22V
Vcc-K I
I I
1.5
Vcc/Vee = +/-5.0 Vto +/-22V
iV|Q = b-U rnv T A = 25X
-1.6
-2.4
+ 0.1
-
v EE
(1
Vee- X
+ +125 1.0 2.0
+25 +50 +75 100
FIGURE 3
OPEN-LOOP VOLTAGE GAIN AND FIGURE 4 PHASE MARGIN AND PERCENT OVERSHOOT
PHASE versus FREQUENCY versus LOAD CAPACITANCE
FIGURE 5 NORMALIZED GAIN BANDWIDTH PRODUCT FIGURE 6 SMALL AND LARGE SIGNAL
AND SLEW RATE versus TEMPERATURE TRANSIENT RESPONSE
0.50 jus/DIV
Vqc/Vee = +/-15V
V CM = 0V
Vo = 0V
Al = 0.5 mA
TA = 25C
TA AMBIENT TEMPERATURE
, (C)
5.0 ms/DIV
FIGURE 7 OUTPUT IMPEDANCE versus FREQUENCY FIGURE 8 SUPPLY CURRENT versus SUPPLY VOLTAGE
2.0 k 20 k 200 k = 5 10 15 20
f, FREQUENCY (Hz)
V CC/ V EE- SUPPLY VOLTAGE (V)
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES
Although the bandwidth, slew rate, and settling time of Vee- For sink currents (> 0.4 mA), diode D3 clamps
of the MC331 71/72/74 amplifier family is similar to low the voltage across R4. Thus the negative swing is limited
power op amp products utilizing JFET input devices, by the saturation voltage of Q15, plus the forward diode
these amplifiers offer additional advantages as a result drop of D3 (~Vee +1-0 V). Therefore an unprecedented
of the PNP transistor differential inputs and an all NPN
peak-to-peak output voltage swing is possible for a given
transistor output stage. supply voltage as indicated by the output swing
Because the input common mode voltage range of this specifications.
the load resistance is referenced to VrjC instead of
input stage includes the Vee potential, single supply op- If
eration is feasible to as low as 3.0 volts with the common ground for single supply applications, the maximum pos-
sible output swing can be achieved for a given
supply
mode input voltage at ground potential.
The input stage also allows differential input voltages voltage. For light load currents, the load resistance will
pull the output to Vqc during the positive swing and
the
up to 44 volts, provided the maximum input voltage
range is not exceeded. Specifically, the input voltages output will pull the load resistance near ground during
must range between Vrjc and V EE supply voltages as the negative swing. The load resistance value should be
shown by the maximum rating table. In practice, although much less than that of the feedback resistance to maxi-
not recommended, the input voltages can exceed the Vqc mize pull up capability.
voltage by approximately 3.0 volts and decrease below Because the PNP output emitter follower transistor has
the Vee voltage by 0.3 volts without causing product been eliminated, the MC33171/72/74 family offers a 15
damage, although output phase reversal may occur. It is mA minimum current sink capability, typically to an out-
also possible to source up to 5.0 mA of current from Vee put voltge of (Vee + 1 8 v >- ln single supply applications
-
through either input's clamping diode without damage the output can directly source or sink base current from
or latching, but phase reversal may again occur. If at least a common emitter NPN transistor for high current switch-
one input is within the common mode input voltage ing applications.
In addition, the all NPN transistor output stage
is inher-
range and the other input is within the maximum input
voltage range, no phase reversal will occur. If both inputs ently faster than PNP types, contributing to the bipolar
exceed the upper common mode input voltage limit, the amplifier's improved gain bandwidth products. The asso-
output will be forced to its lowest voltage state. ciated high frequency low output impedance (200 ft typ
<S 1 .0 MHz) allows capacitive drive capability from
to
Since the input capacitance associated with the small
geometry input device is substantially lower (0.8 pF) than 400 pF without oscillation in the noninverting unity gain
configuration. The 60 phase margin and 15 dB gain mar-
that of a typical JFET (3.0 pF), the frequency response
for
This gin as well as the general gain and phase characteristics
a given input source resistance is greatly enhanced.
are virtually independent of the source/sink output swing
becomes evident in D-to-A current to voltage conversion
conditions. This allows easier system phase compensa-
applications where the feedback resistance can form a
tion, since output swing will not be a phase consideration.
pole with the input capacitance of the op amp. This input
The'ac characteristics of the MC33171/72/74 family also
pole creates a 2nd order system with the single pole op
allow excellent active filter capability, especially for low
amp and is therefore detrimental to its settling time. In
voltage single supply applications.
this context, lower input capacitance is desirable espe-
cially for higher values of feedback resistances
(lower Although the single supply specification is defined at
5.0 volts, these amplifiers are functional to at least 3.0
current DAC's). This input pole can be compensated for
with capacitance across the volts 25C. However slight changes in parametrics such
@
by creating a feedback zero a
feedback resistance, if necessary, to reduce overshoot. as bandwidth, slew rate, and dc gain may occur.
If power to this integrated
circuit is applied in reverse
For 10 kft of feedback resistance, the MC331 71/72/74 fam-
polarity or if the IC is installed backwards in a socket,
ily can typically settle to within 1/2 LSB
of 8 bits in 4.2
large unlimited current surges will occur through the
de-
/us, and within 1/2 LSB of 12 bits in 4.8
/xs for a 10 volt
con- vice that may result in device destruction.
step. In a standard inverting unity gain fast settling
figuration, the symmetrical slew rate is typically
2.1 As usual with most high frequency amplifiers, proper
volts/ ais. In the classic noninverting unity gain
configu- lead dress, component placement and PC board layout
ration the typical output positive slew rate is also
2.1 should be exercised for optimum frequency perfor-
volts//j,s, and the corresponding negative
slew rate will mance. For example, long unshielded input or output
usually exceed the positive slew rate as a function of the leads may result in unwanted input output coupling. In
fall time of the input waveform. order to preserve the relatively low input capacitance
The all NPN output stage, shown in its basic form on associated with these amplifiers, resistors connected to
input
the equivalent circuit schematic, offers unique advan- the inputs should be immediately adjacent to the
pin to minimize additional stray input capacitance.
This
tages over the more conventional NPN/PNP transistor optimum frequency
not only minimizes the input pole for
Class AB output stage. A 10 kft load resistance can typ-
ically swing within 0.8 volt of the positive rail (Vqc)
and response, but also minimizes extraneous "pick up" at this
negative rail (Vee)- providing a 28.4 Vp-p swing from 1 node. Supply decoupling with adequate capacitance
volt supplies. This large output swing becomes most no- immediately adjacent to the supply pin is also important,
particularly over temperature, since many types of
ticeable at lower supply voltages.
decoupling capacitors exhibit great impedance changes
The positive swing is limited by the saturation voltage
of the current source transistor Q7, the Vbe f the
NPN over temperature.
pull up transistor Q17, and the voltage drop associated The output of any one amplifier is current limited and
with the short circuit resistance, R5. For sink currents less thus protected from a direct short to ground. However,
than 0.4 mA, the negative swing is limited by the satu- under such conditions, it is important not to allow the
device to exceed the maximum junction temperature
rat-
ration voltage of the pull-down transistor Q15, and the
ing. Typically for 15 volt supplies, any
one output can
voltage drop across R4 and R5. For small valued sink
be shorted continuously to ground without exceeding the
currents, the above voltage drops are negligible, allowing
the negative swing voltage to approach within millivolts maximum temperature rating.
2.2 k 510 k v Cc
i
100 k? V 0- -3.8 Vp-p
-)l~
I
100
W*
k
1+\
i Cq T
1 rJ^urJ_>r- ^r , -ov
Ay = 101 Ay = 10
BW(-3.0dB) = 20 kHz BW (-3.0 dB) = 200 kHz "-
vcc
6VEE
R . c R1
^
0.047
< R3
* 22 k
..
v in
16 k
OVWVWr
16 k
....
C
<> OV
ovw- 1.1 k
-\(r
c -ov
0.01 R2 0.047 VCC
5.6 k f = 30 kHz
Q = 10
2C ,
2R 2C . f = 1.0 kHz
1 6 0.4 Vcc H = 10
0.02' 32 k 0.02'
f __!_
_ Given fg = Center Frequency R1
R3
4ttRC 2 Ho 4Q2R1-R3
Aq = Gain at Center Frequency
Choose Value
Qo fo
f , Q, A , C R3 =-
-irfnC
Then
For less than 10% error from operational amplifier
Where f and GBW are expressed in Hz.
P SUFFIX
PLASTIC PACKAGE
CASE 646
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)
PIN ASSIGNMENTS
lnPUtS4
ORDERING INFORMATION 2}
Temperature TJJvee
Op Amp
Function
Fully
Compensated Range Package
Inputs 2
'> Inputs 3
2.8 1
NOTFS-
1. Either or both input voltages should not
exceed Vfjc or Vgg
2 be C0nSid6red
' 6nSUre maXimUm
'
2ZJe^X2Z iUnCti n
*
emperatUre ,TJ is not e)<ceeded <Se -
power dissipation performance
2-278
n
MC33178, MC33179
Characteristics
Slew Rate
(V in = -10 Vto + 10V, R L 2.0 kii, Cl = 100 pF, AV = +1-0V)
Gain Bandwidth Product (f = 100 kHz
(f = 10 kHz)
(f = 20 kHz)
Open Loop Output Impedance
(Vq = V, f = 3.0 MHz, Ay
_ 2400 1
= + 15V
I I
VfjC
_
MC33178P/9P
r s = 10
o 2000
Vcm -
Unit 1
o? 1600
o MC3C 179D
Unit 2
cc
1200 Unit 3
2
5 800 MC3: 178D
X
3
<
4o
V,
5
z
140
120
\ >.
g= 10
13
O
<5 80
m ^~^
5 60 Vcc- + 15V
z = -15
a 40 Vee
Ta = 25C
V
20
10 -5.0 5.0 10
25 50 75
Vcm. COMMON MODE VOLTAGE (VOLTS)
Ta, AMBIENT TEMPERATURE |C)
FIGURE 5 INPUT COMMON MODE VOLTAGE FIGURE 6 OPEN LOOP VOLTAGE GAIN
RANGE versus TEMPERATURE versus TEMPERATURE
5 6 7 8 9 10
f, FREQUENCY (MHz)
v CO V EE SUPPLY VOLTAGE (V)
2-280
MC33178, MC33179
v
v,
uj 20
\
<
o 16
E
I
12
vE e = -ib\ /
RL = 600 n
>a
8.0
Av = +1.0 V
THD = =s1.0 %
4.0 u
A
==
2b U
1
1
Mill
10 k 100 k 1.0M
5.0 10 15
f, FREQUENCY (Hz)
l
1.0 k 10 k
1.0 k 10 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
FIGURE 13 OUTPUT SHORT CIRCUIT CURRENT FIGURE 14 OUTPUT SHORT CIRCUIT CURRENT
versus OUTPUT VOLTAGE versus TEMPERATURE
1
I
Vr c _ + i5V
^Sink = -15V
VE E
/ Vll )
= 1.0V
R L < ion
/ Source
/
I
= + 1RV
/ Vc(-
vee 15V
/ V|D .0 V ^s^>
/
/ +25 +50 +75 +100 +125
-3.0 +3.0 +9.0
T A AMBIENT TEMPERATURE (C|
V , OUTPUT VOLTAGE (V) ,
1.10
3 VC c = + 15 V
Wl.05 EE = -15 V
< AVj n - ?n v
1 1.00
o
z
0.95
<
C/3
JnA\v-
L AV m Jt^T^o
"^\y
II
J 600ill =p100pF
"|
0.75 1
|
I
2.0 4.0 6.0 8.0 10 12 14 16 18 -25 +25 +50 +75 + 100 +125
VCC IVeeI. SUPPLY VOLTAGE (V)
T A AMBIENT TEMPERATURE
, (C)
'
25 +25 +50 +75 +100 +125 1.0M 10M
TA ,
AMBIENT TEMPERATURE ("CI
f, FREQUENCY (Hz)
FIGURE 19 VOLTAGE GAIN AND PHASE FIGURE 20 OPEN LOOP GAIN MARGIN
versus FREQUENCY versus TEMPERATURE
1.0M 10M
+25 +50 +75
f, FREQUENCY (Hz)
TA AMBIENT TEMPERATURE
, (C)
2-282
u
MC33178, MC33179
CL = 10 pF _. c
.
"
= 100 pF
'
" . Gain Margin
C|_
V(X = +15V
vE e = -15 V
R T = R-l + R2
v = ov
^^ Cl = 300 pF'
TA = 25C
I
1
lilt
I II I
R2 "
I
I III 1 ...
1.0 k 10 k
+25 +50 +75 +100
AMBIENT TEMPERATURE (C) R-r, DIFFERENTIAL SOURCE RESISTANCE (ill
Ta,
FIGURE 23 OPEN LOOP GAIN MARGIN AND PHASE FIGURE 24 CHANNEL SEPARATION
MARGIN versus OUTPUT LOAD CAPACITANCE versus FREQUENCY
1bU
Drive Channel
Vcc =
140 +15V
vE e - - 15V -
RL = 600 a
ta = tt"U
mn
10 k
4
OUTPUT LOAD CAPACITANCE (pF)
f, FREQUENCY (Hz)
Cl,
rri i r 1 1
in J
=
1U4-
III
EV C C= +16V V 2.0 V p -P:
=: iiilllll |
I I
I
_ ~
1)A V == 1.0 vcc = +15 V
-
\ = 600 n "
A V = +1 JOOTTT 400 "
2)AV --
= 10
" vE e= -15
3)A V == 100 - v = OV
4)A V == 1000 TA = 25C
|: Av = +1 )0f
I
\r
I
.
\-*' J*-*
|- AV 3
-i tU ^AV = + 1
1.0,
T
_a
*=*
s. ? 2, V /
I.
""" 1
.1. T ^ I
10 k 100 k 10M
1.0 k
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
FIGURE 27 INPUT REFERRED NOISE VOLTAGE FIGURE 28 INPUT REFERRED NOISE CURRENT
versus FREQUENCY versus FREQUENCY
~~rn i i i i min
i i 1 11
Input Noise Voltage Test Circuit
J
1.0 k 10 k
f, FREQUENCY (Hz)
100 1.0 k
t, TIME (2.0 /xs/DIV)
C|_, LOAD CAPACITANCE (pF)
FIGURE 31 SMALL SIGNAL TRANSIENT RESPONSE FIGURE 32 LARGE SIGNAL TRANSIENT RESPONSE
2-284
MC33178, MC33179
10 k
From
Microphone >
OTip
ORing
APPLICATION INFORMATION
than one amplifier could easily exceed the junction tem-
This unique device uses a boosted output stage to
perature to the extent of causing permanent damage.
combine a high output current with a drain current
lower than similar bipolar input op amps. Its 60 phase
margin and 15 dB gain margin ensure stability with up
STABILITY
to 1000 pF of load capacitance (see Figure 23). The abil-
ity to drive a minimum 600 II load makes it particularly
maximum junction temperature, partic- ple compensation schemes can be used to alleviate
to exceed the
ularly with the MC33179 (quad op amp). Shorting more these effects.
FIGURE 34
COMPENSATION FOR FIGURE 35 COMPENSATION CIRCUIT
HIGH SOURCE IMPEDANCE FOR MODERATE CAPACITIVE LOADS
2-286
A
MOTOROLA MC33272
SEMICONDUCTOR MC33274
TECHNICAL DATA
HIGH PERFORMANCE
OPERATIONAL
SINGLE SUPPLY, HIGH SLEW RATE AMPLIFIERS
LOW INPUT OFFSET VOLTAGE, SILICON MONOLITHIC
BIPOLAR OPERATIONAL AMPLIFIERS INTEGRATED CIRCUIT
available in the plastic DIP and SOIC surface mount packages (P Output 1 [i ~&\ VCc
and D suffixes).
nA
[?4x
Low Input Offset Current: 3.0
High Input Resistance: 16 Mfi
Low Noise: 18 nV/Vfii (5 1.0 kHz
VEE LI ^3
l<'2
f
Inputs 2
High Gain Bandwidth Product: 24 MHz (a 100 kHz (Dual, Top View)
High Slew Rate: 10 V/^s
Power Bandwidth: 160 kHz
MC33274
Excellent Frequency Stability
Unity Gain Stable: w/Capacitance Loads to 500 pF
Large Output Voltage Swing: +14.1 Ml- 14.6 V
Low Total Harmonic Distortion: 0.003%
Power Supply Drain Current: 2.15 mA per Amplifier
P SUFFIX D SUFFIX
Single or Split Supply Operation: + 3.0 V to +36Vor1.5V PLASTIC PACKAGE
PLASTIC PACKAGE
to 18 V CASE 646 CASE 751
(SO-14)
PIN ASSIGNMENTS
-w-
Output 1 [T T?l Output 4
ILX 3H
Inputs Inputs 4
1
!U U
ORDERING INFORMATION vcc LT v EE
33
Op Amp SpecifiedAmbient
Package To|
Function Device Temperature Range ;lt Inputs 3
Inputs 2
Dual
MC33272D SO-8 .LI H
MC33272P Plastic DIP Output 3
-40Cto +85C Output 2 [~r ~8~l
MC33274D SO-14
Quad (Quad, Top View)
MC33274P Plastic DIP
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage
Vcc to V EE + 36 V
Input Differential Voltage Range V IDR (Note 1) V
Input Voltage Range V|R (Note 1) V
Output Short Circuit Duration (Note 2)
*S Indefinite Seconds
Maximum Junction Temperature Tj + 150 C
Storage Temperature T stg - 60 to + 1 50 C
Maximum Power Dissipation PD (Note 2) mW
1. Either or both input voltages should not exceed
Vcc or Vgg.
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not
exceeded (see Figure 2).
Phase Margin (Rl = 2.0 kn, C[_ = pF) 23, 25, 26 4>m
- 55 Deg
Power Bandwidth (V = 20 V p p R L =
. , 2.0 kn, THD 1.0%) BWp - 160 kHz
OV Cc
O VoUT
v EE o
FIGURE 2 MAXIMUM POWER DISSIPATION FIGURE 3 INPUT OFFSET VOLTAGE versus TEMPERATURE
versus TEMPERATURE FOR TYPICAL UNITS
^ 2400
_E
o
a.
2000
O VIC3327 p&iv C3327 4P
V CC
Vee
= +15 V
= -15 V
"
<2 1600
a
QC
s^M :3327 D - 1
_r^=
o 1200
2
2_
r 1
- V| > (a 25C
- V| = (a 25C
Q-3.0
3 - V|o < (a 25C
-40-20 +20+40+60+80+100 + 120 + 140 + 160+18 +25 +50 +75 +100 +125
T A AMBIENT TEMPERATURE
, (C)
TA AMBIENT TEMPERATURE
, (C)
FIGURE 4 INPUT BIAS CURRENT versus FIGURE 5 INPUT BIAS CURRENT versus TEMPERATURE
COMMON MODE VOLTAGE
-vcc =
-V EE = -15V
_V C M = OV
250
z:
z>
<
- 150
n
Vcc= +15V
-. 100
GO
TA = 25C
50
-16 -8.0 -4.0 +4.0 +8.0 +12 +25 +50 +75 +100 +125
Vcm, COMMON MODE VOLTAGE (VOLTSI
TA ,
AMBIENT TEMPERATURE (C)
FIGURE 6 INPUT COMMON MODE VOLTAGE RANGE FIGURE 7 OPEN-LOOP VOLTAGE GAIN
versus TEMPERATURE versus TEMPERATURE
\
vC c - +isv
V EE = -15 V
RL = 2.0 Ml
f= 10 Hz
AV = -10 V to + 10V
1 I
+25 +50 +75 +100 +125 -25 +25 +50 +75 +100 +125
T A AMBIENT TEMPERATURE
, (C)
TA ,
AMBIENT TEMPERATURE |C)
2-290
MC33272, MC33274
FIGURE 8 SPLIT SUPPLY OUTPUT VOLTAGE SWING FIGURE 9 SPLIT SUPPLY OUTPUT SATURATION VOLTAGE
versus SUPPLY VOLTAGE versus LOAD CURRENT
40
TA = ^
>t
30
RL = 10 k$2^
< RL = 2 oka
> 20
o
>6 10
15 5.0 10 15 20
5.0 10
VCD
FIGURE 10 SINGLE SUPPLY OUTPUT SATURATION FIGURE 11 SINGLE SUPPLY OUTPUT SATURATION
VOLTAGE versus LOAD RESISTANCE TO GROUND VOLTAGE versus LOAD RESISTANCE TO V CC
I
V
\
\
\
V
\>
|
v cc = + 15V V
vEe = - 15V \
R L = 2.0 kfi
AV = + .0
THD = s 1.0%
TA = 26 c
mm mi _ I
1.0 k 10 k
100 k 1.1
FIGURE 14 POSITIVE POWER SUPPLY REJECTION FIGURE 15 NEGATIVE POWER SUPPLY REJECTION
versus FREQUENCY versus FREQUENCY
120
si 60 - _ ^vcc
ID
J I III lA = 125T
o
v o/a dm\
S 20 ^-PSR = 20Log (- ~*
avee /
i
Vcc = + 15 V 1
Source
TA = -55C
Source
1
+25 +50 +75 6.0 8.0 10 12 14 16
TA AMBIENT TEMPERATURE
, (C)
v CC.|VeeI. SUPPLY VOLTAGE (V)
i i
V(T = +15V
VE e = - 15 V
<M
R = 2.0 kfi
c = 0pF
in
'0
n
+25 +50 +75 -25 +25 +50 +75 + 100 +125
TA AMBIENT TEMPERATURE (C)
,
TA AMBIENT TEMPERATURE
, |C)
2-292
-
MC33272, MC33274
FIGURE 20 VOLTAGE GAIN & PHASE versus FREQUENCY FIGURE 21 GAIN AND PHASE versus FREQUENCY
+ 25 80 + 25
+ 20 100 + 20
\Ga in
+ 15 120- + 15
~ Kr. "'N. 1A
+ 10 Ta
'
+10 Pha e
140 ^
(D
"
= p
Cl
+ 5.0 III 160 S o
<+5.0
2A\
180 < u
<
-5.0 200
V(X= + 15V
d-5.o
>
-10 Vee - - is v
220 ^ >-10
-15 RL = 2.0 kn 240 <a -15 .2A- Phase Vcc = 1-5 V, Vee = " 5V 1 -
.._2B^
TA = 25 C
1B- Gain Vcc = 18 V, Vee = -18 V
-20 \ \ 260 -20
2B- Gair vcc = i.6v, v E e -1.5 V
-25 i i i ii i i i
1.0M 10M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
FIGURE 22 OPEN-LOOP VOLTAGE GAIN & PHASE FIGURE 23 OPEN-LOOP GAIN MARGIN AND PHASE
versus FREQUENCY MARGIN versus OUTPUT LOAD CAPACITANCE
+ 2\) 100
lllllll
120
DO Gain Margin
z +10 140
g
< ^^-v^lA
160
| Vcc + 1 5V
D 2A = -i5V
180 s vE e
S
O Vcc = +15V to Vo = ov
v E e = ~ 15V 200 <
8-10
z
V O ut = 0V
TA = 25C
240
|
x
Vin
$>TT2.0 kJ 1
v
2.0 kn)
\.2B " ^ I
2A- Phase |R L = 2.0knC|_ = 30C 260
1B Gain L
= 2.0 kO)
(R
v \S J 2.0
'2B-G sin (R|_ = 2.0 kll, 1>L = 3 00 bF) "ph sse Ma rgin
-30 \ L_ 1 1 II
8.0 10 10 100
1 CL = 10 pF
r
L
- MpF "
C| == 100 pF
CL = 100 pF
"
CL -= 300 pF
--j
i
-
Cl = 300 pf^
Cl = 500 pF
Cl - 500 df
~~~-
+25 +50 +75 +100 +125 +25 +50 +75 +100 +125
TA , AMBIENT TEMPERATURE (C| Ta, AMBIENT TEMPERATURE (C)
MC33272, MC33274
FIGURE 26
PHASE MARGIN AND GAIN MARGIN versus
DIFFERENTIAL SOURCE RESISTANCE FIGURE 27 CHANNEL SEPARATION versus FREQUENCY
160 1 Ml TTTT
II 1'urive Channel
S ~^> I V CC +15\ ==
150
V
'
=
Vff -15V =
v
= 2.0 Id!
RL
N
"f
AVod = 20 V p-p
25C
,.
\X
\~
II
10 100 10 k
1,0 k
f, FREQUENCY (Hz)
Rj, DIFFERENTIAL SOURCE RESISTANCE (H)
i
Ay = + 1000 : = vcc = +15V
Ay = + 100 v = ov
ta = 25 c
|
H~==
J
. Ay = + 10 :
1
f Ay = 100
]/
Ay = 100/
;Ay = +1,0
T .1 Ay = 1l / Ay = 1.0
7 ftj vn = 2.0 vD .
D
"
VC c = + 15 V
TA = 2 C VEE = -15 V
|
1 1 HI. i i i u..
1.0 k
100 k 1.0M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
FIGURE 30 INPUT REFERRED NOISE VOLTAGE FIGURE 31 INPUT REFERRED NOISE CURRENT
versus FREQUENCY versus FREQUENCY
1 1 1 nun 1 1 III
Rs
^>p v
1 Wv '
1
iX IR<; = 10 Mi)
III
VEE = - 15 V
TA = 2 5C
1 it mi III |
1.0 k
1.0 k
f, FREQUENCY (Hz)
FREQUENCY
f, (Hz)
V EE = -15 V
RL = 2.0 k$2
TA = 25C
100
FIGURE 35 SMALL SIGNAL TRANSIENT RESPONSE FIGURE 36 LARGE SIGNAL TRANSIENT RESPONSE
FOR MC33274 FOR MC33274
Product Preview
JFET
OPERATIONAL
LOW INPUT OFFSET, HIGH SLEW RATE, AMPLIFIERS
WIDE BANDWIDTH, JFET INPUT
OPERATIONAL AMPLIFIERS SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC33282,4 series of monolithic operational amplifiers are
quality fabricated with innovative Bipolar and JFET design con-
cepts. This dual and quad operational amplifier series incorpo-
rates JFET inputs along with a patented Zip-R-Trim element for
input offset voltage reduction. The MC33282,4 series of opera-
MC33282
tional amplifiers exhibits low input offset voltage, low input bias
current, high gain bandwidth and high slew rate. Dual-doublet
P SUFFIX
frequency compensation is incorporated to produce high quality
PLASTIC PACKAGE
phase/gain performance. In addition, the MC33282,4 series CASE 626
exhibits moderately low input noise characteristics for JFET input
amplifiers. It's all NPN output stage exhibits no deadband cross-
over distortion, large output voltage swing, excellent phase and
gain margin, low open-loop high frequency output impedance D SUFFIX
with symmetrical source and sink AC frequency performance. PLASTIC PACKAGE
The MC33282,4 series is specified over -40C to +85C and is CASE 751
available in the plastic DIP and SOIC surface mount packages (P (SOP-8)
and D suffixes).
Low Input Offset Voltage: 200 /uV
Low Input Bias Current: 30 pA 3 V(X
Low Input Offset Current: 6.0 pA f r-U Output 2
ORDERING INFORMATION
Op Amp Specified Ambient
Function Device Temperature Range Package
Dual
MC33282D SO-8
MC33282P Plastic DIP
-40C to +85C
MC33284D SO-14
Quad
MC33284P Plastic DIP
This document contains information on a product under development. Motorola reserves the right (Quad, Top View)
to change or discontinue this product without notice.
2-296
MC33282, MC33284
MAXIMUM RATINGS
Rating Symbol Value Unit
exceeded.
3. Vcc and Vee power supply rejection measured separately using 10 V power supply delta.
t t-O v cc
-OV EE
ORDERING INFORMATION
Op Amp Temperature
Function Device Range Package P SUFFIX U SUFFIX
PLASTIC PACKAGE CERAMIC PACKAGE
MC34001 BD, D SO-8 CASE 626 CASE 693
MC34001BG, G Metal Can
Oto +70C D SUFFIX
MC34001BP, P Plastic DIP
PLASTIC PACKAGE
Single
MC34001BU, U Ceramic DIP CASE 751
(SO-8)
MC35001 BG, G Metal Can
-55 to + 125C
MC35001BU, U Ceramic DIP 3nc
MC34002BD, D SO-8 3v cc MC34001,
3 Output MC35001
MC34002BG, G Metal Can 3 Offset Null (Top View)
to + 70C
MC34002BP, P Plastic DIP
Dual
MC340Q2BU, U Ceramic DIP
!30utputB MC34002,
MC35002BG, G Metal Can 71) MC35002
-55 to +125C r;>lnputs B .,. ... ,
T|f (Top View)
MC35002BU, U Ceramic DIP
MC34004BL, L Ceramic DIP
to + 70C
Quad MC34004BP, P Plastic DIP
Outl[J_ 1 i
3out4
MC35004BL, L -55 to +125C Ceramic DIP
lnputs1
^il>r W^ lnputs4
v C cE 3v EE
,nputs2
E S^i ^C 3 ,nputs3
MAXIMUM RATINGS
MC35001 MC34001
MC35002 MC34002
Rating Symbol MC35004 MC34004 Unit
Supply Voltage v Cc + 22 + 18 V
VEE -22 -18
Differential Input Voltage (Note 1) V|D 40 30 V
Input Voltage Range V IDR 20 16 V
Output Short-Circuit Duration ts Continuous
Operating Ambient TA -55 to +125 to + 70 c
Temperature Range
Operating Junction Temperature Tj c
Metal and Ceramic Packages 150 150
Plastic Packages 150
Storage Temperature Range T stg c
Metal and Ceramic Packages -65 to +150 -65 to +150
Plastic Packages -55 to +125
NOTE:
(1) Unless otherwise specified, the absolute maximum negative input
voltageis equal to the negative power supply.
MC35001/35002/35004 MC34001/34002/34004
(2)T| 0W = -55CforMC35001/35001B (3) The input bias currents approximately double for every 10C rise in
MC35002/35002B junction temperature, Tj. Due to limited test time, the input bias
MC35004/35004B currents are correlated to junction temperature. Use of a heatsink is
Rl == 2.0 k
...
in 'A = 25C
ID
I
TA = 25C 30
5
00
->n
<
20
o
=*
10
ID
o
50
>o
Vcc/Vee = te v
-5. 35 V CC;/V EE =
=
s s\
~ 30
10 k
I 25
~
S 20
N^ 2.0 k
o
O-
6
=-
5.0
0.2
Z 10 6
<*
gl 5
Ta = 25C ^^^
o
4 0
t
5 1
CL.
^.103
.Gain
=
o
Phase Shift \ \\ ^
H
101
1.0 k
f,
10 k
FREQUENCY
A 100 k
(Hz)
-25
Ta,
25
AMBIENT TEMPERATURE
50
|C)
75
1.10 i
Rs = ioo n ]__[
< 50
= 25C
g 1.05 I
!
40 oil 1
100
g J !
30
<0.95 __| !
i
20
0.90
10
0.85 !
I
i
I ! I
. , i
ilil s i I
"AV = l.U
:Vfi =
0.1 6.0 V (RMS)-
-T A = 25C
0.01 ==
0.005
001
1.0 5.0
f, FREQUENCY (kHz)
Output
-o Vcc
Inputs
Offset
Null
(MC34001,^ 15k
MC35001
only) -^V EE
Bias Circuitry
Common to All
'
Amplifiers
TYPICAL APPLICATIONS
Theoretical Vo
V = ^! (R , f*l +
+ + A4 A6 ABl
R1 L 2 4 8 16 32 64 128 256 J
Adjust V re f, R1 or Rq so that Vo with all digital inputs at high
Vq level is equal to 9.961 volts.
V re f = 2.0 Vdc
R1 = R2 = 1.0 kO
Rq = 5.0 kfi
vO =
1k
(5 M " +
[2
-:
4
+ - +
8
+++
16 32 64 128 256
56 J
OV out
VRO
* Polycarbonate or
Polystyrene Capacitor Overshoot <10%
t s = 1 ^s
When driving large C|_, the V ou t slew r a' e is determined by Cl
Time (t) = R4 C^n (Vr/Vr-V|), R3 = R4, R5 = 0.1 R6
and ut(max) :
t = 0.693 R4C
l
If R1 = R2:
AVquj = leul = =
Design Example: 100 Second Timer <L_2
v/ 04 v/ (wlth c shown)
Vr = 10 v C = 1.0 /xF R3 = R4 = 144 M At Cl 0.5
R6 = 20 k R5 = 2.0 k R1 = R2 = 1.0 k
240 kHz
MOTOROLA MC34071,2,4
SEMICONDUCTOR MC35071,2,4
TECHNICAL DATA
HIGH SLEW RATE, WIDE BANDWIDTH,
MC33071,2,4
SINGLE SUPPLY OPERATIONAL AMPLIFIERS
Quality bipolar fabrication with innovative design concepts are
employed for the MC3307 1/2/4, MC3407 1/2/4, MC35071/2/4 series HIGH PERFORMANCE
of monolithic operational amplifiers. This series of operational
amplifiers offer 4.5 MHz of gain bandwidth product, 13 V//us slew
SINGLE SUPPLY
rate and fast settling time without the use of JFET device tech- OPERATIONAL AMPLIFIERS
nology. Although this series can be operated from split supplies,
it is particularly suited
SILICON MONOLITHIC
for single supply operation, since the com-
mon mode input voltage range includes ground potential (Vee). INTEGRATED CIRCUIT
With a Darlington input stage, this series exhibits high input resis-
tance, low input offset voltage and high gain. The all NPN output
stage, characterized by no deadband crossover distortion and
large output voltage swing, provides high capacitance drive capa-
bility, excellent phase and gain margins, low open-loop
high fre-
quency output impedance and symmetrical source/sink ac fre-
quency response. P SUFFIX U SUFFIX
PLASTIC PACKAGE CERAMIC PACKAGE
The MC3307 1/2/4, MC34071/2/4, MC35071/2/4 series of devices
CASE 626 CASE 693
are available in standard or prime performance (A Suffix) grades
and are specified over the commercial, industrial/vehicular or mil- D SUFFIX
itary temperature ranges. The complete series of single, dual and ^fc, PLASTIC PACKAGE
quad operational amplifiers are available in the plastic, ceramic CASE 751
DIP and SOIC surface mount packages. (SO-8)
ORDERING INFORMATION
Op Amp
Function Device Temperature Range Package
Single MC34071P, AP Plastic DIP
MC34071D, AD 0C to + 70C SO-8
MC34071U, AU Ceramic DIP P SUFFIX L SUFFIX
MC33071P, AP Plastic DIP PLASTIC PACKAGE CERAMIC PACKAGE
MC33071D, AD - 40C to + 85C SO-8 CASE 646 CASE 632
MC33071U, AU Ceramic DIP
MC35071U, AU -55Cto +125C Ceramic DIP D SUFFIX
Dual MC34072P, AP Plastic DIP PLASTIC PACKAGE
MC34072D, AD 0Cto +70C SO-8 CASE 751
MC34072U, AU Ceramic DIP (SO-14)
MC33072P, AP Plastic DIP
MC33072D, AD -40Cto +85C SO-8
MC33072U, AU Ceramic DIP
MC35072U, AU -55Cto +125C Ceramic DIP
Quad MC34074P, AP Plastic DIP
MC34074D, AD 0C to +70C SO-14
MC34074L, AL Ceramic DIP
MC33074P, AP Plastic DIP
MC33074D, AD - 40C to + 85C SO-14
MC33074L, AL Ceramic DIP
MC35074L, AL -55C to +125C Ceramic DIP (Quad, Top View)
MAXIMUM RATINGS
Rating Symbol Value Unit
Tj C
Operating Junction Temperature
Ceramic Package + 160
Plastic Package + 150
T stg C
Storage Temperature Range
Ceramic Package -65 to +160
Plastic Package
- 60 to + 1 50
NOTES:
1. Either or both input voltages should not exceed the magnitude of Vcc or V EE-
must be considered ensure maximum junction temperature (Tj) is not exceeded (see Figure 1)
2. Power dissipation to
^-Wvrf-WV-t O Output
R8
VEE'Gnd
Offset Null
(MC33071, MC34071, MC35071 only)
otherwise noted)
A Suffix Non-Suffix
SR V//is
= -10 V +10 RL = C L = 500 pF)
Slew Rate (V in to V, 2.0 kft,
8.0 10 - 8.0 10 -
AV = +1.0
13 13
A V = -1.0
/U.S
Time (10 V Step, Av = -1.0) ts
-
Settling
To 0.1% + 1/2 LSB of 9-Bits)
(
- 1.1 - 1.1
2.2 2.2
To 0.01% + 1/2 LSB of 12-Bits)
(
Gain Bandwidth Product (f = 100 kHz) GBW 3.5 4.5 - 3.5 4.5 MHz
Am dB
Gain Margin
R L = 2.0 kft
- 12 - - 12 -
4.0 4.0
R L = 2.0 kft, C[_ = 300 pF
Equivalent Input Noise Voltage en 32 32 pA/
VHz
R S = 100 ft, f = 1.0 kHz
V CM = V
Differential Input Capacitance C|N 2.5 2.5 " pF
V CM = V
Total Harmonic Distortion THD 0.02 0.02 " %
AV = + 10, R|_ = 2.0 kft, 2.0 V p. p *s V 20 V p .
p , f = 10 kHz
<|>vcc
V CC + v EEl 44 v
l
Vcc
o
o vcc
o ;2">- ~yi > o
o
o !3
">-- JT" o
0
o>
14
">--- V EE ]4 > o Av EE
6 vfe VEE
Offset nulling range 80 mV with a 10 k
is approximately
potentiometer (MC33071, MC34071, MC35071 only).
FIGURE 3 MAXIMUM POWER DISSIPATION versus FIGURE 4 INPUT OFFSET VOLTAGE versus
TEMPERATURE FOR PACKAGE TYPES TEMPERATURE FOR REPRESENTATIVE UNITS
2400
i
40 Vcc = + 15V
2000 = -15V
^8 & 14 Pin Ceramic Pkg. -__ VE E
-VC M =
1600 | |
20
8&14P n Plastic Pkg.
r-S n-i d Plm
1200
^S
S V*
800 0-( Fk
g.
^ 5; -^ s N 20
400
5j Xs s^.
*s
^ sV -40
55-40-20
55*
^
20 40 60 80 100 120 140 160 -25
5 +25 +50 +75 +100 +125
T A AMBIENT TEMPERATURE
, (C)
TA AMBIENT TEMPERATURE PC)
,
FIGURE 5 INPUT COMMON MODE VOLTAGE FIGURE 6 NORMALIZED INPUT BIAS CURRENT
RANGE versus TEMPERATURE versus TEMPERATURE
vcc 1 I 1 1 1
1.3
> VCC^EE = + 1.5 V/ - 1.5 V to + 22 V/ - 22 V
\
1
1.1
Vcc -1.6
1.0
VCC "2.4
_ 0.9
-
Vee +0.01
0.8
V EE
oc -=-
vee
/ 0.7
-55 -25 +25 +50 +75 +100 +125 -55 -25 25 50 75 100 125
TA AMBIENT TEMPERATURE (C)
,
FIGURE 7 NORMALIZED INPUT BIAS CURRENT versus FIGURE 8 SPLIT SUPPLY OUTPUT VOLTAGE
INPUT COMMON MODE VOLTAGE SWING versus SUPPLY VOLTAGE
i i
vcc= + 15V I I I
= i5v - _ Rl Connected
vee
Ta = 25C
to Ground Ta = 25C
A
'/
S?
1.0 RL = 10 k
^ ''
Rl = 2.0 k
-
i
V|
C INPUT
, COMMON-MODE VOLTAGE (V) v CO|VeeI. SUPPLY VOLTAGE (V|
FIGURE 9 SPLIT SUPPLY OUTPUT SATURATION FIGURE 10 SINGLE SUPPLY OUTPUT SATURATION
versus LOAD CURRENT versus LOAD RESISTANCE TO GROUND
vcc
vcc vcc > _
) Vcc/vee = + 5.0V/ -5.0Vto+22V/ -22 V -"I'
vcc T A = 25C
Vcc-10
^ Vcc -2.0
l
VC C= +15V
Soi rce
RL = Gnd
Vcc -4.0 Ta = 25C
V CC -2.0
- Ml
"""
I I I I
+ 2.0 + 0.2
Vee
+ 1-0
Si pk + 0.1
Vee
G id
vff
> 1
vee
100 1.0K 10K 100K
5.0 10 15
FIGURE 11 SINGLE SUPPLY OUTPUT SATURATION versus FIGURE 12 OUTPUT SHORT CIRCUIT CURRENT
LOAD RESISTANCE TO Vcc versus TEMPERATURE
V -vcc ~-
\
0.4 Sink
Z
9 -0.8 Source
< 1
+2.0
i
vcc = + 15V
Z3 .
\ 1RV -
VEE = -15V
Z3 R L to V Cc
R. + 1.0
TA = 25C
RL =s .m -
Gnd AV in == 1.0 V
\
-25 25 50 75 100 125
100 1.0K 10K
FIGURE 13 OUTPUT IMPEDANCE versus FREQUENCY FIGURE 14 OUTPUT VOLTAGE SWING versus FREQUENCY
28 -- Mini
I
\ \l
EE
= -15 V
- v CM= o f > 1* = +1.0
\ V
= o '" o
v
Alo = 0.5 niA
z 20
1
L
"HD
= 2.0 k
1.0% "
-:== ""
o>
- TA uj
o 16 I
A
Htrr I
I o
x =HI II
12
..
/a Av = Av =
IN 1000 v = 100 / 10 1.0
8.0 \- ....
i
/
r
o 4- It" - \
mi
/ a 4.0
'"v
--[--
=b:_ .- mi o
10K 30K
I
i
I
Vcc = + 15 V AV = TA = 25C
Vee =
" 15 v 1000
0.2
Vo = 2.ov c D .
Rl = 2.0 k ~~
= 25C
AV = 100
AV == 100
1
, AV == 10
AV = 10
AV = 1.0
100
l
^fc=F
1.0K 10K 11 4.0 8.0 12 16
f, FREQUENCY (Hz)
V , OUTPUT VOLTAGE SWING (V . )
p p
FIGURE 17 OPEN-LOOP VOLTAGE GAIN versus FIGURE 18 OPEN-LOOP VOLTAGE GAIN AND
TEMPERATURE PHASE versus FREQUENCY
11?
Vcc= +15V
Vee = -15 V fin
108 RL = 10 k
wi
\ Phase
f=sl0 Iz
104 40 Margin
Vcc= +15V = 60
vE e = -15 V
inn
?n -V out = 0V - \
RL = 2.0 k
=
\
96
-55 -25 +25 +50 +75 +100 +125
TA 2 5C
\
100 1 ,0K 10K 100K 1.0M 10M 100M
TA AMBIENT TEMPERATURE
, (C) f, FREQUENCY (Hz)
Vcc = + 15V
Vee = -15 V
RL = 2.0 k
70
= -15 V
vEe
I I I II
M
I
-^r^H
I
V EE
VCC = +15V
~ -15 V
_
R|_ = 2.0 k ^'
l Ay = +1.0
- Vo = -10 V to +10V
TA = 25C
1 2
o
50 -RL =
Vo = -10 V
2.0kto
to +10V
_ Ta = 25C
o
i
J CC
<
2
40
30
<
- 20
li
10
\ II
FIGURE 23 GAIN MARGIN versus LOAD CAPACITANCE FIGURE 24 PHASE MARGIN versus TEMPERATURE
1
vcc = + 15V 1
= -15 V = 10 pF
_iV EE
Ay = + 1.0 ^^ Cl
__Cj=100"dTH
_ RL = 2. kto*
Iv = - 10 V to + 10 V
- TA = 2E c VCC = +15V
vee = -15V
AV = + 1.0
RL - 2.0kto=c
= vo = -10 V to +10V
*
w =Ji_
1,000 pF
Cl = 10,000 pF
25 50 75 100
i
100 1.0K 10
FIGURE 26
PHASE MARGIN AND GAIN MARGIN versus
FIGURE 25 GAIN MARGIN versus TEMPERATURE DIFFERENTIAL SOURCE RESISTANCE
o^JS^Vo
V CC = +15V
vEe = -15 V
Rj = Ri + R2
Ay = + 100
Vo = 0V
T A = 25C
o
1.15
1.1
vcc = + 15V
vE e= -15V
AV = + 1.0
in
10 mV,
1(lmU
^\'/ ^(ImM
^ ^ ^1
Vrr ~
vE e = -15
1
+ 1SU
1
RL = .Ok SjS Ay
< 05 *
=
1
= - '> TA 25C
CO ~W 00 pF
t
o
1 1
-I
Compensated
n
Uncompensated
cc
^^
g 0.95
GO
oc
50 ^ 1.0 mV
0.9 10 mV 1.0 mV
v
0.85 s
10
^
-25 25 50 75 100 125 1.0 1.5 2.0 2.5 3.0 3.5
FIGURE 29 SMALL SIGNAL TRANSIENT RESPONSE FIGURE 30 LARGE SIGNAL TRANSIENT RESPONSE
VCC = + 15 V
vee = - 15 v
Ay = + 1.0
RL = 2.0 k
Cl = 300 pF
E TA = 25C
V li^H^W^P^Hff^HHri^^^^^^^^*'
2.0 ais/DIV
1.0/ns/DIV
25C
J
- 125C
vcc = + 15 V
|
v E e = -15 V Vee = - 15 v
80
TA = - 55C V CM = 0V Ta = 25C
V
LM - O AV C c + PSR i
'\
60 A DM^>
N (AVcc= 1.5 VI
| o AV( N
Q
_ [ )
s
^ V CM of~] A> O AV
.
^ <Uv EE \ \
40
I -
+ PSR = 20L O
AV /A dm\ \ N
v
! I
g( avq
V c )
A\
?n
-CMR = 20Log(^xA DM
)
-PSR^ol^^ dm\ -psr\
I
I
V AVe E ) (AV EE = 1.5V)\\
I I
.
0.1 1.0 10 100 1.0K 10K 100K 1.0M 10M 01 10 10 100 1.0K 10K TOOK 1.0M 10M
f, FREQUENCY (Hz)
FREQUENCY
f, (Hz)
Ta = -55C
f 8.0
g 7.0
TA = >5C
1 60
TA = 125-C
t- 75
. i fig")
5.0
~ PSR = 20Log
/ avq/a D m \
AV EE
V )
|
4.0
25
-25 25 50 75
5.0 10 15 20
T A AMBIENT TEMPERATURE
,
(C)
V CC , |V
EE |, SUPPLY VOLTAGE (V)
FIGURE 35 CHANNEL SEPARATION versus FREQUENCY FIGURE 36 INPUT NOISE versus FREQUENCY
cc +
v EE= - 15V
TA = 25C \ >
s,
\ s
1.0K
30 50 70 100 200 300
f, FREQUENCY (Hz)
f, FREQUENCY (kHz)
APPLICATIONS INFORMATION
CIRCUIT DESCRIPTION/PERFORMANCE FEATURES OF THE MC34071 SERIES
Although the bandwidth, slew rate, and settling time shown by the maximum rating table. In practice,
amplifier series are similar to op amp although not recommended, the input voltages can
of the MC34071
products utilizing JFET input devices, these amplifiers
exceed the Vcc voltage by approximately 3.0 volts and
decrease below the Vee voltage by 0.3 volts without
offer other additional distinct advantages as a result of
PNP transistor differential input stage and an all NPN causing product damage, although output phase rever-
the
sal may occur. It is also possible to source up to approx-
transistor output stage.
Since the input common mode voltage range of this imately 5.0 mA of current from Vee through either
input's clamping diode without damage or latching,
input stage includes the Vee potential, single supply
operation is feasible to as low as 3.0 volts with the although phase reversal may again occur.
If one or both inputs exceed the
upper common mode
common mode input voltage at ground potential.
The input stage also allows differential input voltages voltage limit the amplifier output is readily predictable
up to 44 volts, provided the maximum input voltage and may be in a low or high state depending on the
range is not exceeded. Specifically, the input voltages existing input bias conditions.
Since the input capacitance associated with the small ply voltage. For light load currents, the load resistance
geometry input device is substantially lower (2.5 pF) will pullthe output to Vcc during the positive swing
than the typical JFET input gate capacitance (5.0 pF), and the outputwill pull the load resistance near ground
better frequency response for a given input source resis- during the negative swing. The load resistance value
tance can be achieved using the MC34071 series of should be much less than that of the feedback resistance
amplifiers. This performance feature becomes evident, to maximize pull up capability.
for example, in fast settling D-to-A current to voltage Because the PNP output emitter-follower transistor
conversion applications where the feedback resistance has been eliminated, the MC34071 series offers a 20 mA
can form an input pole with the input capacitance of the minimum current sink capability, typically to an output
op amp. This input pole creates a 2nd order system with voltage of (Vee + 1-8 V). In single supply applications
the single pole op amp and is therefore detrimental to the output can directly source or sink base current from
its settling time. In this context, lower input
capacitance a common emitter NPN transistor for fast high current
is desirable especially for higher values
of feedback switching applications.
resistances (lower current DAC's). This input pole can In addition, the all NPN transistor output stage is
be compensated for by creating a feedback zero with a inherently fast, contributing to the bipolar amplifier's
capacitance across the feedback resistance, if neces- high gain bandwidth product and fast settling capability.
sary, to reduce overshoot. For 2.0 kH of feedback resis- The associated high frequency low output impedance
tance, the MC34071 series can settle to within 1/2 LSB (30 n typ @ 1.0 MHz) allows capacitive drive capability
of8bitsin 1.0 ^s, and within 1/2 LSB of 12 bits in 2.2 fis from to 10,000 pF without oscillation in the unity
for a 10 volt step. In a inverting unity gain fast settling closed loop gain configuration. The 60 phase margin
configuration, the symmetrical slew rate is 13 volts/ and 12 dB gain margin as well as the general gain and
MS. In the classic noninverting unity gain configuration phase characteristics are virtually independent of the
the output positive slew rate is +10 volts//xs, and the source/sink output swing conditions. This allows easier
corresponding negative slew rate will exceed the pos- system phase compensation, since output swing will
itive slew rate as a function of the fall time of the input not be a phase consideration. The high frequency char-
waveform. acteristics of the MC34071 series also allow excellent
Since the bipolar input device matching character- high frequency active filter capability, especially for low
isticsare superior to that of JFETs, a low untrimmed voltage single supply applications.
maximum offset voltage of 3.0 mV prime and 5.0 mV Although the single supply specification is defined at
downgrade can be economically offered with high fre-
quency performance characteristics. This combina-
5.0 volts, these amplifiers are functional to 3.0 volts
@
25C although slight changes in parametrics such as
tion is ideal for low cost precision, high speed quad bandwidth, slew rate, and dc gain may occur.
op amp applications. If power to this integrated circuit is applied in reverse
The all NPN output stage, shown in its basic form on polarity or the IC is installed backwards in a socket,
if
the equivalent circuit schematic, offers unique advan- large unlimited current surges will occur through the
tages over the more conventional NPN/PNP transistor device that may result in device destruction.
Class AB output stage. A 10 kH load resistance can
Special static precautions are not necessary for these
swing within 1.0 volt of the positive rail (Vcc). and
within 0.3 volts of the negative rail
bipolar amplifiers since there are no MOS
transistors
(Vee), providing a on the die.
28.7 Vp.p swing from 15 volt supplies. This large out- As usual with most high frequency amplifiers, proper
put swing becomes most noticable at lower supply lead dress,component placement, and PC board layout
voltages.
should be exercised for optimum frequency perfor-
The positive swing is limited by the saturation voltage mance. For example, long unshielded input or output
of the current source transistor Q7, and
Vbe of the NPN leads may result in unwanted input-output coupling. In
pull up transistor Q-|
7 and the voltage drop associated
,
order to preserve the relatively low input capacitance
with the short circuit resistance, R7. The negative swing
associated with these amplifiers, resistors connected to
is limited by the saturation voltage of the pull-down
the inputs should be immediately adjacent to the input
transistor Q-\q, the voltage drop Il r 6' and the voltage
pin to minimize additional stray input capacitance. This
drop associated with resistance R7, where l|_ is the sink not only minimizes the input pole for optimum fre-
load current. For small valued sink currents, the above
quency response, but also minimizes extraneous "pick
voltage drops are negligible, allowing the negative
up" at this node. Supply decoupling with adequate
swing voltage to approach within millivolts of Vee- For capacitance immediately adjacent to the supply pin is
large valued sink currents (>5.0 mA), diode D3 clamps
also important, particularly over temperature, since
the voltage across Rq, thus limiting the negative swing
many types of decoupling capacitors exhibit great
to the saturation voltage of
Qig, plus the forward diode impedance changes over temperature.
drop of D3 (=Vee + 1-0 V). Thus for a given supply The output of any one amplifier is current limited and
voltage, unprecedented peak-to-peak output voltage
thus protected from a direct short to ground. However,
swing is possible as indicated by the output swing under such conditions, it is important not to allow the
specifications.
device to exceed the maximum junction temperature
If the load resistance
is referenced to Vcc instead of rating. Typically for 15 volt supplies, any one output
ground for single supply applications, the maximum can be shorted continuously to ground without exceed-
possible output swing can be achieved for a given sup- ing the maximum temperature rating.
vcc
5.1M vo
3.7 Vp.p
20 k Cjn
MC34071 C V
-)h
36.6 mVp.p
Vin 100 k
10K -
V in 370 mV p .
p
'
Rl
r
_L
k
BW(-3.0dB)
B
AV =
= 45 kHz
101
-r
AV = 10 BW (-3.0 dB) = 450 kHz
FIGURE 39 DC COUPLED INVERTING AMPLIFIER FIGURE 40 UNITY GAIN BUFFER TTL DRIVER
MAXIMUM OUTPUT SWING
o v cc
MC54/74XX
TTL Gate
AV = 10
Vin BW(-3.0dB) = 450 kHz
5.6 k ?
f = 30 kHz
0.01
Q = 10
6 0.4 VC c H = 1.0
f = 1.0 kHz Given = Center Frequency
f
32 k $ 2R
A = Gain at Center Frequency
_ Choose Value f Q, A C, ,
Q R1 R3
1
R3 = - R1 =
91 Mh
~ 4nRC Then -
irf C 4Q2R1-R3
FIGURE 43 LOW VOLTAGE FAST D/A CONVERTER FIGURE 44 - HIGH SPEED LOW VOLTAGE COMPARATOR
A Vj,
2.0 V
MC34071
vo
5.0 k 5.0 k 5.0 k -O + * t
-W^ fvw
2.0 k Vo j
10k^ 10 k | 10k: RL I
Z1.0V !
Bit
I 1 Delay
Switches
(
[
V
J_
V
JL
%
J_ 1 25 V//is
^T "ON"
^f v in<V Ref
Vin O
<Z^ "ON"
1* v in > V Ref (A) PNP (B) NPN
O -vw-
Rf
MC34071
MC34071
1 O V 'Cell
-o v
Ground Current
Rs
Sense Resistor
R1
vw
VRef R1
*v 'n
VinL VinH
VRef
VinL :
R1 + R2
R1
VinH (VOH " VRef) + VRef
R1 + R2
R1
VH = <v h - vol)
R1 + R
FIGURE 51
HIGH INPUT IMPEDANCE FIGURE 52 BRIDGE CURRENT AMPLIFIER
DIFFERENTIAL AMPLIFIER
+ VRef
=11 R2
1/2 MC34072
1/2 MC34072
VO
= (Critical to CMRR)
R1 R3 w ARR F
Vo = w
VRef ~^2~
VO-(-S)(-< (V 0.1 V)
Vo = V in (Pk)
10,000 pF
r vP
FIGURE 55 SECOND ORDER LOW-PASS ACTIVE FILTER FIGURE 56 SECOND ORDER HIGH-PASS ACTIVE FILTER
O VW
f = 1.0 kHz
MC34071 H o = 10
Choose: H C2 H Q + 0.5
f , , Choose: f , H , C1 Then: R1 = ^f
irf ClV2
Then: C1 = 2C2 (H + 1)
V2
V2 R2
R2 R3
12 _ R2 2irf C1 (1/H + 2)
4irf C2 Hn + 1
-
FIGURE 57 FAST SETTLING INVERTER FIGURE 58 BASIC INVERTING AMPLIFIER
CF*
~-
-)h
Vo = 10 V
Step
O V
*o v
ts = 1.0 fj.s
.X. Uncompensated
to 1/2 LSB (8 Bits)
to 1/2
= 2.2
LSB
ms
(12 Bits)
Vo
v in
=
R2
K1
BW(-3.0dB = GBW r
[_R1
^
+ R2j
i
DAC
SR = 13 V/fis SR = 13V//xs
"Optional Compensation
FIGURE 59 BASIC NON INVERTING AMPLIFIER FIGURE 60 UNITY GAIN BUFFER (AV = +1.0)
Vin O-
-O v
R1 '
**=(,
f
4r V in V
+
R1.
-o v
Re
Example:
Let: R = Re = 12 k
Ay = 3.0
Then:
BW = 1.5 MHz
AV
H4l
i"
220 pF
Rl +v -v
X 18.93 -18.78
10 k
5.0 k
18
15.4
-18
-15.4
* o -v
DW SUFFIX
PLASTIC PACKAGE
CASE 751
(SO-16L)
MAXIMUM RATINGS
Rating Symbol Value Unit
VCC
Output
Inputs
oV
* EE
A Suffix Non-Suffix
Characteristic Symbol Typ
Min Max Min Typ Max Unit
Input Offset Voltage (Note 4)
V|0
Single mV
TA = +25C
0.3 0.5 0.5 1.0
T A = 0C to +70C (MC34080, MC34081)
2.5 3.0
TA = -55C to +125C (MC35080, MC35081)
3.5 4.0
Dual
TA = +25C
0.6 1.0 1.0 3.0
TA = 0C to + 70C (MC34082, MC34083)
3.0 5.0
TA = -55C to + 125C (MC35082, MC35083)
4.0 6.0
Quad
TA = +25C
3.0 6.0 6.0 12
TA = 0C to + 70C (MC34084, MC34085)
8.0 14
TA = -55Cto +125C (MC35084, MC35085)
9.0 15
Average Temperature Coefficient of Offset Voltage AViq/AT 10 mV/C
Input Bias Current (Vqm = Note 5)
"IB
T A = + 25C
0.06 0.2 0.06 0.2 nA
T A = 0C to + 70C
4.0 4.0
T A = -55Cto +125C
50 50
Input Offset Current (Vcm = Note 5)
ho
TA = +25C
0.02 0.1 0.02 0.1 nA
T A = 0C to + 70C
2.0 2.0
T A = -55Cto + 125C
25 25
Large Signal Voltage Gain (Vq = :10 RL =
V, 2.0 k) A VOL V/mV
T A = +25C
80 25 80
T A = T| 0W to T niqn
15
Output Voltage Swing
VOH
R|_ = 2.0 k, T
A = +25C 13.2 13.7 13.2 13.7
R L = 10 k, TA = +25C
13.4 13.9 13.4 13.9
R L = 10 k, T A = T| ow toT
hign 13.4 13.4
NOTES: (CONTINUED)
3 T low = -55Cfor MC35080.A 0C for MC34080,A
-
T high + 125CforMC35080,A Thigh = +70CforMC34080,A
MC35081.A MC34081.A MC35081.A
MC35082.A MC34081.A
MC34082.A MC35082.A
MC35083.A MC34082.A
MC34083.A MC35083,A
MC35084.A MC34083.A
MC34084.A MC35084.A
MC35085.A MC34084.A
MC34085.A MC35085.A
e a,i0n ati0 f r typiC :h ngeS in inpUt 0ffset
MC34085.A
i
due to
mit?t
Limits
Li at Tl%rCare "guaranteed2' by thigh temperature (T voltage
TA = +25 i:
solderability and temperature cycling
nign testing. )
= +10
k,
20 25 - 20 25 -
Ay = -1-0 30 30
Decompensated Ay - +2.0 40 50 40 50
Ay = - 1 -0 50 50
- 400 - - 400 -
Decompensated Ay = -1.0 800 800
Input Resistance n
- 1012 - - 1012 n
Total Harmonic Distortion THD 0.05 0.05 %
Ay = + 10, R L = 2.0 k, 2.0 *s V 20 Vp _ p , f = 10 kHz
FIGURE 1 INPUT COMMON MODE VOLTAGE RANGE FIGURE 2 INPUT BIAS CURRENT
versus TEMPERATURE versus TEMPERATURE
c/)
== 3.0 V 22 V
VCC /V EE= 15V
>
LU
VCC^EE
AV|o = 5.1) mV
to
v
cc T V CM = 0V
~
I
-^
|<+3.0
o
1 100
o
+ 1.0
o VFE^
n
-25 +25
iT +60 +75 +100 +125 -25 25 50 75
>
2 40
Rl Connected
Ta = Z5"L
to Ground
^
5 30
RL = tO kjjs:
f\ =-- 2.0 k
e>
o 20
o
10
-1.0 X
Mr J LOAD RESISTANCE TO GROUND
irce
-?n _ VCC v ee =
TA = 25C
5.0 Vt 3 22 V
-3.0
+ 1.0 Cinl
v EE-^_
4.0 8.0 12
3.0K 30K
lL, LOAD CURRENT mA)
(
Source
Sink
"
Vcc/Ve E= 1! V
AV in == 1.0 V
FIGURE 9 OUTPUT IMPEDANCE versus FREQUENCY FIGURE 10 OUTPUT IMPEDANCE versus FREQUENCY
rii mi 1 1 1 Mill '
Compensated Decompensated
Units Only Units Onlv
1 j
^AV = 1.0
-^
10K
IOH-E -I 100K
I \\\
100K 1.0M 10M
f, FREQUENCY (Hz) , FREQUENCY (Hz)
Ay = 1000-
i
HI Jfl
II
1 1 1 i
ittl
'if
TTTj mi hi
VcC'EE ~ - l3 Y
L = 2.0 k
T/\ - at
Iffl
'Compensated
Units Only
fy = 100- -
i nun till in
Ay = 10
111
-1
1M
oL
AV =
1.0K
1.0*
M
100K
f, FREQUENCY (Hz) f, FREQUENCY (Hz)
V CC/V E E= 15V
1.08
vo = -iu vto + iuv
I
\= 10 k
f=s10Hz
d^
1.00
go
0.96
FIGURE 14 OPEN-LOOP VOLTAGE GAIN AND FIGURE 15 OPEN-LOOP VOLTAGE GAIN AND PHASE
PHASE versus FREQUENCY versus FREQUENCY
-C"*-*,!
100
^vr -^
"^^> v
120 s>
-is
_ Vcc/Vee = i5V \ -^^ t Margin
v = ov J. ^ = 7.6 dB
140!
T/\ - 25C
M argin . \ ^ 1
160 1
1 1
54
._u
T\ 2\
2 Gain, R|_ 2 k C(_ 100 pf"
3 Phase, Rl = 2.0 k \ \
4 Phase, Rl = 2.0k,C|_ = 100 pF
Compensated Units Only 200
3. 5.0 7.0 10 20 30 50
f, FREQUENCY (Hz) f, FREQUENCY (MHz)
FIGURE 16 OPEN-LOOP VOLTAGE GAIN AND PHASE FIGURE 17 NORMALIZED GAIN BANDWIDTH
versus FREQUENCY PRODUCT versus TEMPERATURE
5.0 7.0 10
25 25 50 75
f, FREQUENCY (MHz)
TA AMBIENT TEMPERATURE
,
(C)
30
20 J
Decompensated \
Units Ay = +2.0
in
s
I
100
C L LOAD CAPACITANCE
, (pF)
C|_, LOAD CAPACITANCE (pF)
FIGURE 20 GAIN MARGIN versus LOAD CAPACITANCE FIGURE 21 PHASE MARGIN versus TEMPERATURE
60
1 1 I I 1
VCC^EE + 1<iV
Compensated
R[_ = 2.0 k to 50 "
Solid Line Curves Compensated Units Ay = +1.0
AVo = 100 mVp-p C|_ 10 pF
D asne( ne curves _De COmp ensated Units Ay = +2.C
Ay =
j |_j
Units JH.O _ -10 V to + 10V
Vo
40
TA = 25C j |
Q
5
cc
30
<;
s
i/> 20
<
Oe
Ay = +2.0
VCC^EE = 15V AVo = 100mV p . p
Units
RL = 2.0ktooo Vq = - 10 V to + 10V
VCC^EE
== 15 V
S*
0.60
+75 +125 25 50 75
+ 25
+50 +100
AMBIENT TEMPERATURE (C)
T A AMBIENT TEMPERATURE (C)
,
T/v,
0-
TA = -55 : = + 15V.
o
TA = 25C k^ i
VccA/fE
1
= + 15V. Vcc/VEE
AVs = 3.0 V
- =^J AVs = 3.0 V
1 80 -Ta = 25C .
vo = OV
vo = OV
-z.
\\ 'A = 25C
\\ Positive
60
3 Supply
V
o
o
\ \
S
z
5
40
-r
\s -
J^>- Negatives.
Supply
8 2C
. \
-xl V EE - _iV E
ac
5
1 If,
- 1?RT.
Neg ative
lly \l = + 15V. ^ 1.10
cca/ee
L Ws = 3.0 V
f 10Hz TA = 25C
Vcc ^ V CC
Supply Current
Pos tive
Normalized to
supply
o"m
-
RL ==c
pensated Units Ay = + 1.0
v = o
L 1 VfE AV EE Ta = - 55C
i
1 1
J III
10M 1.0K
100K 1.(
FREQUENCY (Hz)
f, FREQUENCY (Hz)
f,
ORDERING INFORMATION
-flw
j d ii
ii
| "flP
Op Amp Test Temperature L SUFFIX
Function Device Range Package P SUFFIX CERAMIC PACKAGE
Plastic DIP PLASTIC PACKAGE CASE 632
Single MC34181P to + 70C
MC34181D SO-8 CASE 646
MC33182P
MC33182D
-40 to +85C
Plastic DIP
SO-8 Inputs 1
M^ol \^Y m Inputs 4 \
III i3J
MC35182U -55 to +125C Ceramic DIP
VccE 0]v EE
Quad MC34184P to + 70C
Plastic DIP
(E TJ>^2 3^|-r m Inputs 3
MC34184D SO-14 Inputs 2( _.}
IE Hi
MC33184P Plastic DIP
- 40 to + 85C Output 2 \T 3 Output 3
MC33184D SO-14
( Quad, Top View )
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (from Vcc to Vee)
vs + 36 Volts
Input Differential Voltage Range V IDR Note 1 Volts
Input Voltage Range V|R Note 1 Volts
Output Short-Circuit Duration (Note 2) ts Indefinite Seconds
Operating Junction Temperature Tj C
Ceramic Package
+ 160
Plastic Package
+ 150
Storage Temperature Range T stg C
Ceramic Package -65 to +160
Plastic Package
-60 to +150
1. Either or both input voltages must not exceed the magnitude of Vcc or V
EE-
2. Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded (see Figure 1).
Q8,
Null Offsets
MC3X181 (Single) Only
oV EE
Ta = -55Cto + 125C(MC35181)
4.5
Dual
Ta = +25C
1.0 3.0
Ta = -55Cto + 125C(MC35182)
5.5
Quad
Ta = +25C
4.0 10
TA = 0C to +70C (MC34184)
11
Ta = -55Cto + 125C(MC35184)
12.5
nA
Input Offset Current (Vcm = V, Vo = V) "10
Ta = +25C
0.001 0.05
Ta = 0Cto +70C
1.0
T A = -40Cto + 85C
2.0
Ta = -55Cto + 125C
13
nA
Input Bias Current (VcM = V, Vo = V) l|B
TA = +25C
0.003 0.1
TA = 0Cto +70C
2.0
TA = -40Cto +85C
4.0
TA = -55Cto + 125C
Input Common Mode Voltage Range V|CR (Vee + 4.0 V) to (V C c - 2.0 V) V
Vo = 10 AVOL V/mV
Large Signal Voltage Gain (R L = 10 V)
kft,
25 60 -
Ta = +25C
15
T A = Tlow to Thiqh
Vo + + + 14 V
Output Voltage Swing (V|D = 1.0 V, R|_ = 10 kft) 13.5
T A = + 25C v - -14 -13.5
Single
210 250
Ta = +25C
250
Ta = Tlow to Thigh
Dual
Ta = + 25C
- 420 500
500
Ta = T|ow to Thigh
Quad
840 1000
T A = +25C
1000
T A = T low to Thiqh
AC ELECTRICAL CHARACTERISTICS (V CC
RL = 10 kfl
0m Degrees
R|_ = 10 kft, C|_ = 100 pF
- 67 -
34
Gain Margin (-10 V < Vq < +10 V)
= 10 kn
Am dB
R|_
R[_ = 10 kn, = 100 pF
- 6.7 -
C|_
3.4
Equivalent Input Noise Voltage
en - 38 - nV/VRz
RS = 100 n, f = 1.0 kHz
Equivalent Input Noise Current
f = 1.0 kHz
in - 0.01 - pA/VRz
Differential Input Capacitance
Ci 3.0 pF
Differential Input Resistance
Ri 1012 n
Total
AV =
Harmonic Distortion
THD - 0.04 - %
D p <V <20 V p . D f = 10 kHz
10, R L = 10 kn, 2 V _
,
FIGURE 1 MAXIMUM POWER DISSIPATION versus FIGURE 2 - INPUT COMMON-MODE VOLTAGE RANGE
TEMPERATURE FOR PACKAGE VARIATIONS
versus TEMPERATURE
1
1
FIGURE 3 INPUT BIAS CURRENT FIGURE 4 INPUT BIAS CURRENT versus INPUT
versus TEMPERATURE COMMON-MODE VOLTAGE
V CC = +15V v cc - + 15V
_ 100 Vee = -15V
- V CM = 0V
5 10
=>
o
eg i.o
| 0.1
m
0.01
'
0.001
25 50 75 100
I I I
-3.0 Ta = + 25C
__ . ,
20
RL = 10 k^
+ 3.0
+ 2.0
10
Si k^
+
n
1.0
"%
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
FIGURE 7 OUTPUT SATURATION VOLTAGE versus FIGURE 8 OUTPUT SATURATION VOLTAGE versus
LOAD RESISTANCE TO GROUND LOAD RESISTANCE TO Vcc
'
Vcc '
...
-1 5 -1.0
-2.0 -2.0
f
o
-3.0 | -3.0
+ 3.0 | +3.0
<
+ 2.0 +z
E
i
=>
+ 1.0
+i.
mux
10K 100K 10K 100K
25 50 75 10K
TA AMBIENT TEMPERATURE
, (C) f, FREQUENCY (Hz)
FIGURE 13 OPEN-LOOP VOLTAGE GAIN FIGURE 14 OPEN-LOOP VOLTAGE GAIN AND PHASE
versus TEMPERATURE versus FREQUENCY
25 50 75
TA AMBIENT TEMPERATURE
, (C)
FIGURE 15 NORMALIZED GAIN BANDWIDTH PRODUCT FIGURE 16 OUTPUT VOLTAGE OVERSHOOT versus
versus TEMPERATURE LOAD CAPACITANCE
r3
+ 15V
< Vcc = + 15 V Vcc
S
cc 12
''
^ r- Vcc - -15 V ,T VEE = -15 V
O RL = Dkfl 8 80 -R L = 10 kn
z 1
2C
AV in = 100 mV p .p
o 1.1 - 10 V < Vq< +10 t/
o 60 -Ay = +1.0
Ta = 25C
40
t
i
o 20
o
25 50 75 100
FIGURE 17 PHASE MARGIN versus LOAD CAPACITANCE FIGURE 18 GAIN MARGIN versus LOAD CAPACITANCE
I I I 1
Vcc = +15V \
'CC
= + 15 V
_ 60 Vee = 15 V \ = -15 V
8.0 /EE
R|_ = lOkJltox = 10knto*
m F
L
DC
O 50 -10V<Vo< +10V
Q TA = 25 X 1r
A = 25C
Z 1 6.0
40 <
OC
< z
30
< <
20
E 2.0 ''.
10
100 100
C L LOAD CAPACITANCE
, (pF)
C|_, LOAD CAPACITANCE (pF)
FIGURE 19 PHASE MARGIN versus TEMPERATURE FIGURE 20 GAIN MARGIN versus TEMPERATURE
I
CL =
^
10 pF
60
to
CL = 10 pF
CC
50
o
z
40 C|_ - luupi-
< CL = 100 pF
"
< 30 = +15 V
F
v X= +15V V EE = -15V
20
:e= -i5v KL= 10 kH to =c
= 10 kn -10\/<V < -M0V-,
"10V<V < +10 V
<
25 50 75 10K 100K
T A AMBIENT TEMPERATURE |C)
,
f, FREQUENCY (Hz)
1.0K
-25 25 50 75 10
f, FREQUENCY (Hz
TA < AMBIENT TEMPERATURE (C)
Q
S 1
a:
O
- TA = 25C
^ 1.0
125C
o -5 JC
Vr C = + 5V1
vE : = -15V
H np
Ta = 25C
"l
0.7
vo = OV
10K 100K 5.0 10 15
f, FREQUENCY (Hz)
V CG IVEEl. SUPPLY VOLTAGE (VOLTS)
Vcc = + 15 v
I
V EE = -15 V I
RL = 10 ka I
Av = +1-0 1
TA = 25C 1
_v cc - +
-V EE = -1
-T A = + 25
1 1 1 1
Vcc = +15V
V E e = -15 V
R L = 10 kH
A V = +1.0
TA = 25C
ti
*
Hi
t, TIME (0.5 fislDN)
VIDEO AMPLIFIER
SILICON MONOLITHIC
DIFFERENTIAL TWO STAGE VIDEO AMPLIFIER INTEGRATED CIRCUIT
90 MHz Bandwidth
D SUFFIX
N SUFFIX PLASTIC PACKAGE
PLASTIC PACKAGE CSE 751A
CIRCUIT SCHEMATIC CASE 646 (SO-14)
PIN CONNECTIONS
1.1k >1.1 k
2.4 k >2.4 k > 10 k ,
<
Input 2 O-
Input 1 O [ HJ 7 k
G1aO o
G1 BO_
G2,
G2 B 0-
(Top View)
ORDERING INFORMATION
600 ^600 <1.4 k 400 > 400 Device Temperature Range Package
NE592D SO-14
NE592N to 70C PlasticDIP
NE592H Metal Can
SE592H -55 to +125C Metal Can
NE592, SE592
Output Current lo 10 mA
Operating Ambient Temperature Range TA
SE592 -55 to +125 C
NE592 to +70
Operating Junction Temperature Range Tj C
Metal and Ceramic Packages 175
Plastic Package 150
Storage Temperature Range T stg C
Metal and Ceramic Packagee -65 to +150
Plastic Package -55 to +125
SE592 NE592
Characteristic Symbol Min Typ Max Min Typ Max Units
ELECTRICAL CHARACTERISTICS T A = Thigh to T| ow unless otherwise noted* (v CC = +6.0 Vdc, V EE = -6.0 Vdc, V CM = 0)
SE592 NE592
Characteristic Symbol Min Typ Max Min Typ Max Units
Differential Voltage Gain - Figure 3 A vd V/V
(R|_ = 2 kn,e out = 3 Vp-p)
(Gain 1, Note 1) 200 - 600 250 - 600
(Gain 2, Note 2) 80 120 80 120
Input Resistance (Gain 2)
"in 8.0 - - 8.0 - - kn
Input Offset Current (Gain 3) - Figure 2 - - - -
liiol 5.0 6.0 ma
Input Bias Current (Gain 3) - Figure 2 - - - -
"IB 40 40 ma
Input Voltage Flange (Gain 2) - Figure 3 Vin 1.0 - - 1.0 - _ V
Common-Mode Rejection Ratio- Figure 3 CMRR 50 ~ - 50 - - dB
(Gain 2, V CM = 1 V, f < 100 kHz)
O 6.0 V Battery
330
-^AAr- HP 3400A
or Equiv.
x
Gain 1
Gain 2 ,
FIGURE 2
0.2 mF
0.2 mF
51 S <S1
Ik > 1 k
450
\
375
300
225
150
75
n n
5.0 10 20 30 50 100 200 300
I.O 2.0 3.0 5.0 10 20 30 50 100 200 300
I I
4-4
I
I I
1.0
1.0
!
i
II
I
i i i I
i
=l '
VCE'VEE - so.u v .
f= 100 kHz
T = 25C
A
Vs = 6.0 V T A = 25C
-6.0 V
FOR FREQUENCY f, 1/2 jr (32) C
A d Vl
n = 1.4 10*C
dt
ULTRA-LOW NOISE
ULTRA-LOW NOISE PRECISION, HIGH SPEED PRECISION, HIGH SPEED
OPERATIONAL AMPLIFIER OPERATIONAL AMPLIFIER
The OP-27 series of monolithic operational amplifiers combine SILICON MONOLITHIC
low-noise, precision dc performance and high bandwidth in one INTEGRATED CIRCUIT
device. Advanced Bipolar processing and innovative design tech-
niques are used to produce this low noise precision operational
amplifier. This device is trimmed for extremely low initial input
offset voltage by utilizing a highly stable and reliable zener zap
technique during factory testing which yields guaranteed V|Q lim-
its as tight as 25 /u,V. A unique input bias current cancellation
PIN CONNECTIONS
Noninvt Input [3
VeeE
^ Output
jOn.c.
ORDERING INFORMATION
Device (Top View)
Temperature
Slew Rate V| 60 M V V| 100 (iV Range Package
OP-27BZ OP-27CZ -55 to +125X Ceramic DIP
s= 1.7 V/^s OP-27FZ OP-27GZ -25 to +85C Ceramic DIP
OP-27FP OP-27GP to + 70C Plastic DIP
OP-27
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage + 22 V
vcc
VEE -22
Input Voltage Range (Note 1) V|DR 22 V
Differential Input Voltage (Note 2)
V|D 0.7 V
Differential Input Current (Note 2)
'ID 25 mA
Output Short-Circuit Duration ts Indefinite
OP-27B/F/FP OP-27C/G/GP
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage V|0 20 60 30 100 Mv
Long Term Input Offset Voltage Stability (Note 3) v, /t 0.3 1.5 0.4 2.0 (iV/itio
Input Offset Current
llO
9.0 50 _ 12 75 nA
Input Bias Current l|B 12 55 _ 15 80 nA
Input Noise Voltage 0.1 to 10 Hz (Note 4) e np-p 0.08 0.18 0.09 0.25 mV p p
.
Vo = 0, = l
NOTES (continued):
3. Long term input offset voltage stability for the OP-27 series, refers to the average trend line of V|Q versus time over extended periods after the
first 30 days of operation. Excluding the first hour of operation, changes in V|0 during the first 30 days are typically 2.5 (iV.
4. Sample tested.
OP-27B OP-27C
Characteristic Symbol Min Typ Max Min Typ Max Unit
OP-27F/FP OP-27G/GP
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage V|0 40 140 55 220 mV
Average Input Offset Drift (Note 6) TCVio 0.3 1.3 0.4 1.8 ixvrc
Input Offset Current
ho 14 85 20 135 nA
Input Bias Current
'IB
18 95 25 150 nA
Input Voltage Range V|R 10.5 11.8 10.5 11.8 V
Common Mode Rejection Ratio CMRR 102 121 - 96 118 - dB
V CM = 10V
Power Supply Rejection Ratio PSRR 96 114 - 90 114 - dB
VCC/VEE = 4.5 V to 18 V
Large-Signal Voltage Gain
AVOL 700 1300 - 450 1000 - V/mV
R|_s2.0ka Vo = 10V
Output Voltage Swing vo 11.4 13.5 11 13.3 V
R|_ & 2.0 kfi
t T v cc
Output
TYPICAL CHARACTERISTICS
FIGURE 1 VOLTAGE NOISE TESTER GAIN FIGURE 2 VOLTAGE NOISE TEST CIRCUIT
versus FREQUENCY (0.1 Hz-TO-10 Hz)
o Scope
R in = 1.0 Mil
Voltage Gain
= 50,000
10 I
I I
I I 1
u
-- Ta ==
+25C
'-
-- Vrr = +15V
> = -15V
> 5.0
VFF
4.0
o >
3 3.0
1/f Corner = 2.7 Hz
> 2.0
FIGURE 5 TOTAL NOISE versus SOURCE RESISTANCE FIGURE 6 VOLTAGE NOISE versus TEMPERATURE
1
vee = -15 V
10 r i^-
.0 kHz
3.0
RS ,
SOURCE RESISTANCE (ill T A TEMPERATURE
,
(C)
FIGURE 7 VOLTAGE NOISE versus SUPPLY VOLTAGE FIGURE 8 CURRENT NOISE versus FREQUENCY
TA = + 25C
be 4.1
> 1
10 Hz
1.0 kHz
5.0 10 15 20 25 30 35 40
V CC + IVeeI. SUPPLY VOLTAGE (V)
FIGURE 9 - SUPPLY CURRENT versus SUPPLY VOLTAGE FIGURE 10 - INPUT BIAS CURRENT versus TEMPERATURE
< OP-27C V CC = + 15 V
;r 30 V EE
z OP-27EJ \ "
ID
*5 20
OP-27A
V
X
m
l
s. <;
<= 10
FIGURE 11 INPUT OFFSET CURRENT versus TEMPERATURE FIGURE 12 COMMON MODE INPUT RANGE
versus SUPPLY VOLTAGE
VCC = +1E V
v\ V EE = -15
\OP-27
OP-27B\
OP-27A N^
__
-
n
-5 -2 5 C 25 5 75 1C 125
TA TEMPERATURE
,
FIGURE 13 OPEN LOOP VOLTAGE GAIN FIGURE 14 OPEN LOOP VOLTAGE GAIN
versus SUPPLY VOLTAGE versus LOAD RESISTANCE
lb
1
> 2.2
TA = 25C Rl = 2.0 k a.
TA = 25C
S. 2.0
2.0 Vcc = + 15 V *""
L8 - V EE
1
l.b
-R L = 10k- o 1.6
1.4
1.0 1
o 1.2 /
5 10 /
f
0.5
o 0.8
I
I
| 0.6
n 0.4
2 3 40 50 1.0 10
1
m
o 140
TA = 25C
cc 120
p asitiv e z
o
s wing
10
fc
^Negative
tec ati Ye
= 80
Sv /in 3
Posi ive
=5 60
Sup
)ly
J^-
TA =
Vcc = + 15 v
V EE - -15 V
1 1
25C
1
o
CO
O-
^S_
X ^^
B
01 1.0 10 .0 1 10 2 10 3 10* 10 5 10 6 10 7 10
-Ta = 25C
Vcc = +15V
V EE = -15 V
C
\ = 1 V
\A
100 1 OK 10 K 10 DK 1 M 10 3 10 4 10 5
(3) Sudden motion in the vicinity of the device can the op amp and the source resistance of the generator.
also "feed-through" to increase the observed noise. With Rp s= 500 ft, the output is capable of handling the
current requirements (l|_ 20 mA at 10 V) and the ampli-
(4) The test time to measure 0.1 Hz to 10 Hz noise
fier stays in its active mode and a smooth transition will
should not exceed 10 sec. As shown in the noise
occur.
tester frequency response curve (Figure 1) the 0.1
As with operational amplifiers when Rp > 2.0 kft,
all
Hz corner is defined by only one zero. The test time
a pole will be created with Rp and the amplifier's input
of 1 sec acts as an additional zero to eliminate noise
capacitance (8.0 pF), creating additional phase shift and
contributions from the frequency band below 0.1
reducing the phase margin. A small capacitor (20 to 50
Hz.
pF) in parallel with Rp will eliminate this problem.
is recommended when
A noise-voltage density test FIGURE 23 PULSED OPERATION
measuring noise on a large number of units. A 10 Hz
noise-voltage density measurement will correlate well
with a 0.1 Hz-to-10 Hz peak-to-peak noise reading since
both results are determined by the white noise and the
location of the 1/f corner frequency.
large signal pulse (> 1.0 V), the output waveform will
Advance Information
DUAL POWER
OPERATIONAL AMPLIFIER
SILICON MONOLITHIC
DUAL POWER OPERATIONAL AMPLIFIER INTEGRATED CIRCUIT
The TCA0372 is a monolithic circuit intended for use as a
power
operational amplifier in a wide range of applications,
including
servo amplifiers and power supplies. No deadband
crossover dis-
tortion provides better performance for driving coils.
Output Current to 1.0 A
Slew Rate of 1.3 V/>s
Wide Bandwidth of 1.1 MHz
<**m
rKmrn.pi|Y I
DP2 SUFFIX
PLASTIC PACKAGE
CASE 648
Internal Thermal Shutdown
Single or Split Supply Operation
Excellent Gain and Phase Margins
Common Mode Input Includes
Zero Deadband Crossover Distortion
Ground
1
DP1 SUFFIX
PLASTIC PACKAGE
CASE 626
^
HrWvvll
PIN CONNECTIONS
(Top View)
vcc[Z "Ti]Gnd
Output B [T" 1
Jf]Gnd
V EE /Gnd[T /\ TsTjGnd
TF]Gnd
SIMPLIFIED BLOCK DIAGRAM Inputs B
LZ
LZ
-"A 77] Grid
lOjGnd
Inputs A
{ CI 9 iGnd
(Top View)
Output A f"T"
[-Inputs A
vccEZ
Output B (~_3~_
-| ^+\ U ^1
Inputs B
V EE /Gnd [T 3/
ORDERING INFORMATION
Operating Junction
Device Temperature Range Package
TCA0372DP1 Tj = -40Cto Plastic DIP
TCA0372DP2 + 125C Plastic DIP
This document contains information on a new product. Specifications and information herein are
subject to change without notice.
2-356
TCA0372
MAXIMUM RATINGS
Rating Symbol Value Unit
= 10 dB
Common Mode Rejection Ratio (Rg k)
NOTES:
1. Either or both input voltages must not exceed the magnitude of Vcc or V EE-
Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded.
2.
3. T, ow = -40X T h ig h = +125 C
O E2
2 (Vi - ^) + |R (
10 k
10 k
10 k
THERMAL INFORMATION This must be greater than the sum of the products of
The maximum power consumption an integrated cir- the supply voltages and supply currents at the worst
cuit can tolerate at a given operating ambient temper- case operating condition.
ature, can be found from the equation:
TJ(max) = Maximum operating junction temperature
TJ(max) ~ Ta as listed in the maximum ratings section.
PD(TA) =
Raja (typ) Ta = Maximum desired operating ambient
temperature.
Where: Pd(TA) = Power dissipation allowable at a R JA<typ) = Typical thermal resistance junction to
given operating ambient temperature.
ambient.
TL061
MOTOROLA
SEMICONDUCTOR TL062
TECHNICAL DATA TL064
LOW POWER
JFET INPUT
OPERATIONAL AMPLIFIERS
puts 2
ORDERING INFORMATION
Tested N SUFFIX J SUFFIX
Op Amp CERAMIC PACKAGE
Device Temperature Range Package PLASTIC PACKAGE
Function
CASE 646 CASE 632
TL061CD, ACD SO-8
Oto +70C
TL061CP, ACP Plastic DIP
D SUFFIX
Single TL061VD
TL061VP
TL061MJG
-40
-55
to
to
+85C
+ 125C
SO-8
Plastic DIP
Ceramic DIP
'^ PLASTIC PACKAGE
CASE 751
(SO-14)
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (from Vqc to Vgg) vs + 36 V
Input Differential Voltage Range (Note V IDR
1) 30 V
Input Voltage Range (Notes and
1 2) V|R 15 V
Output Short-Circuit Duration (Note 3) ts Indefinite Seconds
Operating Junction Temperature (Note 3) Tj C
Ceramic Package
+ 160
Plastic Package
+ 150
Storage Temperature Range T stg c
Ceramic Package - 65 to + 1 60
Plastic Package
-60 to +150
1. Differential voltages are at the noninverting input terminal with respect to the
inverting input terminal.
2. The magnitude of the input voltage
must never exceed the magnitude of the supply or 15 volts, whichever is less.
3. Power dissipation must be considered to ensure maximum
junction temperature (Tj) is not exceeded. (See Figure 1.
OVCc
Inputs
f W\ f Vv\O Output
D1
ov EE
1.5 kU
-^/v\ O V EE
2-360
TL061,TL062,TL064
(RS = 50 a
Vo = V)
Input Offset Current (Vcm = V, Vo = V) ho
-
Ta = 25C
- 0.5 100 0.5 200 PA
2.0 2.0 nA
Ta = 0C to +70C
M = V = V) l|B
Input Bias Current (V C V,
- 3.0 200 - 3.0 200 PA
Ta = 25C 10 nA
7.0
Ta = 0Cto + 70C
+ 14.5 + 11.5 + 14.5 + 11 V
Input Common Mode Voltage Range V|CR
-11.5 -12 -11 -12
Ta = 25C
V/mV
Large Signal Voltage Gain (Rl = 10 kfl, Vo = 10 V) AVOL
-
T A = 25C 4.0 58 - 3.0 58
4.0 3.0
Ta = 0C to +70C
V
Output Voltage Swing (Rl = 10 kH, V|Q = 10 V)
V + + 10 + 14 + 10 + 14
T A = 25C
v - -14 -10 -14 -10
v + + 10 + 10
Ta = 0Cto + 70C - -10
v -10
. -
Total Power Dissipation (each amplifier) Pd 6.0 7.5 " 6.0 7.5 mW
(No Load, V = V, TA = 25C)
TL061M,V
TL062M.V TL064M,V
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (Rg = 50 O, Vq = V) VlO mV
TA = 25C - 3.0 6.0 - 3.0 9.0
T A = T| 0W T n qn to j
9.0 15
Average Temperature Coefficient of Offset Voltage AV| /AT vvrc
(Rs = 50 n, V = V)
10 10
Input Offset Current (Vcm = =
V, Vo V) iio
TA = 25C - 5.0 100 - 5.0 100 PA
TA = T| 0W to Thigh 20 20 nA
Input Bias Current (Vcm = V, Vq = V)
'IB
TA = 25C - 30 200 - 30 200 PA
T A = T| 0W to T niah
50 50 nA
Input Common Mode Voltage Range (TA = 25C) V ICR + 14.5 + 11.5 + 14.5 + 11.5 V
-11.5 -12 -11.5 -12
Large Signal Voltage Gain = 10 Ml, Vq = +10
(R[_ V) A VOL VmV
T A = 25C -
TA =
4.0 58 4.0 58 -
T| 0W to Thigh 4.0 4.0
Output Voltage Swing (R L = 10 Ml, V| D = 1.0 V)
TA = 25C V
V + + 10 + 14 + 10 -14
v - -14 -10 -14 -10
TA = T| 0W to Thigh V + + 10 -1-10
v - - 10 - 10
Common Mode Rejection CMR dB
(RS = 50 n, Vcm = V|cr min, Vq = V, TA = 25C) 80 84 80 84
Power Supply Rejection PSR dB
(Rs = 50 n, v C m = o v, v = o v, t a = 25o 80 86 80 86
Power Supply Current (each Amplifier)
ID /J.A
(No Load, Vq = V, T A = 25C)
200 250 200 250
Total Power Dissipation (each Amplifier)
(No Load, V = V, TA = 25C)
Pd
mW
6.0 7.5 6.0 7.5
Note 4. TL06XM ow = -55C T hiqh = + 125C
T|
TL06XV T, ow = -40C T higah = +85C
2-362
TL061, TL062, TL064
ib RL = 10 kO
"
TA = 25C
z
w 25
C3
i2! 20
o
t- 15
lu
d
-?
> en
5.0
4 6 8.0 10 12 14 16
3 2
-55-40-20 20 40 60 80 100 120 140
AMBIENT TEMPERATURE lC) VfJC. IVeeL supply VOLTAGE (VOLTS)
TA ,
Vcc = +15V.
= -15 V
V EE
rl = io kn -
ol_ 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10
-75 25 25 50 75
RL , LOAD RESISTANCE (kill
TA ,
AMBIENT TEMPERATURE CO
35
II I I
>
100
Cc
r
= + 15
r
v
II I III I I RL = 10 kil E
> 70
V EE = -15 V
30 -Vcc = +15V,Vee - -15V- TA = 25C"""
z RL = 10 ka
<
2b
III I Mill II I
2 so
V Cc = +12V,V EE = -12 V <s>
Sj 40
20 o
30
^
z
1b S3
r n 2
IU V'CC -<-3.u v, v fct -J.U
\,
V B.
II! I I I II I II
3
Vcc = + 2.5 V, V EE = - 2.5 V o
<>
b.U
III I I III I II I 10
75 30 12
1 00 1.0K 10K 00K 1.0M 0M 75 - 50 25 3 25 E 1
200
<
.4
z 150
cc
cc
o
i 100
a.
.
=
" 50 TA
Vq =
25 C
V
_R L = -<7
I | I
^
versus TEMPERATURE
. TL064 -
_ 200 -V C c= +15V.
Vg = 15 V
"
Vo = V
.Rl = *n
.TL062.
V CC = +15V-
V EE = -15 V "TL06T
Vo =
Rl = *
V
n
-75 -50 -25 25 50 75 100 125 -75 -50 -25 25 50 75 100 125
TA AMBIENT TEMPERATURE (C)
,
TA AMBIENT TEMPERATURE
, (C)
vcc =
1
V CC = + 15 V +15V
Vee = -15 V 3j 120
-V EE = -15V
V =
Rl = 10
V
kn
o
v CM = ov
AVcm = 1.5 V AV CM J~]ad^> oAV JIH
o 10
T l\
= C
1
CMR = 20Log(^ X ArJ fill
O f 1 1
^ 60 mill |
o
J^
l
-1-
8 82 o
o
40
1
1
E 81 I 20 1
2-364
TL061,TL062, TL064
25 25 bU 75
10K
FREQUENCY (Hz)
T A AMBIENT TEMPERATURE
,
TO
f,
1.0K 10K
25 50 75
f, FREQUENCY IHzl
T A AMBIENT TEMPERATURE
,
(C)
O Output
100 kn
Input B OVW-
G VCC
1.0 mF
Input O 1(-
Output B
2tt R f Cp
100 M F
Output C
2-366
TL071
MOTOROLA
SEMICONDUCTOR TL072
TECHNICAL DATA TL074
N SUFFIX J SUFFIX
PLASTIC PACKAGE CERAMIC PACKAGE
CASE 646 CASE 632
(TL074 Only) (TL074 Only)
ORDERING INFORMATION
Temperature TL074 (Top View)
Op Amp
Function Device Range Package
SO-8
Out 1 d S Out 4
TL071ACD, CD I
3 Inputs 4
Single TL071ACJG, CJG
TL071ACP, CP
Oto +70C Ceramic DIP
Plastic DIP
Inputs
VccE
1
n.
p}^ ill
3VEE
,
TL072ACD, CD SO-8 +
+
3 Out 3
MAXIMUM RATINGS
TL07_C
Rating Symbol TL07 AC Unit
Supply Voltage
vcc + 18 V
VEE -18
Differential Input Voltage
V|D 30 V
Input Voltage Range (Note 1) V|DR 15 V
Output Short-Circuit Duration
ts Continuous
(Note 2)
Power Dissipation
Plastic Package (N, P) PD 680 mW
Ta = +47C
Derate above
1/0JA 10 mW/C
Ceramic Package (J, JG)
Derate above Ta = + 82C
PD 680 mW
1/0JA 10 mW/C
Operating Ambient Temperature ta to +70 C
Range
Storage Temperature Range T stg -65 to +150 C
NOTES: 1. The magnitude of the input voltage must not exceed the magnitude
of the supply voltage or 15 volts, whichever is less
2. The oil put may be shorted to ground or either supply. Temperature
and/or supply voltages must be limited to ensure that
dissipation ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (V CC = + 15 V, VE f
TL07_C
TL07_AC
Characteristic Symbol Min Typ Max Unit
Input Offset Voltage (Rg =s 10 k, VC m = 0)
TL071,TL072
VlO mV
3.0 10
TL074 - 3.0 10
TL07 A
3.0 6.0
Average Temperature Coefficient
Input Offset Voltage
of AV|Q/AT 10 tivrc
RS = 50 a, T A = T| 0W to T high (Note 3)
TL07_C
TL07_AC
tr
0.1 /MS
Rise Time (See Figure 1)
10 %
Overshoot Factor
V in = 20 mV, R|_ = 2.0 k, C|_ = 100 pF
R S = 100 , f = 1000 Hz
RL s 2.0 k, f = 1000 Hz
Channel Separation
120 dB
Ay = 100
TL07_C
TL07_AC
k, Vcm = 0) VlO
mV
10
Input Offset Voltage (Rs
TL071,TL072
- - 13
13
TL074
7.5
TL07_A
nA
(Vcm = Note ho
Input Offset Current > (
TL07_
4)
- - 2.0
2.0
TL07_A
nA
Input Bias Current (Vcm = > < Note 4 >
l|B
- - 7.0
TL07_
7.0
TL07 A
AVOL V/mV
Large-Signal Voltage Gain (Vo = 10 Rl * 2.0 k)
TL07_
V,
15 -
TL07 A 25
vo V
Output Voltage Swing (Peak-to-Peak)
24
(R|_ 10 k)
20 =
J
(R L s= 2.0 k)
NOTES (continued):
3. T| ow = 0CforTL071C, TL071AC Thiqh = +70CforTL071C, TL071AC
TL072C, TL072AC TL072C, TL072AC
TL074C, TL074AC TL074C, TL074AC
for every 1CTC rise in Junction Temperature as shown
in Figure 3. To maintain
4 Input Bias currents of JFET input op amps approximately double
pulse techniques must be used during testing.
Junction Temperature as close to Ambient Temperature as possible,
TEST CIRCUITS
FIGURE 1 - UNITY GAIN VOLTAGE FOLLOWER FIGURE 2 - INVERTING GAIN OF 10 AMPLIFIER
10 k
<O Vq
;k C(_ = 100 pF
Vr
i
z
a:
cc
o
<g1.0
m
t
j 0.1
0.01
_Rl ==
2.0 k
'A = 25C
=
30
?n
in
S. 35
I
cc/v EE =
See
I
15V
Fig ure2
2.0
1R
V C c/V EE = 15V
/R L = 10 k
o
z:
30 1fi
'
14
25
XN RL
"T
= 2.0 k 1?
g 20
o 10
08
3 10 Ofi
6
=*
04
50
0?
-25 25 50 75
-25 25 50 75
Ta. AMBIENT TEMPERATURE (C) 100 125
TA AMBIENT TEMPERATURE
, (C)
^^
1000
= Vcc/vee
Vo
= 15V
= iov
vcc /V EE = 15V .! = 2.0 k
106 -R L =
? E
x TA = 25C > 100
D .
z
10&
% <
en
z 104
0
t
.Gain
CO
J103 >
o < 10
90 ^
5"
101
1
Phase Shift
|
\
A 135
1.0
I lllllll
VCC^EE + 15Vdc
1.15 = 10
100 n
<
I.I0 - T, = 25C
g 1.05
8 40
o
z
00
2 1 '
30
I
z
<0.95
z 20
z 0.90
<
10 T
0.85
i _
0.05 0.1 0.5 1.0 5.0 10 50 100
-25 25 50 75 100 125
CO FREQUENCY (kHz)
T A AMBIENT TEMPERATURE
,
,
-I- 4E=- :
=
TTTTTT ~T --
[-pf-
-^ I 1
^ 0.5
T
f3
JVqcA/ee L.
- - <-j *<
-i
GC
"Av = 1.0
i 0.05
:T A _ ALU
s
<:
5 0.01 = == ===== =
0.005
j ._.
1.0 5.0
f, FREQUENCY (kHz)
Output
* *-
Bias Circuitry
Common to All
Amplifiers
1.0 jtF
Input o 1(
f wv
-O Output
JFET INPUT
OPERATIONAL AMPLIFIERS
SILICON MONOLITHIC
INTEGRATED CIRCUITS
JFET INPUT OPERATIONAL AMPLIFIERS
These low-cost JFET input operational amplifiers
combine two
state-of-the-art linear technologies on a single monolithic inte-
grated circuit. Each internally compensated
operational amplifier
has well matched high voltage JFET input
devices for low input
offset voltage. The BIFET technology
provides wide bandwidths
and fast slew rates with low input bias currents,
input offset cur-
rents, and supply currents.
P SUFFIX JG SUFFIX
These devices are available in single, dual and
quad operational PLASTIC PACKAGE CERAMIC PACKAGE
amplifiers which are pin-compatible with
the industry standard CASE 626 CASE 693
MC1741, MC1458, and the MC3403/LM324 bipolar
products. De-
vices with an "M" suffix are specified D SUFFIX
over the military operating PLASTIC PACKAGE
temperature range of -55C to + 125C and those
with a "C" CASE 751
suffix are specified from 0C to +
70C. (SO-8)
Input Offset Voltage Options of 6.0, and 15 mV Max Offset Null rr 3NC
Low Input Bias Current 30 pA lnv+ Input E-^\ av cc
Low Input Offset Current 5.0 pA Noninvt Input E 3 Output
Wide Gain Bandwidth 4.0 MHz VE E E .
3 Offset Null
lnputs 0utputB
Industry Standard Pinouts M!S[^3, Inputs B -
TL082
(Top View)
MAXIMUM RATINGS
TL08_C
Rating Symbol TL08_M TL08_AC Unit
v Cc + 18 + 18 V
Supply Voltage
VEE -18 -18
V|D 30 30 V
Differential Input Voltage
Power Dissipation
Plastic Package (N, P) PD 680 mW
Derate above T^ = +47C 1/sja 10 mW/C
Ceramic Package (J, JG) PD 680 680 mW
Derate above T^ = +82C 1/flJA 10 10 mW/C
Range
Storage Temperature Range T stg -65 to +150 -65 to +150 C
2.
PA
Input Offset Current (Vcm = 0) (Note 4) iio
- - 5.0 200
TL08_ 5.0 100
5.0 100
TL08_A
Note 4
PA
Input Bias Current (Vcm = 'IB
-
) '
TL08_
'
- 30 200 30 400
30 200
TL08_A
1012 - 1012 ft
Input Resistance n
V
Common Mode Input Voltage Range V|CR
TL08_ 11 + 15,-12 - 10 + 15,-12
11 + 15,-12
TL08 A
V/mV
Large-Signal Voltage Gain AVOL
TL08_ 25 150 - 25 150
(Vo = 10 V, Rl 5= 2.0 k)
50 150
TL08 A
vo 24 28 24 28 V
Output Voltage Swing (Peak-to-Peak)
(R|_ = 10 k)
CMRR dB
Common Mode 10
Rejection Ratio (Rs k)
80 100 - 70 100
TL08_
TL08_A 80 100 _
PSRR dB
Supply Voltage Rejection Ratio (Rs * 10 k)
- -
80 100 70 100
TL08_
80 100
TL08 A
ID
1.4 2.8 - 1.4 2.8 mA
Supply Current (Each Amplifier)
BW - 4.0 4.0 MHz
Unity Gain Bandwidth
|
I
^ _^J^2 tt ly v, i
A - + ^o u un less oth erwise n oted)
TL08_C
V in = 10 V, R L = 2.0 k, C = 100 pF
SR 8.0 13 - - 13 V//is
L
Rise Time (See Figure 1)
tr - 0.1 0.1 flS
Overshoot Factor 10 - -
Vj n = 20 mV, R
L = 2.0 k, C L = 100 pF
10 %
Equivalent Input Noise Voltage
en 25 - - 25 - nV/VRI
RS = 100 n, f = 1000 Hz
Channel Separation 120 - 120 -
AV = 100 dB
TL08_C
TL08_M TL08_AC
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (R
s 10 k, Vcm = 0) VlO
TL081.TL082 - mV
9.0 20
TL084 - 15 20
TL08 A
7.5
Input Offset Current (V =
C m 0) (Note 4) iio
- nA
TL08_ - 20 - - 5.0
TL08 A
3.0
Input Bias Current (V =
CM 0) (Note 4)
'IB
nA
TL08_ - - 50 - - 10
TL08 A
7.0
Large-Signal Voltage Gain (Vq = 10 V, R &
L 2.0 k) A VOL
V/mV
TL08_ 15 - - 15 - -
TL08 A 25
Output Voltage Swing (Peak-to-Peak)
vo V
(R|_ * 10 - -
(RL *
k)
2.0 k)
24 24 - -
20 20
NOTES (continued): L L I
OW " "J 5
'
TL081M TL082M, TL084M
r
< T high = + 125C for TL081M, TL082M, TL084M
= C for TL081C,TL081AC = +70X for TL081C. TL081AC
TL082C, TL082AC
TL082a TL082AC
TL084C, TL084AC
TL084a TL084AC
4. Input Bias currents of JFET
op amps approximately double for every 10X rise in
input
Junction Temperature as shown t
Junction Temperature as close ,0 ambient
temperatures as possible, pulse techniques must
"uSduring^.
in Fin,
, m " n,a,n
TEST CIRCUITS
FIGURE 1 UNITY GAIN VOLTAGE FIGURE 2 INVERTING GAIN OF 10
FOLLOWER
AMPLIFIER
100
<
- 10
i
cc
10
3
oo '.
=5
Z
g0.1
0.01
10 k 100 k
-50 -25 25 50 75 100 125
TA = 25C
vcc/Vpf= +15 J
SO
TA = 25C 30
2U
20
IU
1
IU
b.U
n
5.0 10 15
0.2 0.4 0.7 1.0 2.0 4.0 7.0 10
2.0
1 1 vcc/vee= 15V
Vcc/Vff = +-15V 1.8
S. 35
See jre2
/Rl =
> in
Fig 10 k
% 1.6
o 30
2 1 - 4
3 ,c DC
v> 25
V- 2.0 k o
1.2
H; 20
o
>
cc
0.8
lb
E |0.6
^
>6
lu
5.0
> 0.2
vcc /V EE = 15V
106
-R L =
TA = 25C
1f5
in*
.Gain
o t
103
10 ?
mi
Phase Shift \ v^N \
1
.0 10
s\
1 1 )
1.0 k 10 k 10 k 1.0 M 10 M -25 25 50 75
, FREQUE NCY (Hz) TA AMBIENT TEMPERATURE (C)
,
1.15
1.10
$1.05
CO
1.00
Ed
< 0.95
0.90
0.85
-50 -25 25 50 75 100 125 0.05 0.1 0.5 1.0 5.0 10 50 100
TA AMBIENT TEMPERATURE
, (C)
f, FREQUENCY (kHz)
0.5
-V cc Vff = +1 5V
AV = 1.0
01
:TA = 25
005
Tf
0.01
0.005
"
1
P- IL
0.001
0.5 1.0
T~ 44-
5.0 50 100
f, FREQUENCY (kHz)
Offset
Null I 1.5 k
(TL081
only)
TYPICAL APPLICATIONS
Theoretical Vo
Vref , TA1 A2 A3 A4 A5 A6^ A7 A8]
+ + + + + +
[T + T T
,
V = -j <R >
^6 32 64 T28 256j
V
2.0 V [1111111 + + + + +
1 ]
= J^ <5-0 k) I
2 +i+8 T6 32 64 T28 256j
= 10 V = 9.961 V
'[!]
-O V ut
Reset
o-cr^o- 'Polycarbonate or
Polystyrene Capacitor
+ 2.0 V
R5 < 'Polycarbonate or
-2.0 V J
- Polystyrene Capacitor Overshoot < 10%
t s = 10 (is
Time (t)= R4 Cn (V R /V R - V,), R = R R = 0.1 R6 When
3 4 5, driving large C L the V out slew
, rate is determined by Cl
If R1 = R2: t = 0.693
R4C and 'out(max)-'
Design Example: 100 Second Timer
V R = 10V C = 1.0 M F R3 = R4=144M AVput _ lout 0.02
R6 = 20 k R5 = 2.0 k ~~
3 % ,
v/^ s = 004 V/MS (with Ci shown)
R1 = R2 = 1.0 k At "c[" IqT
R1
v inO VW
Olout
R5
Selector Guide
In Brief . .
Linear Voltage Regulators 3-2
Fixed Output
These low cost monolithic circuits provide positive and/or Although designed primarily as fixed voltage regulators,
negative regulation at currents from 100 mA to 3.0 A.
They these devices can be used with external components
to ob-
are ideal for on-card regulation employing current
limiting and tain adjustable voltages and currents.
thermal shutdown. Low Vdi ff devices are offered for battery
powered systems.
"0
AVq/AT
Vout Tol.t mA Device Device v in R egiine R egioad
Volts mV/C Package
Volts Max Positive Output Negative Output mV
Min/Max mV Typ Suffix
5.0 0.5 100 LM2931-5.0 - 5.6/40 30 50 1.0 Z, T
MC78L05C MC79L05C 6.7/30 200 60 P, G
0.25 LM2931A-5.0 - 5.6/40 30 50 Z, T
MC78L05AC MC79L05AC 6.7/30 150 60 P, G
500 MC78M05C MC79M05C 7.0/35 100 100 G, T
0.5 750,10 LM2935 - 5.6/26 30 50 T/314D
0.4 1500 LM109 7.0/35 100 100 1.1 K, H
LM209 50 1.0
0.25 LM309
0.35 MC7805* 8.0/35 0.6 K
0.25 MC7805B# - 100 1.0 T
MC7805C MC7905C 7.0/35
K, T
0.2 MC7805A* - 7.5/35 10 50 0.6 K
MC7805AC MC7905AC 100 K, T
0.25 LM 140-5* 7.0/35 50 50 K
0.2 LM140A-5* 10 25
0.25 LM340-5 50 50 K, T
0.2 LM340A-5 - 10 25
0.1 TL780-05C - 0.06 KC
0.25 3000 MC78T05C 7.3/35 25 30 0.1 K, T
0.2 MC78T05AC 10 25
#Tj = -A 0to +125 C tOutp ut Voltage Tolerance f jr Worst Case *Tj = -55 to +15 oc (continued)
3-2
Fixed Output Voltage Regulators (continued)
AVq/AT
o mV/C Package
Vout Tol.t mA Device Device Vin R*9line R9load
Volts Volts Max Positive Output Negative Output Min/Max mV mV Typ Suffix
LM223 -
0.25 LM323 T
0.2 LM123A 15 50 K
LM223A
LM323A - T
MC7906C 8.0/35 K, T
MC7806C
0.24 MC7806AC 8.6/35 11 100 T
LM340-6 - K,T
MC78L08AC 175
LM340-8 K,T
MC7812AC 100 T
0.5 LM140A-12* 18 32
0.5 LM340A-12 18 32
0.5 MC78T12AC 18 25
0
AVo/AT
Vout Tol.t mA Device Device "aiine R *9load mV/C Package
Volts Volts Max Positive Output Negative Output Min/Max mV mV Typ Suffix
15 1.5 100 MC78L15C MC79L15C 16.7/35 300 150 P, G
0.75 MC78L15AC MC79L15A
500 MC78M15C MC79M15C 17/35 100 300 1.0 G, T
1500 MC7815* - 18.5/35 150 150 1.8 K
MC7815B# 300 300 T
MC7815C MC7915C 17.5/35 K, T
0.6 MC7815A* 17.9/35 22 50 K
MC7815AC - 100 K, T
0.75 LM 140-1 5* - 17.5/35 150 150 K
0.6 LM140A-15* 22 35
0.75 LM340-15 150 150 K, T
0.6 LM340A-15 - 22 35
0.3 TL780-15C 15 60 0.18 KC
0.75 3000 MC78T15C 17.5/40 55 30 0.3 K, T
0.6 MC78T15AC - 22 25
18 1.8 100 MC78L18C MC79L18C 19.7/35 325 170 - P
0.9 MC78L18AC MC79L18AC
500 MC78M18C 20/35 100 360 1.0 G, T
1500 MC7818* - 22/35 180 180 2.3 K
MC7818B# 360 360 T
0.7 MC7818C MC7918C 21/35 K, T
MC7818AC - 31 100 T
0.9 LM340-18 - 180 180
20 1.0 500 MC78M20C - 22/40 10 400 1.1 G, T
24 2.4 100 MC78L24C MC79L24C 25.7/40 350 200 - P
1.2 MC78L24AC MC79L24AC 300
500 MC78M24C 26/40 100 480 1.2 G, T
1500 MC7824* - 28/40 240 240 3.0 K
MC7824B# 480 480 T
MC7824C MC7924C 27/40 K, T
1.0 MC7824AC 27.3/40 36 100 T
1.2
I
LM340-24 240 240
#Tj = -4 0to +125 C tOutp ut Voltage Tolerance ft>r Worst Case *T = -55 to +15 re
j
Motorola offers a broad line of adjustable output volt- ing a wide range of output voltages for industrial and
age regulators with a variety of output current capabil- communications applications. The three-terminal de-
ities. Adjustable voltage regulators provide users the vices require only two external resistors to set the out-
capability of stocking a single integrated circuit provid- put voltage.
Max Device Suffix Min Max Min Max Min 25C 25X Line Load %/C Max Package
LM117L* 0.003
150 MC1723 CP 2.0 37 9.5 40 3.0 1.25 0.1 0.3 0.003 150 646
G 0.002
L
- 0.002
500 LM317M T 1.2 37 5.0 40 3.0 Internally 0.04 0.5 0.0056 125 221A
Limited
1500 LM317 T 1.2 37 5.0 40 3.0 Internally 0.04 0.5 0.006 125 221A
Limited 79. 1
LM317 H, K
LM217# 0.02 0.3 0.004
3000 LM350 T 1.2 33 5.0 36 3.0 Internally 0.03 0.5 0.008 125 221A
Limited 1
LM350 K
0.01 0.3 0.0057 150
LM250#
LM150* 0.0051
Max Min Max Min Max Min 25C 25C Load %/C Max Package
500 LM337M -1.2 5.0 3.0 Internally 0.04 0.0048 125 221A
Limited
1500 LM337 -1.2 5.0 3.0 Internally 1.0 0.0048 125 221
Limited 79,1
LM337
0.5 0.0034 150
LM237#
0.0031
LM137*
#Tj -25 to + 150C *Tj = -55 to +150C
TC
Vout Vin %/C
Volts 'O
Volts PD (T| 0W to
mA Watts R egiine R egioad Thigh) TA
Min Max Max Min Max Device Suffix Max mV mV Typ C Package
14.5 15.5 100 -17 30 MC1468 G 0.8 10 10 3.0 to +75 603C
L 1.0
632
MCI 568 G 0.8 -55 to +125 603C
L 1.0 632
These devices contain the primary building blocks which and are designed to drive many of the standard switching
are required to implement a variety of switching power sup- topologies. The single-ended configurations include buck,
plies. The product offerings fall into three major categories boost, flyback and forward converters. The double-ended
consisting of single-ended and double-ended controllers, plus devices control push-pull, half bridge and full bridge
single-ended ICs with on-chip power switch transistors. configurations.
These circuits operate in voltage, current or resonant modes
Single-Ended Controllers
These single-ended voltage and current mode controllers are designed for use in buck, boost, flyback, a nd forward
converters.They are cost effective in applications that range from 0.1 to 200 watts power output.
Minimum Maximum
to Operating Useful
mA Voltage Range Operating Reference Oscillator TA
Max Volts Mode Volts Freq. (kHz) Device Suffix c Package
250 7.0 to 40 Voltage 5.0 5.0% 200 MC34060 P Oto +70 646
L 632
MC35060 L -55 to +125
500 5.0 1.5% MC34060A D Oto +70 751A
P 646
MC33060A D - 40 to + 85 751A
P 646
MC35060A L -55 to +125 632
1000 4.2 to 12 Current 1.25 2.0% 300 MC34129 D Oto +70 751A
P 646
MC33129 D - 40 to + 85 751A
P 646
Minimum Maximum
Operating Useful
'O
mA Voltage Range Operating Reference Oscillator TA
Max Volts Mode Volts Freq. (kHz) Device Suffix c Package
Double-Ended Controllers
These double-ended voltage and resonant mode controllers are designed for use in
push-pull, half-bridge and full-
bridge converters. They are cost effective in applications that range from
100 to 2000 watts power output.
Minimum Maximum
'O Operating Useful
mA Voltage Range Operating Reference Oscillator ta
Max Volts Mode Volts Freq. (kHz) Device Suffix c Package
7.0 to 40 Voltage 5.05.0%# 200 TL494 CN Oto +70 648
CJ
-25 to +85
620
MJ -55 to+125
5.0 1.5% TL594 Oto +70 648
-25 to+85
MJ -55 to +125 620
8.0 to 40 5.1 2.0% SG3525A to +70 648
3-8
Special Switching Regulator Controllers
Minimum Maximum
o Operating Useful
mA Voltage Range Operating Reference Oscillator TA
Max Volts Mode Volts Freq. (kHz) Device Suffix c Package
P 648
MC33065 DW - 40 to + 85 751 G
P 648
E 2 PROM Programmable Output: 150 peak TCA5600, 6.0 35 -40 2.5 3.2% MPU Reset and 707
24 Volts (Write Mode) TCF5600 to Watchdog Circuit
5.0 Volts (Read Mode) + 75
Minimum Maximum
o Operating Useful
mA Voltage Range Operating Reference Oscillator TA
Max Volts Mode Volts Freq. (kHz) Device Suffix c Package
1500 12.3 to 20 Voltage 4.2 5.0% 100 TDA4601 - -15 to +85 762
A Power Supervisory Circuits are offered. Overvoltage sensing circuits which drive "crowbar" SCR's are
variety of
provided several configurations from a low cost three-terminal version to 8-pin devices
in
which provide pin-program-
mable trip-voltages or additional features such as an indicator output drive and remote
activation capability. An over-
under-voltage protection circuit is also offered.
6 Gnd
Input Section Output Section
The MC34064/MC34164 is a
family of undervoltage sensing
circuits specifically designed for
use as reset controllers in micro-
processor-based systems. They
offer the designer an economical
Input
solution for low voltage detection
with a single external resistor.
Both parts feature a trimmed
bandgap reference, and a com-
parator with precise thresholds
and built-in hysteresis to prevent
erratic reset operation. The
MC34064 has a threshold voltage
of 4.6 V, while the MC34164
threshold is at 4.3 V, and features
a larger hysteresis window. The
open collector reset outputs are Sink Only
capable of sinking excess of 10
in Positive True Logic
mA (MC34064) and 7.0 mA
Pin numbers adjacent to terminals are for the 3 pin TO-92 package.
(MC34164). Operation is guaran-
Pin numbers in parenthesis are for the D suffix SO-8 package.
teeddown to 1.0 volt input with
low standby current. The
MC34164 is specifically designed
for battery powered applications
where low bias current (one/tenth
of the MC34064's) is an important
characteristic.
Applications include direct
monitoring of the 5.0 volt MPU/
logic power supply used in appli-
ance, automotive, consumer, and
industrial equipment.
3-12
POWER SUPPLY CIRCUITS
Power Drivers
Device Function Page
MC33151 High Speed Dual MOSFET Driver 3-266
MC33152 High Speed Dual MOSFET Driver '
3.274
MC33153 High Speed Dual MOSFET Driver "
3.274
MC34151 High Speed Dual MOSFET Driver '
3.266
MC34152 High Speed Dual MOSFET Driver '
3.274
MC34153 High Speed Dual MOSFET Driver " 3.274
3-14
Power Supervisory
Device Function Page
MC3397T Transient Suppressor See Chapter 10
MC3423 Overvoltage Sensing Circuit 3-121
MC3425 Power Supply Supervisory/Over-Under-Voltage Protection Circuit 3-127
MC3523 Overvoltage Sensing Circuit 3-121
MC33064 Pin-Programmable Overvoltage Sensing Circuit 3-227
MC33160 Microprocessor Voltage Regulator and Supervisory Circuit 3-279
MC33164 Micropower Undervoltage Sensing Circuit 3-297
MC34064 Pin-Programmable Overvoltage Sensing Circuit 3-227
MC34160 Microprocessor Voltage Regulator and Supervisory Circuit 3-279
MC34164 Micropower Undervoltage Sensing Circuit 3-297
OUPUT
Internal Short-Circuit Protection
INPUT
Internal Thermal Overload Protection 1| O 0)3
'GROUND
Excellent Line and Load Transient Rejection
(Bottom View)
H SUFFIX
Designed for Use with Popular MDTL and MTTL Logic
METAL PACKAGE
CASE 79
CASE IS GROUND
ORDERING INFORMATION
Tested Operating
Temperature Range Package
CIRCUIT SCHEMATIC Tj = -55Cto +150C
Tj = -55Cto +150C
Tj = -25Cto +150C
Tj = -25Cto +150C
Tj = 0Cto +125C
Tj = 0Cto +125C
TYPICAL APPLICATION
OUTPUT 5V
INPUT LM109 OUTPUT
C1*
0.22 /j.F 3 i> C2
GROUND
ELECTRICAL CHARACTERISTICS
LM109/LM209 1 LM3092
Characteristic Symbol Min Typ Max Min Typ Max Unit
Output Voltage (Tj = + 25C) v 4.7 5.05 5.3 4.8 5.05 5.2 Vdc
79-03 V in = 10V,
1 Unless otherwise specified, these specifications apply for -55C * Tj * +150 (-25X * Tj * +150"C for the LM209). For Case
In = 0.1 A, mflx = 0.2 A and Pmax = 2.0 W. For Case 1-03 V in = 10 V,
l
= 0.5 A, max = 1.0 A and P ma x = 20 W.
l l
2. Unless otherwise specified, these specifications apply for 0C * Tj * + 125C, Vj n = 10 V. For Case 79-03 lo = 0.1 A, m ax = 0-2 A p max = l
35T/W. With a heat sink, the effective thermal resistance can only approach the values specified, depending on the efficiency of the heat
sink.
TYPICAL CHARACTERISTICS
Ta = +25C unless otherwise noted.)
(V in = 10 V,
FIGURE 1 - MAXIMUM AVERAGE POWER DISSIPATION FIGURE 2 - MAXIMUM AVERAGE POWER DISSIPATION
(LM109K. LM209K) (LM109H.LM209H)
100 IU
50
680 75orEQUIV
\ ,
IN FINITE
5 I
\i HE VTSINI * INFINITE
l HEAT SINK
o 10
V WKE FIELD
< 5.0 HEATS INK
1.0 7 ORE
5
oc
-. > *"^
NO HEAT
S
o 1.0
SINK
a 0.5
ni
50 75 100 125
50 75 100 125
FIGURE 3 - MAXIMUM AVERAGE POWER DISSIPATION FIGURE 4 - MAXIMUM AVERAGE POWER DISSIPATION
(LM309K) (LM309H)
100
50
NFINI7 F
"-, F EAT SI NK .680-75 OR EQUIV .
2 10
V
< P HEAT SINK - INFINITE
?: 5.0 -680 75 OR EQUIV : \ \
v
^"HEATSINK
^"**'g
no y EAT
o 1.0
K
P 0.5
TEMPERATURE (C)
s~ -^ *^
/ ^
io-o
mA =
lL = 20
(
L p^-> ^- TA = +25C
JL = 5 30 mA Vr Ir^s
If T A = +125C
II -Ta = +150"C
vo = 4.5 V
10-2 ..
/ AA '
* / Ta =
1
-55C
<
.
V, .
^^J* Ta = +25C
cr
r *j
TA = -55C
= +125
f 1
+160 C^\
F
t- 1
"' =
in ^^ Ta = +25C
t
1
AVi i
L
= 200 TlA
= 3.0 \ PP
1 Ta = +125C
L
TA = +15 oc
v = 4.6 V
3-18
LM109, LM209, LM309
LM109
and
1
L = 1.0 A LM209 = OA
- 2
1 ( Packaae Onlv
ONLY
"L
* *^T A = +25C
It = 200 mA
/f//
A= 150C-^/
LM10 3
and
IL - 2( mA T 7/
r/
L =
UNLY
LM20' ///
/' /
-75 -50 -25 +25 +50 +75 +100 +125 +150 +175 6.0 7.0
LM10S
and
LM20<
ONLV
> 5.1
Ci =0
CD
O
> 5.0 5 0.1
Z>
O
^4.9 LM10
and = OmA
lL
LM20 9
ONLY
is
-75 -50 -25 +25 +50 +75 +100 +125 +150 +175 100 1.0 k
6.5 1
LM109
LM209
L= 2 10 mA < ONLY
1 6.0
V
z
TA = + 25C
5.5
jf
Ta = -55C
s^ l
L =
h TA = + 125C^ a 5.0
L U109
nd
L W209
Ta = +150C ON LY
1 4.5
10 15 20 -75 -50 -25 +25 +50 +75 +100 +125 +150 +175
Vjn, INPUT VOLTAGE IV) Tj, JUNCTION TEMPERATURE CO
TYPICAL APPLICATIONS
Ci
0.22 h f;
Cl
0.22 w
TT
F^Tn
MJE1090 OR EQUIV
in
5W MJE370 OR EQUIV
5.0 V 5.0 V
3.0 A - 4.0 A
10mF
10/aF
a w^ I
- i
-L
LM109K -6 2
0.22 jiF
x
1
T 0.22 mF
t^t
^
LM109H -6 2
T
FIGURE 20 - 5.0-VOLT, 10-AMPERE REGULATOR
(with Short-Circuit Current Limiting for
FIGURE 19 - 5.0-VOLT, 10-AMPERE REGULATOR
Safe-Area Protection of pass transistors)
0.I.5W
MJ2955 OR EQUIV
;io
X
C!Dl0/iF
0-
5.0
10A
V 30V (max
'OV(min)
2N6M9
, 0.1, 5W 0-I.3W
0.1,
,
3W^--^
^MJ2955 OR EQUIV
OR EQUIV 6.0 V
O LM109K -(J 2 1MJ2955 OR EQUIV tf. 10 A
!0iF
0.22 MF or
* 0.22 pF
1:
LM109K ^>
J'
MOTOROLA LM117
SEMICONDUCTOR LM217
TECHNICAL DATA
LM317
THREE-TERMINAL
ADJUSTABLE POSITIVE
VOLTAGE REGULATORS
THREE-TERMINAL ADJUSTABLE SILICON MONOLITHIC
OUTPUT POSITIVE VOLTAGE REGULATORS INTEGRATED CIRCUIT
The LM 11 7/2 17/3 17 are adjustable 3-terminalpositive voltage
regulators capable of supplying excess of 1.5 A over an output
in
STANDARD APPLICATION
H SUFFIX
METAL PACKAGE
CASE 79
IS
CASE
OUTPUT
Q
PIN 1. V in
2. ADJUST
3. V out
ORDERING INFORMATION
Tested Operating
Device Temperature Range Package
V *s 5.0 V
Vp a 5.0 V
5.0 15 5.0 25 mV
0.1 0.3 0.1 0.5 %A/Q
Thermal Regulation (TA + 25C)
20 ms Pulse
0.03 0.07 %/W
Adjustment Pin Current
'Adj 50 100 100 u.A
Adjustment Pin Current Change
AlAdj fiA
2.5 V *s V|-V 40 V
10 mA ^ L s max P ^ p
D l
max l ,
K and T Packages
0.4 0.4
H Package
0.07 0.07
RMS Noise, % of Vq 0.003 0.003 %/V
Ta = 25C, 10 Hz s f 10 kHz
Ripple Rejection, Vq 10 V, f = 120 Hz RR
(Note 5) dB
Without C Acjj
65 65
CAdj = 10 ^F
80 80
Long-Term Stability, Tj = T n
gh (Note 6) j
%/1.0k
TA = 25C for Endpoint Measurements
Hrs.
Thermal Resistance Junction to Case R 0JC
H Package C/W
12 15 12 15
K Package
2.3 3.0 2.3 3.0
T Package
5.0
NOTES: (1) T| 0W = -55C for LM117 T high = +15CTC for LM117 be taken into account separately. Pulse testing with
= -25Cfor LM217 = +150X low
for LM217 duty cycle is used.
= 0CforLM317 = +125C for LM317 (4) Selected devices with tightened tolerance reference
< 2 'max
' = 1.5 A for K and T Packages voltaqe
available.
= 0.5 A for H Package 5' C ADJ. when used, is connected between the adjustment pin and
p max = 20 W for K Package <
ground.
= 20 W for T Package
Since Long-Term Stability cannot be measured on
= 2.0 W for H Package (6)
before shipment, this specification is an engineering
each device
(3) Load and line regulation are specified at constant junction estimate of
average stability from lot to lot.
temperature. Changes in Vq due to heating effects must
3-22
LM117, LM217, LM317
SCHEMATIC DIAGRAM
-fo v in
<
-o v out
O Adjust
vCc
-ni- VOH
J^l v l
-f O
"l
Cm
v O (mln. Load)
Vout (max. Load)
O-
'L )-*
0.1 /IF
_m (min. Load)
n yr^ 0.1 MF
To Calculate R 2 :
f = 120 Hz >
^ 1N4002
c in
i
D 1 Discharges C ADJ if Output is Shorted to Ground
3-24
LM117, LM217, LM317
= 1-5
\~-*
- \\_- 1.5 A -
p
It
X i
v
1
.
it lj= 15 C v
"O^ -55C
V| = 15 V /r
_
S
vo 10 V
//
"""^J"
^r -
i 20 30 40
-75 -25 50 75 100 125 150 10
-50 25
Tj, JUNCTION TEMPERATURE (C) V, - V INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
Q ,
-- tt
D
<
2b
1 = 16 A
'L'
0A
>
^ |
"'T ~
l
L
= 200 mA
< 40
l
L
= 20mA
.=> , n
35
150 -75 -50 -25 25 50 75 100 125 160
-75 -50 -25 25 50 75 100 125
T ,, JUNCTION TEMPERATURE l
Q
C) T ., JUNCTION TEMPERATURE (C)
Tj = -55C
A^
s Tj = 25C __
T
J
'&
^.^\ .-^5-
J
f^-; =='
10 20 30 40
-75 -50 -25 25 50 75 100 125 150
FIGURE 11 - RIPPLE REJECTION vr,u OUTPUT VOLTAGE FIGURE 12 - RIPPLE REJECTION versus OUTPUT CURRENT
1
80
WITHOUT C
ADJ
BO
40
-v,-v )
= 5V
(
L
= 50 mA
f = 120 Hz
?n _V25C .
5 2 2
1 1
) 3 ] 3S
V , OUTPUT VOLTAGE (V)
l
,
OUTPUT CURRENT (A)
5 V
= 500 mA
80
-
1,
v-,-1 5V ak 00
10V
'l
mA
o - V = 10 V
Tj.2 5C
u 60
WITH0 UT
at 40
| 1
C
ADj E^
az
ir
ADJ " ,0
VyAP=i
20 ITH0UTC ADJ -
7
E= C
A0J
=
,C " F =
1 !
^*-
. 3
'0 100 IK 10K 100K 1M 10M
100K 1M
f, FREQUENCY (Hz)
.FREQUENCY (Hz)
S '- 5
<
5>
o
1.0
=
C " F C ADJ =
I 0.5
L
1 .
' "f
3 t-
^I
&a
o N
(
1 J,
-0 5 //
5 -1.0
V
1,
= 50 mA .
A
w -1.5
rM
a J 0UTC ADJ~L
< ' ?
5>
o
1-0
_ 1
%l ,
1
20
t, TIME M
APPLICATIONS INFORMATION
regulated output voltage is given by: increased. A 10 /iF capacitor should improve ripple
rejection about 15dB at 120 Hz in a 10 volt application.
R2 Although the LM117 stable with no output capaci-
V = V re f<1+^f) + lAdjR2 is
ut
tance, like any feedback circuit, certain values of external
returned to the output terminal. This imposes the require- PROTECTION DIODES
ment for a minimum load current. If the load current is When external capacitors are used with any I.C. regu-
less than this minimum, the output voltage will rise.
lator it is sometimes necessary to add protection diodes to
LM117 a floating regulator, only the
Since the capacitors from discharging through low
is it is
prevent the
voltage differential across the circuit which is important current points into the regulator.
to performance, and operation at high voltages with Figure 18 shows the LM117 with the recommended
respect to ground is possible.
protection diodes for output voltages in excess of 25 V or
FIGURE 17 - BASIC CIRCUIT CONFIGURATION high capacitance values (C > 25 fiF, CadJ > 10 ^ F >-
Diode Di prevents C from discharging thru the I.C.
V ref = 1 25 V TYPICAL
LOAD REGULATION
The LM117 is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance, the
programming resistor (R1) should be connected as close
to the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be
returned near the load ground to provide remote ground
sensing and improve load regulation.
H4-
v out1 "SC v in2 v out2
f- vO
1 MF
Tantalun
OUTPUT RANGE:
V Q 25 V
0<ln<1.2A
Diodes O, and D and transistor Q2 are added to allow adjustment
2
of output voltage to volts.
'DSS
V ref
'Omax DSS
* !
v, n r
v ref
^-j-s 10 MF 'out = 1-^-) l
A d,
3-28
LM117L
MOTOROLA
SEMICONDUCTOR LM217L
TECHNICAL DATA LM317L
CASE
IS OUTPUT
D SUFFIX
STANDARD APPLICATION PLASTIC PACKAGE
PIN 1. V| N
2.V0UT
CASE 751
3-VouT
SOP-8*
4. ADJUST
5. N.C.
s^P- 6- VoUT
7.V0UT
8. N.C.
LM317LZ Plastic
LM117L/217L LM317L
Characteristic Figure Symbol Min Typ Max Min Typ Max Unit
Line Regulation (Note 3)
1 Re 9line 0.01 0.02 - 0.01 0.04 %/V
Ta = 25C, 3.0 V *s V|-Vo 40 V
Load Regulation (Note 3), Ta = 25C 2 R egioad
5.0 mA l max lLM117L/217L
10 mA s l maxl LM317L
Vq =s 5.0 V 5.0 15 5.0 25 mV
Vq 3= 5.0 V 0.1 0.3 0.1 0.5 %v
Adjustment Pin Current 3 Adi 50 100 50 100 /jA
Adjustment Pin Current Change
2.5V S V,-V O
1,2 A'Adj 0.2 5.0 " 0.2 5.0 MA
40V,P D ^P max
5.0 mAslQS l
max LM117U217L
10 mA =s l max l LM317L
Reference Voltage (Note 4) 3 Vref 1.20 1.25 1.30 1.20
3.0VV|-V O ^40V, P D ^P max 1.25 1.30 V
5.0 mA s lmax LM117L/217L l
10 mA *s l sj |
max _ LM317L
Line Regulation (Note 3) 1 R egiine 0.02 0.05 - 0.02 0.07 %/V
3.0 V V|-V 40 V
Load Regulation (Note 3) 2 R egioad
5.0 mA s l s max LM1 17L/217L
l
10 mA =s l max LM317L
l
Vo =? 5.0 V 20 50 20 70 mV
Vo s= 5.0 V 0.3 1.0 0.3 1.5 %v
Temperature Stability (T| ow =s Tj =; T hiah ) 3 TS 0.7 0.7 _ %Vo
Minimum Load Current to Maintain 3 'Lmin 3.5 5.0 - 3.5 10 mA
Regulation (Vj - Vq =40 V)
H Package
50 50
Z Package
20 20
RMS Noise, % Voof N 0.003 - - 0.003 - %v
TA = 25C, 10Hzf =s 10 kHz
Ripple Rejection (Note 5) 4 RR dB
V = 1.25 V,f = 120 Hz -
CADJ = 10/nFVo = 10.0 V
66 80 60 80 -
80 80
Long Term Stability, Tj = T h
gh (Note 6) i 3 S 0.3 1.0 - 0.3 1.0 %/1.0k
T"A = 25C for Endpoint Measurements
Hrs.
Thermal Resistance Junction to Case RflJC "C/W
H Package - 40 - - 40 -
Z Package
83
Thermal Resistance Junction to Air R 0JA
C/W
H Package - 185 - 185 -
Z Package _ 160
(3) Load and line
regulation are specified at constant junction
1 ) T low = -55Cfor LM117L temperature.
I
T high = +150Cfor LM117L Changes in V due to heating effects must be
-25Cfor LM217L taken into account
= +150Cfor LM217L separately Pulse testing with low duty cycle is
0Cfor LM317L used.
= +125Cfor LM317L (41 Selected devices with tightened tolerance reference
voltage available
(2) lmax = 100 mA 5 C ADJ when used, is connected between the
Pmax = 2 W
for H Package
< >
ground.
,
adjustment pin and
= 625 mW
for Z Package
(6) Since Long Term Stability cannot be measured
on each device before
shipment, this specification is an engineering
estimate of average
staDihty from lot to lot
3-30
LM117L, LM217L, LM317L
SCHEMATIC DIAGRAM
V|NO
VCC
-Til- V H
JTL
J
1 "
V|L v in
FT
o-
f O -O L L_a>
Load)
f
( l
(mln. Load)
0.1 mF
R2
'
Pulte Tatting Requlrad:
1% Duty Cycle It tuggattad.
c in ^pn 0.1 MF
To Calculate R 2 :
1% Duty Cyclaltti
tuggattad.
Attume SET = 5.25 mA
l
3-32
-
v in -45 V BU
- -
0.2
= 5V
-A 5 to 40 mA
/U
^V in
= lOV
I|
= 40 mA
V QU ,
= 5 V =
1 20 Hz
= 5 to 100 mA
'L
Vfl
= 10V
-U.B Vin
= 14 to 24 V
-U.8
L_
1
50 - | l
Tj = 25C
<
| 0.40
l
L
= 100 mA
z
c 0.30
^ <
tr
/
o
-
h- GC l
= 5 mA
0.20
1j = 150 o c
^> CL u_
L
3
O
0.10
0.5
k 50 -50 -25 25 50 75 100 125 150
1
V| - V ,
INPUT - OUTPUT VOLTAGE DIFFERENTIAL (VOLTS) Tj, JUNCTION TEMPERATURE (C)
I 1 1 au 1 1
!
L
= 40mA
80
4.U V,n = 5V .'.
1 Vpp
Tj = 25C
3.5 - Tj = 150C
i bU
3.0
, ""
S\,
2.b
^^"
4U
20
j
v*&
>-0
1.0
i~
5
,
-J^.
"\ - 1
f
nr IU
~\.
70 1
v i n
= 6.25 V
vc = v ref
17511
B5 l
L =10m A
lL= 100 mA
fin
1 ?40
55
"^ --
=-= ^a
50
V in = 4.2 V
^^
17.10 V = Vref -
45
.^
l
L
= 5 mA
40
1 ??0
:'
- 35
50 " 25 25 50 75 100 125 150 I
1 1 1
CD vc = ^ ref
z 2 Ba dwidth 100 Hz to 10 k U
<
X
"
<
5 -0.2
o ; an
>
o -0.6
o
* -0.8
-1.0
~ 4.0 1
S 15
< [ 1
*Z> 1.0
<
!^>
0.2
> C = IjuF o /'"'.I
0.5
K
^ L
\
J9 0.1
C
l
-1p F;C ADJ = 10 u /' \
1
55 o
5:
5>
<
II
./
*6S -0.5
VO = 125 V !/ o -0.1
r7
4
-10 lL = 20mA A < ^ V, = 15 V
1
Tj = 2 5C
v-w -0.2
Yl
uj
<
-IS
5
<-0
e
3 Li '0-
/""IS
'"
mA
V
5>
o
'
''
1 f if fj = 25 C
J*
^S _ 1 gz 1011
0.5
z* ... ,.._
t.TIMEM
1
"'i
3 ol
50
/ f
\r
\
3-34
LM117L, LM217L, LM317L
APPLICATIONS INFORMATION
1.25 volt reference (V re f) between its output and adjust- line impedance.
ment terminals. This reference voltage is converted to a The adjustment terminal may be bypassed to ground to
programming current (lpROG> by R1 (see Figure 13), improve ripple rejection. This capacitor (CaDJ) prevents
R2 to ground. ripple from being amplified as the output voltage is
and this constant current flows through
given by: increased. A 10 |iF capacitor should improve ripple
The regulated output voltage is
represents an error termin the equation, the LM117L was aluminum electrolytic capacitor on the output swamps
designed to control lAdj to less tnan 10 ^ A and keep ix
this effect and insures stability.
returned to the output terminal. This imposes the require- PROTECTION DIODES
ment for a minimum load current. If the load current is When external capacitors are used with any I.C. regu-
V, f = 1.25 V TYPICAL
6-
LOAD REGULATION
The LM117L is capable of providing extremely good
load regulation, but a few precautions are needed to
obtain performance. For best performance, the
maximum /Tr 2 -;.
Cad
-t-
programming resistor (R1) should be connected as close
to the regulator as possible to minimize line drops
which 4
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be
Adjust
'Omax + IDSS
vO < p OV + 1.25 V + V ss
'Lmin - lp < l
< 100 mA - I
As shown O < l
Q < 95 mA.
FIGURE 21 - SLOW TURN-ON REGULATOR FIGURE 22 - CURRENT REGULATOR
,I -(-^-\
\R, R2 +
* i
'ad|
-
= B
125V
7~5~
+ R2
j 1
3-36
LM123, LM123A
MOTOROLA
SEMICONDUCTOR LM223, LM223A
TECHNICAL DATA LM323, LM323A
3-AMPERE, 5 VOLT
POSITIVE
VOLTAGE REGULATORS
SILICON MONOLITHIC
POSITIVE VOLTAGE REGULATORS INTEGRATED CIRCUIT
PIN 1. INPUT
2. GROUND
3. OUTPUT (Heatsink surface connected
MAXIMUM RATINGS to Pin 2)
Rating Symbol
Input Voltage
20
Internally Limited
STANDARD APPLICATION
Power Dissipation !!d_
LM323. A to +150
C,n* -L Co**
-65 to +150
Storage Temperature Range
Lead Temperature (Soldering, 10 s)
'stg
Tsolder
-T i
A common ground required between the
ORDERING INFORMATION is
LM323AT 2%
Characteristic
LM 1 23A/ LM223A/ LM323A LM123/LM223 LM323
Symbol
Min Typ Max Min Typ Max Min
Unit
Typ Max
Output Voltage v 4.9 5.0 5.1 4.7 5.0 5.3 4.8 5.0 5.2 V
(V in = 7.5 V. ^ l
out <J 3.0 A, Tj = 25C>
Output Voltage v 4.8 50 5.2 4.6 5.0 5.4 4.75 5.0
(7.5VV in 15V.0l ou ,3.0A. 5.25 V
p p max(Note2]|
Line Regulation
Re 9line 10 15 - 1.0 25 -
(7.5 V ^ V in s 1 5 V, T j
= 25C) (Note 3)
1.0 25 mV
Load Regulation Re 9load 10 50 10 100 - 10 100 mV
( v in = 7.5 V, < l
out * 3.0 A, Tj = 25C)
(Note 3)
T|
0W = -55C for LM123, A T high = + 50C for LM 23, A
1 Note 3. Load and line regulation are specified at constant junction tem-
= -25C for LM223, A = +150Cfor LM223, A perature. Pulse testing is required with a pulse widthsj 1 .0 ms and
= 0C for LM323, A = +125Cfor LM323. A a duty cycle ^ 5%.
Note 2. Although power dissipation is internally limited, specifications Note 4. Without a heat sink, the thermal resistance (R
apply only for P s P max eJA is 35C/W for
the K package, and 65C/W for the T package. With a heat sink,
p max = 30 for K package W the effective thermal resistance can approach the specified val-
p max = 25 for T package W ues of 2.0C/W, depending on the efficiency of the heat sink.
3-38
O
SCHEMATIC DIAGRAM
t
LMI23A
LM123A
Vq = 5 V
= 5 V
V
V in = 8.0 V --1 8 V -- 8.0 V = Reg| ine = 2 4 mV
V in = 15 =Regioad = 44mV
nut
= 2.0 A =Reo ther m = 0-001 5V /W l
ou ,
= A 2 A A = Reg
therm
= 0.001 5%V /W
-V in = 10 V
= IDOmA S 10-1
l
out
z V,n = 7-5 V
W =1.0 A
^
C =
1 10-2
Tj = 25C
CD
o 10-3
-90 10-4
-50 -10 30 70 110 150
...
10 ' '00 1.0k 10k 100k 1.0 M 10M 100M
Tj, JUNCTION TEMPERATURE (C)
f, FREQUENCY (Hz)
V|p=10V
C =
f = 120 Hz
Tj = 25C
T II "1 "
Tj - -55C 1
\
t
^"t"
I
t ::::x:
====^;
-:tj = 25c--
|
T
I
-^ Tj _ 150C
t
-"- v in
t
5.0 10 15
I 1
01
III
1.0
I
V in INPUT VOLTAGE (Vdc)
,
l
out . OUTPUT CURRENT (A)
3-40
LM123, LM123A, LM223, LM223A, LM323, LM323A
= 3 U A
'ou
5- >
'ou
= 1.0 A
Tj = 0C
2S 1-6
Tj = 25C
1
vo = 50 it V
10 15 20
-90 -50 -10 30 70 110 150 190
V m INPUT VOLTAGE (Vdc)
JUNCTION TEMPERATURE
.
Tj. (C|
CO = < C( =
A
0.4 !j-
? '
1 Ij = ib^ c
V
? - n I
'
z
o
, y
=>
2
-0-2
t
V
<" m'<
I
1 Maximum Ambient
- S
I
te
V
Si
W
^^ 1.3 C/ Heat
2.4C/W^
3C/W-
i
Infinit
i
3.3C/W^
Hi
vl HeatJ ink
-3.3C/ w^*-*
"J
6.3C/W
10 6.3C/V V"^~ _l^
10.5C /W '
_10.5C
50 75 100
50 75 100
T A AMBIENT TEMPERATURE |C)
T A AMBIENT
,
TEMPERATURE (C| ,
APPLICATIONS INFORMATION
Design Considerations
Output
O LM12:
MF
The LM123,A regulator can also be used
as a current source when
connected as above. Resistor R determines
the current as follows:
50 V
lo
'0 = -=- + I
IB
Vq, 8.0 V to 20 V
AlB a 0.7 mA over line, load and temperature changes V in - V Ss2 5 V
IB a 3.5 mA
The addition of an operational amplifier allows
adjustment to higher
For example, a 2-ampere current source or intermediate values while retaining regulation
would require R to be a 2.5 characteristics. The
ohm, 15 W
resistor and the output voltage compliance
minimum voltage obtainable with this arrangement is 3.0 volts
would be the greater
input voltage less 7.5 volts. than the regulator voltage.
2N4398or Equiv
WvfO-
1
LM123.A -O * Output
2
T
3-42
A
MOTOROLA
LM137
SEMICONDUCTOR LM237
TECHNICAL DATA LM337
THREE-TERMINAL
THREE-TERMINAL ADJUSTABLE ADJUSTABLE NEGATIVE
OUTPUT NEGATIVE VOLTAGE REGULATORS VOLTAGE REGULATORS
The LM 137/237/337 are adjustable 3-terminal negative voltage
regulators capable of supplying in excess of 1.5 A over an output SILICON MONOLITHIC
voltage range of -1.2 V to -37 V. These voltage regulators are
INTEGRATED CIRCUIT
exceptionally easy to use and require only two external resistors
to set the output voltage. Further, they employ internal current
limiting, thermal shutdown and safe area compensation, making
them essentially blow-out proof.
The LM137 series serve a wide variety of applications including
local, on-card regulation. This device can also be used to make
a programmable output regulator; or, by connecting a fixed re-
sistor between the adjustment and output, the LM137 series can
be used as a precision current regulator.
Output Current in Excess of 1.5 Ampere in K and T Suffix
Packages
Output Current in Excess of 0.5 Ampere (n H Suffix Package
Output Adjustable Between - 1.2 V and -37 V
Internal Thermal Overload Protection
Internal Short-Circuit-Current Limiting, Constant with
Temperature
Output Transistor Safe-Area Compensation T SUFFIX
Floating Operation for High Voltage Applications PLASTIC PACKAGE
Standard 3-Lead Transistor Packages CASE 221
Eliminates Stocking Many Fixed Voltages
H SUFFIX
METAL PACKAGE
CASE 79
(Bottom View)
CASE
IS INPUT
PIN 1. ADJUST
2. OUTPUT
3. INPUT
ORDERING INFORMATION
Tested Operating
Cj n is required if regulator is more than 4 inches from power supply
located Device Temperature Range Package
electrolytic is recommended.
filter. A 1 M F solid tantalum or 10 (uF aluminum LM137H Tj = -55Cto +150C Metal Can
TJ ~ T low to Thigh [see Note 1], max and P max per Note 2, unless otherwise
l
specified.)
LM137/237 LM337
Characteristic Figure Symbol Min Typ Max Min Typ Max Unit
Line Regulation (Note 3)
Regn 0.01 0.02 0.01 %/V
TA = 25C, 3.0 V =s |V|-V |
40 V
Load Regulation (Note 3)
Regioad
Ta = 25C, 10 mA =s l
|V |
5.0 V
15 25 15 50 mV
|Vp| ^ 5.0 V
Thermal Regulation
0.3 0.5 0.3 1.0 %V
Re 9the 0.002
10 ms Pulse, Ta = 25C
0.02 0.003 0.04 %V(yw
Adjustment Pin Current
'Adj 100 65 /xA
Adjustment Pin Current Change 1,2 A'Adi 5.0 2.0
2.5 V s |V|-V =s 40 V |
/iA
10 mA l
L =s l
max ,
pD *= Pmax. TA = 25C
Reference Voltage (Note 4) Ta = +25C
Vref -1.225 -1.250 -1.275 -1.213 -1.250 -1.287
3.0 V = |V|-V 40 V, 10 mA *s =s| l
-1.20 -1.25 -1.30 -1.20 -1.25 -1.30
'max. P D ^ p max- Tj = T| ow to T n g h i
(3) Load and line regulation are specified at a constant junction tem-
by proper integrated
circuit design and layout techniques.
perature. Pulse testing with a low duty cycle is used. Thermal Regulation is the effect
Change in Vo of these temperature gradients on the
because of heating effects is covered under the Thermal Regulation output voltage and is
expressed in percentage of output change per watt of power change
specification.
in a specified time.
(4) Selected devices with tightened tolerance reference
voltaqe
available.
SCHEMATIC DIAGRAM
-o Adjust
60
-v out
220
<
2.2 k
15 500
f 600 >| 1 *
cm T f
I
I 1 i 1 1 1 A i
^T R2 1%
ri: Rl
Pulse Testing Required: Adjust (
1% Duty Cycle
is suggested.
Vout
LM137 O 4 V H
I V IH
' '
-|X- v L
U J
V| L
TF vee
Line Regulation (% V )
=
|V
$ffi
hl
x 100
-Vlo i LM137
Load)
_TL Vo (max. Load)
m R2 ?1%
Cin^kl.OMF 1.0 mf r l
R1<120
Adjust
JTT
R2 * 1% i-adj 'tn 10 MF
1.0 MF
Adjust < i
1120 D1 *A 1N4002
1.0 /nF Rl
o o-
LM137
V = -1.25 V
14.3 V
4.3 V
*Di Discharges C acjj if Output is shorted to Ground.
f = 120 Hz
a *-T.
5 -0.6
o
I
-0.8
v, = -
15V
"L
= 1.5 A
H " Packaged
N^
l - v = -10V
6
5 -1-2
-1.4
10 20 30 40
-50 -25 25 50 75 100 125 150
Tj, JUNCTION TEMPERATURE (CI V, - V , INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
V = -5 V
AV -iuu
3
K
l
= 1.5A
L
OC
3 65
z
60 = 1.0 A
z 1
L
= 500 mA
3 ^J,L = 200 mA^ l
L
3 50
l = 20'mA*""">
L
I
in
-50 -25 25 50 75 100 125 150 -60 -25 25 50 75 100 125 150
1.270
1.8 -55C
25C
< 1.6
*_-- - Tj = 150C
> 1.260 ^4?
a z 1 -4 *'
t- ec
3
'-2
fy\
o "
> 1.250 1.0
z
z
s
=> 0.6
a 'Jr
c 1.240 "i
J? 0.4
pi =**
FIGURE 11 RIPPLE REJECTION ram OUTPUT VOLTAGE FIGURE 12 RIPPLE REJECTION versus OUTPUT CURRENT
1 1
C ad j= lO^F CO
80 --C a ,:= 10 uF.
o ..1
1
1 1
1 |
Without C a(jj
1
"ad| a 60
_
40
v,-v n = 5V
l
L
= 500 mA
f = 120 Hz V,-- 5V
T
J
= 2E C 20 v-
f= 120 Hz
n I I 1 |
"5 -10 -15 -20 -25 -30 -35 -40
V OUTPUT VOLTAGE (V)
,
l
, OUTPUT CURRENT (A)
V, = -15 V
v = -10 V
-500 mA
10
l
L
C L = 1F
yCjdj^lO/iF
Witt out C ad
j
Withou c adj
j
Vj= -15 V
v
V
l
L
= -10
= 500
25C
V-
mA
^ = c adj
=
10ajF
10K 100K 1M
1K UK
f. FREQUENCY (Hz)
f, FREQUENCY (Hz)
04
A Without C d|
I
J v Jj
/
L.
0?
V u >r >-
'\
L"'
\
\
\
Cac j
= 10m F VV
iC 3(jj= 10 uF.
-n fi
-04 ..
< V| = -15 V
I
* n
> V = -10V = -10
in =50n
i
/
*
Tj = 25C Tj = 25C
10
CL = 1
MF i n
/
/
15 1 | .,. \
10 20 30
20
t,TIME(ns)
t, TIME W
APPLICATIONS INFORMATION
Since the LM137 is a floating regulator, it is only the lator sometimes necessary to add protection diodes to
it is
voltage differential across the circuit that is important preventthe capacitorsfrom discharging through low
to performance, and operation at high voltages with current points into the regulator.
respect to ground is possible. Figure 18 shows the LM137 with the recommended
protection diodes for output voltages in excess of -25 V or
FIGURE 17 - BASIC CIRCUIT CONFIGURATION
high capacitance values (C > 25 >iF, C a dj > 10 /^F).
circuit.
-:
c
FIGURE 18 - VOLTAGE REGULATOR WITH
A djust 9 PROTECTION DIODES
Vjn LM137
Vref
oVl
J
:
R1
/
vout
Vref
= -1.25 V Typically
LOAD REGULATION
The LM137 capable of providing extremely good
is -Vjn * t
1N4002
load regulation, but a few precautions are needed to
obtain maximum performance. For best performance, the
D1
programming resistor (R1 should be connected as close
)
1N4002
to the regulator as possible to minimize line drops which
effectively appear in series with the reference, thereby
degrading regulation. The ground end of R2 can be
MOTOROLA
SEMICONDUCTOR LM140.A Series
TECHNICAL DATA LM340.A Series
THREE-TERMINAL
THREE-TERMINAL POSITIVE VOLTAGE REGULATORS
POSITIVE FIXED
This family of fixed voltage regulators are monolithic
integrated VOLTAGE REGULATORS
circuits capable of driving loads in excess
of 1.0 ampere. These
three-terminal regulators employ internal current limiting,
ther- SILICON MONOLITHIC
mal shutdown, and safe-area compensation. Devices are
available INTEGRATED CIRCUIT
with improved specifications, including a 2% output
voltage tol-
erance, on A-suffix 5.0, 12 and 15 volt device types.
Although designed primarily as a fixed voltage regulator,
these
devices can be used with external components to obtain
adjust-
able voltages and currents. This series of devices K SUFFIX
can be used
with a series-pass transistor to boost output current METAL PACKAGE
capability at
the nominal output voltage. CASE 1
ORDERING INFORMATION
T SUFFIX
Output Voltage Tested Operating PLASTIC PACKAGE
Device and Tolerance Junction Temp. Range Package CASE 221
LM140K-5.0 5.0 V 4% Metal Power
LM140AK-5.0 5.0 V 2%
LM140K-8.0 8.0 V 4%
LM140K-12 12 V 4% -55Cto +150C PIN 1. INPUT (Heatsink surface
2. GROUND connected to
LM140AK-12 12 V 2% 3. OUTPUT
Pin 2)
LM140K-15 15 V 4%
LM140AK-15 15 V 2%
LM340K-5.0 5.0 V 4% Metal Power
STANDARD APPLICATION
LM340AK-5.0 5.0 V 2%
LM340T-5.0 5.0 V 4% Plastic Power
LM340AT-5.0 5.0 V 2%
LM340T-6.0 6.0 V 4% Plastic Power
LM340K-8.0 8.0 V 4% Metal Power
LM340T-8.0 8.0 V + 4% A common ground is required between the
Plastic Power
LM340K-12 input and the output voltages. The input volt-
12 V 4% Metal Power
age must remain typically 1.7 V above the
LM340AK-12 12 V 2% 0Cto +125C output voltage even during the low point on
LM340T-12 12 V 4% the input ripple voltage.
Plastic Power
LM340AT-12 12 V 2% XX = these two digits of the type number
indicate voltage.
LM340K-15 15 V 4% Metal Power
= Cj n is required if regulator is located
LM340AK-15 15 V 2% an appreciable distance from power
LM340T-15 15 V 4% supply filter.
Plastic Power
LM340AT-15 15 V 2% = Co is not needed for stability; how-
ever, itdoes improve transient re-
LM340T-18 18 V 4% sponse. If needed, use a 0.1 ce-
MF
LM340T-24 24 V 4% ramic disc.
2% regulators are available in 5, 12 and 15 volt devices
3-50
LM140,A, LM340,A
V - 18 V) V in 35 Vdc
Input Voltage (5.0
(24 V)
40
Metal Package
PD Internally Limited Watts
Tc = +25C
i/ejA 22.5 mW/C
Derate above Ta = + 25C
45 C/W
Thermal Resistance, Junction to Air "JA
PD Internally Limited Watts
Tc = + 25C
182 mW/C
Derate above Tc = +65C (See Figure 2) i/fljc
5.5 C/W
Thermal Resistance, Junction to Case <*JC
T Input
Output
DEFINITIONS
Line Regulation
The change in output voltage for a change dissipation for which the regulator will operate within
in the input voltage. The measurement is made under condi-
specifications.
tions of low dissipation or by using pulse techniques
such that
the average chip temperature is not significantly affected.
Quiescent Current That part of the input current that is
not delivered to the load.
Load Regulation
The change in output voltage for a Output Noise Voltage
The rms ac voltage at the output,
change in load current at constant chip temperature. with constant load and no input ripple, measured over a spec-
Maximum Power Dissipation The maximum total device ified frequency range.
LM140/340 5.0
ELECTRICAL CHARACTERISTICS (V in 10 V, lp = 500 mA, Tj = T hign (Note
T| ow to 1), unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Output Voltage (Tj = +25C)
V 5.0 5.2 Vdc
Iq = 5.0 mA to 1 .0 A
RR dB
Ripple Rejection
8.0 V m =s 18 Vdc, = 120 Hz
Iq = 500 mA
f
68 -
68 80
l = 1.0 A(Tj = + 25C)
Dropout Voltage Vin-Vo - 1.7 - Vdc
= 1.0 kHz) r
O
- 2.0 - mil
Output Resistance (f
Iq = 5.0 mA
- 2.4 - A
Peak Output Current (Tj = +25"C) '0
7.3 Vdc
Input Voltage to Maintain Line Regulation (Tj = +25C)
NOTES:
V T|ow = - 55C for LM140A T hig h = + 150C for LM140A
0CforLM340A = + 125X for LM340A
Changes V due to heating effects iust be taken into account
Load and line regulation are specified at constant junction temperature.
in
2.
LM 140/340 6.0
ELECTRICAL CHARACTERISTICS (V in = n V, l
= 500 mA, Tj
Characteristic Symbol Min Typ Max Unit
Output Voltage (Tj = + 25C)
vo 5.75 6.0 6.25 Vdc
lO = 5.0 mA to 1.0 A
Line Regulation (Note 2)
Reaiine mV
9.0 to 21 Vdc - 60
8.0 to 25 Vdc (Tj = + 25C)
60
9.0 to 13 Vdc, l = 1.0 A - - 30
8.3 to 21 Vdc, l = 1.0 A (Tj = +25C)
60
Load Regulation (Note 2) Reg| oac
mA mV
5.0 l 1.0 A
|
- - 60
5.0mA Iq ss 1.5 A (Tj = +25C)
250 mA l =s 750 mA (Tj = + 25C) _ 30
Output Voltage
v Vdc
LM140
90 =s V in s 21 Vdc, 5.0 mAsl O s1.0 A, Pn 15 W -
5.7 6.3
LM340
8.0 s V in 21 Vdc, 6.0 mAsl s 1.0 A, P D s 15 W 5.7 6.3
Quiescent Current
lO = 10 A
IB mA
LM140
7.0
LM340 - 8.5
LMl40(Tj = + 25C)
6.0
LM340 (Tj = + 25C) 4.0 8.0
Quiescent Current Change
9.0 s V in 25 Vdc,
-i'B mA
= 500 l
mA LM140
8.0 V in s 25 Vdc, = 500 l
mA LM340 1.0
5.0 mA s 1.0 A,
l
Vj n = 11 V LM140, LM340
9.0 V in s 21 Vdc, l = 1.0 A LM140
8.6 V in 21 Vdc, l = 1.0 A LM340 _ 1.0
Ripple Rejection
RR dB
LM140 -
65
LM340
59
lO = 1.0 A (Tj = + 25C)
LM140 -
65 78
LM340
59 78
Dropout Voltage
Vin " V 1.7 Vdc
Output Resistance (f = 1.0 kHz) r 2.0 mfl
Short-Circuit Current Limit (Tj = +25C)
'sc
1.9 mA
Output Noise Voltage (Ta = +25C)
Vn - 45 - ^
10 Hz f s 100 kHz
LM140/340 8.0
ELECTRICAL CHARACTERISTICS (V, n 14 V, Iq = 500 mA, Tj = T| ow to Thigh l Note 1 >- unless otherwise noted)
Output Voltage V
LM140
11.5 s V in 23 Vdc, 5.0 mAsl o s1.0 A, P D s 15 W 7.6 8.4
LM340
10.5 V in 23 Vdc, 5.0 mA Iq 10 A, Pd 15 W 7.6 8.4
Quiescent Current
= 1.0 A
l
7.0
LM140
8.5
LM340
= +25C) 4.0 6.0
LM140 (Tj
= + 4.0 8.0
LM340 (Tj 25C)
Ripple Rejection dB
LM140
LM340
lO = 10 A (Tj - 25C)
LM140 62 76
LM340 56 76
LM 140/340 12
ELECTRICAL CHARACTERISTICS <V in
3-56
LM140A LM340.A
LM140A/340A 12
ELECTRICAL CHARACTERISTICS (V in = 19 V, l = 1-0 A, Tj = T|ow to Thigh (Note 1) unless otherwise noted).
NOTES:
V "Tlow = -55Cfor LM140A Thigh = + 150C for LM140A
= 0C for LM340A = + 125C for LM340A
Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken
2.
LM140A/340 15
ELECTRICAL CHARACTERISTICS (V in = 23 V, 500 mA, Tj = T n gn (Note
l T| 0W to j
1), unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
Output Voltage (Tj = +25C)
VO 15 15.6 Vdc
Iq = 5.0 mA to 1.0 A
150
5.0mA 1.5 A (Tj = l
+25C) 150
250 mA sIqs 750 mA (Tj = +25C)
75
Output Voltage V Vdc
LM140
18.5 V in s 30 Vdc, 5.0 mA l0 s 10 A, P D 14.25 15.75
LM340
17.5 V in s 30 Vdc, 5.0 mA Iq 10 A, P D
Quiescent Current
= 10 A
mA
10
LM140
7.0
LM340
8.5
LM140 |Tj = +25C) 4.0 6.0
LM340(Tj = + 25C) 4.0 8.0
Quiescent Current Change
18.5 s V in s 30 Vdc, Irj = 500 mA
ilB mA
LM140 0.8
17.5 s V in s 30 Vdc, Irj = 500 mA LM340 1.0
5.0 mA =s =s 1.0 A, Vj
|
n = 23 V LM140, LM340 0.5
18.5 s V in s 30 Vdc, = 1.0 A l
LM140 0.8
17.9 s y in s 3Q Vdc, = 1.0 A l
LM340 1.0
Ripple Rejection
LM140
LM340
lO = 1.0 A (Tj = +25C)
LM140
LM340
Dropout Voltage V
Vin "
Output Resistance (f = 1.0 kHz) r
O 2.0
Short-Circuit Current Limit (Tj - + 25C) 800 mA
Output Noise Voltage (Ta = +25C)
90 mV
10 Hz s f s 100 kHz
NOTES:
' T low = -55Cfor LM140 Thigh 150X for LM140
125Cfor LM340
2. Load and line regulation are specified at constant junction temperature. Changes V due
in to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
LM140A/340A 15
ELECTRICAL CHARACTERISTICS (Vj n = 23 V, Ip = 1.0 A, Tj = T| 0W to T nign (Note 1), unless otherwise noted).
Ripple Rejection RR dB
18.5 V in 28.5 Vdc, f = 120 Hz
Ip = 500 mA 60 -
Ip = 1.0 A, (Tj = +25C) 60 70
NOTES:
1- T|ow = -55CforLM140A Thigh - + 150C for LM140A
0CforLM340A = 125C for LM340A -t
LM140/340 18
ELECTRICAL CHARACTERISTICS (V in = 27 V, 500 mA, Tj = T n gn (Note
l T| ow to j
1), unless otherwise noted)
Characteristic Symbol Typ Unit
Output Voltage (Tj = + 25C) V Vdc
Ip = 5.0 mA to 1 .0 A
NOTES:
! Tlow = -55C for LM140
Thigh = + 150C for LM140
0C for LM340 = + 125C for LM340
2. Load and line regulation are specified at
constant junction temperature. Changes V
in due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
3-60
LM140A LM340,A
LMUO/340 24
ELECTRICAL CHARACTERISTICS (Vj n = 33 V, lp 500 mA, Tj = T| 0W to Thigh (Note 1), unless otherwise noted).
+ 25C>
240
250 mA s lo 750 mA (Tj = + 25C) 120
LM340
27 V in s 38 Vdc, 5.0 mA l
s 1.0 A, P D 15 W 22.8 25.2
Quiescent Current IB mA
= 1.0 A
l
LM140
7.0
LM340
8.5
LM340(Tj = ^25C)
4.0 8.0
28 s Vj n s 38 Vdc, lo = 10 A
l
LM140 0.8
Ripple Rejection RR dB
LM140 56 ~~
LM340 50
- 1.0 A (Tj = +25C)
l
LM140 56 66
LM340 50 66
Dropout Voltage Vin -VO - 1.7 - Vdc
FIGURE 1 LINE AND THERMAL REGULATION FIGURE 2 LOAD AND THERMAL REGULATION
HM1 n EH i
?
SO
E
18
80V
V
Mi ug |
1 5
t, TIME (2.0 ms/div.)
t, TIME (2.0 ms/div.)
LM140AK-5.0
LM140AK-5.0
v = 5.0 V
= V
Vin
== 8.0V 18V-+ 8.0 V = Re 9line
= = 2.4 mV
Vrj 5.0
Vi n-V = 5. ] V
'o
00 rr A ~ 10-1
V = 5.0 V
V NI -75V
10-2 'out
c
=
= o
10/\
Tj = 25C
10-3
10-4
-10 30 70 110 10k 10k 100 k 10M 10M 100M
Tj. JUNCTION TEMPERATURE (C) f. FREQUENCY (Hz)
3-62
LM140A LM340,A
^
7^
'out
==
1.5 A Vo = 5.0 V
5.0 V V; n =10V
H 60
10 V c = o
co = f = 1 20 Hz
T = 2 C
25C -,
10
10 10 100 10k 10k 100 k 10M 10 M 100M 1
f. FREQUENCY (Hz)
l
oul . OUTPUT CURRENT (A)
III
^Tj = 150C
Tj = 25C
-^ 1
2.0 - -
Tj =
v = 5.0 V
'out
= 1.0 A _]_
1.0
-Tj = - >5C
-lj I
fll
J ' 30 C C II 1 1 II
n 1?
10 20 30 1 10
Vj n . INPUT VOLTAGE (Vdc) l OUTPUT CURRENT |A|
out .
2.5
^V ou ,
= 100 mV
Iq = 1.0 A
500 mA
JZ Tj = -55C
//
\/ Tj
1.0
'0 = 10 mA If TJ " 125C
I
0.5
\
\
n
-75 -50 -25 25 50 75 100 125 10 20 30 40
TA . AMBIENT TEMPERATURE (C)
V in -Vrj. INPUT-OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
lout" l&U mA S 2 n
=10
= o
<
n Co c = l\
\
<i
TJ = 25C Tj = 25C
|
Kg
{
r 3 0-0
CD Z
o|-02
1
/
V
'
' -0 3
*
? ~>
!
/ \
^ 05 / \
n / \
20
TIME (jus) t. TIME (us
FIGURE 13 WORST CASE POWER DISSIPATION FIGURE 14 WORST CASE POWER DISSIPATION
versus AMBIENT TEMPERATURE (Case 221A) versus AMBIENT TEMPERATURE iCase 1)
i 2b
JC = 5C/W
I
JA = 65C/W "hs
=
.
HS = 0C/W.
T J| nax)= '50C
k
^ "H S = 5C/ w\ 15
=
hs ioc/w
= 15CA
kN \S
10 -R, )JC
R, |JA
T J(max)
=
=
iC/Vu
65C/W
= 150C
s v
^"^ LN 5.0
Mo Heat Sink
^-^ N
^
No He (Sink
n
-50 -25 25 50 75 100 125 150 -75 -50 -25 25 50 75 100 125
_ . . . .. APPLICATIONS INFORMATION
Design Considerations
The I.M140 Series of fixed voltage regulators are de- with long wire lengths, or if the output load capacitance
signed with Thermal Overload Protection that shuts is large. An input bypass capacitor should be selected
down the circuit when subjected to an excessive power to provide good high-frequency characteristics to insure
overload condition, Internal Short-Circuit Protection stable operation under all load conditions. A 0.33 /xF or
that limits the maximum current the circuit will pass, larger tantalum, mylar, or other capacitor having low
and Output Transistor Safe-Area Compensation that re- internal impedance at high frequencies should be cho-
duces the output short-circuit current as the voltage sen. The bypass capacitor should be mounted with the
across the pass transistor is increased. shortest possible leads directly across the regulators
In many low current applications, compensation ca- input terminals. Normally good construction techniques
pacitors are not required. However, it is recommended should be used to minimize ground loops and lead re-
that the regulator input be bypassed with a capacitor sistance drops since the regulator has no external sense
if the regulator is connected to the power supply filter lead.
33 yF= ,-p
would be the input voltage less 7.0 volts. ment is 2.0 volts greater than the regulator voltage.
1.0 /xF
T 0.1 ^F
LM140
Output
1.0 fiF
T
The LM140 series can be current boosted with a PNP transistor. The circuit of Figure 17 can be modified to provide supply
The MJ2955 provides current to 5.0 amperes. Resistor R in protection against short circuits by adding a short-circuit sense
conjunction with the Vg of the PNP determines when the pass resistor, P sc and an additional PNP transistor. The current
,
transistor begins conducting; this circuit is not short-circuit sensing PNP must be able to handle the short-circuit current
proof. Input-output differential voltage minimum is increased of the three-terminal regulator. Therefore, a four-ampere plas-
by Vbe of the pass transistor. tic power transistor is specified.
MOTOROLA LM150
SEMICONDUCTOR LM250
TECHNICAL DATA
LM350
STANDARD APPLICATION
T SUFFIX
PLASTIC PACKAGE
CASE 221
PIN 1. ADJUST
3. Vi,
MAXIMUM RATINGS
Rating Symbol Value Unit
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, V|-Vq = 5.0 V; l|_ = 1.5 A; Tj = T| ow to Thigh; Pmax
[see Note 11.)
Characteristic Figure Symbol Min Typ Max Min Typ Max Unit
RR dB
Ripple Rejection, Vo = 10 V, f = 120 Hz 4
(Note 4)
Without CAdj 65 - 65 -
66 80 66 80
CAdj = 10 ^F
Long-Term Stability, Tj = Thigh Note 5 ( > 3 S 0.3 1.0 0.3 1.0 %/1.0k
Hrs.
Ta = 25C for Endpoint Measurements
Rwc C/W
Thermal Resistance Junction to Case
Peak (Note 6) K Package - 2.3 2.3
2.3
T Package
Average (Note 7) K Package 1.5 - 1.5
1.5
T Package
NOTES:
Thigh = +150Cfor LM150 Since Long-Term Stability cannot be measured on each device be-
(D T|ow = -55Cfor LM150 (5)
-25CforLM250 = +150Cfor LM260 fore shipment, this specification is an engineering estimate of av-
0"C for LM350 = +125Cfor LM350 erage stability from lot to lot.
W Thermal Resistance evaluated measuring the hottest temperature
Pmax = 30 for K suffix (6)
Selected devices with tightened tolerance reference voltage available. resistance junction to case (average).
(3)
SCHEMATIC DIAGRAM
<
-o v out
-O Adjust
Q Adjust 240
Rl
Vout
>R L
"(max. Load)
240 Rl
Rr (min. Load)
Vout
LM150 *H 'L
Adjust
R1 Vr6f Rl
|?% (
0.1 mF 1.0 mF
To Calculate R2:
Pulse Testing Required: Vo = 'SETR2 + 1-250 V
1% Duty Cycle is suggested. Assume IsET = 5.25 mA
D-i*
240
2
6 Adjust Rl ? % I 1N4002 Rl
6 k c Adj;x;io^F
R2
^\ %
04
02
i
Tj = -55C
a l| =5 00 mA
Tj = 25C
^ \\
-04 //
Jl
Tj = 150C
< v \
V| = 15V l
L = 3'.0A'' i
.
v 10V
\^v
=
2^~-
-0.8
-1.0
n
-?5 -50 -25 25 50 75 100 125 150 10 20 30 40
Tj, JUNCTION TEMPERATURE (C) V, - V INPUT - OUTPUT VOLTAGE DIFFERENTIAL
, (Vdc)
AV = 100 mV
< 70
3
S 65 lL -3.0 A
cc
cc
l
L = 2.0 A
z
t 55
3
l = 500 mA
9 45 L
L
= 200 mA
< 40
l
L
= 20mA
35
-75 50 -25 25 50 75 100 125 150
m-75
-50 -25 25 50 76 100 125 150.
Tj, JUNCTION TEMPERATURE (C) Tj, JUNCTION TEMPERATURE (C)
>
u 1.250
Tj = -55C
\
V
-.
<
i-
o Tj = 25C-
> s"
"
AC
1.240
9
/
_ -
>
1 1.230
H
/
1
L-s-==-
1.220
-75 -50 -25 25 50 75 100 125 150 10 20 30 40
Tj, JUNCTION TEMPERATURE (C) V, - V ,
INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdc)
FIGURE 11 RIPPLE REJECTION versus OUTPUT VOLTAGE FIGURE 12 RIPPLE REJECTION versus OUTPUT CURREN1
100
1
f
Dr 10 '
120
1
~
CD
80
- 100
Z WITHOUT z
o C ADJ o C
ADJ
= 10 dF
60 u 80
or cc
w 60
2 40 -v,-v
1,
= 50
Q
5V
imA
=
V mv
v =
15 V WITHOUT C ADJ
f = 120 Hz f= 120 H i
cc
T, = 25 C Tj = 25C
30 35 0.1 1
10 15 20 26
1,-5 )0mA
a,
80
v -iqv
o
o 60
V 25 C
U
be
= 10 ;i F
ADJ
cc
cc
20 NITHOU U ADJ
IK 10K
10 100 IK 10K 100K 1M
FREQUENCY (Hi)
f, FREQUENCY (Hi)
f,
_/V
a '' 5
<
j>
^o
1.0
0.5
t\
C
~TT
L
= 1*F;C ADJ = 10(iF
VOLTAGE
OUTPUT
(V)
DEVIATION
C
L
./
= lMF;C AnJ
J
= 10^F
H
/\
55 "
V. = 15V
,
C|- = 0;WIT HOUTC AfJJ -
6 -0-5 -
v = iov Q h =50mA
>
< -1.0 '
1.
r,
=50mA
* 25C
A AV ul
1 * *}
HOUTC ADJ-
1
- C = 0;WIT 1
L * (A)
AGE
*
1 V
5? io
o
~"S
LOAD
1.
CURRENT V
5f
%=
0.5
1
l A. 4
CJ 1 2 90 4 ) 2 )0
t.TIHIE ((is)
< t. TIM E(ys)
APPLICATIONS INFORMATION
LOAD REGULATION c in
The LM150 capable of providing extremely good
is
D6
1N4002
v out2 t>
LM150 O vO
(1)
240 < I
iD 5
1N4001
7|r 1
fF
Tantalum
Tv 10 MF
Vref
R SC :
+ 'DSS
'Omax
1.25 V
lOmax + 'DSS
OUTPUT RANGE:
0< V < 25 V
0< n < l 3 A
Diodes Di and D2 and transistor Qj are added to allow adjustment
of output voltage to volts.
Vout R, v
O VW
620
1.0 *iF
Adjust
'
To provide current limiting of Iq
to the system ground, the source of
the FET must be tied to a negative
voltage below - 1.25 V.
Vref
R2 ;
'DSS
Vref
R1
-T Minimum V out = 125 V
lOmax + 'DSS
Vo<V(BR)DSS + 1-25V + V Ss
A protects the device during an input short circuit.
iLmin " 'DSS < lo < 3
D-|
out
'out "1
LM150 Owv-
Adjust o- Adjust
MOTOROLA
SEMICONDUCTOR LM317M
TECHNICAL DATA
DT-1 SUFFIX
PLASTIC PACKAGE
CASE 369
DPAK
STANDARD APPLICATION
Vout
v l <> LM317M -V
Cm
0.1 MF
'adj
||
'
Adjust
R1
<240
+ **
1.0 mf
# <^^
DT SUFFIX
PLASTIC PACKAGE
CASE 369A
DPAK
i .
ORDERING INFORMATION
Tested Operating
Device Temperature Range Package
LM317MT 0Cto +125C Plastic Power
*Cj n is required if regulator is located in appreciable distance from power suddIv
filter. LM317MBT# -40Cto +125C Plastic Power
**C is not needed for stability, however does improve transient response.
it LM317MDT
LM317MDT-1 Oto 125"C DPAK
V = 1.25 V(1 +52) + l
adj R 2
#Automotive temperature range selections are
Since l
a(jj is controlled to less than 100 fiA, the error associated with this term is
negligible in most applications. available with special test conditions and additional tests.
Contact your local Motorola sales office for information.
MAXIMUM RATINGS
Rating Symbol Value Unit
ELECTRICAL CHARACTERISTICS
(V^Vp = 5,0 y, = 0.1 A, Tj = T tow| to T niqn [see Note 1), P m ax per Note 2, unless otherwise specified.)
RMS Noise, % of Vo
%V
Ta = 25C, 10 Hz ^ f 10 kHz
RR dB
Ripple Rejection, Vo = 10 V, f 120 Hz (Note 5)
Without C ac |j
66
Cadj = 10 <*F
0.3 %/1.0k
Long Term Stability, Tj = Thigh Note 6 < >
Hrs.
Ta = 25C for Endpoint Measurements
"
7.0 C/W
Thermal Resistance Junction to Case, T Suffix Package "flJC
(4) Selected devices with tightened tolerance reference voltage
NOTES:
available.
(1|T|ow to Thigh = OX to +125X
C a dj, when used, connected between the adjustment pin and
(2) Pmax = 7.5 W (5)
ground.
is
(3) Load and line regulation are specified at constant junction temper-
Since Long Term Stability cannot be measured on each device before
ature. Changes in Vo due to heating effects must be
taken into (6)
shipment, this specification is an engineering estimate of average
account separately. Pulse testing with low duty cycle is used.
stability from lot to lot.
SCHEMATIC DIAGRAM
v in O
-ac'e 8 v
rd
r
vv^ i j^
V I [
J6.3
1^ 1S0> Sl80 2K < 6 k
;60 S 1.25
i 1
VCC
-m.
"out
LM317M O > H'LHt
Cin
To Calculate R2
Pulse Testing Required: V = 'SET R 2 + 1-250 V
1% Duty Cycle Is suggested. Assume SET = 5.25 mA
l
14 V Vn M0V
f = 1 20 H LM317M
Dl*
240
1N4002
^
.
'1 1%
D-! Discharges C ad if Output is Shorted to
j
Ground
*
c adj Provides an AC Ground to the Adjust Pin.
g 0.4 1
* 0.2
= 5V '
/
^ n _/
<
j -0.2 ~^T~
o thout C
Ny, = 10V i\
fcr -0.4
|- vo = 5V /
5 to 500 mA /
a -0.6
- "l
= 100 m/! ^/
6 f= 120 Hz
% -0.8
Vq = 10 V
v,= 14 to 24 V
-1.0
i
2.5
0.80
CD
< = 500n A
< 'L
z
e 0.60 j = 25 ^ >
5< l|_ = 100 mA
I-
I
""
2
Q
O J = i:
0.20
1.0
0.5
It 2 3 4 50 ~ 50
"25 25 50 75 100 125 150
V| - V , INPUT - OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
Tj, JUNCTION TEMPERATURE ("0
4.5
< 4.0
Tj = 25C 40 mA
t 3.5 Ti - i)Pf v,= 5 V 1 Vpp
v = 1.25V
J 30 60
=>
z t^-
S 2.0
0.5 n
i z^-
|
/
20
i T
10 100 IK 10K 100 K In
V - V INPUT - OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
t ,
f.FREQUENCY(Hz)
= G.25V
7U
v = v ref
> I
L
= 10m IV
bb
I
L
= 100 mA
<
bO
3
>
o
z
1.240
bb
"=^ "^^
-Z"--
50
^" 5 "
V|" .2 V <
r 4b
~ 1.230 - Vq-
'L* mA
'S'
lb
1.220 12b 150
-bO -25 25 50 7b 100
-50 -25 25 50 75 100 125 150
Tj, JUNCTION TEMPERATURE (CI
Tj, JUNCTION TEMPERATURE (C)
1 1 1
1
H
Ba dwidth 100 Hz to 10 k 1z
vo = v ref
~ >L 50 mA
10
-- ._.-. 8.0
| 40
-50 -25 25 50 75 100 125 150
-bO -25 25 50 75 100 125 150
S 1-5
< [
*Z> 1.0
lpF
o C
L
=
i- 9 0.1
5>
IV
"
V
11
o
1 / 6
4^
-0.1
6 "0 5 Vo = 1 2b Vi V. = 15 V
> 20mA ? 10MF
1=1
-1.0
l
L
=
,A -0.2 C L = 0.3MF;C adj = VQ = 10V
"
Tj * 25C l
NL =10mA
3-0.3 r} = 25C
S
j
o
>
^cj
'
0.5
'-
10
l,
20
TIMERS)
"*
|
'l
30 40
<t 100
^m+^ 10 20
t,TIME((isl
rlL
30
APPLICATIONS INFORMATION
BASIC CIRCUIT OPERATION
The LM317M is a 3-terminal floating regulator. In op-
EXTERNAL CAPACITORS
eration, the LM317M develops and A 0.1 fiF disc or 1 ^F tantalum input bypass capacitor
maintains a nominal
1.25 volt reference (V (Cj n ) is recommended
to reduce the sensitivity to input
re f) between its output and ad-
justment terminals. This reference voltage is converted lineimpedance.
to a programming current (l The adjustment terminal may be bypassed to ground
prog ) by R1 (see Figure 17),
and this constant current flows through R2 to ground. to improve ripple rejection. This capacitor
(C ad ;) pre-
The regulated output voltage is given by: vents ripple from being amplified as the output voltage
is A 10 yxF capacitor should improve ripple
increased.
rejectionabout 15 dB at 120 Hz in a 10 volt application.
VO = Vref d + ) + l
a djR2
jjf Although the LM317M is stable with no output ca-
pacitance, like any feedback circuit, certain values of
Since the current from the adjustment terminal (l
ac|j) external capacitance can cause excessive ringing. An
represents an error term in the equation, the
LM317M output capacitance (C in the form of a 1 ^F tantalum
was designed to control l
adj to less than 100 /jA and
)
/
/
1| ri T
V re f = - 1-25 V Typical
LOAD REGULATION
The LM317M is capable of providing extremely good
load regulation, but a few precautions
are needed to
obtain maximum performance. For best
performance,
the programming resistor (R1) should be
connected as
close to the regulator as possible to minimize
line drops
which effectively appear in series with the reference,
thereby degrading regulation. The ground end
of R2 can
be returned near the load ground to provide
remote
ground sensing and improve load regulation.
4*
LM317M
LM317M
Adjust
'Omax + 'DSS
v O < p OV + 1 25 V + V SS
T _ inimurn V = 1 .25 V
l
Lmin - lp < < 500 mA -
l
I Dj protects the device during an input short circuit.
~i r
LM317M - LM317M O-ArWWV-
/
Vref
\ + 1 25 V
i
Q max -
y-jcr) adi
'~^T
= I
Vref
\ 125 V
'o m,n
+ i
\rV,^~Si
ad| " FM + R2
j
5 mA < l
out < 500 mA
ORDERING INFORMATION
Tested Operating
Device Temperature Range Package
LM337MT Tj = 0Cto +125C Plastic Power
LM337MBT Tj = -40Cto +125C Plastic Power
STANDARD APPLICATION
VjnO
*Cj n is required if regulator is located more than 4 inches from power supply
filter. A 1.0 iiF solid tantalum or 10 fiFaluminum electrolytic is recommended.
**C is necessary for stability. A 1.0 /iF solid tantalum or 10 /xF aluminum
electrolytic is recommended.
R2.
V out = -1.25 V(1 +)
#Automotiye temperature range selections are available with
special test conditions and
additional tests. Contact your local Motorola sales office
for information.
MAXIMUM RATINGS
Symbol Value Unit
Rating
V|-V 40 Vdc
Input-Output Voltage Differential
PD Internally Limited
Power Dissipation
Tj Oto +125 C
Operating Junction Temperature Range
T stg -65 to +150 C
Storage Temperature Range
Ta = 25C, 10 mA s lo 0.5 A
15 50 mV
|Vol < 5.0 V 0.3 1.0 %V
|V I
* 5.ov
Regtherm 0.03 0.04 %Vq/W
Thermal Regulation
10 ms Pulse, Ta = 25C
65 100
'adj
Adjustment Pin Current
1,2 Aladj 2.0 HA
Adjustment Pin Current Change
2.5 V* |V|-Vol 40V, 10mA> ; l
L =s 0.5 A,
10 mA lo 0.5 A 70 mV
20
|V I
5.0 V 0.3 1.5 %V
|V0l = 5.0 V
0.6 V
Tj ^ Thigh) TS
Temperature Stability (T| ow ^
iLmi
mA
Minimum Load Current to
1.5 6.0
Maintain Regulation (jV|-Vol 10 V)
2.5 10
(|V|-V |
40 V)
Without C a dj
Cadi = 10 ^F
0.3 /o,1.0 k
Long Term Stability, Tj = Thigh (Note 6) Hrs.
T^ = 25C for Endpoint Measurements
7.0 tw
Case RflUC
Thermal Resistance Junction to
volt3ge
(4) Selected devices with tightened tolerance reference
NOTES: available.
d) Tlow t T high OX to +125X
(6)C a dj, when used, is connected between the adjustment pin and
(21 Pr = 7.5 W ground.
junction temper-
(3) Load and line regulation are specified at constant Since Long Term Stability cannot be measured on each device
before
ature. Changes in Vo due to heating effects
must be taken into (6)
average
shipment, this specification is an engineering estimate of
account separately. Pulse testing with low duty cycle is used. from lot to lot.
stability
SCHEMATIC DIAGRAM
-o Adjust
n
Pulse Testing Required:
1% Duty Cycle
is suggested.
in: IE.
~LF Line Regulation (%V Q ) = I^^OL^^Ix , 0Q
N'OHl
VEE
120 ^
Jlmex. -vo m ,. Load)
Load) J-l
Load)
-V| o- LM337M
=
Load Regulation (mV) = V min Load) - V , max Load)
.
Load Regulation (%V )
=
v O (min. Load)
"X 100 :
, .
JTT T
C ln ^ 1/iF
- $
To Calculate R2:
R2= (Jio.-^
W ref '
^ LM337M
<>
This assumes l
acjj Pulse Testing Required:
is negligible. 1% Duty Cycle is suggested.
n C 3 di /-r^ 10 MF
c in 1F
I
RL M
R1>120 D1*ik1N4002
LM337M
14.3 V
Output shorted to Ground.
4.3 V
Di Discharges C ad j
if is
s
lL
= 0.5 A
g -0.2
<
" -0.4
2 -OB
o
>
t- -0.8
V, = -
15 V
V = -10 V
6
> -1.2
-1.4
"
50 25 25 50 75 100 125
" 150 '0 20 30 40
Tj, JUNCTION TEMPERATURE (CI
V, - V ,
INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdcl
< I
1
v ^ -5 V
2.5
cr
o
3 65
z
<
60
S 2.0
J! 55
L
= 500 mA
=
z
l
L
= 20 mA
40
- 50
"25
-,n 1
- <J = -55C
o 0.8
5 0.6
a
;
1.230
-50 -25 25 50 75 100 125 150
0.2
T
1 .
'0 20 30 40
Tj, JUNCTION TEMPERATURE (C)
V, - V INPUT - OUTPUT VOLTAGE DIFFERENTIAL (Vdcl
Q ,
FIGURE 11 RIPPLE REJECTION versus OUTPUT VOLTAGE FIGURE 12 RIPPLE REJECTION versus OUTPUT CURRENT
1 1
100 1
"Tl
100
1
"aoi
2 60
40
v,-v v
l,=5C fl"?
OmA V = -15V
(=120 Hz 20
Tj = 25C f = 120 Hi
T = 25 U C
1
1 1 1
V-
v
15V
10V =
l -5 00 mA
ttu L
CL = 1 /jF
u
Tj = 25 C
< C odj =10MF
bu
40
Without C a ,|j N. = Withou T^
V
= C ad| =10/iF
-15V
20 v =
-10 V
500 mA
-v 100
25C
10
f, FREQUENCY (Hzl (FREQUENCY (Hz)
/"" \
0.8
0.2
ri CT"
\ Without C a dj
/
o.t>
0.4
0.2 A Without C a jj
l \ -0.2
T Cadj
= 10 "F
-
V
^ .J_ \.
f\
fi\ \.'
-U.4
'
^ C i\ 10jiF -O.b
< V = -15 /
-0.4 |
D
= "10 V
V = -10V
mA" -O.b
V L = 50 mA
/
50
/
=
25C V L=1mF
25C
-U.b
cL = I^F \ 1 ...L-, /
-I.U
SO t
(.TIN E(iis)
APPLICATIONS INFORMATION
BASIC CIRCUIT OPERATION be returned near the load ground to provide remote
The LM337M is a 3-terminal floating regulator. In op- ground sensing and improve load regulation.
eration, theLM337M develops and maintains a nominal
-1.25 volt reference (V re f) between its output and ad-
justment terminals. This reference voltage is converted
EXTERNAL CAPACITORS
to a programming current
(IpROG) b y R 1 (see Figure A 1.0 fiF tantalum input bypass capacitor (C( n ) is rec-
17), and this constant current flows through R2 from
ommended to reduce the sensitivity to input line
ground. The regulated output voltage is given by:
impedance.
R2. The adjustment terminal may be bypassed to ground
v out = V re f d + + 'adj R2 to improve ripple rejection. This capacitor (C
py) a dj) pre-
vents ripple from being amplified as the output voltage
Since the current into the adjustment terminal (l is increased. A 10 /iF capacitor should improve ripple
acjj)
represents an error term in the equation, the LM337M rejection about 15 dB at 120 Hz in a 10 volt application.
was designed to control l
atjj to less than 100 /aA and An output capacitor (C in the form of a 1.0 aiF tan-
)
LM337M
V ref = -1 25 V Typically
LOAD REGULATION
The LM337M is capable of providing extremely good
Vj n ol-f-o- LM337M
load regulation, but a few precautions are needed
1N4002
to
obtain maximum performance. For best performance,
the programming resistor (R1) should be connected as D1
1N4002
close to the regulator as possible to minimize line drops
which effectively appear in series with the reference,
thereby degrading regulation. The ground end of R2 can
ADJUSTABLE
Pin 1. Adjust
INTERNAL SCHEMATIC
T SUFFIX 2. Output Inhibit
ORDERING INFORMATION
Output Package
Output o Case
30 k
Device Voltage Tolerance Number
LM2931AD-5.0 5.0 V 3.8% 751
MAXIMUM RATINGS
Rating Symbol Value Unit
Input Voltage Continuous
40 Vdc
Transient Input Voltage (t 100 ms) Vjn(T)
Transient Reverse Polarity Input Voltage
leL
1.0% Duty Cycle, r 100 ms
- V in(r)
V
Power Dissipation
Case 29 (TO-92)
Ta = 25C PD Internally Limited Watts
Thermal Resistance Junction to Ambient
0JA 178 C/W
Thermal Resistance Junction to Case
0JC 83 C/W
Case 751 (SOP-8)
TA = 25C
PD Internally Limited Watts
Thermal Resistance Junction to Ambient
0JA 180 C/W
Thermal Resistance Junction to Case
0JC 45 C/W
Case 221A and 314D (TO-220 Type)
Ta = 25C
PD Internally Limited Watts
Thermal Resistance Junction to Ambient
0JA 65 C/W
Thermal Resistance Junction to Case
SJC 5.0 C/W
Tested Operating Junction Temperature Range
Tj - 40 to + 1 25
Storage Temperature Range
'stg 65 to +150
, ES R) = 0.3 . Tj = 25T,
Note 1, unless otherwise noted.'
LM2931A-5.0 LM2931-5.0
Characteristic Symbol Min Typ Max Min Tvp I Max Unit
FIXED OUTPUT
Output Voltage
v
Vin = 14 V, l = 10 mA, Tj = 25C V
4.81 5.0 5.19 4.75 5.0 5.25
Vj n = 6.0 V to 26 V, lo 100 mA, Tj = -40 to 125C 4.75 5.25 4.50 5.50
Line Regulation
R egiine
V in = V - mV
V in =
9.0
V
to 16 V 2.0 10 - 2.0 10
6.0 to 26 V
4.0 30 4.0 30
Load Regulation (Iq = 5.0 mA to 100 mA) R egioad 14 50 14 50 mV
Output Impedance
zo - 200 - - 200 mil
lO = 10 mA, Alo = 1.0 mA, f = 100 Hz to 10 kHz
Bias Current
Vin = 14
'B
- mA
V jn =
V,
V
l = 100 mA, Tj = 25C
5.8 30 - 5.8 30
6.0 to 26 V, = 10 mA, Tj = -40 to 125C
l
0.4 1.0 0.4 1.0
Output Noise Voltage (f = 10 Hz to 100 kHz) Vn 700 _ 700
Long-Term Stability
S 20 - - 20 - mV/
kHR
Ripple Rejection (f = 120 Hz) RR 60 90 _ 60 90 dB
Dropout Voltage
Vin-V V
lO = 10 mA - 0.015 0.2 - 0.015 0.2
lO = 100 mA
0.16 0.6 0.16 0.6
Over-Voltage Shutdown Threshold v th(OV) 26 29.5 40 26 29.5 40 V
Output Voltage with Reverse Polarity Input (Vj n
= - 15 V) -vo -0.3 1
- -0.3 V
NOTES:
V CVde P U Se ,echnj<> ues are used durin 9 'est to maintain junction temperature as close
'
3-90
LM2931 Series
0.3 n.
ELECTRICAL CHARACTERISTICS (V in = 14 V, V = 3.0 V, l = 10 mA Ri = 27 k, C = 100 M F. C (ESR)
LM2931C
Symbol Min Typ Max Unit
Characteristic |
|
ADJUSTABLE OUTPUT
V
Reference Voltage (Note 2, Figure 18) Vref
1.14 1.20 1.26
= 10 mA, Tj = 25C
l
1.08 1.32
s= 100 mA, Tj = -40 to 125C
l
mA to mA) Regioad
- 0.3 1.0 %/V
Load Regulation do = 5.0 100
zo 40 mn/v
Output Impedance
lO - 10 mA, Alo = 10 mA, f = 10 Hz to 10 kHz
IB
mA
Bias Current
mA
- 6.0
Iq = 100
0.4 1.0
Iq = 10 mA 0.2 1.0
Output Inhibited (V tn (OI) = 2 5 v
- >
= 10 Hz Vn - 140 ^Vrms/V
Output Noise Voltage (f to 100 kHz)
S - 0.4 %/kHR
Long-Term Stability
RR 0.10 0.003 %/V
Ripple Rejection (f = 120 Hz)
Vin-V0
V
Dropout Voltage - 0.015 0.2
Iq = 10 mA
0.16 0.6
\q = 100 mA
26 29.5 40 V
Over-Voltage Shutdown Threshold Vth(OV)
- 15 V) -v -0.3 V
Output Voltage with Reverse Polarity Input (Vj n =
V
Output Inhibit Threshold Voltages Vth(OI)
2.15 1.90
Output "On," Tj = 25C 1.20
Tj = -40 to 125C
2.50 2.26
Output "Off," Tj = 25C
3.25
Tj = -40 to 125C
N E to ambient as possible.
[ to maintain junction temperature as clow
Lo W duty cycle pulse technique, are used during test
output to the adjust p.n across R,.
2) Th? reference voltage on the adjustable device is measured from the
DEFINITIONS
Dropout Voltage
The input/output voltage differential Maximum Power Dissipation The maximum total de-
vice dissipation for which the regulator will
operate
at which the regulator output no longer
maintains reg-
Mea- within specifications.
ulation against further reductions in input voltage.
sured when the output decreases 100 mV from nominal Bias Current
That part of the input current that is not
value at 14 V input, dropout voltage is affected by junc- delivered to the load.
tion temperature and load current.
Output Noise Voltage The rms ac voltage at the out-
Line Regulation
The change in output voltage for a put, with constant load and no input ripple, measured
change in the input voltage. The measurement is made over a specified frequency range.
under conditions of low dissipation or by using pulse
techniques such that the average chip temperature is Long-Term Stability Output voltage stability under
not significantly affected. accelerated life test conditions with the maximum rated
Load Regulation The change output voltage for a voltage listed in the devices electrical characteristics
in
40 60 25 50 75
Iq, OUTPUT CURRENT (mA) Tj, JUNCTION TEMPERATURE |C)
I I
vr = 5 OV
X
y<
=
S^
lA 2
A *>
RL = 50 ill = 00 mA
-Vq = 5.0 V _
RL = 500 12
"TA = 25C
10 20 30 40
Vj
n , INPUT VOLTAGE (V)
FIGURE 7 BIAS CURRENT versus INPUT VOLTAGE FIGURE 8 BIAS CURRENT versus OUTPUT CURRENT
8.0
Vin
= 14V
Tj = 25C
f
i 4.U
5
_ 2.0
30
I
o
4 ( 30 100
20 30 40 50 60
l ,
OUTPUT CURRENT (mA)
V; n ,
INPUT VOLTAGE (VI
FIGURE 9 BIAS CURRENT versus JUNCTION TEMPERATURE FIGURE 10 OUTPUT IMPEDANCE versus FREQUENCY
V jn = 14 V
vo = 5.0 V
'0
= >0mA
lg = mA
I
m
o 85
a i
<
85
z = 0.15(1
V C (ESR)
o Vj n - 4V 1
o
|3 75 V - 5 ov o Vm = 14 V
100 mV Vq = 5,0 V
RL = 500 n Zj 75 f = 120 Hz
a.
Co = 100 ^F T A = 25C
E 65
Ta - 2Hr
E
g r
O(ESR) = 3o\y cc
Electrolyti
i 65
55 50 10
40 60
100 1.0 k 10 k 100 k 1.0 M 10 H /I
20
Iq, OUTPUT CURRENT (mA)
f, FREQUENCY (Hz)
_LM2931C Adjustable
1(3 = 100 mA
> 1.220 _Vj n = VQ + 1.0V
TA = 25C
I
y 1.200
1.160
TYPICAL APPLICATIONS
V = V ref (l + H?)
"V
+ "Adj 22.5 k * -&-**-
\ R1 + R2
3-94
LM2931 Series
FIGURE 19 5.0 A LOW DIFFERENTIAL VOLTAGE REGULATOR FIGURE 20 CURRENT BOOST REGULATOR WITH
SHORT-CIRCUIT PROJECTION
Output
5.0 V (a 5.0 A
o*
CM
#345
'2
ruin f osr = 2.2 Hz
100 1.0 k
APPLICATIONS INFORMATION
The LM2931 series regulators are designed with many be observed over the entire operating temperature
protection features making them essentially blow-out
range of the regulator circuit.
With economical electrolytic capacitors, cold temper-
proof. These features include internal current limiting,
ature operation can pose a serious stability problem. As
thermal shutdown, overvoltage and reverse polarity in-
the electrolyte freezes, around -30C, the capacitance
put protection, and the capability to withstand tempo-
will decrease and the equivalent series resistance ESR
rary power-up with mirror-image insertion. Typical ap-
increase drastically, causing the circuit to oscillate.
plication circuits for the fixed and adjustable output
will
Quality electrolytic capacitors with extended tempera-
device are shown in Figures 17 and 18.
ture ranges of -40to85Cand - 55 to 105C are
readily
The input bypass capacitor Cj is recommended if the
n
available. Solid tantalum capacitors may be a better
regulator located an appreciable distance (s= 4") from
is
This will reduce the circuit's sen- choice if small size is a requirement, however, the max-
the supply input filter.
sitivity to the input line impedance at high
frequencies. imum |Zol limit over temperature must be observed.
not internally compensated Note that in the stable region, the output noise voltage
This regulator series is
the
linearly proportional to |Zol- In effect, Co dictates
and thus requires an external output capacitor for sta- is
Product Preview
LOW DROPOUT
LOW DROPOUT DUAL REGULATOR DUAL REGULATOR
The LM2935 is a dual positive 5.0 volt low SILICON MONOLITHIC
dropout voltage
regulator, designed for standby power systems. INTEGRATED CIRCUIT
The Main Output
is capable of supplying 750
mA for microprocessor power, and
can be turned on and off by the Switch/Reset
input. The other
output is dedicated for standby operation of volatile
memory, and
is capable of supplying up to
10 mA loads. The total device fea-
tures a low quiescent current of 3.0 mA or
less when supplying
10 mA from the Standby Output.
This part was designed for harsh automotive environments and
is therefore immune to many input supply voltage problems such
as reverse battery - 1 2 V), double battery + 24 V), and load
(
( dump
transients ( + 60 V).
V in O-
O 5 V/750 mA
Pin 1. Input
2. Main Output
Standby
<h-f O 5 V/10 mA
3.
4.
Ground
Switch/Reset
5. Standby Output
3-96
LM2935T
MAXIMUM RATINGS
Rating Symbol Value Unit
Vin 60 Vdc
Input Voltage Continuous
Characteristic Symbol |
Min ]
Typ |
Max J
Unit |
MAIN OUTPUT
v 4.75 5.0 5.25 V
Output Voltage
Vj n = 6 V to 26 V, Irj = 5.0 mA to 500 mA, Tj = -40C to 125C
Regiine
mV
Line Regulation
= 9.0 V to 16 V, In = 5.0 mA
- 4.0 25
Vj n
10 50
Vj n = 6.0 V to 26 V, In = 5.0 mA
= 5.0 mA to 500 mA) Regioad
- 10 50 mV
Load Regulation (l
S - 20 mV/kHR
Long Term Stability
= 120 Hz)
RR - 66 dB
Ripple Rejection (f
Vin-Vo V
Dropout Voltage
Iq = 500 mA
- 0.45 0.6
0.82
Iq = 750 mA
'SC 0.75 1.2 A
Short Circuit Current Limit
Vth(OV) 26 31 V
Overvoltage Shutdown Threshold
V
Reset Output Voltage
0.9 1.2
Low V in = 4.0
State, V, Ron/Off = 20 kn vol
5.0 6.0
High State, V in = 14 V, Ron/Off = 20 kn Voh 4.5
ISink
- 5.0 mA
Reset Output Current (VR eset = 1.2 V)
ROn/Off
- 20 30 kn
Reset Pull-Up Resistor, On/Off
= 10 -v -0.6 V
Output Voltage with Reverse Polarity Input (V-,
n = - 15 V, R|_ 11)
Vj n , Input Voltage
(Pin 1)
Reset (Pin 4)
v stby- Standby
Voltage (Pin 5)
Load
Dump
MOTOROLA
SEMICONDUCTOR MC1466L
TECHNICAL DATA
TYPICAL APPLICATIONS
FIGURE 1 O-TO-15 Vdc, 10-AMPERES REGULATOR FIGURE 2 O-TO-40 Vdc, 0.5-AMPERE REGULATOR
20 Vdc
MC1466L
7? 7i s
1N4001
0B EOU
M-
'rrr 2 k 3 =klOpF
_T
<H(-
CR2
-W < x
FOR Vp<20Vik. R =
0) ~T L > t-
3-99
MC1466L
ELECTRICAL CHARACTERISTICS (TA = +25C, V aux = +25 Vdc unless otherwise noted)
Characteristic Symbol Win Typ Max Units
Auxiliary Voltage (See Notes 1 & 2) Vdc
(Voltage from pin 14 to pin 7)
Auxiliary Current
mAdc
Internal Reference Voltage
V|R
(Voltage from pin 12 to pin 7)
MC1466L
(100%) + AV iov .
NOTE 3: ofViovdiandVrefd).
Reference current may be set to any value of current less than b. Change the V aux to 28 volts and note the value of Vj ov (2)
1.2 mAdc by applying the relationship: and V re f (2). Then compute Line Voltage Regulation:
8.55 AV iov = AV iov(1) - V iov( 2)
lref(mA) = % Reference Regulation =
r7w-
IVref 111 - Vref oqo/o) = *Yiei< 10 o%)
NOTE 4: (2)'
(1
A built-in offset voltage (15 mVdc nominal) is provided so that v ref(1) V ref
the power supply output voltage or current may be adjusted to Line Voltage Regulation =
zero.
NOTE 5:
^^(100%) + AV iov .
v ref
Load Voltage Regulation is a function of two additive compo-
NOTE 7:
nents, AVj OV and AV re f, where AVj ov is the change in input offset
Load Current Regulation is measured by the following
voltage (measured between pins 8 and 9) and AV re f is the
procedure:
change in voltage across R2 (measured between pin 8 and load current, such
a. With S2 open, adjust R3 for an initial l|_(i ),
ground). Each component may be measured separately or the
that V is 8.0 Vdc.
sum may be measured across the load. The measurement pro- With S2 closed, adjust Rj for V Q = 1.0 Vdc and read l(_(2).
b.
cedure for the test circuit shown is:
Then Load Current Regulation =
a. With S1 open (I4 - 0) measure the value of V iov (i)
and
V re f / 1
"U2| - 'LID' (1 ooo/o) 'ref
b. Close SI, adjust R4 so that I4 = 500 /iA and note Vj ov (2) 'Ml)
and V ref (2). where mAdc, Load Current Regulation is specified
l
re f is 1.0
Then AVj ov = Vj ov m - V iov ( 2) in this manner because l
re f passes through the load in a
% Reference Regulation = direction opposite that of load current and does not pass
v rfff(1)- v ref(2)i = ^r!, 100 o/o) through the current sense resistor, Rs .
(10 oo/o)
'
Vref(l) v ref
INTERNAL
VOLTAGE
^
REGULATOR
REFE PENCE
CUP IENT
SO RCE
CIRCUIT SCHEMATIC
INTERNAL
VOLTAGE
REGULATOR
m.
i ~ 10 pF
MC1466L
^ne
T"
I
" *r-
9 26 6 12
^
R3
CURRENT
LIMIT
nI
CR5T R ^
s<
I L7*
>|R2
< VOLTAGI
'"'I _fj- ADJUST
1
-i i
NORMAL DESIGN PROCEDURE AND DESIGN CONSIDERATIONS
1. Constant Voltage: 6. The RC network (10 pF, 240 pF, 1.2 kn) is used for compen-
For constant voltage operation, output voltage V given by:
is sation. The values shown are valid for all applications. How-
V = dref) (R2> ever, the 10 pF capacitor may be omitted if f of Q1 and Q2 is
where R2 is the resistance from T
pin 8 to ground and l
re f is the greater than 0.5 MHz.
output current of pin 3. 7. For remote sense applications, the positive voltage sense ter-
The recommended value of re f l is 1.0 mAdc. Resistor R1 sets minal (Pin 9) is connected to the positive load terminal through
the value of re f l
a separate sense lead; and the negative sense terminal (the
. 8.5 ground side of R2) is connected to the negative load terminal
'
ref = R7 through a separate sense lead.
where R1 is the resistance between pins 2 and 12. 8. C may be selected by using the relationship:
2. Constant Current: C = (100 M F) iL(max)' where iL(max) is the maximum load
For constant current operation: current in amperes.
(a) Select R s for a 250 mV drop at the maximum desired reg- 9. C2 is necessary for the internal compensation of the MC1466.
ulated output current, For optimum regulation, current out of Pin 5, I5 should not
ma x- l 10.
3.
(b) Adjust potentiometer R3 to set constant current
If Vj
desired value between zero and lmax-
output at
l
0.5 mAdc
max = maximum short-circuit
j81 = minimum beta of Q1
load current (mAdc)
4. In applications where very low output noise is desired, R2 may /32 = minimum beta of Q2
be bypassed with C1 (0.1 fiF to 2.0 ^F). When R2 is bypassed,
Although Pin 5 will source up to 1.5 mAdc, I5 > 0.5 mAdc will
CR1 is necessary for protection during short circuit conditions. result in a degradation in regulation.
5. CR5 is recommended to protect the MC1466 from simultane- CR6
1 1 recommended when V > 1 50 Vdc and should be
is
rated
ous pass transistor failure and output short circuit. such that Peak Inverse Voltage > V .
10
V C EO of Q2 s V
3-102
MC1466L
on useful applications.
THEORY OF OPERATION yields a good working PNP from a lateral device working
at a collectorcurrent of only a few microamperes. Its base
The schematic of Figure 5 can be simplified by break- voltage (Vfio) is derived from a temperature compensated
down into basic functions, beginning with a simplified portion of the diode string and consequently the overall
ing it
CR4 and CR6 through CR8 form the stable of Q3 is not important because approximately 9 volts
CR2 through
At exists Vb 2
between and V12, making the AVbe's very
reference needed to balance the differential amplifier.
small in percentage. Circuit reference voltage is derived
balance (Vfil = Vb2)> the output voltage, (V12 - V7),
across either of the two from product of Ir and Rr; if Ir is set at 1 mA
the
is at a value that is twice the drop
(Rl = 8.5 kJ2), then Rr (in kJ2) = V Other values of
diode strings: V ]2 - V 7 = 2 (V C R1 + V C R2 + VcR3
+ .
126 2
J-J
> VB2 v z~ v be 8 55
-
Rr|
gm :
gm= 104^5" = = 7 -5mA/volt. while the output current is sampled across R$ by pin 11.
(2)
134 When Ij_ Rs is 15 mV below the reference value, voltage
Vj begins to rapidly rise, eventually gaining complete
FIGURE 9 - VOLTAGE CONTROL AMPLIFIER
control of Q9 and limiting output current to a value of
V2/RS- If V2 is derived from a variable source, short
circuit current may be controlled over the complete out-
H-
-
*r
7.25 V6 9
Reference Voltage + Output Sense
Transistor Q9 and five diodes comprise the essential The analysis thus far does not consider changes in Vr
parts of the output stage (Figure 12). The diodes perform due to output current changes. If Ii_ increases by 500 mA
an "OR" function which allows only one mode of operation the collector current of Q9 decreases by 1 .25 mA, causing
at atime - constant current or constant voltage. However, the collector current of Q5 to increase by 30 (iA. Accord-
an additional stage (Q9) must be included to invert the ingly, Ir will be decreased by =0.30 nA which will drop
compatible with the driving requirements the output by 0.03%. This figure may be improved con-
logic and make it
liverable output current and boosts the output impedance the maximum power rating of the package must be kept
in mind. For example if Ir = 4 mA, power dissipation is
to that of the current source.
Note that the negative (substrate) side of the MCI 466 is
PD = 20V(8mA) + (ll Vx3mA)= 193 mW. (5)
7.25 volts lower than the output voltage, and the reference
This indicates that the circuit may be safely operated up
regulator guarantees that the positive side is 1 1 volts above
to 118C using 20 volts at the auxiliary supply voltage.
the output. Thus the IC remains at a voltage (relative to
If, however, the auxiliary supply voltage is 35 volts,
ground) solely dependent on the output, "floating" above
and below V D VcE across Q9 is only two or three Vbe' s
. PD = 35 V (8 mA) + 26 V (3 mA) = 358 mW. (6)
depending on the number of transistors used in the series pass which dictates that the maximum operating temperature
configuration. than 91C to keep package dissipation within
must be less
Performance characteristics of the regulator may be approx- specified limits.
imately calculated for a given circuit (Figure 2). Assuming Line voltage regulation is also a function of the voltage
that the two added transistors (Q12 and Q13) have minimum change between pins 8 and 9, and the change of V re f. In
betas of 20, then the overall regulator transconductance will
this case, however, these voltages change due to changes in
be: the internal regulator's voltages, which in turn are caused
For a change in current of 500 mA the output voltage value ofV aux must always be between 20 and 35 volts.
will drop only: Figure 6 shows six external diodes(CR] to CR6) added
for protective purposes. CRi should be used if the output
0.5
voltage is less than 20 volts and CR2, CR3 are absent. For
AV = = 4.2 mV. (4)
120 V higher than 20 volts, CR] should be discarded in favor
of CR2 and CR3. Diode CR4 prevents IC failure if the
FIGURE 12 MC1466 OUTPUT STAGE series pass transistors develop collector-base shorts while
the main power transistor suffers a simultaneous open emit-
ter. If the possibility of such a transistor failure mode
From Voltage seems remote, CR4 may be deleted. To prevent instant-
From Current Control Amplifier
Control Amplifii aneous differential and common mode breakdown of the
APPLICATIONS
Figure 2 shows a typical 0-to-40 volts, 0.5-ampere regu-
lator with better than 0.01% performance. The RC network
between pins 5 and 6 and the capacitor between pins 13 and
14 provide frequency compensation for the MCI 466. The
external pass transistors are used to boost load current, since
the output current of the regulator is less than 2 mA.
vo-
Figure 1 is a O-to-15 volts, 10-ampere regulator with the tible with a short circuit current of 100 mA. Yet current
pass transistor configuration necessary to boost the load foldback allows us to design for a maximum regulated load
current to 10 amperes. Note that C has been increased to
G current of 500 mA. the pertinent design equations are:
1000 nF following the general rule:
Let R2 (kS2) = V
C = 100mF/A
L I .
0.25 f Ik
The prime advantage of the MCI 466 is its use as a high
voltage regulator, as
shown in Figure 3. This 0-to-250 volts
0.1 -ampere regulator
of Figure 14 is superior for handling high voltages and yet The Safe Operating Area Curves indicate
_ V limits t* low which the device
is short-circuit protected. This is due to the fact that load 'C CE will
not enter secondary breakdown. Collector
current isdiminished as output voltage drops (V^ff increases - load lines for specific circuits must fall
- within the applicable Safe Area to avoid
as V t) drops) as seen in Figure 15. By careful design the - operation below the maximum Tj, power-
- temperature derating must be observed for
load current at a short, l^f can be made low enough such _ both steady state and pulse power
conditions
that the combined Vet (Vj) and IsC still falls within the
1 1 1 I 1 1 I | 1 1
dc safe operating area of the transistor. For the illustrated 1.0 2.0 4.0 6.0 10 20 40 60 100 200 400 1000
design (Figure 14), an input voltage of 210 volts is compa- V CE , COLLECTOR EMITTER VOLTAGE (VOLTS)
V_ = 200 V
The terms Isc an d Ik correspond to the short-circuit the normal ac line often contains bursts of voltage running
current and maximum available load current as shown in from hundreds to thousands of volts in magnitude and only
Figure 15. microseconds in duration. Under some conditions this en-
- TYPICAL FOLDBACK PERFORMANCE ergy is dissipated across the internal zener connected be-
FIGURE 15
tween pins 9 and 7. This transient condition may produce
a total failure of the regulator device without any apparent
explanation. This type of failure is identified by absence
of the 7 volt zener (CR1 ) between pin 9 and pin 7. To pre-
TRANSIENT FAILURES
In industrial areas where electrical machinery is used
MJE340
OR EQUIV
- Vin
1.2k?
X-Tv 10pF
MJ413
OR EQUIV
-o K- T
MC1466L
HK"
-H
All diodes.
1N4001 or
equivalent.
2N4922
OR EQUIV
G SUFFIX
METAL PACKAGE
CASE 603C
CIRCUIT SCHEMATIC
Com pen
^
4 ToTT' ^f>^
r
:
only)
200 f 7(11)
'Sense (-)
L SUFFIX
CERAMIC PACKAGE
CASE 632
V|E_
5(8) GndilOO)
Voltage ,, Compen
(-) ORDERING INFORMATION
Adjust 9(14) 8(12)
Device Temperature Range Package
1. T| 0W = OXfor MC1468
= -55Cfor MC1568
2- T h gh = +70Cfor MC1468
j
3-110
1 *
MC1468, MC1568
TYPICAL APPLICATIONS
VT -T- 47;
f
MCI 568
sc MC1468
COMPEN(-)
I
vee vo- sensei-i
ii 6<J> 76
fisc
-wv
-9-*0
APPLICATIONS INFORMATION
Compensation capacitors C1 and C2 must be located The presence of Bal atjj, pin 2, on devices housed in the dual in-line
package (L suffix) allows the user to adjust the output voltages down
as close to the device as possible to prevent instability to 8.0 V. The required value of resistor R2 can be calculated from
due to noise pickup. Input bypass capacitors Cj n are
required if the device is located more than four inches R1 Ri nt (j. + Vz )
R2 =
from the power source filter capacitor. Output capacitor (Vo - * - V z - <* R1
t
)
C4 is required for stability of the negative regulator. Where: Rj nt = An Internal Resistor = R1 = 1.0 kfl
4> = 0.68 V
Capacitor C3 is used to improve the positive regulator
V z = 6.6 V
load transient response. Low impedance quality capac-
Some common design values are listed below:
itors are required when operating the MC1568 at its
Vq(V) R2 TcVqIWC) Ib + ImAI
temperature extremes. Extended range ceramic, tan-
14 1.2 k 0.003 10
talum, and electrolytic capacitors are readily available 12 1.8 k 0.022 7.2
from several manufacturers. 10 3.5 k 0.025 5.0
TYPICAL CHARACTERISTICS
(V Cc = +20V, V EE = -20V,V = 15 V, TA = + 25C unless otherwise noted.)
1 1
2.0
POSITIVE REGULATOR
<
'
+ 25C=sT A + 125C
>
o 3.0
?n
^40 >
o R< = 4 0OHM
POSIT VEOUT PUT*" X NEGATIVE REGULATOR
^ 5.0 C
Tj = TA
>
TA - 1 n
a-
5
o
6.0
I
7.0 I
2 ) 4) 6 8 3 100 i 20 40 60 8 100
k.to ADCUF RENT( mA| lL, LOAD CURRENT (mA)
\ V 4^
2- PACKAGE, NO HEATSI
L
\ \
3- G PACKAGE, INFINITE H =ATSINK
4 LP/ CKAGE, If FINITE HE ATSINK *~~
CURVE NUMBER
- G PACKAGE, NO HEATSINK
1
2 L PACKAGE NO HEATSINK
1 3 - G PACKAGE, INFINITE HEATSINK
J '
-55 +26 +50 +75 +100 +125 2.0 4.0 6.0 8.0 10 12 14
TA AMBIENT TEMPERATURE (C)
,
|V in -V |, INPUT-OUTPUT VOLTAGE DIFFERENTIAL (V)
<
Tj == 25C
.
RSC = 10OH MS
cc
13 40
i _ RSC = 20 OH MS
20
8.0 12 16 20 24
+25 +50 +75 +100 +125
RSC, SHORT-CIRCUIT RESISTOR (OHMS)
Tj, JUNCTION TEMPERATURE (C)
3-112
MC1468, MC1568
- v cc = IVccI
POSIT VE STAN
-55C POSITIVE STANDBY CURRENT^
+ 25C
J+125C
-55C
NEGATIVE STANDBY CURRE NT
+ 25C~
-
+ 125C
GATIVE
ST ANDBY C URRENT !
20 22 24 26 28 17 18
>
^
E POSITIVE REGULATOR
o
5
AI L = 0-10 mA
Rsc = 10 ofHMS
O
> NEGATIVE REGULATOR
\.
'
17 18 19 TIME, 20 /iS'DIV
Vq, OUTPUT VOLTAGE (V)
Av cc = +;
PO SITIVE 1 EGULATOR
i
I
. AV in = + 20 to h-23 V
'
R SC = 10 OHMS
z
I I
I 1
NE GATIVE REGULOTOR
I
AV EE = - 20 V to -23V 1
1/
10 k 100 k
TIME, 50 /H.S/DIV
, INPUT FREQUENCY (Hz)
:JRsc = 4 OHMS
l[_ = 10 mA
/J?
== EeJ*
-- [i
1
1
111
4 - :
^
%M
<2^=j
j in
NEGATIVE REGULATOR ;
,
I.
POSITIVE REGULATOR
T
in J!
1.0 k 10 k 100 k
MC1723CD SOU
Metal Can
MC1723
MC1723CG LM723CH, /*A723HC
MC1723CL LM723CJ, juA723DC
0C to + 70C
Ceramic DIP MC1723C
MC1723CP LM723CN, mA723PC Plastic DIP
VOLTAGE REGULATOR
VOLTAGE REGULATOR
SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC1723 is a positive or negative voltage regulator designed
to deliver load current to 150mAdc. Output current capability can
be increased to several amperes through use of one or more external
MC1723 is specified for operation over the military
pass transistors.
temperature range (-55C to +125C) and the MC1723C over the
commercial temperature range (0 to +70C)
(Bottom View)
FIGURE 1 - CIRCUIT SCHEMATIC
G SUFFIX
METAL PACKAGE
CASE 603
if"
L SUFFIX
CERAMIC PACKAGE
CASE 632
151
3(J I7|5(JVEE D SUFFIX
INVERTING INVERTING PLASTIC PACKAGE
INPUT INPUT
CASE 751A
(SO-14)
(7<V <37)
(12) 8 6(ioi use
MC1723
(MC17230
IT
T
/P.1 + R2\
I
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: Ta = +25C, Vj n 12 Vdc, V = 5.0 Vdc, l|_ = 1.0 mAdc, Rsc = 0,
C1 = 100 pF, C re f = and divider impedance as seen by the error amplifier 10 kn connected as
=s shown in Figure 2)
MC1723 MC1723C
Characteristic Symbol Min Typ Max Min Typ Max Unit
Input Voltage Range V, n 9.5 - _
40 9.5 40 Vdc
Output Voltage Range vo 2.0 - -
37 2.0 37 Vdc
Input-Output Voltage Differential V,n-V C 30 - -
38 3.0 38 Vdc
Reference Voltage 6.95 7.15
Vref 7.35 6.80 7.15 7.50 Vdc
Standby Current Drain (l
L = 0, Vj n = 30 V) - 2.3 -
IB. 3.5 2.3 4.0 mAdc
Output Noise Voltage (f = 100 Hz to 10 kHz) Vn MV(RMS)
Cref = - 20 - - 20 -
C re f = 5.0 mF 2.5 2.5
Average Temperature Coefficient of Output TCVq - 0.002 0.015 - 0.003 0.015 %/C
Voltage (T, ow A <T <T
nign ,
Line Regulation
Regiine %v
(T A ^+25C)-!
12V < V -<15V " 0.01 0.1 - 0.01 0.1
_ (12 V<V, n <40 V 0.02 0.2 0.1 0.5
(T,ow<T A <T nign (D)
12V<V m <15V 0.3 0.3
Load Regulation (1.0mA<l L <50 mA) Re 9load
TA +25C
%v
= - 0.03 0.15 " 0.03 0.2
T|ow<T A <T nign (D 0.6 0.6
Ripple Rejection (f = 50 Hz to 10 kHz) RR dB
Cref = - 74 - " -
74
C re f = 5.0 mF 86 86
Short Circuit Current Limit (Rsc = 10 il, - - -
'sc 65 65 - mAdc
V =0)
Long Term Stability AVQ/At - - -
0.1 |
0.1 - %/1000Hr
Tlow =
=
0C for MC1723C
-55C for MC1723
QT high = +70 C for
= +125C for
MC1 723C
MC1723
TYPICAL CHARACTERISTICS
(Vjn = 12 Vdc, Vq = 5.0 Vdc, I
L = 1.0 mAdc, RsC = 0. TA = +25C unless otherwise noted.)
Tj ,
C
RjH 150 U CW \
PSTANQBY 6U mW
he it sink) u
TA = +25C
2b"C U Ub
S. \ s,
Ta =
-b5C
V.TA- +125C
4(J VT; = '125
1 /
-n ib \
n 1
1
O.Ub
=
TA -55C
TA =
-25C -
= ~
S5"C
NI A
!
i T^^ RSC = 10 P.
Ta = -M26c\
-0 7 I
5.0 10 15 20 25 30
"> "s
\ >
U.8
U.b
125C
+25C
U.2
55C -
n
40 60
1 1
-Win = *3 V 1
1
1
..
= I mA 10 l(_ 50 mA
__^
25
s
I
I
= +
Ta 25C i
JTPUT VOLT
= H25C
Ta
+ 20 +30
LOAD CURR NT
\
1
L
=40 mA
M
m
= 50m A |
^
\ i mil
A
o
a
<
*
y
n ^ C| u f|
/""
> \
ou TPUTV OLTA GE
I -4.0
-8.0 I 1
i-
20 +30
1
1.0 k 10 k 100 k
f, FREQUENCY (Hz)
3-118
' t
MC1723, MC1723C
TYPICAL APPLICATIONS
Pin numbers adjacent to terminals are for the metal package;
pin numbers in parenthesis are for the dual in-line packages.
6(10) R SC
R SC
6(10)
-o -W* f v IVq
MC1723
1(3)
IMC1723C)
2(4)
_ > R2
I^klOOOpF
R2
1 T
VfJS?
[R1 + R2J
isc =
RSc RSC
atTj=*25C J RA = , 10 k" where o
. Vsense
V
[ 'knee 1
VO
2N4918
1
or Equiv
2N3055
tVW T *
0.33
or Equ
1N4001
or Equiv
II I 1'
2N3055 f\ /)
(12)8
or Equiv xTT"/
6(10)|
r
2(4)
10(2)
MC1723 -
(MC1723C)
MC1723
1 (3)
100 pF^fe r
(MC1723C)
0.1 nf > ^ (6)4 2 (4) 12k + Sense VO
J^
EH 100pF?p
2N3791
or Equiv
MC1723
(MC1723CI 1 (3)
2 (4|
t:
cz
T
3-120
MOTOROLA MC3423
SEMICONDUCTOR MC3523
TECHNICAL DATA
OVERVOLTAGE
SENSING CIRCUIT
MC3423D SO-8
ELECTRICAL CHARACTERISTICS (5 V < V CC -V EE < 36 V, T, ovv < T A < T high unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
Supply Voltage Range
vcc-vee 4.5 - 40 Vdc
Output Voltage v Vcc-2.2 V CC -1.8 - Vdc
(l0 = 100 mA)
Indicator Output Voltage -
V 0L (lnd) 0.1 0.4 Vdc
"0(lnd) = 1-6mA)
Sense Trip Voltage
v Sense 1 2.45 2.6 2.75 Vdc
(T A = 25C)
v Sense 2
Temperature Coefficient of Vsense TCV S1 -
1 0.06 - %/C
(Figure 2)
Output
Switch
(A)
1
j:
(BX
Switch 1 Switch 2
X Switch 2 / v Sense 1 Position A Closed
v Sense 2 Position B Open
T
F Ramp V| until output
the V Sen$e threshold.
goes high; this is
3-122
MC3423, MC3523
(+ Sense
R1 B1.
Vtrip-V^ (1+^1- 2.6 V(1* B-5>
Power
Supply
d
w R2 < 10 kU for minimum
(- Seme Lead)
Vc - 10
rs =(-^25 IkH
V tri p = V ref (1^)-2.6V(1 + ?l)
R2 < 10 kll
vcc
v Cc
Vref
VlO
_K.
td = . x
'source
C * (12x10 3 ! C (See Figure 10)
APPLICATIONS INFORMATION
BASIC CIRCUIT CONFIGURATION
FIGURE 6 - CONFIGURATION FOR PROGRAMMABLE
The basic circuit configuration of the MC3423/3523 DURATION OF OVERVOLTAGE CONDITION BEFORE
OVP is shown
Figure 3 for supply voltages from 4.5 V
in
TRIP/WITH IMMEDIATE TRIP AT
HIGH OVERVOLTAGES
to 36 V, and
Figure 4 for trip voltages above 36 V. The
in
CONFIGURATION FOR PROGRAMMABLE MINIMUM open collector transistor which saturates when the OVP is
DURATION OF OVERVOLTAGE CONDITION activated. In addition, it can be used to clock an edge trig-
BEFORE TRIPPING gered whose output inhibits or shuts down the
flip-flop
3-124
.
MC3423, MC3523
r>-
Power
E
Supply
LTAGE iVOLTSI
their positive leads are common (two negative supplies) FIGURE 9- MINIMUM Rq versus SUPPLY VOLTAGE
the emitter of Q1 would be moved to the positive lead
of supply 1 and R1 would therefore have to be resized I
1
if v cc < 11 V
j4
1. di/dt
\-
H
starting as a very small region and gradually spreading.
Since the anode current flows through this turned-on
0.001 === = = =^ t::zt
"
- =
MC3423, MC3523
* Needed if
I Sense
3-126
MOTOROLA
SEMICONDUCTOR MC3425
TECHNICAL DATA
P1 SUFFIX
MAXIMUM RATINGS PLASTIC PACKAGE
Rating Symbol Value Unit
CASE 626
vcc 40 Vdc
Power Supply Voltage
-0.3 to +40 Vdc
Comparator Input Voltage Range (Note 1) V|R
Tj + 150 C
Operating Junction Temperature
(Top View)
in 00~VD- >- Vn
DC
Power
Under-Voltage
Supply
Indication
C ut ORDERING INFORMATION
Temperature
Device Range Package
-O
MC3425P1 Oto + 70C Plastic DIP
!cC(on) 16.5
U.V. Sense (Pin 4) = V
INPUT SECTION
Input Bias Current, O.V. and U.V. Sense
1.0 2.0 mA
Hysteresis Activation Voltage, U.V. Sense
Vhu
VCC = 15 V; TA = 25C;
lH = 10%
0.6
lH = 90%
0.8
Hysteresis Current, U.V. Sense
12.5 16 ^a
^CC = 15 V; TA = 25 C, U .V. Sense (Pin 4) 2.5 V
Delay Pin Voltage mA)
(l
DLY -
Low State
v OL(DLY) 0.2 0.5
High State
VQH(DLY) Vcc-0.5 Vcc-0.15
Delay Pin Source Current
'DLY(source) 200 260 ma
VCC 15 V; Vqly OV
Delay Pin Sink Current
'DLY(sink) 3.0
VCC - 15 V; V DLY 2.5 V
OUTPUT SECTION
Drive Output Peak Current (T 25 C)
A 'DRV Ipeakj 200 300
Drive Output Voltage
VQH(DRV) Vcc-2-5 Vcc-2.0
IpRV -- 100 mA; T A 25 C
Drive Output Leakage Current
DRV(leak) 200
VDRV - V
Drive Output Current Slew Rate (T 25 C)
A di dt 2.0 A Ms
Drive Output Vcc Transient Rejection
Vcc ^ V to 15 V at dV dt 200 V M s;
'DRVItrans) mA
O.V. Sense (Pin 3) = (Peak)
V; TA --
25 C
Indicator Output Saturation Voltage
v IND(sat) 560
l|ND = 30 A; T A - 25 "C m
Indicator Output Leakage Current
hNDOeak) 25 200
VQH(IND) " 40 V
Output Comparator Threshold Voltage
v th(OC) 2.33 2.5 2.63
(Note 3)
FIGURE 1
HYSTERESIS CURRENT versus FIGURE 2 HYSTERESIS ACTIVATION VOLTAGE
versus TEMPERATURE
HYSTERESIS ACTIVATION VOLTAGE
14 ^ c 1.2
1
""I 1
[
/IS V J I -
6 -
1
^ 4.0 cc
2.0
^ -* i
I
1.4
.
I.b
-25 25 50 75 100 125
.4 .6 8 1 1 2
n 2
TA . AMBIENT TEMPERATURE (C)
V H(ac , HYSTERESIS ACTIVATION VOLTAGE (V)
j
a -- 40
U V Sense = 2.5 V
<14.0 -^
z
= 13.0 v cc IS V
Tn
S 120
\z~- 50V
=
1110
/
_ 75 125
10.0 .
_25 25 50 100
CD
<
V CC =!5V_ 2>
1 .0% Duty Cy cle @ 300 Hz g 0.3
T A = 25C
1 J
2
=3
<
" 02
=>
3 V
CC= 15 V
1A = 25C
ni
a
\V /
J~
/
Qc
"
20
IB
=> ^ S. -3 12
cc
B
> i
Q-
8
2 340
f
-40
i2300 I
1 1 1
1
-25 26 *50
10 15 20 25 30
T fl AMBIENT
. TEMPERATURE |C)
V CC . POWER SUPPLY VOLTAGE (V)
3-130
O
MC3425
APPLICATIONS INFORMATION
Power
vcc U.V. Fault
Indicator B < l
Supply
4.5 to 40 V
u.v.
Sense
U.V.
IND
OV.
Sense
OV.
DRV
<_J
OV. U.V.
OV OV
DRV
J- DLY Gnd DLY
Sense
OV. U.V.
17.
0.33 iF
R2A?
1
R2B
1 CqlY T
DLY
T
Gnd
1
DLY
1 Cdly
T
Gnd
-O
U.V.
Pin 4
Sense
PPPtfr" V
--2.5V
U.V. Hysteresis = Ih v O(trip)
t
DLY - 12500 Cdly U.V. IND 0FF
1L_l I
ON
Pin 6
6.8 k
(MWy-
~ 0.1 yF
* 1
(Vh). The
source resistance feeding this input (R
of the Delay pins is Ss .8 mA and is much greater than
1
OUTPUT SECTION
Note: All voltages and currents are nominal.
3-132
* o
MC3425
consists of the power supply output capacitors, the load's the SCR or gradual degradation of its forward blocking
decoupling capacitors, and in the case of Figure 1 6A, the voltage capabilities depending on the severity of the
supply's input filter capacitors. This surge current is illus- occasion.
trated in Figure 1 7, and can cause SCR failure or degra- The value of di/dt that an SCR can safely handle is
difficult and expensive. Therefore, the designer must with a fast <1 .0 /us rise time signal will maximize its
A maximum number in phase
empirically determine the SCR and circuit elements di/dt capability. typical
which result in reliable and effective OVP operation. control SCRsthan 50 A(RMS) rating might be
of less
However, an understanding of the factors which influence 200 A/fis, assuming a gate current of five times IQT
and< having done this, a di/dt prob-
.Ojxs rise time.
the SCR's di/dt and surge capabilities simplifies this task. 1 If
the SCR driven on, its area tance in series with the SCR, as shown in Figure 18.
As the gate region of is
time to grow,
amount of Of course, this reduces the circuit's ability to rapidly
of conduction takes a finite
reduce the dc bus voltage and a tradeoff must be made
starting as a very small region and gradually spreading.
between speedy voltage reduction and di/dt.
Since the anode current flows through this turned-on
-o Vn
MC3425
4>
Series -*\*
V,n Regulator
MC3425 3
'Needed if supply is not current limited
3-134
MOTOROLA MC7800
SEMICONDUCTOR Series
TECHNICAL DATA
THREE-TERMINAL
THREE-TERMINAL POSITIVE VOLTAGE REGULATORS POSITIVE FIXED
de-
These voltage regulators are monolithic integrated circuits VOLTAGE REGULATORS
fixed-voltage regulators for a wide variety of
applications
signed as
internal SILICON MONOLITHIC
including local, on-card regulation. These regulatorsemploy
compensation. INTEGRATED CIRCUITS
current limiting, thermal shutdown, and safe-area
in excess
With adequate heatsinking they can deliver output currents
a fixed voltage regu-
of 1 .0 ampere. Although designed primarily as
external components to obtain
K SUFFIX
lator, these devices can be used with
METAL PACKAGE
adjustable voltages and currents CASE 1
^C "
cate voltage.
= Cj is required if regulator is located
an
n
appreciable distance from power supply
filter.
TYPE NO/VOLTAGE
MC7805 5.0 Volts MC7812 12 Volts
DEFINITIONS
Line Regulation The change in output voltage for a change in
Quiescent Current That part of the input current that is not
the input voltage The measurement is made
under conditions of delivered to the load
low dissipation or by using pulse techniques such
that the aver-
age chip temperature is not significantly affected Output Noise Voltage - The rms ac voltage at the output,
with
constant load and no input ripple, measured over a specified
fre-
Load Regulation The change in output voltage for a change in
quency range.
load current at constant chip temperature Long Term Stability Output voltage stability under accelerated
life test conditions with the maximum rated voltage listed
Maximum Power Dissipation - The maximum total device dissi- the devices' electrical characteristics and
in
pation for which the regulator will operate within maximum power
specifications dissipation.
Vn - 10 40 ~ 10 10
Output Noise Voltage (T/v = +25 3 C)
vo
- 17 - - 17 - - 17 mil
'0
~ 02 12 - 02 " 02 A
Short Circuit Current Limit (T A - *25C) l
sc
2 5 3 3 - 22 ^ - 2 2 ~ A
1.3
l
ma *
- "" " -1 -1.1 mV/
Coefficient of TCV 0.6 1
Average Temperature C
Output Voltage
Ripple Rejection
8 Vdc sS V in s 1 8 Vdc, f = 1 20 Hz,
= +25C
Tj
8.0 Vdc s; V in =S 1 8 Vdc, f = 1 20 Hz.
I = 500 mA
= A, Tj = +25C) -v
Dropout Voltage (Iq 1
mV/V
Output Noise Voltage (T^ - +25C1
10Hz^ fsS 100kHz
Output Resistance (f = 1.0 kHz)
MC7806AC
ELECTRICAL CHARACTERISTICS (V in = 11 y, = A Tj = T low to T nioh [Note
|
Q 1. ,
1) unless otherwise noted)
Characteristics MC7806AC
Symbol
Unit
Typ Max
Output Voltage (T = +25C)
j
vo Vdc
Output Voltage
v
(5.0 mA s l s i.o A, P s; 15 W) Vdc
8.6 Vdc s V in s 21 Vdc
Line Regulation (Note 2)
R egiine
8.6 Vdc s V in s 25 Vdc, l = 500 mA 9.0
9.0 Vdc s V in s 13 Vdc
11
9.0 Vdc s V ln s 13 Vdc, Tj = +25C
3.0
8.3 Vdc s V in s 21 Vdc, Tj = + 25C
9.0
Load Regulation (Note 2| Re 9load
5.0 mA s l s 1.5 A, Tj = +25X
5.0mAsl s 1.0 A 100
250 mAslg? 750 mA, Tj = + 25C
100
250mA s|qs 750 mA
Quiescent Current
Tj = + 25C 6.0
6.0
Quiescent Current Change
AI B
9.0 Vdc s V in s 25 Vdc, l 500 mA
8.6 Vdc V in 0.8
s; 21 Vdc, Tj + 25C
50 mA sl 5 1.0 A 0.8
0.5
Ripple Rejection
9.0 Vdc s V in == 19 Vdc, f = 120 Hz, Tj = + 25C
9.0 Vdc s Vin s 19 Vdc, f = 120 Hz, l = 500 mA
Dropout Voltage (lp = 1.0 A, T.i = +25X)
Vin-VQ
Output Noise Voltage (Ta 25C)
^
Vn
10 Hz fs 100 kHz mV/v
Output Resistance (f = 1.0 kHz)
0.8
NOTES: 1. T| = - 55C for MC78XX
Thigh = M50T for MC78XX
= 0 for MC78XXC, AC
-125Tfor MC78XXC, AC, B
2
'
XX = -40Cfor MC78XXB
a K
p'uKSL B
n
^^l%:V^ Ct ' 0n ' emPera ' Ure Chan96S in V
dUe ' hea,i " e,feC,s be " ^ account
3-138
MC7800 Series
MC7808, B, C
= 500 mA, Tj = T| ow to Thigh [Note 11 unless otherwise noted
ELECTRICAL CHARACTERISTICS (V in = 14 V, l
I
MC7808 MC7808B 1
MC7808C
Unit
Characteristic Symbol Typ Max
Min Typ Max Min Typ Max Min
AIb
mA
Quiescent Current Change 1.0
10.5 Vdc *s V jn 25 Vdc
- 0.3 0.8 - - 1.0 - -
11.5 Vdc * V in s 25 Vdc 0.5
0.04 0.5 0.5
5.0 mAs lo * 10 A
RR 62 70 62 ~ 62 dB
Ripple Rejection
11.5 Vdc * V in 21.5 Vdc, f = 120 Hz
V- m = 35 Vdc
1.3 2.5 3.3 - 2.2 - - 2.2 A
Peak Output Current (Tj = + 25C) 'max
TCV 1.0 -0.8 " -0.8 mV/
Average Temperature Coefficient of
C
MC7808AC
ELECTRICAL CHARACTERISTIC S (V in - 14 V. <0 = 1 * Tj - T, ow to T high [Note 1) unless otherwise n oted).
MC7808AC
Characteristic* Symbol
Typ
8.0
Output Voltage (Tj = + 25C) Vo
Output Voltage vo
8.0
15.0 mA lo 10A, Po 15 W)
10.6 Vdc s Vin s 23 vdc
Regii ne
Line Regulation (Note 2)
12
10.6 Vdc s Vj n 25 Vdc, lo = 500 mA
15
11 VdcsV in s 17 Vdc
5.0
11 Vdc s V in s 17 Vdc, Tj = + 25X 12
10.4 Vdc s V in g 23 vdc T J = + 25 C '
V in = 36 Vdc
2.2
Peak Output Current (Tj = +25C)
Coefficient of Output Voltage
TCVq
Average Temperature
= -55C for MC78XX Thigh f 150C for MC78XX
NOTES: 1 T, ovv
MC78XXC, AC, B
= 0 for MC78XXC, AC 1 125C for
= -40Cfor MC78XXB must be taken into account
constant junction temperature. Changes i i
Vo due to heating effects
2. Load and line regulation are specified at
separately. Pulse testing with low duty
cycle is used
MC7809CT
ELECTRICAL CHARACTERISTICS (V in = 15 V, |
Q = 500 mA , Tj = QC to + 125C unless otherwise noted).
Characteristic MC7809CT
Symbol Unit
Min Typ Max
Output Voltage (Tj = + 25C)
vo 8.65 9.0 9.35 Vdc
Output Voltage
vo 8.55 9.0 9.45 Vdc
(5.0 mA *s 1.0 A, Pq
l
15 W)
11.5 Vdc V jn 24 Vdc
Line Regulation (Tj = +25C, Note 1) R egiine
mV
11.5 Vdc =s Vj n 26 Vdc - 12 50
11.5 Vdc Vj n s 17 Vdc
5.0 25
Load Regulation (Tj = + 25C, Note 1) Re 9load
mA ss Iq 1.5 A mV
5.0
- 35 50
250 mA ^ 750 mAl
12 25
Quiescent Current (Tj = + 25C)
IB 4.3 8.0 mA
Quiescent Current Change
Ale mA
11.5 Vdc =s V| n * 26 Vdc - - 1.0
5.0 mA =s l 1.0 A
0.5
Ripple Rejection
RR 61 - dB
11.5 Vdc V jn 21.5 Vdc, f = 120 Hz
Dropout Voltage (l = 1.0 A, Tj = +25C) Vin-V 2.0 Vdc
Output Noise Voltage (T/\ = + 25C)
Vn - 10 - M V/V
10Hzf 100 kHz
Output Resistance f = 1.0 kHz r
O 18 mn
Short-Circuit Current Limit (T
A = +25C)
'sc
0.2 - A
Vjn = 35 Vdc
3-140
MC7800 Series
MC7812. B. C
=19V 500 mA T low t0 T hiqh No,e unless otherwise noted)
ELECTRICAL CHARACTERISTICS (V,
n l = TJ = l
1
V - 20 2 5 - 20 - - 20 Vdc
Dropout Voltage (l = 1 A. Tj = *25C) V,n "
Vn - 10 40 - 10 10 M V/
Output Noise Voltage (T A = *25C)
vo
10 Hzss (sS 100 kHz
- 18 - - 18 - - 18 - mil
Output Resistance f = 1 kHz '0
- 02 1 2 - 02 ~ 02 A
Short-Circuit Current Limit |T A = *25C) >sc
V in = 35 Vdc
2 5 3 3 - 2 2 - ~ 2 2 " A
Peak Output Current (Tj = 25C) 'max 1 3
TCV - 1 5 -1 _ -1 mV/
Average Temperature Coefficient of
C
Output Voltage
MC7812A. AC
Tj to T high jNot e ^unless othewise^noied)
ELECTRICAL CHARACTERISTICS |V, n 19 v. l I A, = T,
~~ ow 1
MC7812A J_
Characteristics Symbol Typ
80 120
16 Vdcs; V, n sS 22 Vdc
3.0
1 6 Vdc < V, s; 22 Vdc. T j = *25C
n
14 5 Vdc C V, n sS 27 Vdc. Tj = +25C
50
Load Regulation (Note 2| R e9load
100
5 mA sS l sj 1 5 A. Tj = -
25C
100
5 mAsS IgsS 1.0 A
250 mA sS 750mA. Tj l
= +25C
250 mAsS lo 750 mA
60
Quiescent Current 60
Tj = + 25C
Ripple Rejection
1 5 Vdc sS V
m sS 25 Vdc. f = 1 20 Hz,
Tj = *25C
1 5 Vdc V in sS 25
sS Vdc, f = 1 20 Hz,
In = 500 mA
Dropout Voltage (Iq = 1-0 A, Tj = 25C) -vo
M V/V
Output Noise Voltage (T A :
25CI
10 HzsS f sS 100 kHz
Output Resistance (f = 10 kHz|
MC7815. B, C
.ELECTRICAL CHARACTERISTICS (V,
n = 23 = 500 mA, Tj , T low ,o T high [Not .
y.
i
,, un ess 01herwise no , ed)
,
05 05 05
Ripple Rejection
18 5 VdcsS V in ! 28 5 Vdc, f = 120 Hz
Dropout Voltage = A, Tj = +25C)
(l 1
-v
Output Noise Voltage (T +25C)
A :
MC7815A. AC
j^CjrRICAL^HARACJERISTIC S ,V,
n = 23 V, l = 1 A, T T lnw to J^No^eJlu nless otherwise noted.
j;
Characteristics Symbol MC78J5A MC7815AC
Typ Typ
Output Voltage (Tj = +25C)
_Yo_
Output Voltage
vo
(5 0mAsS l
10A.P ? 15 W)
17 9 Vdcs; V s= 30 Vdc
Line Regulation (Note 2)
R <=9lm
17 9 Vdc V m s 30 Vdc. = 500 m> I
60 13
20 Vdc V ln sc 26 Vdc
60 16
20 Vdc V, n < 26 Vdc. Tj = +25C
30 60
17 5 Vdc < Vinjg 30 Vdc, Tj = +25C
60
Load Regulation (NoteT^
Re 9load
5 mA $ l <; 1 5 A, Tj = +25C
5 mA Sl s; 1 A
250 mA s: l s; 750mA, Tj = +25C
250 mASI s; 750 mA
Quiescent Current
T
55 60
*25C
,
--
45 60
Quiescent Current Change
-HB
1 7 5 Vdc s: V|
n s; 30 Vdc, l = 500 mA 03 05
17 5 Vdc sS V jn s: 30 Vdc. Tj = +25C 08
02 05 08
5.0 mAig l 10 A 004 02 05
Ripple Rejection
18 5 Vdc V in =s28 5 Vdc, f = 120 Hz
Tj = +25C
18 5 VdcsJ V jn 28 5 Vdc, f = 120 Hz,
In = 500 mA
Dropout Voltage (lp = 1.QA, T = +25Q Vin - V
Output Noise Voltage (T =
Vdc
A +25C)
10Hz f^ 100 kHz 40
kV/V
Output Resistance (f = 1 .0 kHz)
Short-Circuit Current Limit (T = +25C)
mil
A 0.2
V in = 35 Vdc
Peak Output Current (T j = +25C)
2.5
22
Average Temperature Coefficient of Outpu t Voltage
TCVq 1.8 -1.0
NOTES 1 T| 55C MC78XX, A
for T high = * 1 50 C 'or MC78XX, A
= 0 for MC78XXC, AC = + 125C for MC78XXC, AC, B
= -40C for MC78XXB
2 Load and line regulation are specified at constant ,unct,on temperature. Changes in V due to heating effects must be taken into account
separately Pulse testing with low duty cycle is used.
MC7818. B. C
ilB
mA
Quiescent Current Change
1.0
21 Vdc s V in s 33 Vdc - -
22 Vdc s Vi n s 33 Vdc
- 0.3 0.8 - - 1.0
Vn 10 40 10 10 ~ /iV/
Output Noise Voltage Oa = + 25C)
vo
10 Hz s fs 100 kHz
= - 19 - - 19 - 19 mil
Output Resistance f 1.0 kHz r
O
0.2 1.2 0.2 _ 0.2 A
Short-Circuit Current Limit (T/\ = +25C) 'sc
Vj n = 35 Vdc
1.3 2.5 3.3 - 2.2 - 2.2 A
Peak Output Current (Tj = + 25C) 'max
MC7818AC
Ip = 1.0 A, Tj = T| 0W to Thigh [Note D unless otherwise noted).
ELECTRICAL CHARACTERISTICS (V in 27 V,
MC7818AC
Symbol Unit
Characteristics Typ
V Vdc
Output Voltage (Tj = +25C)
v Vdc
Output Voltage
(5.0mA== lo 10 A, Po 15 W)
21 Vdc s V in s 33 Vdc
Regiine
Line Regulation (Note 2)
180
21 Vdc s Vi n s 33 Vdc 'O = 500 mA '
180
24 Vdc s V m * 30 vdc
90
24 Vdc s V in s 30 Vdc, Tj = +25C
180
20.6 Vdc s Vjn g 33 Vdc, Tj = +25"C
Regioad
mV
Load Regulation (Note 2)
100
5.0 mAs
lo 1-5 A. Tj = +25C 100
5.0 mA s lo 10 A
250 mA s lo 750 mA, Tj = + 25C
250 mA sUq s 750 mA
6.0 mA
Quiescent Current
4.5 6.0
Tj = +25C
AIR
mA
Quiescent Current Change 0.8
21 Vdc s Vi n .s 33 Vdc, lo = 500 mA
0.8
21 Vdc V in * 33 Vdc T J = +26 C '
0.5
5.0 mA s Ip s 1.0 A
dB
Ripple Rejection
22 Vdc s Vj n s 32 Vdc, f = 120 Tj = +25C
Hz,
22 Vdc ^ Vj n * 32 vdc -
f = 120 Hz 'O = 50 mA
'
MC7824, B, C
tLtCrRICAL CHARACTERISTICS = 33
(V in V. l
n = 500 mA Tj = T lovi/ to Thj h [Note
a 11 uri
Characteristic
MC7824 MC7824B MC7824C
Symbol
Min Typ
- Unit
Max Min Typ Max Min Typ Max
Output Voltage (Tj = + 25C)
v 23 24 25 23 24 25 23 24 25 Vdc
Output Voltage
v
(5.0 mA s l s 1.0 A, Po * 15 W) Vdc
27 Vdc s V in s 38 Vdc
s V in 22.8 24 25.2
28 Vdc s 38 Vdc 22.8 24 25.2 22.8 24 25.2
Line Regulation (Tj = + 25C, Note 2) Re 9line
27 Vdc s V in * 38 Vdc - mV
30 Vdc s V in s 36 Vdc
10 240 - 31 480 - 31 480
5.0 120 14 240 14 240
Load Regulation (Tj = + 25C, Note 2) Re 9load
mA s s - mV
5.0
mAslos
Iq 1.5 A 40 240 - 60 480 - 60 480
250 750 mA 15 120 25 240 25 240
Quiescent Current (Tj = +25C)
IB - 3.6 6.0 _ 4.6 8.0 4.6 8.0
Quiescent Current Change
&B mA
27 Vdc s V in s 38 Vdc - - - - 1.0
28 Vdc s V in == 38 Vdc
0.3 0.8 1.0
5.0 mA sl s 1.0 A 0.04 0.5 0.5 0.5
Ripple Rejection
28 Vdc s V in
RR 56 62 - - 54 - - 54 dB
== 38 Vdc, f = 120 Hz
Dropout Voltage do = 1.0 A, Tj = + 25C) Vin-V0 - 2.0 2.5 2.0 _ 2.0 Vdc
Output Noise Voltage (T = + 25C)
A Vn 10 40 - 10 - - 10 -
10 Hz =s fs 100 kHz jiV/
vO
Output Resistance f = 1.0 kHz r
O - 20 _ 20 20 mil
Short-Circuit Current Limit (T
A = +25C) 'sc
0.2 1.2 - 0.2 - - -
V in = 35 Vdc 0.2 A
Peak Output Current (Tj = +25C)
'max 1.3 2.5 3.3 _ 2.2 2.2 A
Average Temperature Coefficient of
TCV 3.0 " -1.5 - - -1.5 -
Output Voltage mV/
C
Characteristics MC7824AC
Symbol
Typ Max
Output Voltage (Tj = + 25C)
VO 24.5
Output Voltage
vo
(5.0 mA Iq 10 A, P s 15 W)
27.3 Vdc V in s 38 Vdc
Line Regulation (Note 2) R egiine
27 Vdc s V in s 38 Vdc, = 500 mA l
31 240
30 Vdc s V in s 36 Vdc
30 Vdc s V jn s 36 Vdc, Tj = + 25C 35 240
26.7 Vdc s V in s 38 Vdc, Tj = + 25C 120
240
Load Regulation (Note 21 Re 9load
5.0 mAslQS 1.5 A, Tj = 25X
5.0inAslo? 1.0 A 100
250 mA s ^ 750 mA, l
Tj = + 25C
100
250 mA == l
= 750 mA
Quiescent Current
Tj = +25C 6.0
6.0
Quiescent Current Change
ilB
27.3 Vdc s V in 38 Vdc, l 500 mA
27.3 Vdc s V in s 38 Vdc, Tj 0.8
+ 25C
5.0 mA s Ip 6 1.0 A 0.8
0.5
Ripple Rejection
RR
28 Vdc =s V in s; 38 Vdc, f 120 Hz, Tj = +25X
28 Vdc =; V in ^ 38 Vdc, f 120 Hz, = 500 mA
l
54
Dropout Voltage (l = 1.Q A, T.| = + 25C)
Vin-V 2.0
Output Noise Voltage (T + 25C)
A
10 Hz s f s 100 kHz AtV/Vfj
|
Average Temperature Coefficient of Output V oltage
NOTES: 1. T| = - 55C for MC78XX
ow Thinh
8 H50C for MC78XX
= 0 for MC78XXC, AC i- 125C for MC78XXC, AC, B
= - 40C for MC78XXB
2. Load and line regulation are specified constant junction temperature. Changes
separately. Pulse testing with low duty cycle
at ^"n 8 es m
in Vn
v due to hpatinn
heating ,.,*
effects .!....
must be taken into account
is used.
3-144
MC7800 Series
TYPICAL CHARACTERISTICS
(T/\ = +25C unless otherwise noted.
FIGURE 1- WORST CASE POWER DISSIPATION FIGURE 2 - WORST CASE POWER DISSIPATION
AMBIENT TEMPERATURE (Case 221 A) versus AMBIENT TEMPERATURE (Casa 1)
versus
i 1
JC = 5C/W
I
65C/W
=
,H HS -0C/W.
JA
Tj nax| =!50C
"
f 20
3
z
12
"V H p = 5r/w\ f= 15
= 15C/
No Heal Sink
25 25 50 75 100 125
-25 25 50 75 100 125
TA , AMBIENT TEMPERATURE (C)
Tj,JUNCTIONTEMPERATURElC)
- |t j
= " 4 c C
" c
j K^^^
r Tj = 25c ^~~t~^;
4 Tj = 125C
10 20 30 40
'0 6.0 12 18 24 30
V in -V INPUT-OUTPUT VOLTAGE DIFFERENTIAL (VOLTS)
Vj n -Vrj. INPUT-OUTPUT VOLTAGE DIFFERENTIAL (VOLTS) .
_ MC7808C 1 v "-
MC7812C 9V 1
_ MC7815C2 3V -tti
MC7 818C2 7 V
MC7 824C3 3V
|
1 jjjj ii
10 12 14 16 18
100 1.0k
V ,
OUTPUT VOLTAGE (VOLTS) FREQUENCY
f, (Hz)
6 20 1 1
V
j=
VJ
- V - 6 i = 120 ^^
6 10 ^ 0 = 20 TlA _'o =
=
500 nA
0/jF
o 1
o
> 6 00
=> ^
2 5 90 "l
o
5 80
-7 5
i
-5 -2 5 C 25 5 3 7 5 10 12 5 15
!
175
1
Zj '
1
80 12 16 20
Tj. JUNCTION TEMPEATURE (C)
Vo. OUTPUT VOLTAGE IVO'LTS)
"
z MC7( XX, A
| 3.0 =10V
3 n
Z
" 2.0
v ] = 5.0 V
'0 = 5.0 mA ^
o
n 1
-25 25 50 75
40 6.0 8.0 10 12
Tj, JUNCTION TEMPERATURE (C)
INPUT VOLTAGE (VOLTS)
3-146
MC7800 Series
APPLICATIONS INFORMATION
OMign Considerations
lengths, or if the output
The MC7800 Series of fixed voltage regulators are designed to the power supply filter with long wire
with Thermal Overload Protection that shuts down the circuit load capacitance is large. An input bypass capacitor should be
insure
when subjected to an excessive power overload condition. Internal selected to provide good high-frequency characteristics to
stable operation under all load conditions. A 0.33 iF or larger
Short-Circuit Protection that limits the maximum current the cir-
tantalum, mylar, or other capacitor having low internal impedance
cuit will pass, and Output Transistor Safe-Area Compensation that
at high frequencies should be chosen. The bypass capacitor
should
reduces the output short-circuit current as the voltage across the
pass transistor is increased. be mounted with the shortest possible leads directlyacross the
regulators input terminals. Normally good constructiontechniques
In many low current applications, compensation capacitors are
should be used to minimize ground loops and leadresistancedrops
not required. However, it is recommended that the regulator
the regulator connected since the regulator has no external sense lead.
input be bypassed with a capacitor if is
Output
MC7805 -O t ?-
Input T0
source
The MC7800 regulators can also be used as a current
the
when connected as above. In order to minimize dissipation
MC7805C is chosen in this application. Resistor R determines
Vo, 7.0 V to 20 V
10 =
T + "Q
V|N V O ^2.0V
~ 1.5 mA over line and load changes
l
Q The addition of an operational amplifier allows adjustment to
character
to be a higher or intermediate values while retaining regulation
For example, a 1-ampere current source would require R
would The minimum voltage obtainable with this arrangement is
5-ohm, 10-W resistor and the output voltage compliance istics
voltage
2 volts greater than the regulator
be the input voltage less 7 volts
MJ2955 or Equiv
ex i-o- * Output
T lOtlF'T- X~
protec
The MC7800 seriet can be current boosted with a PNP transis- The circuit of Figure 15 can be modified to provide supply
tion against short circuits by adding a short-circuit sense
resistor,
The MJ2955 provides current to 5.0 amperes. Resistor R PNP
tor.
R sc ,and an additional PNP transistor. The current sensing
inconjunction with the V B g of the PNP determines when the current of the three-
is not short-circuit must be able to handle the short-circuit
pass transistor begins conducting; this circuit Therefore, a four-ampere plastic power tran
terminal regulator.
proof Input-output differential voltage minimum is increased by
sistor is specified.
Vbe of the pass transistor.
Q12
0-
(Bottom View)
(Case Connected To Pin 3)
:5.0 k | 3.0 Output
0-25 IC
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)
2.85 k
PINLVqut 5. NC
2. GND 6. GND
3. GND 7. GND
4. NC 8. V| N
Ground
SOP-8 is an internally modified SO-8 Package Pins
2, 3, 6 and 7 are electrically common to the die
attach flag. This internal lead frame modification
information.
T^ ^
in 5,
er Ure range selections a
available with special test conditions and addi-
8, 12 and 15 volts devices. Contact your local Motorola
sales office for
MC78L18C
MC78L24C
MC78L18AC
MC78L24AC
18
24
3-148
MC78L00,A Series
MC78L05C. MC78L05AC ELECTRICAL CHARACTERISTICS (V, = 10 V, l = 40 mA, C| = 0.33 mF. Co = 0.1 jiF,
MC78L05AC MC78L05C
mA
Input Bias Current IB
- 3.8 6.0 - 3.8 6.0
(Tj = + 25C)
5.5 5.5
(Tj - +125C)
mA
Input Bias Current Change illB
- -
Vdc s V| s 20 Vdc)
- - 1.5 1.5
(8.0
0.1 0.2
(1.0 mA s Iq s 40 mA)
s Vn 40 40 " MV
Output Noise Voltage (Ta = ~ 25C, 10 Hz f -s
100 kHz)
RR 41 49 40 49 dB
Ripple Rejection do = 40 mA, f - 120 Hz,
80 V s V| s 18 V, Tj = + 25C)
(Tj = +25C)
mA, = 33 M F. C = m F,
MC78L08C, MC78L08AC ELECTRICAL CHARACTERISTICS = 40
(V, = 14 V, l C, 1
MC78L08AC MC78L08C
Symbol Min Typ Max Min Typ Max Unit
Characteristic
8.3 7.36 8.0 8.64 Vdc
vo 7.7 8.0
Reghne
mV
Line Regulation
(Tj = + 25C, lo = 40 mA) _
10.5 Vdc sV| 23 Vdc
- 20 175 20 200
12 125 12 150
11 Vdc s V| s 23 Vdc
mV
Regioad
Load Regulation
mA s lo 100 mA) - 15 80 - 15 80
(Tj = +25C, 1.0
8.0 40 6.0 40
(Tj - +25C, 1.0 mA s lo s 40 mA)
Vdc
Vo
Output Voltage - 8.4 7.2 - 8.8
(10.5 Vdc s V| -s 23 Vdc, 1.0 mA s lo
s 40 mA) 7.6
84 7.2 8.8
(V| = 14 V, 1.0 mA s= Iq 70 mA)
7.6
l|B
mA
Input Bias Current
- 3.0 6.0 - 3.0 6.0
(Tj = +25C)
5.5 5.5
(Tj = +125"C)
mA
Input Bias Current Change i'lB
- - 1.5 - - 1.5
(11 Vdc sV| 23 Vdc)
0.1 0.2
(1.0 mA s Iq s 40 mA)
s Vn 60 52 ^V
Output Noise Voltage (Ta = + 25C, 10 Hz s f
100 kHz)
mA, f = 120 RR 37 57 36 55 dB
Ripple Rejection do = 40 Hz,
12 V s V| s 23 V, Tj = +25X)
" Vdc
Dropout Voltage
(Tj = + 25C) I
V|-V 1.7
IZ 1.7
MC78L12AC MC78L12C
Characteristic Symbol Min Typ Max Min Typ Max Unit
Output Voltage (Tj = + 25X) v 11.5 12 12.5 11.1 12 12.9 Vdc
Line Regulation
Re 9line mV
(Tj = + 25X, = 40 mA)
l
MC78L15AC MC78L15C
Characteristic Symbol Min Typ Max Min Typ Max Unit
Output Voltage (Tj = + 25X1 v 14.4 15 15.6 13.8 15 16.2 Vdc
Line Regulation Re 9line
(Tj = + 25X, = 40 mA)
l
mV
17.5 Vdc V| s 30 Vdc - 130 300 - 130 300
20 Vdc s V| s; 30 Vdc
110 250 110 250
Load Regulation R egi oa d
mA mV
(Tj = + 25X, 1.0 s l s 100 mA) 25 150 - 25 150
(Tj = +25C, 1.0 mA s l s 40 mA) 12 75 12 75
Output Voltage
vo Vdc
(17.5 Vdc s V| s 30 Vdc, 1.0 mA s l s 40 mA) 1425 - 15.75 13.5 - 16.5
(V| = 23 V, 1.0 mAsl s 70 mA) 14.25 15.75 13.5 16.5
Input Bias Current
(Tj =
IB
- mA
(Tj =
+ 25X)
4.4 6.5 - 4.4 6.5
+125X) 6.0 6.0
Input Bias Current Change
Vdc s s 30 Vdc)
illB
- - mA
(20 V|
1.5 - - 1.5
(1.0 mA s Iq 40 mA)
0.1 0.2
Output Noise Voltage (T A = +25X, 10 Hz s f == Vn 90 - - 90 - MV
100 kHz)
3-150
MC78L00,A Series
MC78L18AC MC78L18C 1
vo Vdc
Output Voltage
(21.4 Vdc s V| s 33 Vdc, 1.0 mA s s 40 mA) 16.2 19.8
l
(Tj = + 125C)
6.0 6.0
vo Vdc
Output Voltage
(28 Vdc s V| s 38 Vdc, mA s lo 40 mA)
1.0 21.6 - 26.4
MC78L00,A Series
TYPICAL CHARACTERISTICS
(T"a = +25C unless otherwise noted.)
MC78L05C_
v = 5.0 V
-Tj = 25C
10
= .OmA
A V
|Q = 4< jjA
\# 10=1 00 mA
FIGURE 3 - INPUT BIAS CURRENT versus FIGURE 4 - INPUT BIAS CURRENT versus
AMBIENT TEMPERATURE INPUT VOLTAGE
4.2
<
4.0
I 3.8
^ 3.6
MC78L05C
= 5.0
< 3.4 < vo V
10 = 40 mA
Tj = 25C
3.2
| ,
MC78 L05C .
- V| = 10 V
1.0
3.0
Vn = 5.0V
["'0 -
5.0 10 15 20 25 30 35 40
T A AMBIENT
, TEMPERATURE CO V|, INPUT VOLTAGE (VOLTS)
FIGURE 5 - MAXIMUM AVERAGE POWER DISSIPATION FIGURE 6 - MAXIMUM AVERAGE POWER DISSIPATION versus
versus AMB ENT TEMPE R ATU RE- TO-92 Type Package
I
AMBIENT TEMPERATURE - TO-39 Type Package
=^^ r=
Intinite Heal! ink
E ....
u,
1000
-^
at Sink
No He
^ c '
^ ==
IVatt He tSink
\
S
o
100
o ~3
-P0(max)to25C = 62
A
10 1
1 I
I
\
I 75 100
75 100
TA ,
AMBIENT TEMPERATURE |C) TA AMBIENT TEMPERATURE
, (C)
3-152
MC78L00,A Series
APPLICATIONS INFORMATION
Design Considerations to provide good high-frequency characteristics to insure
The MC78L00 Series of fixed voltage regulators are stable operation under all load conditions. A 0.33 jiF or
designed with Thermal Overload Protection that shuts larger tantalum, mylar, or other capacitor having low
down the circuit when subjected to an excessive power internal impedance at high frequencies should be cho-
overload condition. Internal Short-Circuit Protection sen. The bypass capacitor should be mounted with the
limits the maximum current the circuit will pass. shortest possible leads directly across the regulators
In many low current applications, compensation ca- input terminals. Good construction techniques should
pacitors are not required. However, it is recommended be used to minimize ground loops and lead resistance
that the regulator input be bypassed with a capacitor if drops since the regular has no external sense lead. By-
the regulator is connected to the power supply filter passing the output is also recommended.
with long wire lengths, or if the output load capacitance
FIGURE 8 15 V TRACKING VOLTAGE REGULATOR
is large. The input bypass capacitor should be selected
A WvV
0.33 *iF J; " S, /MpsA7 I
20 V O
T
* '
*
65
'
k -O-Vq
The MC78L00 regulators can also be used as a current source when MPS U55
connected as above, in order to minimize dissipation the MC78L05C is
chosen in this application. Resistor R determines the current as follows: FIGURE 9 - POSITIVE AND NEGATIVE REGULATOR
5 V v, o- t Q-| MC78LXX -0 [
1 +v O
33 hf
j_ L_l -v
be the input voltage less 7 volts.
33 MF^
MOTOROLA
SEMICONDUCTOR MC78M00
TECHNICAL DATA Series
'#'
DT SUFFIX DT-1 SUFFIX
PLASTIC PACKAGE PLASTIC PACKAGE
CASE 369 CASE 369
(DPAK) (DPAK)
ORDERING INFORMATION
Tested Operating
Device Junction Temp. Range Package
MC78MXXCG* Metal
Tj - 0C to
MC78MXXCDT* DPAK
+ 125C
MC78MXXCDT-1<
Plastic
MC78MXXCT Power
MC78MXXBT* Tj - - 40C to Plastic
+ 125T Power
XX indicates nominal voltage,
* Available in 5, 8, 12 and 15 volt devices.
# Automotive temperature range selections are
available with special test conditions and
MC78M05B.C ELECTRICAL CHARACTERISTICS (V, = 10 V, l = 350 mA, 0C < Tj < + 125T, P D 5.0 W unless otherwise
noted.)
AllB mA
Quiescent Current Change - - 0.8
(8.0 Vdc <s V| 25 Vdc, lo = 200 mA)
0.5
(5.0 mAslo 350 mA)
= + 25C. 10 Hz f 100 kHz) Vn - 40 MV
Output Noise Voltage (T A
RR dB
Ripple Rejection (T, DT and DT-1 suffixes only)
-
= 100 mA, = 120 Hz, 8.0 V s; V| 18 V) 62
(l f
0.5
Output Noise Voltage (TA = + 25C, 10 Hz f s 100 kHz) Vn 52 MV
Ripple Rejection (T suffix only) RR dB
dO = 100 mA, f = 120 Hz, 11.5 V V| =s 21.5 V) 56 -
dO = 300 mA, f = 120 Hz, 11.5 V s V| 21.5 V, Tj = 25C) 56 80
Dropout Voltage V|-Vq - 2.0 - Vdc
(Tj = +25C)
MC78M12B,C ELECTRICAL CHARACTERISTICS <V| = 19 V, l 350 mA, 0C < Tj < + 125C, Pq 5.0 W unless otherwise
noted.)
V 12.5 Vdc
Output Voltage (Tj = + 25C)
Regij, 8.0 50 mV
Line Regulation
(Tj = +25C, 14.5 Vdc ;
V| 30 Vdc, Iq = 200mA)
Load Regulation Regioad
240
(Tj = + 25C, 5.0 mA s l 500 mA)
120
(Tj = + 25C, 5.0 mA =s lp *s 200 mA)
V 12.6 Vdc
Output Voltage
(14.5 Vdc ss V| 27 Vdc, 5.0 mA Iq 350 mA)
6.0
Input Bias Current (Tj = +25C)
AI|B
Quiescent Current Change
0.8
(14.5 Vdc V| 30 Vdc, Ifj = 200 mA)
0.5
(5.0 mA s lp ^ 350 mA)
= +25C, 10 Hz s ^V
Output Noise Voltage Oa f s: 100 kHz)
V|-V Vdc
Dropout Voltage
(Tj = + 25C)
MC78M15B.C ELECTRICAL CHARACTERISTICS (V| = 23 V, l 350 mA, 0C < Tj < + 125C, Pp 5.0 W unless otherwise
noted.)
Dropout Voltage
V,-V 2.0 Vdc
(Tj = +25C)
0.5
Output Noise Voltage (TA = + 25C, 10 Hz s f =s 100 kHz) vn 100 MV
Ripple Rejection (T suffix only)
RR dB
(lO = 100 mA, f = 120 Hz, 22 V s V| 32 V) 53 -
dO = 300 mA, f = 120 Hz, 22 V s V| s= 32 V, Tj = 25C) 53 70
Dropout Voltage V|-V - 2.0 - Vdc
(Tj = +25C)
3-158
MC78M00 Series
MC78M24C ELECTRICAL CHARACTERISTICS (V) = 33 V, 1 350 mA, 0C < Tj < + 125C, Pq 5.0 W unless otherwise
noted.
vo 23 24 25 Vdc
Output Voltage (Tj = + 25C)
Line Regulation Regiine
10 50 mV
(Tj = + 25C, 27 Vdc =s V| s 38 Vdc, lo = 200 mA)
Regioad mV
Load Regulation
(Tj = +25C, 5.0 mA lo 500 mA)
- 30 480
10 240
(Tj = + 25C, 5.0 mA lo 200 mA)
v 22.8 25.2 Vdc
Output Voltage
(27 Vdc ss V| 38 Vdc, 5.0 mA =s lo 350 mA)
Input Bias Current (Tj = +25C) 'IB
- 3.2 7.0 mA
Al| B mA
Quiescent Current Change -
(27 Vdc as V| 38 Vdc, lo = 200 mA)
- 0.8
0.5
(5.0 mA = lo 350 mA)
DEFINITIONS
Line Regulation
The change in output voltage for a Input Bias Current
That part of the input current that
is not delivered to the load.
change in the input voltage. The measurement is made
under conditions of low dissipation or by using pulse Output Noise Voltage The rms ac voltage at the out-
techniques such that the average chip temperature is put, with constant load and no input ripple, measured
not significantly affected. over a specified frequency range.
Load Regulation
The change in output voltage for a Long Term Stability Output voltage stability under
change in load current at constant chip temperature. accelerated life test conditions with the maximum rated
Maximum Power Dissipation The maximum total voltage listed in the devices' electrical characteristics
device dissipation for which the regulator will operate and maximum power dissipation.
within specifications.
TYPICAL PERFORMANCE CURVES
FIGURE 1 WORST CASE POWER DISSIPATION FIGURE 2 WORST CASE POWER DISSIPATION
versus AMBIENT TEMPERATURE versus AMBIENT TEMPERATURE
TO-220AB (CASE 221A) (CASE 79)
c NFINIT HEAT
HS = 10CW SINK- 1
HS = 20C W*~
VT SINK
NO HEAT SINK
_ fljc = 25C'W
- r DW1AAI
p D(M WM
-.
100 125 50 75 100
50 75
T A AMBIENT TEMPERATURE (Ct
T A AMBIENT TEMPERATURE
,
,
(C)
B 1-5
.10 = HWmA
|Q = K
AVq - 100 mv
1 15 20 25 30 35 40
III 50 75 100 125 150
V|-Vq, DROPOUT VOLTAGE (VOLTS) JUNCTION TEMPERATURE
Tj,
TO
'0
= 50 mA
fin
Vo = 5.0 V
V|= 10 v -
Vo = 5.0 V C =
"
f = 120 Hz
Co = Tj = 25C
Tj = 25C
70
1 '0 10
1
\ |
Tj = 25C
3.0
/
1
I V
f
\ = 125
-1 -
L S>-
S*- 25C V = 5.0 V
rt
125C 10 = 0.6 A
5.0 10 15 20 25 30 35 40
0.1 0.5 1.0
V|, INPUT VOLTAGE (Vdc)
Iq, OUTPUT CURRENT (A)
3-160
MC78M00 Series
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
ply filter with long wire lengths, or if the output load
The MC78M00 Series of fixed voltage regulators are
designed with Thermal Overload Protection that shuts capacitance is large. An input bypass capacitor should
down the circuit when subjected to an excessive power be selected to provide good high frequency character-
istics to insure stable operation under all load
condi-
overload condition. Internal Short Circuit Protection that
limits the maximum current the circuit will pass, and tions. A 0.33 /xF or larger tantalum, mylar, or other
Output Transistor Safe-Area Compensation that capacitor having low internal impedance at high fre-
reduces the output short circuit current as the voltage quencies should be chosen. The bypass capacitor
across the pass transistor is increased. should be mounted with the shortest possible leads
directly across the regulators input terminals. Normally
In many low current applications, compensation
capacitors are not required. However, it is recom- good construction techniques should be used to mini-
mended that the regulator input be bypassed with a mize ground loops and lead resistance drops since the
capacitor if the regulator is connected to the power sup- regulator has no external sense lead.
0.33 ii
rn
1 i
Constant
Current to
Input Output
Grounded Load
"0
lator voltage.
pliance would be the input voltage less 7.0 volts.
Output
Output
1.0 mF 0.1 mF 2 digits of type
number indicating
J^
"="
number voltage.
XX = 2 digits of type indicating voltage.
mines when the pass transistor begins conducting; this current sensing PNP must be able to handle the short-
circuit not short circuit proof. Input output differential
is circuit current of the three-terminal regulator. Therefore,
voltage minimum is increased by Vgg of the pass a two-ampere plastic power transistor is specified.
transistor.
THREE-AMPERE
POSITIVE FIXED
VOLTAGE REGULATORS
THREE-AMPERE POSITIVE VOLTAGE REGULATORS
SILICON MONOLITHIC
This family of fixed voltage regulators are monolithic integrated
INTEGRATED CIRCUIT
circuits capable of driving loads in excess of 3.0 amperes. These
three-terminal regulators employ internal current limiting, ther-
mal shutdown, and safe-area compensation. Devices are available
with improved specifications, including a 2% output voltage tol-
erance, on AC-suffix 5.0, 12 and 15 volt device types.
Although designed primarily as a fixed voltage regulator, these K SUFFIX
devices can be used with external components to obtain adjust- METAL PACKAGE
able voltages and currents. This series of devices can be used CASE 1
with a series-pass transistor to supply up to 15 amperes at the
nominal output voltage.
Output Current in Excess of 3.0 Amperes
Power Dissipation: 30 W (K-Suffix), 25 W (T-Suffix)
No External Components Required
Output Voltage Offered in 2% and 4% Tolerance*
Thermal Regulation is Specified
Internal Thermal Overload Protection
Internal Short-Circuit Current Limiting
Output Transistor Safe-Area Compensation
T SUFFIX
PLASTIC PACKAGE
MAXIMUM RATINGS (T A = + 25T unless otherwise noted.) CASE 221
Rating Symbol Value 1 Unit
Input Voltage (5.0 V-12 V) Vin 35 Vdc
(15 V) 40
Power Dissipation and Thermal
Characteristics
Plastic Package (Note Heatsink surface
1)
PIN 1. INPUT connected to
T A = +25C PD Internally Limited 2. GROUND Pin 2)
Thermal Resistance, Junction to Air R f>JA 65 C/W 3. OUTPUT
T C = +25C PD Internally Limited
Thermal Resistance, Junction to Case R HJC 2.5 C/W
Metal Package (Note 1)
TA = +25C PD Internally Limited
Thermal Resistance, Junction to Air R #JA 35
ORDERING INFORMATION
C/W
T C = +25C PD Internally Limited Tested
Thermal Resistance, Junction to Case R 0JC Output Operating
2.5 C/W
Voltage Junction
Storage Junction Temperature Range T stq -65 to +150 Device Tolerance Temp. Range Package
c
Operating Junction Temperature Range MC78TXXCK 4% Metal
Tj to + 1 50 c MC78TXXACK 2%* Power
MC78T00C, AC Oto + 125C
MC78TXXCT 4% Plastic
NOTE: MC78TXXACT 2%* Power
1. Although power dissipation is internally limited, specifications apply only for Prj P max
p max = 30 W
.
3-162
MC78T00 Series
MC78T05AC, C
ELECTRICAL CHARACTERISTICS (V in = 10 V, l = 3.0 A, 0C Tj s 125C p p max (Note 1], unless otherwise noted.)
MC78T05AC MC78T05C
v Vdc
Output Voltage
(5.0 mAslo 3.0 A, Tj = +25C) 4.9 5.0 5.1 4.8 5.0 5.2
4.75 5.0 5.25
(5.0 mA l s 3.0 A; 4.8 5.0 5.2
Quiescent Current IB
mA
(5.0 mA s l
s 3.0 A, Tj = +25C) - 3.5 5.0 - 3.5 5.0
6.0 4.0 6.0
(5.0 mA % lo * 3.0 A) 4.0
RR 62 75 62 75 dB
Ripple Rejection
(8.0 Vdc s Vj n % 18 Vdc, f = 120 Hz,
lO = 2.0 A, Tj = 25C)
MC78T08C
ELECTRICAL CHARACTERISTICS (V in 13 V, Ip = 3.0 A, 0C sTjs Pp
125C, *s P max [Note 1], unless otherwise noted.)
MC78T08C
Characteristic Symbol Min Typ Unit
Output Voltage
vo Vdc
(5.0mA Iq =s 3.0 A, Tj = +25C)
7.7 8.0 8.3
(5.0mA * l =s 3.0 A;
7.6 8.0 8.4
50 mA Iq 2.0 A, 10.4 Vdc =s V;, : 23 Vdc)
Line Regulation (Note 2)
Reg| 4.0
(10.3 Vdc V in =s 35 Vdc, l = 5.0 mA, Tj = +25C;
10.3 Vdc V in == 35 Vdc, l = Tj = + 25C;
1.0 A,
11 Vdc V in =s 17 Vdc, l = 3.0 A, Tj = +25X;
10.7 Vdc ^ Vj n ^ 23 Vdc, l = 1.0 A)
Thermal Regulation
R egth 0.002 %Vq/W
(Pulse = 10 ms, P 20 W, Ta = + 25C)
Quiescent Current
(5.0 mAsIgs 3.0 A, Tj = +25C)
3.5 5.0
(5.0 mA Iq s 3.0 A)
4.0 6.0
Quiescent Current Change
AlB 0.3
(10.3 Vdc V in s 35 Vdc, = 5.0 mA, Tj l
+ 25C;
5.0 mA Iq =s 3.0 A, Tj = + 25C;
10.7 Vdc = V in s; 23 Vdc, = 1.0 A) l
Ripple Rejection
(11 Vdc^ V in s; 21 Vdc, f 120 Hz, Iq = 2.0 A, Tj = 25C)
Dropout Voltage (Iq 3.0 A, Tj = +25C) Vin-V 2.2
Output Noise Voltage
(10 Hzsfs mV/v
100 kHz, Tj + 25C)
Output Resistance (f = 1.0 kHz)
Ro 2.0
Short Circuit Current Limit
'sc 1.5
(Vin = 35 Vdc, Tj = +25C)
MC78T12AC, C
ELECTRICAL CHARACTERISTICS <V in = 17 V, l = 3.0 A, 0C s Tj 125C, Pop max [Note 1), unless otherwise noted.)
MC78T12AC MC78T12C
vo Vdc
Output Voltage
12 12.25 11.5 12 12.5
(5.0 mA s lo 3.0 A, Tj = + 25C) 11.75
12.6
12 12.5 11.4 12
(5.0 mA = lo 3.0 A; 11.5
Regioad
mV
Load Regulation (Note 2)
-
(5.0 mA lo 3.0 A, Tj = +25C)
- 10 30 10 30
15 80 15 80
(5.0 mA lo * 3.0 A)
RR 57 67 57 67 dB
Ripple Rejection
(15 Vdc s V in
25 Vdc, <& f = 120 Hz,
Iq = 2.0 A, Tj - 25C)
Vin-Vo - 2.2 2.5 2.2 2.5 Vdc
Dropout Voltage do = 3.0 A, Tj = +25C)
Vn 10 10 mV/V
Output Noise Voltage
(10 Hz s f 100 kHz, Tj = +25C)
isc
1.5 1.5 A
Short Circuit Current Limit
(V jn = 35 Vdc, Tj = ^25C)
- 5.0 - - 5.0 A
Peak Output Current (Tj = +25C) 'max
NOTES:
1 Although power dissipation is internally limited, specifications apply only for Prj *=Pmax-
Pmax = 30 W
for K package Pmax = 25 Wfor T package
MC78T15AC, C
ELECTRICAL CHARACTERISTICS (V in 20 V, Iq = 3.0 A, 0C ^ Tj == 125C, Pp ^ P max [Note 1), unless otherwise noted.)
MC78T15AC MC78T15C
Characteristic Symbol Min Typ Max Min Typ Max Unit
Output Voltage V Vdc
(5.0 mA =s l =s 3.0 A, Tj = + 25C) 14.7 15 15.3 14.4 15 15.6
(5.0 mA Iq ss 3.0 A; 14.4 15 15.6 14.25 15 15.75
5.0 mA*; Iq ^ 2.0 A, 17.5 Vdc s; V in 30 Vdc)
Line Regulation (Note 2)
Re 9line 7.5 55 7.5 55 mV
(17.6Vdc V in 40 Vdc, lo = 5.0 mA, Tj = +25C;
Vdc =s V in 40 Vdc, lo = 1.0 A, Tj = +25C;
17.6
20 Vdc =s V in ^ 26 Vdc, = 3.0 A, Tj = + 25C;
l
Ripple Rejection RR 55 65 55 65 dB
(18.5 Vdc =s V in =s 28.5 Vdc, f = 120 Hz,
Iq = 2.0 A, Tj = 25C)
Dropout Voltage (Iq = 3.0 A, Tj = + 25C) Vin-VQ 2.2 2.5 2.2 2.5 Vdc
Output Noise Voltage
10 mV/V
(10 Hz ss f *i 10Q kHz, Tj = + 25C)
NOTES.
1. Although power dissipation is internally limited, specifications apply only for Pq * P m ax-
Pmax = 30 W
for K package p max - 26 W for T package
2. Line and load regulation are specified at constant junction temperature.
Changes in V due to heating effects must be taken into account
separately. Pulse testing with low duty cycle is used.
MC78T00 Series
SCHEMATIC DIAGRAM a f
M
"-U2! ,
-r
II H^i
Bpg
i_L HH9HI II
lit
T
mmm 1 3SSSSS
II ItfH
MC78T05AC
IBM tan t, TIME (2.0 ms/div.)
MC78T05AC
I TIME (2.0 ms/div.)
Vo = 5.0 V Vo = 5.0 V
Vin-Vo = 5.0 V
lout = 100 mA G io-1
V = 5.0 V
V in = 7.5 \
lout = 10 A
S 10-2
Tj = 25C
10-3
- ..
10" 4
-10 30 70 110 1.0 10 1.0 k 10 k 100 k 1.0M 10M 100M
Tj, JUNCTION TEMPERATURE (C)
f, FREQUENCY (Hz)
I
_oi.
10 10 100 1-0 k 10 k 100 k 1.0M 10M 100M 0.1 1.0
f, FREQUENCY |Hz) l
out , OUTPUT CURRENT (A)
rr
Tj = 0C-v^
,
"^Tj = 25C
"
T U 0(
3.0
/h ^Tj = 125C
1 ~r-1
-
/ j 1
1 1 %t
. Tj = 25C
2.0
1
'
3.0
-^ nr
"
" U = 125
V = i.OV
2.0
= 2.0 A r~ T
L
'out
$
p
t - Tj = OX
25C
Vj
I II
I
II
10 20 30
0.1 1.0
Vj
n INPUT VOLTAGE
. (Vdc)
lout. OUTPUT CURRENT (A)
3-168
MC78T00 Series
-
I
0ut
- J.U A
1
=
I
r \X
'out
,0A
J
\r^
^N
5 <=>
>Oe3
< I
out
-- 0.5 A
^
^s ^.
>E o 1.0 \
t ^ Tj = OX
vo == 50 TlV I
<s Tj
Tj
= 25C
= 125C
I
Vj
n -Vo, INPUT-OUTPUT VOLTAGE (Vdc)
Tj, JUNCTION TEMPERATURE |C)
0.6
vn = 5.0 V no
i cr
'out
= 150 mA =3 si
A
cO =
=> Q V
?BT,
Y
Tj ==
\).l EVIAl
I < o -U.I
U.2
-0.2
V v
0.4
O.b <
=
Q- _
,^
1.5
>
- v ir
cc =
Tj
= 10V
= 25"U
3
:
> 5 g
1.U | 1.0 / y
=
O.b
-
=3
0.5 / \
n / \
10 20 20
5 40 1 1
8 30
I
VS Temperature
"\l
3CW -
^2.4CW ^s 1
Infinite
1
^1 .Heat S nk
" 3.3XVr^^-
6.3CM^""~~*
1
t
-10.5C
50 75 100
50 75 100 125
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS capacitor if the regulator is connected to the power sup-
The MC78T00,A Series of fixed voltage regulators are ply with long wire lengths, or if the output load
filter
designed with Thermal Overload Protection that shuts capacitance is large. An input bypass capacitor should
down the circuit when subjected to an excessive power be selected to provide good high frequency character-
overload condition, Internal Short-Circuit Protection istics to insure stable operation under all load condi-
that limits the maximum current the circuit will pass, tions. A 0.33 ,uF or larger tantalum, mylar, or other
and Output Transistor Safe-Area Compensation that capacitor having low internal impedance at high fre-
reduces the output short circuit current as the voltage quencies should be chosen. The bypass capacitor
across the pass transistor is increased. should be mounted with the shortest possible leads
In many low
current applications, compensation directly across the regulator's input terminals. Normally
capacitors are not required. However, it is recom- good construction techniques should be used to mini-
mended that the regulator input be bypassed with a mize ground loops and lead resistance drops since the
regulator has no external sense lead.
Output
Constant
Current to
'0 Grounded Load
'0 =
5.0 V
+
,
IB Vq, 8.0 V to 20 V
Vin-Vo * 2.5 V
A lg = 0.7 mA over line, load and temperature chanqes
IB = 3.5 mA The addition of an operational amplifier allows adjust-
ment to higher or intermediate values while retaining
For example, a 2-ampere current source would require
R regulation characteristics. The minimum voltage obtain-
to be a 2.5 ohm, 15 W
resistor and the output voltage able with this arrangement is 3.0 volts greater than
the
compliance would be the input voltage less 7.5 volts.
regulator voltage.
FIGURE 18 -
CURRENT BOOST WITH
FIGURE 17 CURRENT BOOST REGULATOR SHORT-CIRCUIT PROTECTION
2N4398 or Equiv 2N4398
Input Input or Equiv
MJ2955
or Equiv
R
L- J w *~o- MC78TXX.A
Output
FIGURE 19 STANDARD APPLICATION A common ground is required between the input and
the output voltages. The input voltage must remain typ-
ically 2.2 V above the output voltage
even during the low
point on the input ripple voltage.
Input *-*~o- MC78TXX Output
-0-f-<JUt XX = these two digits of the type number indicate
C in *
0.33 /xF
1 4; C **
=
voltage.
Cj nis required if regulator is located an appreciable
T. distance from nower supply filter. (See Applica-
tions Information for details.)
** = Co is not needed for stability; however,
it does
improve transient response.
3-170
MOTOROLA MC7900
SEMICONDUCTOR Series
TECHNICAL DATA
THREE-TERMINAL
NEGATIVE VOLTAGE REGULATORS
THREE-TERMINAL
The MC7900 Series of fixed output negative voltage regulators
are intended as complements to the popular MC7800 Series NEGATIVE FIXED
devices. These negative regulators are available in the same VOLTAGE REGULATORS
seven-voltage options as the MC7800 devices. In addition, one
extra voltage option commonly employed in MECL systems
is
T SUFFIX
PLASTIC PACKAGE
CASE 221A
PIN 1. GROUND
2. INPUT
3. OUTPUT (Heatsink surface
connected to
Pin 2)
STANDARD APPLICATION
33mP"~
I
A common ground is required between the
input and the output voltages. The input volt-
age must remain typically 2.0 V more negative
even during the high point on the input ripple
voltage.
1 Load and line regulation are specified at constant junction temperature Changes in V due to heating effects must be taken into account separately
Pulse testing with low duty cycle is used
3-172
) ) )
MC7900 Series
RR - 70 dB
Ripple Rejection (lo = 20 mA, f = 1 20 Hz)
V|-V 2.0 " Vdc
Dropout Voltage
= 1.0 A, Tj = + 25C
l
MC7905 2C ELECTRICAL CHARACTERISTICS (V, 10 V. I = 500 mA 0C ' Tj C +125C un ess otherwis e noted.)
A'lB
mA
Input Bias Current Change
- " 1.3
-72 Vdc 35 V| ? -25 Vdc
05
5.0 mAsC Iqs; 5 A 1
RR - 68 - dB
Ripple Rejection (lo = 20 mA, f = 1 20 Hz)
V|-V 2.0 Vdc
Dropout Voltage
= 1,0 A, Tj = +25C
l
p:^S^:r::^'^ 0nS,an,)UnC, ' n,emPera,Ure Cha " eSinV 0^-ohea t, n9 ef ( ec t s mustbeta k e n,n 1 oacco unt sep a ra t e l v
3-174
) ) ) )
MC7900 Series
AI|B
mA
Input Bias Current Change
- - 10
-17 5 Vdc 5 V| 55-30 Vdc
05
5 0mAsS <c 1 5 A
l
+25C. Hz s 00 kHz) e n - 90 mV
Output Noise Voltage <T A = 1 : f 1
RR - 60 dB
Ripple Rejection do = 20 mA, f = 1 20 Hz)
V|-V 20 Vdc
Dropout Voltage
= 1 .0 A, Tj = + 25C
l
500 mA
- 57 150
-17 9 Vdc 3? V| 3: -30 Vdc; lo =
57 150
-17 5 Vdc 3= V| 3= -30 Vdc; lo = 1 A, Tj = 25C
Reg| ad
mV
Load Regulation (Note 1
- 150
68
5.0 mA < lo ^ 1 -5 A, Tj = 25C
25 75
250 mA< Iq = 750 mA 40 150
5.0 mA^ Iqs 1-0 A
-144 -15 6 Vdc
Output Voltage vo
1 7 9 Vdc 3s V| 3= -30 Vdc, 5.0mA<lo 1 A P$ I5W
'IB
- 44 80 mA
Input Bias Current
AI|B
mA
Input Bias Current Change
- 0.8
-17,5 Vdc 3= V| 3! -30 Vdc - 05
5.0 rnAsg Iqs 1-0 A
05
5 mA : lo 1 5 A. Tj = 25C
+25C. Hz s: f < 00 kHz) e n - 90 mV
Output Noise Voltage (T A= 1 1
RR - 60 dB
Ripple Rejection do = 20 mA, f = 1 20 Hz)
V|-V 2.0 Vdc
Dropout Voltage
- 1 .0 A, Tj = + 25C
l
junction temperatu Changes in V due to heating effects must be taken into account separately
1 Load and line regulation are specified at constant
Pulse testing with low duty cycle is used
3-176
) ) ) )
MC7900 Series
MC7918C ELECTRICAL CHARACTERISTICS (V| -27 V, lp = 500 mA, 0C< Tj < + 125C unless otherwise noted.)
RR 59
Ripple Rejection (lp = 20 mA, ( = 1 20 Hz)
V|-V 2.0 Vdc
Dropout Voltage
l
= 1 .0 A, Tj =+25C
AVp/JtT -1 mV/C
Average Temperature Coefficient of Output Voltage
l
= 5 mA, 0C gTjg M25C
V -25
Output Voltage (Tj - + 25C)
Change -M|B
Input Bias Current
1
.Wp/-TT mV/C
Average Temperature Coefficient of Output Voltage
lp = 5 mA, 0Cg Tjs:+125C _
TYPICAL CHARACTERISTICS
(T/\ = +25C unless otherwise noted.)
k 2.0
i
t IS
K
O
- 1.0
s!
>-
3
O
o 0.5
,
1
|
C 3 6 9 1 2 1 ) 3 2
1 1 24 27 30 10k
lV|-Vrjl. INPUT-OUTPUT VOLTAGE DIFFERENTIAL IVOLTS) (.FREQUENCY |H;|
6.0 8.0 10 12 14 16
25 +50 +75 +100
Vq. OUTPUT VOLTAGE (VOLTSI Tj, JUNCTION TEMPERATURE (CI
DEFINITIONS
FIGURE 7 - QUIESCENT CURRENT AS A FUNCTION
OF TEMPERATURE Line Regulation The change in output voltage for a change in
the input voltage The measurement is made under conditions of
such that the average
5.2 1
low dissipation or bv using pulse techniques
chip temperature is not significantly affected.
< 5.0 Load Regulation The change in output voltage for a change in
load current at constant chip temperature.
z
Maximum Power Dissipation The maximum total device dissi-
operate-within specifications.
3 pation for which the regulator will
APPLICATIONS INFORMATION
FIGURE 8 - CURRENT REGULATOR
Design Considerations
The MC7900 Series of fixed voltage regulators are designed
with Thermal Overload Protection that shuts down the circuit I
n = 200 mA
when subjected to an excessive power overload condition. Internal
Short-Circuit Protection that limits the maximum current
the cir-
Compensation that
Vo 10V
cuit will pass, and Output Transistor Safe-Area
across the
reduces the output short-circuit current as the voltage
pass transistor is increased.
In many low current applications, compensation capacitors are
not required. However, it is recommended that the regulator
is connected Gnd
input be bypassed with a capacitor if the regulator
or if the output
to the power supply filter with long wire lengths,
load capacitance is large An input bypass capacitor should be The MC7905,^5.0 V regulator can be used as a constant current
selected to provide good high frequency characteristics to insure source when connected as above. The output current is the sum of
stable operation under all load conditions.
A 33 uF or larger resistor R current and quiescent bias current as follows:
tantalum, mylar, or other capacitor having low internal
impedance
5.0 V
at high frequencies should be chosen. The bypass capacitor should '0=- - +
'B
R
be mounted with the shortest possible leads directly across the reg-
ulators input terminals. Normally good construction techniques The quiescent current for this regulator is typically 4.3 mA.
should be used to minimize ground loops and lead
resistance The 5.0 volt regulator was chosen to minimize dissipation and to
allow the output voltage to operate to within 6.0 V below
the
the
drops since the regulator has no external sense lead Bypassing
input voltage.
output is also recommended.
+ 20 V + 15 V
Input
Output
-ii-O-
1N4001
0.33 nf 'f*
<-r ST
sf*'\ .0 n? or Equiv
3nd ""
-20 V -15 V
Input Output
Mounted on common hut sink. Motorola MS 10 or equivalent.
When a boost transistor used, short-circuit currents Bre equal
is
PIN 1. GROUND
2. OUTPUT
3. INPUT
(Bottom View)
(Case Connected To Pin 3)
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SOP-8)
PIN 1. V UT 5 GND
2. V,
N
4 NC 8. NC
ORDERING INFORMATION
Tested Operating
Device Temperature Range Package
Device No. 10% Device No. 5% Nominal Voltage
MC79LXXACD* SOP-8
MC79L05C MC79L05AC -5.0
MC79L12C MC79LXXACG* Metal Can
MC79L12AC -12
MC79L15C MC79L15AC -15 MC79LXXACP Tj = 0C to +125C Plastic Power
MC79L18C MC79L18AC -18 MC79LXXCG* Metal Can
MC79L24C MC79L24AC -24 MC79LXXCP Plastic Power
#Automotive temperature range selections are available with special test MC79LXXABP# Tj = -40Cto +125X
conditions and
additional tests in 5, 12 and 15 volt devices. Contact XX indicates nominal voltage
your local Motorola sales office for
information. Available in 5, 12 and 15 volt devices
3-180
MC79L00,A Series
MAXIMUM RATINGS (T
A = + 25C unless otherwise noted
MC79L05C, AC Series ELECTRICAL CHARACTERISTICS (V, = -10 V, i = 40 mA, C, = 33 mF, C = 0.1 *F,
l = 40 mA, Tj = + 25C
MC79L12C MC79L12AC
Symbol Min Typ Max Min Typ Max Unit
Characteristic
-12 -12.9 -11 5 -12 -125 Vdc
Output Voltage (Tj = +25C) v -11.1
mV
Input Regulation Regime
(Tj = +25C) -
- ' 250 " 250
-14.5 Vdc - V|.' -27 Vdc
200 200
-16 Vdc -- Vp -27 Vdc
mV
Load Regulation Regioad
- - 100 " 100
Tj = +25C, 1.0 mA l '- 100mA
50 : 50
1.0 mA lo =- 40 mA
Vdc
Output Voltage Vo
- -13.2 -1 1.4 - -126
-14.5 Vdc V|
-27 Vdc, 10mA v Iq^ 40mA -108
-13.2 -1 1.4 -12.6
1.0 mA lo ~ 70mA
-10.8
V| ^ -19 Vdc.
mA
Input Bias Current 'IB
-
' - 6.5 - 6.5
(Tj = +25C)
6 60
(Tj = +125C)
mA
Input Bias Current Change IB
- -
- - 1.5 1.5
-16 Vdc V| -27 Vdc'
0.2 0.1
1.0 mA < lo 40 mA
- 80 "' ~ 80 MV
Output Noise Voltage Vn
(T A " +25C 10 Hz = f < 100 kHz)
RR 36 42 " 37 42 dB
Ripple Rejection
(-15 < V| ^ -25 Vdc f = 120Hz, Tj = +25C)
|V,-V _ 1.7 1.7 Vdc
I
Dropout Voltage
= 40 mA, Tj = + 25C
l
In = 40 mA, Tj = +25C
MC79L18C, AC ELECTRICAL CHARACTERISTICS (V! = -27 V, In =40 mA, C| = 0.33 juF, Cq = 0.1 ajF
Ip = 40 mA, Tj = + 25C
3-182
MC79L00,A Series
MC79L24C
. ,
MC79L24AC
"
= +25C)
Symbol
v
Min
-22.1
Typ
-24
Max
-25.9
Min
-23
Typ
-24
Max
-25 u? Vdc |
- 200 200 MV
Output Noise Voltage Vn
(T A = +25C, 10 Hz s; f ; 100 kHz)
RR 30 43 - 31 47 dB
Ripple Rejection
1-29 < V, < -35 Vdc, f = 1 20 Hz, Tj = 25C)
|V|-V ~ 1.7 1.7 Vdc
Dropout Voltage |
l = 40 mA, Tj = + 25C
APPLICATIONS INFORMATION
is large. An input bypass capacitor should be selected
Design Considerations insure
to provide good high-frequency characteristics to
The MC79L00 Series of fixed voltage regulators are
stable operation under all load conditions. A 0.33 m
f or
designed with Thermal Overload Protection that shuts low
larger tantalum, mylar, or other capacitor having
down the circuit when subjected to an excessive power cho-
internal impedance at high frequencies should be
overload condition, Internal Short-Circuit Protection
maximum current the circuit will pass. sen. The bypass capacitor should be mounted with the
that limits the
many low current applications, compensation ca- shortest possible leads directly across the regulator's
In
input terminals. Normally good construction techniques
pacitors are not required. However, it is recommended
should be used to minimize ground loops and lead re-
that the regulator input be bypassed with a capacitor
if
TYPICAL CHARACTERISTICS
(Ta = + 25C unless otherwise noted.)
FIGURE 5 INPUT BIAS CURRENT versus FIGURE 6 INPUT BIAS CURRENT versus
AMBIENT TEMPERATURE INPUT VOLTAGE
I 3, ^ 40
36
MC79L05C
< 3.4I Vo - -5.0 V
OD
10 = 40mA
Tj = "
1
25C
-MC79 lose
CO
- 3.0
_ V|--10V "
VO--5.0V
=
s '0
i
'
25 50 75 100 125 -50 -10 -15 -20 -25 -30 -35 -40
Ta. AMBIENT TEMPERATURE (C)
V|, INPUT VOLTAGE (VOLTS)
FIGURE 7 MAXIMUM AVERAGE POWER DISSIPATION FIGURE 8 MAXIMUM AVERAGE POWER DISSIPATION
versus AMBIENT TEMPERATURE TO-92 Type Package versus AMBIENT TEMPERATURE TO-39 Type Package
M 75 100 125
50 75 100
Ta, AMBIENT TEMPERATURE 125
<C)
TA .
AMBIENT TEMPERATURE (C)
3-184
A
MOTOROLA MC79M00
SEMICONDUCTOR Series
TECHNICAL DATA
THREE-TERMINAL THREE-TERMINAL
NEGATIVE VOLTAGE REGULATORS NEGATIVE FIXED
VOLTAGE REGULATORS
The MC79M00 Series of fixed output negative voltage regula-
tors are intended as complements to the popular
MC78M00 Series SILICON MONOLITHIC
devices.
INTEGRATED CIRCUITS
Available in fixed output voltage options of -5.0,
-12 and
- 15 volts, these regulators employ current limiting, thermal shut-
down, and safe-area compensation
making them remarkably
rugged under most operating conditions. With adequate
heat-
of 0.5 ampere.
sinking they can deliver output currents in excess
No External Components Required
Internal Thermal Overload Protection
Internal Short-Circuit Current Limiting
T SUFFIX
Output Transistor Safe-Area Compensation
PLASTIC PACKAGE
CASE 221
PIN 1. GROUND
2. INPUT
3. OUTPUT
(Heatsink surface
connected to Pin 2)
STANDARD APPLICATION
Cin*
0.33 /xF
I XCo**
1.0 nf
Output Voltage
Vdc
v -4.75 - -5.25 Vdc
- 7.0 ? V| 3 - 25 Vdc, 5.0 mA * l ^ 350 mA
Input Bias Current (Tj = + 25C)
'IB
4.3 8.0
Input Bias Current Change
A"lB
s -25 Vdc, mA
-8.0 Vdc-> V| = 350
l mA - - 0.4
5.0 mA s lg s 350 mA, V| = - 10 V
0.4
Output Noise Voltage (T A = + 25C, 10 Hz s f s 100 kHzl Vn 40 mV
Ripple Rejection (f = 120 Hz|
RR 54 66 dB
Dropout Voltage
V|-V - 1.1 - Vdc
lO = 500 mA, Tj = + 25X
Average Temperature Coefficient of Output Voltage W /AT - 0.2 - mV/C
lO = 5.0 mA, 0C sTjs + 125C
Jote: 1
"
P^^ST^n;^" C nS,am ,UnC " n ,emPera,Ure Chan96S
' '" V0 * hea " n "** < b. taken ,n,c account separately.
3-186
MC79M00 Series
100 Vn - 75 mV
Output Noise Voltage (Ta = +25C, 10Hz f kHz)
= 120 Hz) RR 54 60 dB
Ripple Rejection (f
54 60 dB
Ripple Rejection (f = 120 Hz)
V|-V 1.1 Vdc
Dropout Voltage
Iq = 500 mA, Tj + 25C
AVq/AT -1.0 mV/C
Average Temperature Coefficient of Output Voltage
lp = 5.0 mA, 0C s Tj ^ + 125C .
P SUFFIX
PIN CONNECTIONS PLASTIC PACKAGE
CASE 646
L SUFFIX
CERAMIC PACKAGE
CASE 632
(Top View)
ORDERING INFORMATION
The MC34060 is specified over the commercial operating Temperature
range of Device Range Package
0C to +70C. The MC35O60 is specified over the full military ranqe
of -55to+125C. MC35060L -55to+125C Ceramic DIP
MC34060P 0to+70C Plastic DIP
3-188
MC34060, MC35060
O O V CC
Dead-Time
Control
13 14
1
6 6 6 6
Error Amp Feedback/P.W.M. Error Amp
1 Comparator Input 2
Capacitor C-r
\
AKZ * /- / A /
'
\ \ \ \ J A A A
Feedback/P.W.M. / />
Comparator
^.
Dead-Time Control
Description
THERMAL CHARACTERISTICS
L Suffix P Suffix
Characteristic Symbol Ceramic Package Plastic Package Unit
Thermal Resistance, Junction to Ambient %JA 100 80 C/W
Power Derating Factor 1/ R0JA 10 12.5 mW/C
Derating Ambient Temperature
ta 50 45
I I C
3-190
MC34060, MC35060
ELECTRICAL CHARACTERISTICS V CC = 15 V, C T = 0.01 f, R T = 12 unless otherwise M noted. For typical values TA - 25C,
REFERENCE SECTION
4.75 5.0 5.25 4.75 5.0 5.25 V
Reference Voltage Vref
(l = 1.0 mA)
R egiine - 2.0 25 2.0 25 mV
Input Regulation
(V CC = 7.0 V to 40 V)
Reg ad
3.0 15 " 3.0 15 mV
Output Regulation |
(l = 1.0 mA to 10 mA)
15 35 75 15 35 75 mA
Short-Circuit Output Current !
SC
(V re f = V)
OUTPUT SECTION
20 100 2.0 100 MA
Collector Off-State Current 'C(off)
(V = 40 V, V CE = 40 V)
CC
-150 -100 MA
Emitter Off-State Current 'E(off)
( V CC = 40 V. VC = 40 V. VE = V)
1.5 1.1 1.3 V
Collector-Emitter Saturation Voltage
v sat(C) 1.1
Common-Emitter
(V E = V, lc = 200 mA) -
v sat(E) - 1.5 2.5 1.5 2.5 V
Emitter-Follower
(V r = 15 V, lg = -200 mA)
|
MC35060/MC34060 Unit
Characteristic
Symb
|
Min |
Typ |
Max
MC34060, MC35060
Characteristic
Symbol
MC36060/ MC34060
- Unit
Min. Typ. Max.
ERROR AMPLIFIER SECTIONS (Continued) ~~ ' '
Frequency
(C T = 0.001 M F, R T =
fosc - 25 1 - kHz
47M1)
Standard Deviation of Frequency*
(C T = 0.001 M F, R = 47M1)
CT
'osc - 3.0 - %
T
Frequency Change with Voltage
A'osc(^V) - 0.1 - %
(V CC = 7.0 V to 40 V. T A = 25C)
Frequency Change with Temperature
<ATA = T| 0W to T high i'oscUT) %
(Ct = 0.01 /tF, Rt =
)
12 Ml)
- 12
,- J H
standard .
deviation is a measure of the statistical distribution about the mean as derived fro
": /<Xn-S> 2
-|/n=1
r N-
3-192
MC34060, MC35060
rrn
\ V - Vcc = ia v
au
\
'(PIN 4)
= 0V I
Ct =0.001
Rt = 47 k
bO
I I
=0.001 /I 4U
.01 nF 2il
1.0 2.0
1k 10k
DEAD-TIME CONTROL VOLTAGE (V)
fO. OSCILLATOR FREQUENCY (Hz)
I
_VCC = 15V
Vcr - 15 V 1. 1
1.8
\.l
1.0
U.9
^^
0.8
1.4
U.I
I.J
\.l
25
I.I >0 1 1 50 200
5 A 1 M 1 50 2 DO 2 >0
60
SO
r
3.0
1
70 -
10
n 1
5.0 10 15 20 25
"CC
15011
Dead- V CC
Test
Time
2 W
Inputs
Feedback
RT * O Output
Feedback
Terminal
cT
(+)
1
x
"I
(-)
(Pin 3)
Error
(+>
r 50 ki!
I-)
Ref
Out
V ref^"
Other Error
Amplifier
"L
68 !!
Output _K C l
Transistor k~ r 15 f
E 15 p f
8nJ_ I
1 0%
3-194
MC34060, MC35060
Vref
^ T.
cs
;
R2
0.01 V(X
I
y/wH(_ i
ci VSA '
Comp
ii MR850 1000
6.3V
V re f Gnd
DT CT RT
5
10/16 V
0.001
4.7 k 4 7
AA Wv
k
150
0.1
-A/W-
3-196
MC34060, MC35060
v in = 8.oto:
o- ^| f
TYYV\
28 V/
0.5 A
0.05 vcc
v/vH(~i
i
300
vw
V re f Gnd
<
DT CT RT
Efficiency V in = 12 V. Iq = 5 A 75%
Vj n = 8.0 to 40 V
MR851
T W 20 M H *
-15 V/
@ 1.0 A 0.25 A
150 M H
2.0 A T 330/16v ^ 330/16 V
3-198
MC34060, MC35060
@ <a
n <
o r^
? 5 CO o
., o +1
O O > CM
o
Ln + 1
> O O o
m i
id - *-
MOTOROLA MC34060A
SEMICONDUCTOR MC35060A
TECHNICAL DATA
MC33060A
PRECISION SWITCHMODE
PRECISION SWITCHMODE
PULSE WIDTH MODULATION
PULSE WIDTH MODULATION
CONTROL CIRCUITS
CONTROL CIRCUITS
The MC35060A'MC34060A/MC33060A are low cost fixed
frequency, pulse width modulation control circuits designed SILICON MONOLITHIC
primarily for single ended SWITCHMODE power supply control. INTEGRATED CIRCUITS
These devices feature:
The MC34060A is specified over the commercial operating
range of to + 70C. The MC35060A is specified over the full
military range of 55 to +125C. The MC33060A is specified
over the vehicular temperature range of - 40 to + 85 C.
Complete Pulse Width Modulation Control Circuitry
On-Chip Oscillator With Master or Slave Operation
On-Chip Error Amplifiers
On-Chip 5.0 Volt Reference, 1.5% Accuracy
Adjustable Dead Time Control P SUFFIX
PLASTIC PACKAGE
Uncommitted Output Transistor Rated to 500 mA Source or Sink CASE 646
Undervoltage Lockout
Available in Surface Mount Package
'^^
PIN CONNECTIONS D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO-14)
|""~~
Non-lnv Non-lnv
Input |_j_ Input
Inv
Input
f
I
*
impen PWM r
Comp Input |___
Dead-Time
Control E L SUFFIX
cT \T CERAMIC PACKAGE
CASE 632
Oscillator
Rt[T
Reference
-o Ref Out
Regulator
of oVcc
Dead-Time
Control
Capacitor Cj
Feedback P.W M
Comparator
Dead-Time Control
Description
The MC35060 A/34060 A/33060 A is a fixed-frequency Output pulse width modulation is accomplished by
pulse width modulation control circuit, incorporating
comparison of the positive sawtooth waveform across
the primary building blocks required for the control of
capacitor Ct to either of two control signals. The output
An internal- isenabled only during that portion of time when the
a switching power supply. (See Figure 1.)
linearsawtooth oscillator is frequency-programmable sawtooth voltage is greater than the control signals.
Therefore, an increase in control-signal amplitude
by two external components, Rj and Ct- The approxi-
causes a corresponding linear -decrease of output pulse
mate oscillator frequency is determined by:
width. (Refer to the timing diagram shown in Figure 2.)
1.2
fr
osc " R CT
T
For more information refer to Figure 3.
Amplifier Input Voltage V|R -0.3 to +42 -0.3 to +42 -0.3 to +42 V
Range
Power Dissipation @ PD 1000 1000 1000 mW
Ta =s 45C
Operating Junction Tj c
Temperature
Plastic Package 125 125
Ceramic Package 150
Operating Ambient ta -55 to +125 to +70 -40 to +85 C
Temperature Range
Storage Temperature T stg C
Range
Package
Plastic -55 to +125 -55 to +125
Ceramic Package -65 to +150
THERMAL CHARACTERISTICS
L Suffix P Suffix D Suffix
Ceramic Plastic Plastic
Characteristic Symbol Package Package Package Unit
Thermal Resistance, 100 80 120
RflJA C/W
Junction to Ambient
Derating Ambient
Temperature
ta 50 45 45 X
RECOMMENDED OPERATING CONDITIONS
MC35060A/MC34060A/MC33060A
Condition Symbol Min Typ Max Unit
Power Supply Voltage
vcc 7.0 15 40
Collector Output Voltage
vc 40
Collector Output Current
200
Amplifier Input Voltage
VCC -2
Current Into Feedback Terminal
Ifb 0.3
Reference Output Current
Iref 10
Timing Resistor
Rt 1.8 500
Timing Capacitor CT 0.00047 0.001 10 MF
Oscillator Frequency 1.0 25 200
PWM Input Voltage (Pins 3 and 4) -0.3 5.3
Note 1. Maximum thermal limits must be observed.
REFERENCE SECTION
V
Reference Voltage Vref
4.925 5.0 5.075
dO = 10 mA, Ta = 25C)
5.1
4.9
dO = 1.0 mA)
Line Regulation Regiine
2.0 25 mV
(Vcc = 7.0 V to 40 V, lo = 1.0 mA)
MC35060A/MC34060A/MC33060A
V|R(|NV) 0.3 to
Inverting Input Voltage Range
V C C -2.0
dB
Open Loop Voltage Gain AVOL
UVq = 3.0 V, Vp = 5 to 3.5 V, R L = 2.0 Kl>)
ELECTRICAL CHARACTERISTICS (V CC = 15 V, CT = 0.01 F. R T = 12 ki! unless otherwise noted. For typical values
MC35060A/MC34060A/MC33060A
Characteristic Symbol Min Typ Max Unit
ERROR AMPLIFIER SECTIONS (Continued)
Unity-Gain Crossover Frequency
fc - 600 - kHz
(V = 0.5 to 3.5 V, R L = 2.0 kill
OSCILLATOR SECTION
Frequency
fosc kHz
(C T 0.01 M F, R T 12 kii)
TA 25 C
97 10.5 11.3
TA T| 0W to T
hlgh 9.5 12.5
(C T 0.001 nF, R T 47 kii)
25
Standard Deviation of Frequency* ,r
^osc - 1.5 - %
(C T 0.001 M F, R T 47 kH)
Frequency Change with Voltage Af osc UV) ~ 0.5 2.0 %
<V CC - 7.0 V to 40 V)
3-204
I
I I I I
I III
V C r - 1RU
-0.001 m f-
100K
>-T '
V -
% -...
"0.1 nF
1.0K
]T
II
It
II
Cj 001 a<
" 8.0
4>=
z 1
y 6.0 mF
90
80
7(1
fin
(
Turn On
sn i
3 5.0
40
/
/ ^- f"
lur un
?n
/
in
/
n /
u 5.0 10 15 20 25 30 35 U 5.0 10 15 20 25 30 35
Vcc, SUPPLY VOLTAGE (VI
l
L ,
REFERENCE LOAD CURRENT ImA)
Error Amplifier
150U
Under Tesl Dead- V CC
Test
Time
2 W
Inputs
Feedback
R Output
T
CT
Feedback
Te-minal
(Pin 31
r Ref
Out
V ref<>-
Other Error
Amplifier
FIGURE 13
COMMON-EMITTER CONFIGURATION FIGURE 14
EMITTER-FOLLOWER CONFIGURATION
TEST CIRCUIT AND WAVEFORM TEST CIRCUIT AND WAVEFORM
3-206
)
Vref
Vref
V0 = V ref |1 V0 =
- v ref(l * 5-1
"iP
Rt / Slave
\ [Additional
) Circuits)
Ct
Max % On Time = 92 - I
ri
3-207
1
001 vcc
I
^ 1(~-
47 k
n v/W ii-
Comp
MC34060A
1000
6.3V
V re f Gnd
DT CT RT
5
10 16 V
0001
4 7 k 4.7 k
WV 4
390
^M 1
0.05
VC C
|-^WV-|(-|
33 k
4.7 k? "WV"
2.7 M
Comp
MC34060A
300
V ref Gnd
VW f
I TIP 111
DT CT RT
0001
Efficiency Vm = 12 V, l = 05 A 75%
-
'Optional circuit to
Vj n = 8.0to40V
O
50/50 V
330/16
3-210
MC34060A, MC35060A, MC33060A
i @>
r- r-
o D
DC
b in in
< <
1- en
o O a. 0.
Q. a.
> >
> > E E Q. Q.
IT
E o > >
o in
o E E
in in
<*
< <
ID < <
< r~ o < in
o o o +1 < o
ro
r-.
O
o < in
r^
z O p o o o o > "
o o 2
1- in +i
Q > > o o O O o o
2 m
O CO on
c c c c c c
> > > > > > >
MOTOROLA MC34063
SEMICONDUCTOR MC35063
TECHNICAL DATA
MC33063
&p
Output Switch Current of 1.5 A
Output Voltage Adjustable from 1.25 to 40 V
Frequency of Operation to 100 kHz & ^ *
U SUFFIX
CERAMIC PACKAGE
CASE 693
1
__ Switch -
O- Collector Switch r~ Tl Driver
Collector I I Collector
'pk
CT (Top View)
Oscillator
vcco Comparator
_3__ Timing
Capacitor
ORDERING INFORMATION
1.25 V
Temperature
Reference
Device Range Package
Regulator
MC35063U -55 to +125C Ceramic DIP
Comparator MC33063U Ceramic DIP
&
Inverting O- -O Gnd - 40 to + 85C
Input
MC33063P1 Plastic DIP
I
J MC34063U Ceramic DIP
Oto +70C
MC34063P1 Plastic DIP
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage vcc 40 Vdc
Comparator Input Voltage Range V|R -0.3 to +40 Vdc
Switch Collector Voltage v C(switch) 40 Vdc
Switch Emitter Voltage v E(switch) 40 Vdc
Switch Collector to Emitter Voltage v CE(switch) 40 Vdc
Driver Collector Voltage v C(driver) 40 Vdc
Switch Current 1.5 Amps
'sw
Power Dissipation and Thermal Characteristics
Ceramic Package
T A = + 25C PD 1.25 W
Derate above T A = + 25C 1 10 mW/C
'ftJA
Plastic Package
T A = + 25"C PD 1.0 W
Derate above T A = + 25C 1/ 10 mW/C
aJA
Operating Junction Temperature Tj C
Ceramic Package + 150
Plastic Package + 125
Operating Ambient Temperature Range TA C
MC35063 -55 to +125
MC33063 -40 to +85
MC34063 to +70
Storage Temperature Range T stg -65 to +150 C
~Z
CT = 3.001 MF
_1 cc - au v
jpk(sense) = VC
ipk(sense)
Pin 2 = Gnd
= V CC
Pin 5 = Gnd
.'''
L*f*j1
:: 'on
,. s
L
--'
^ ,^
-' ---
,
'oft
<"
15 20 26 30
10
1.6
^ 1.2 !
_ Pins 1,7,8 = Vc
Cn
1.0
_ Pin 7 - V(X _ III!
I I I I
1.5
Pins 3,5 = Gnd o Pins 2,3,5 - Gnd
iL
1.4
<
o
0.8
y
SS
1.3 0.6
o Forced Beta - 20
1.2
S <
0.4
5
UJ
.
1.1 0.2
>
1.0
0.2 0.4 0.6 0.8 1.0 1.2 ).2 0.4 0.6 0.8 1.0 1.2
l
E , EMITTER CURRENT (AMPS) IC, COLLECTOR CURRENT IAMPSI
_____ v ou ,
V ln = 25 V, = 500 mA 40 mV p .p
Output Ripple l
170 M H
1N5819
Vout
-o 28 V 175 mA
Conditions Results
Line Regulation
Vjn ^ 8.0 to 16 V, l . 175 mA
Load Regulation U
12 V, - 75 10 175 mA
Output Ripple V in = 12 V, l = 175 mA
Efficiency V in = 12 V, l = 175 mA
Rs
R for
constant Vj n
3-216
MC34063, MC35063, MC33063
1 1
l
out
Desired output current.
'min
Minimum desired output switching frequency at the selected values for Vj n and l .
v ripple(p-p) Desired peak-to-peak output ripple voltage. practice, the calculated value will need to be increased
In
due to the capacitor's equivalent series resistance and board layout. The ripple voltage should be
kept to a low value since it will directly effect the line and load regulation.
DC-TO-DC CONVERTER
DC-TO-DC CONVERTER CONTROL CIRCUITS
CONTROL CIRCUITS
SILICON MONOLITHIC
The MC34063A Series is a monolithic control circuit containing
the primary functions required for DC-to-DC converters. These
INTEGRATED CIRCUITS
devices consist of an internal temperature compensated refer-
ence, comparator, controlled duty cycle oscillator with an active
current limit circuit, driver and high current output switch.
This
series was specifically designed to be incorporated in Step-Down
and Step-Up and Voltage-Inverting applications with a minimum
number of external components. Refer to Application Note P1 SUFFIX
AN920R2 for additional design information. PLASTIC PACKAGE
Operation from 3.0 V to 40 V Input CASE 626
Low Standby Current
Current Limiting
D SUFFIX
Output Switch Current to 1.5 A PLASTIC PACKAGE
Output Voltage Adjustable CASE 751
(SO-8)
Frequency Operation to 100 kHz
Precision 2% Reference
U SUFFIX
CERAMIC PACKAGE
CASE 693
Drive 8
O" 1 _~ Switch
"^
!
Collector
Collector Switch
Collector
Switch rz~
H Driver
Collector
Emitter |__ 7
|
lp|< Sense
Timing
| 3 v cc
'.* Q^j Capacitor I J]
Sense Comparator
2__ Switch
pk
!
Emitter
Gnd |~4~
H Inverting
Input
~ ' Ct
Oscillator (Top View)
VfX O Comparator
I
3
q Timing
Capacitor
1.25 V
Reference ORDERING INFORMATION
Regulator Temperature
Device Range Package
Comparator
Q- MC35063AU -55
Inverting
Input
O Gnd MC33063AD
to +125C Ceramic DIP
Plastic SOIC
1 -40 to + 85C
MC33063AP1 Plastic DIP
(Bottom View) MC34063AD Plastic SOIC
Oto +70C
MC34063AP1 Plastic DIP
3-218
MC34063A, MC35063A, MC33063A
vcc 40 Vdc
Power Supply Voltage
V|R -0.3 to +40 Vdc
Comparator Input Voltage Range
VC(switch) 40 Vdc
Switch Collector Voltage
= 40 V) VE(switch) 40 Vdc
Switch Emitter Voltage (Vpj n -\
40 Vdc
Switch Collector to Emitter Voltage VCE(switch)
Vc(driver) 40 Vdc
Driver Collector Voltage
Characteristic |
Symbol |
Min |
Typ Max Units |
OSCILLATOR
24 33 42 kHz
Frequency fosc
(V Pin 5 = V, CT = 1.0 nF, T A = 25C)
24 33 42 ,xA
Charge Current 'chg
(V Cc = 5.0 V to 40 V, TA = 25C)
TOTAL DEVICE
Supply Current
!CC 4.0
(VCC = 5.0 V to 40 V, CT = 1.0 nF, Pin 7 = V cc ,
3-220
MC34063A, MC35063A, MC33063A
FIGURE 1 OUTPUT SWITCH ON-OFF TIME versus FIGURE 2 TIMING CAPACITOR WAVEFORM
hH
OSCILLATOR TIMING CAPACITOR
H
H Vcc
Pin 7
V
V CC 1 CT
Pins Open 1
H 22
).01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 Pin - Gnd T
A ^^H^HH
Cj, OSCILLATOR TIMING CAPACITOR (nF)
10 /xs/DIV
FIGURE 5 CURRENT LIMIT SENSE VOLTAGE FIGURE 6 STANDBY SUPPLY CURRENT versus
versus TEMPERATURE SUPPLY VOLTAGE
400
380
vcc = 5.0 V
360 - 'dischg
'chg
340
! 320
|
300
280
Cj = 1.0 nF
260 -
Pin 7 = VCc
Pin 2 = Gnd
1 240
1 220
t 200
10 15 20 25
+25 +50 +75
V C c. SUPPLY VOLTAGE (V)
T A AMBIENT TEMPERATURE
,
(C)
^E,1N5819
Vout
nrw>_-
-9 O 28 V/175 mA * q Vqu
-p Cq T* '00
3-222
MC34063A, MC35063A, MC33063A
1.0 >jH
-^YVX-fc O v out
'plOO
Optional Filter
"S = v ut
4.5 V to 6.0 V
+-j-ioo
Optional Filter
3-224
' "
(Top view, copper foil as seen through the board from the component side)
jU / 88 MH \
JL E Innp- J,
>
z
o
N UJ o.i
o> o **-
O o. MC34063
rk 1 ^
MC34063
T U
2
2
z
MC34063
5
o
T
1 p-n
U 1
330
35 V
K^m V 100' l^/
12
470
V
I
iOto
100* "\U edj
^l :
o*;?
cy
|
M ^.+ '
~"+o o-
v out
+o o-
V ut
00
v
+
out
Optional Filter.
Top View, Component Side
INDUCTOR DATA
Converter Inductance (/*H) Turns/Wire
3-225
MC34063A, MC35063A, MC33063A
fmin
CT 4.8 x 10~5tf, 4.8 x 10-5 t. 4.8 x 10-5 tfl
'pk(switch) 2'out(max) l~ + 1
2'out(max) D
2'put(max)(f + 1
Rsc - 3/l
pk(switch) 03/l pk(switch) - 3/l
pk(switch)
Mmin) v in(min)~ v sat v in(min)- v sat~Vnut \ V in(min)-Vsat \
on(max) l
on(max)
'pk(switch) n i,/.. .ui
'pk(switch)
l ; / on(max)
'pk(switch)
CO lput*pn
_ 'pklswitchltton + 'off) Ipuftpn
v ripple(p-p) 8 v ripple(p-p)
ripple(p-p)
v sat = Saturation voltage of the output switch.
Vp = Forward voltage drop of the output rectifier.
NOTE:
Fcr further infprmatipn refer to Application Npte AN920 Rev. 2
3-226
MOTOROLA MC34064
SEMICONDUCTOR MC33064
TECHNICAL DATA
Advance Information
UNDERVOLTAGE
SENSING CIRCUIT
UNDERVOLTAGE SENSING CIRCUIT
SILICON MONOLITHIC
The MC34064 an undervoltage sensing circuit specifically
is
INTEGRATED CIRCUIT
designed for use as a reset controller in microprocessor-based
systems. It offers the designer an economical solution for low
voltage detection with a single external resistor. The MC34064
features a trimmed-in-package bandgap reference, and a com-
parator with precise thresholds and built-in hysteresis to prevent
is capable
erratic reset operation. The open collector reset output P SUFFIX
of sinking in excess of 10 mA, and operation is guaranteed
down PLASTIC PACKAGE
to 1.0 volt input with low standby current. These
devices are CASE 29
packaged in 3-pin TO-226AA and 8-pin surface mount packages. (TO-226AA)
Applications include direct monitoring of the 5.0 Volt MPU/logic
power supply used in appliance, automotive, consumer and
equipment.
industrial
PIN RESET
'W
1.
1 INPUT
2.
3. N.C.
REPRESENTATIVE BLOCK DIAGRAM 4. GROUND
5. N.C.
Input Q 2 (2) 6. N.C.
7. N.C.
8. N.C.
ORDERING INFORMATION
Temperature
Sink Only Device Range Package
Positive True Logic Plastic SO-8
MC34064D-5
0Cto +70C
MC34064P-5 Plastic TO-226AA
Pin numbers adjacent to terminals are for the 3-pin TO-226AA package. MC33064D-5 Plastic SO-8
Pin numbers in parenthesis are for the D suffix SO-8 package. -40Cto + 85C
MC33064P-5 Plastic TO-226AA
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Input Supply Voltage
Vin -1.0 to 10 V
Reset Output Voltage
v 10 V
Reset Output Sink Current (Note 1) 'Sink Internally mA
Limited
Clamp Diode Forward Current, Pin 1 to 2 (Note 1) IF 100 mA
Power Dissipation and Thermal Characteristics
P Suffix, Plastic Package
Maximum Power T A = 25C
Thermal Resistance, Junction
Dissipation (a
Pd 625 mW
to Air R 6UA 200 C/W
D Suffix, Plastic Package
Maximum Power TA = 25C
Dissipation
Thermal Resistance Junction to Air
(a
pd 625 mW
R0JA 200 C/W
Operating Junction Temperature Tj + 150 c
Operating Ambient Temperature
ta c
MC34064
Oto +70
MC33064 - 40 to + 85
I
ELECTRICAL CHARACTERISTICS For typical values TA = 25C, for min/max values TA is the operating ambient temperature
range that applies (Notes 2 and 3).
0.15 0.4
(Vj n = 1-OV,
'Sink = 0.1 mA)
0.1
Output Sink Current (V = 4.0 V)
in Reset ,
3 Z
T low =
i
d tV CV C P U IS e
O for
U 'c M C3406i
f o r MC34064
qUeS '" ""* """"^ X0 'mta n
T niqn = +70C
''
for
'
UnCt'" tem
MC34064
^^ close to ambient as possible,
3-228
MC34064, MC33064
FIGURE 1 RESET OUTPUT VOLTAGE versus FIGURE 2 RESET OUTPUT VOLTAGE versus
INPUT VOLTAGE INPUT VOLTAGE
5.0 i
i
RL - 10ktnV;
R L == 10 kto V| n
Ta = 25C Ta = 25C
4.0
>
<j
hj 3.0
o
'
'
z> , i
o
>6
1.0
\
^L 4.0 6.0 8.0
1
4.600 4.620
4.630 I
RL = 10 k to Vj n
_
>
4.620 U(.
TA = +25C<
Hie h State jtput
< 4.610
-40C
o
>
3 4.600
\ + 85C
CO
TA = +25C N
H 4.590 '
V
Low er Threshc Id
^^ + 85C V -40C
V in INPUT VOLTAGE
,
(V)
T A AMBIENT TEMPERATURE
,
TO
V in = 4.0 V I
TA = + 85C
/ >T A = -40C-
"
10 20 30 2 00 ns/Div.
Vin
= OV
1 60
z
az
3 40
Q
5
o
Vin
TEST DATA
VH AV th Rh Rl
*Rl (mV) (mV) <n> (km
"
^4 . | O 1 Microprocessor 20
T r: """*
Circuit
"I'd) Relit '
51 3.4 10 1.5
81 6.8 20 1.5
46 Rh 71 10 30 2.7
R|_
112 10 30 1.5
327 34
^l a
H
r
^?teresis can be increasedwith the addition of resistor H
H The hysteresis equation has been
.
100 1.5
SI int
^BV'^ST 4)
at 4.59 V.
An
not a c co nt
f fh r
f r
he C hangB f input CUrrem
^ . ' d
,hreSh ,!
AVth ('ow^) Wi " be observed due
The equations are accurate to 10% with R less than 150 n
^
as V CC crosses the comparator threshold
'In which is typically 340 ^A
276 51 150 2.7
3-230
MC34064, MC33064
1.0 k
Conditions Results
Test
MTP3055EL
with the
Overheating of the logic level power MOSFET due to insufficient gate voltage can be prevented
volt threshold of the MC34064. its output
grounds the
above circuit: When the input signal is below the 4.6
gate of the L 2 MOSFET.
PIN CONNECTIONS
SIMPLIFIED BLOCK DIAGRAM
Sync Input [T lE V CC
CT [7 5! V ref
Voltage Feedback
rt
n
[T
if] Drive Output 2 Enab
1
13l Voltage Feedback 2
Compensation 1
12] Compensation 2
[J~
Current Sense 1Hf jTJ Current Sense 2
Drive Output 1[T K>] Drive Output 2
Gnd (T T] Drive Gnd
ITop Viewl
ORDERING INFORMATION
Temperature
Device Range Package
MC34065DW SO-16L
0to +70C
MC34065P
oL Plastic DIP
-% Gnd O8 Drive
*1
Gnd O 9
J" MC33065DW
-40 to +85 C
'C
SO-16L
MC33065P Plastic DIP
3-232
MC34065 MC33065
MAXIMUM RATINGS
Rating Symbol Value Unit
Total Power Supply and Zener Current (icc + 'z) 50 mA
Output Current, Source or Sink (Note 1) '0 1.0 A
Output Energy (Capacitive Load per Cycle) w 5.0 MJ
Current Sense, Enable, and Voltage Vin -0.3 to +5.5 V
Feedback Inputs
Sync Input -High State (Voltage) V|H 5.5 V
Low State (Reverse Current) IlL -5.0 mA
Error Amp Output Sink Current '0 10 mA
Power Dissipation and Thermal Characteristics
DW Suffix Package SO-16 Case 751G-01
Maximum Power Dissipation ( T& = 25C PD 862 mW
Thermal Resistance Junction to Air R 0JA 145 C/W
P Suffix Package Case 648-06
Maximum Power Dissipation (a Ta = 25C PD 1.25 w
Thermal Resistance Junction to Air R 0JA 100 C'W
Operating Junction Temperature Tj + 150 c
ELECTRICAL CHARACTERISTICS (V C c = 15 V [Note R T = 8.2 kO, C T = 3.3 nF, for typical values TA = 25C, for min/max
2],
values T/\ is the operating ambient temperature range that applies [Note 3].)
Output Voltage Swing -High State (R|_ = 15 k to ground, Vfb = 2.3 V) VOH 5.0 6.2 V
-Low State IR(_ = 15 k to V ref V FB = 2.7 V)
, VOL 0.8 1.1
ELECTRICAL CHARACTERISTICS (V cc = 15 V [Note 2], R T = 8.2 kil, Cj = 3.3 nF, for typical values Ta = 25C, for min/max
values Ta is the operating ambient temperature range that applies [Note 3].)
Low State Input Current (V|L = V) 'IB 100 250 400 fiA
DRIVE OUTPUTS
Output Voltage V
Low State Osj n k = 20
mA) VOL 0.1 0.4
dSink = 200 mA) 0.8 2.5
High State (Source = 20 mA) VOH 13 13.5
''Source = 200 mA) 12 13.4
FIGURE 1
TIMING RESISTOR versus FIGURE 2 MAXIMUM OUTPUT DUTY CYCLE
OSCILLATOR FREQUENCY versus OSCILLATOR FREQUENCY
\ \
3.3 nF A, \ \ \ 100 pFV
^i \ 500 pFl_ \ \
^ V L \ \ \ 1
220 pF-V-
1
L
Uf\
L \ \ '
\ V S 46 ut ut 2
\ V V \ \ <r
S
\
\ nF\
\ \ \ V \>330pF\
\ 3 44 Ou tput
5.0
,
V \ \N o
*
nF \
vr
2.2
CT=\
\
\ \ \ :\ '
I
V CC " 1R V
RT = 4.0 k to 16 k
10 nF >
\ \ CL =
V V- V \ \N \ \ J 40
=
15 pF
\ \ \ v\\ W
^ "lA 25C
V CC = 15 N k
= S
40
TA 25 :
k \ \ \ v. 38 I I I
10K 30K 50K 100K 300K 500K 1.0M 30K 50K 100K 300K 500K
fQSC. OSCILLATOR FREQUENCY (Hz) fQSC. OSCILLATOR FREQUENCY (Hz)
3.0 V
1 .0 ms DIV
1.0/xs.DIV
FIGURE 5 ERROR AMP OPEN-LOOP GAIN AND FIGURE 6 CURRENT SENSE INPUT THRESHOLD
PHASE versus FREQUENCY versus ERROR AMP OUTPUT VOLTAGE
! I I
IJ
C
|
= ^
zt Ta = 125C/
J
Tft
I
= 2bT=^TT
I
55r
//
7 2.0 3.0 4.0 5.0
1.0K 10K 100K
V ERROR AMP OUTPUT VOLTAGE (V)
1, FREQUENCY (Hz) ,
-25 25 50 75
l ,
ref
ta = - 55X
j
L I
?n ta = -
1 n 25C
o ^ 200
I
400
r.
I
\
6(
(Load to vcd
RT
1
= 8.2K
1 1 1
Cj = 3.3 nF
V FB 1,2 = V
Current Sense 1,2 = V
'
8.0 12
V CC SUPPLY VOLTAGE
,
.(VI
3-236
MC34065 MC33065
series are high performance, fixed fre- nal loop compensation. The output voltage is offset by
The MC34065
quency, dual channel current mode controllers specif- two diode drops = 1.4 V) and divided by three before
(
common to both channels. the comparator's 0.5 V clamp level with the inverting
out circuits are
input at ground. This condition happens during initial
Oscillator
system startup or when the sensed output is shorted:
The unique oscillator configuration employed fea- 3.0 (0.5 V) + 1.4 V _
= " 5800
tgres precise frequency and duty cycle control. The fre-
R f<MIN>
oT^
quency is programmed by the values selected for the
timing components Rj and Cj. Capacitor Cj is charged Current Sense Comparator and Latch PWM
and discharged by an equal magnitude internal current The MC34065 operates as a current mode controller,
source and sink, generating a symmetrical 50 percent whereby output switch conduction is initiated by the
duty cycle waveform at Pin 2. The oscillator peak and oscillator and terminated when the peak inductor cur-
valley thresholds are 3.5 V and 1.6 V respectively. The rent reaches the threshold level established by the Error
source/sink current magnitude is controlled by resistor Amplifier output. Thus the error signal controls the peak
R-f- For proper operation over temperature it must be inductor current on a cycle-by-cycle basis. The Current
in the range of 4.0 kH to 16 kil as shown in Figure Sense Comparator-PWM Latch configuration used
1.
As Cj charges and discharges, an internal blanking ensures that only a single pulse appears at the Drive
pulse is generated that alternately drives the center Output during any given oscillator cycle. The inductor
inputs of the upper and lower NOR gates high. This, in current is converted to a voltage by inserting a ground-
conjunction with a precise amount of delay time intro- referenced sense resistor R$ in series with the source
duced into each channel, produces well defined non- of output switch Q1. This voltage is monitored by the
overlapping output duty cycles. Output 2 is enabled Current Sense Input (Pin 6, 1 1 and compared to a level
)
while Cj is charging, and Output 1 is enabled during derived from the Error Amp output. The peak inductor
the discharge. Figure 2 shows the Maximum Output current under normal operating conditions is controlled
Duty Cycle versus Oscillator Frequency. Note that even by the voltage at Pin 5, 12 where:
at 500 kHz, each output is capable of approximately
44%
_ V(Pin5. 12) ~ 1-4 V
on-time, making this controller suitable for high fre-
.
'P k " 3R S
quency power conversion applications.
In many noise sensitive applications it may be desir- Abnormal operating conditions occur when the
able to frequency-lock the converter to an external sys- power supply output is overloaded or if output voltage
tem clock. This can be accomplished by applying a clock sensing is lost. Under these conditions, the Current
signal as shown in Figure 17. For reliable locking, the Sense Comparator threshold will be internally clamped
to 0.5 V. Therefore the maximum peak switch
current
free-running oscillator frequency should be set about
10% less than the clock frequency. Referring to the tim- is:
ing diagram shown in Figure 16, the rising edge of the _ 0.5 V
Ipk(max) ~
clock signal applied to the Sync input, terminates charg- R
ing of Cj and Drive Output 2 conduction. By tailoring high power switching regulator it
When designing a
the clock waveform symmetry, accurate duty cycle reduce the internal clamp voltage
may be desirable to
clamping of either output can be achieved. A circuit
in order to keep the power dissipation of Rs
to a rea-
method for this, and multi unit synchronization, is
sonable level. A simple method to adjust this voltage
shown in Figure 18. are used
is shown in Figure 19. The two external diodes
r
Vref 04 ^J Reference
)?H * 17V I
qp> T MH
Voltage -
w/v
Feedback 1
Current Sense 1
Compensation 1 o
- ULJL
l 1 1 1 1
iTm-rurvTJwLi
Latch
"Set" Input
-
Compensation 1
Current Sense 1 jC
1
SL 1 1 1 1
LJ-Jl_X_J
1 1 1 1 1
Ks^ruwmn^
1 1 1 1 1 1
Drive Output 1
' i 1 i 1
Drive Output 2
Enable
I
rLrLrm^njULn
I
Latch
"Set" I
- I I I I I
Compensation 2 .
Current Sense 2
n
'
'
' ' '
Ill
1 i
L-JL_JUJL_JL_L_JL
i i i i i
Drive Output 2
i
KJL_R_n_nTULri_
i 1 1 i
3-238
MC34065 MC33065
power supply terminal {VqO and tne reference output reducing the clamp level. Figure 23 shows the
p k(max)
l
(V re f) are each monitored by separate comparators. proper ground connections required for current sensing
Each has built-in hysteresis to prevent erratic output power MOSFET applications.
behavior as their respective thresholds are crossed. The
Vqc comparator upper and lower thresholds are 14 V Drive Output 2 Enable Pin
This input is used to enable Drive Output Drive
and 10 V respectively. The hysteresis and low start-up 2.
current makes these devices ideally suited to off-line Output can be used to control circuitry that must run
1
converter applications where efficient bootstrap start- continuously such as volatile memory and the system
up techniques are required (Figure 28). The V ref com- clock, or a remote controlled receiver, while Drive Out-
parator disables the Drive Outputs until the internal cir- put 2 controls the high power circuitry that is occasion-
cuitry is comparator has upper and
functional. This ally turned off.
FIGURE 18
EXTERNAL DUTY CYCLE CLAMP AND
FIGURE 17 EXTERNAL CLOCK SYNCHRONIZATION MULTI UNIT SYNCHRONIZATION
X
External
JIA.
220 pF
J.
IT
JOv
x ,,
\
m 1
20 k
^jut.
<$.
jf-SS 2R
'AV
5|
L. To Additional MC34065S
The external diode clamp is required if the negative Sync current Ra
Dmax Drive Output D max Drive Output 2
is greater than - 5.0 mA.
1
MC34065 MC33065
I
- "
FIGURE 23 CURRENT SENSING POWER MOSFET FIGURE 24 CURRENT WAVEFORM SPIKE SUPPRESSION
R r
S 'pk DS(oi
6 RS i : SENSEFET - MTP10N10M
1 4 W RS - 200
Circuitry Ground 1 Then: V Pln 6 . 075 pk l
To Pin 8
The addition of the RC filter will ,
Virtually lossless current sensing
can be achieved with the by the leading edge spike on the current
waveforr
implementation of a SENSEFET power switch For proper oper
ation during over current conditions, a reduction of
the
IpHmaxt clamp level must be implemented Refer to Figures
19 and 21
3-240
MC34065 MC33065
Isolation
Boundry
rp&fl?'
(|)1.0 mA
r^ri (
U^
Vo
29.8 14.7
1.0 283 -13 4
5.0 27.9 12.9
10 27.5 -12.5
50 244 -9 5
The capacitor's equivalent series resistance must limit the Drive Output current to 1.0 A.
An additional series resistor may be required when using tantalum or other low ESR
capacitors. The positive output can provide excellent line and load regulation by
connecting the R2/R1 resistor divider as shown.
9.0 V Output
T3 Primary: 56 Turns, #23 AWG
lO = 0.08 A to 0.1 A A = 234 mV or 1.3% (2 strands) Bifiliar Wound
Secondary 12 V: 4 Turns,
Output Ripple Vj n = 115 Vac #23 AWG (4 strands)
3-242
MC34065 MC33065
CIRCUIT VIEW
Timing capacitor C T connects from this pin to ground setting the free-running Oscillator fre-
quency range.
Rt Resistor R T connects from this pin to ground precisely setting the charge current for Ct Rt
must be between 4.0 k and 16 k.
Voltage Feedback 1 This pin is the inverting input of Error Amplifier 1. It is normally connected to the switching
power supply output through a resistor divider.
Gnd This pin is the control circuitry ground return and is connected back to the source ground.
9 Drive Gnd This pin is a separate power ground return that
connected back to the power source.
is
It is used
to reduce the effects of switching transient noise on the control circuitry.
10 Drive Output 2 This pin directly drives the gate of a power MOSFET 02. Peak currents up to 1.0 A are sourced
and sunk by this pin.
11 Current Sense 2 A voltage proportional to inductor current is connected to this input. PWM 2 uses this information
to terminate conduction of output switch Q2.
12 Compensation 2 This pin is the output of Error Amplifier 2 and is made available for loop compensation.
13 Voltage Feedback 2 This pin isthe inverting input of Error Amplifier 2. It is normally connected to the switching
power supply output through a resistor divider.
14 Drive Output 2 Enable A logic low at this input disables Drive Output 2.
15 Vref This is the 5.0 V reference output. It can provide bias for any additional system circuitry.
16 VC C This pin is the positive supply of the control IC The minimum operating voltage ranqe after
start-up is 11 V to 15.5 V.
3-244
G
MOTOROLA MC34066
SEMICONDUCTOR MC33066
TECHNICAL DATA
Product Preview
HIGH PERFORMANCE
RESONANT MODE
HIGH PERFORMANCE RESONANT MODE CONTROLLER CONTROLLER
series are high performance resonant mode
con-
The MC34066 SILICON MONOLITHIC
trollersdesigned for Off-Line and DC-to-DC converter applications INTEGRATED CIRCUIT
that utilizefrequency modulated constant on-time or constant off-
time control. These integrated circuits feature a variable
frequency
retriggerable
oscillator with programmable deadtime, precision
gain
one-shot timer, temperature compensated reference, high
wide-bandwidth error amplifier with a precision output clamp,
steering flip-flop, and dual high current totem pole outputs
ideally
ORDERING INFORMATION
Temperature
Device Range Package
j-O Fault Input
MC34066DW SO-16
Oto +70C
MC34066P Plastic DIP
MC33066DW SO-16
- 40 to + 85C
MC33066P Plastic DIP
reserves the
This document contains information on a new product under development. Motorola
right to change or discontinue the product without notice.
MC34066, MC33066
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage
vcc 20 V
Drive Output Current, Source or Sink (Note
Continuous
1) o A
0.3
Pulsed (0.5 fxs, 25% Duty Cycle) 1.5
Error Amplifier, Fault, One-Shot, Oscillator, and
Vin -1.0 to +6.0 V
Soft-Start Inputs
Characteristic Symbol
1
I I Min I
Typ I
Max I Unit
-
REFERENCE SECTION 1 ' '
Reference Output Voltage <l = mA, TA = 25C) Vref 5.0 5.1 5.2 V
Line Regulation (Vcc = 10 V to 18 V) Re 9line _ 1.0 20 mV
Load Regulation (Iq = mA to 10 mA) Reg| ad 1.0 20 mV
Total Output Variation Over Line, Load, and Temperature Vref 4.9 5.3 mV
Output Short Circuit Current
'O 25 100 190 mA
Reference Undervoltage Lockout Threshold
Vth 3.8 4.3 4.8 V
ERROR AMPLIFIER
Input Offset Voltage (Vcm = 1.5 V) VlO 1.0 10 mV
Input Bias Current (Vcm = 1.5 V) llB 0.2 1.0 /xA
Input Offset Current (Vcm = 1.5 V)
ho 0.5 /xA
Open-Loop Voltage Gain (Vcm = 1.5 V, Vo = 2.0 V) A VOL 70 100 dB
Gain Bandwidth Product (f = 100 kHz)
GBW 2.5 4.2 MHz
Input Common Mode Rejection Ratio (Vcm = 1.5 V to 5.0 V) CMRR 70 95 dB
Power Supply Rejection Ratio (Vcc = 10 V to 18 V, f = 120 Hz) PSRR 80 100 _ dB
Output Voltage Swing
High State with respect to Pin 3 V
(Source = 2.0 mA) VOH 2.1 2.5 2.9
Low State with respect to ground dsj = 1.0 mA)
nk vol 0.4 0.6
3-246
MC34066, MC33066
R n, R V FO - 562
ELECTRICAL CHARACTERISTICS (continued) (V CC = 12 V [Note 2], R SC = 95.3 k, DT =
k,
= 1.0 nF, for typical values T A = 25C, for min/max values TA is the operating
COSC = 300 pF, R T = 14.3 k, C T = 300 pF, C L
Characteristic Symbol |
Min |
Typ |
Max |
Unit |
I
|
nsni ator
i
kHz
Frequency (Error Amp Output Low) fOSC(low)
110
90 100
TA = 25C
T Hiqh> 85 115
Total Variation (Vcc = 10 V to 18 V, TA = Tlow t0
kHz
Frequency (Error Amp Output High) fOSC(high)
900 1000 1100
T A = 25C
850 1150
Total Variation (V C c = 10 V to 18 V, T A = Tl w to T H jgh>
= - 5mA TA = 2 5C) Vin 1.3 1.4 1.5 V
Oscillator Control Input Voltage, Pin 3 Osink '
DT ns
Output Deadtime (Error Amp Output High)
70 100
Rrjt = Oil
600 700 800
R DT - 1-0k
ONE-SHOT
/LIS
Drive Output On-Time (Rqt - 1 k> tON
1.43 1.5 1.57
T A = 25C
1.4 1.6
Total Variation (Vcc = 10 V to 18 V, T A = Tl w t0 T Hiqh)
DRIVE OUTPUTS
vol V
Output Voltage
0.8 1.2
Low State dsirtk = 20 mA)
1.5 2.0
(l
Sink = 200 mA) 10.3
High State dsource = 20 mA '
VOH 9.5
9.0 9.8
dSource = 20 mA >
Output Voltage with UVLO Activated (Vcc = 6.0 V, (sink = 10 mA > VOUUVLO) - 0.8 1.2 V
20 50 ns
Output Voltage Fall Time (C|_ = 1.0 nF) tf
- . 1
FAULT COMPARATOR
Vth 0.95 1.0 1.05 V
Input Threshold
SOFT-START
4.5 9.0 14 IxA
Capacitor Charge Current (Vpj n n =2.5 V) 'chg
UNDERVOLTAGE LOCKOUT
Vth(UVLO)
V
Start-Up Threshold, Vcc Increasing
14.8 16 17.2
Enable/UVLO Adjust Pin Open
8.0 9.0 10
Enable/UVLO Adjust Pin Connected to Vcc
VcC(min)
V
Minimum Operating Voltage After Turn-On
8.0 9.0 10
Enable/UVLO Adjust Pin Open
7.6 8.6 9.6
Enable/UVLO Adjust Pin Connected to Vcc
Vth(Enable) 6.0 7.0 V
Enable/UVLO Adjust Shutdown Threshold Voltage
Enable/UVLO Adjust Input Current (Pin 9 = V) 'in(Enable)
-0.2 -1.0 mA
TOTAL DEVICE
Pin Open) cc
mA
Power Supply Current (Enable/UVLO Adjust - 0.6
0.45
Start-Up(V Cc = 13.5 V)
21 30
Operating (foSC = 100 kHz, Note 2)
NOTE 2. Adjust Vcc above the Start-Up threshold before setting to 12 V.
UVLO Adjust
g
-^v ref
Error Amp
Output
3-248
MC34066, MC33066
Oscillator
characteristics of the variable frequency Oscil- for CosC- which corresponds to the maximum oscil-
The
performance at lator frequency, is given by Equation 1.
lator are crucial for precise controller
high operating frequencies. In addition to triggering the 2.5RQSC
+ 5.1
One-Shot timer and initiating the output pulse, the R VFO (1)
Oscillator also determines the initial voltage for the One- tdchg(min) = R DT +
< R0SC>C0Sdn
2.5RQSC
Shot capacitor and defines the minimum deadtime + 3.6
Rvfo
between output pulses. The Oscillator is designed to
operate at frequencies exceeding 1.0 MHz. The Error The minimum oscillator frequency will result when
Amplifier can control the oscillator frequency over a the lose current is zero, and CosC is discharged
1000:1 frequency range, and both the minimum and through the external resistors RoSC and R DT- Tnis
maximum frequencies are easily and accurately pro- occurs when the Error Amplifier output voltage is less
grammed by the proper selection of external compo- than the two diode drops required to bias the input of
nents. The Oscillator also includes an adjustable dead- the Current Mirror. The maximum oscillator discharge
time feature for applications requiring additional time time is given by Equation 2.
between output pulses.
f5 -
U
tdchg(max) = (RdT+ r OSC> CoSC In
\j^
(2)
The functional diagram of the Oscillator and One-Shot
timer is shown in Figure 2. The oscillator capacitor The outputs of the control IC are off whenever the
Cqsc is initially charged by transistor Q1 through the oscillator capacitor CqsC is bein 9 charged by tran-
optional deadtime resistor Rrjj- When CrjSC exceeds sistor Q1. The minimum time between output pulses
the 4.9 V upper threshold of the oscillator comparator, (deadtime) can be programmed by controlling the
the base of Q1 is pulled low allowing Cose t0 discharge charge time of CosC- Resistor Rdt reduces the cur-
through the external resistors and the internal Current rent delivered by Q1 to CqsC' tnus increasing the
Mirror. When the voltage on CosC falls below the com- charge time and the output deadtime. Varying Rdt
parator's 3.6 V lower threshold, Q1 turns on and again from to 1000 ohms will increase the output deadtime
charges CqsC- from 80 ns to 680 ns with CoSC e Q ual t0 300 P F Tne -
OSC(mm)
f
^^ = t dchg(min) +t chg
The value chosen for resistor Rdt will affect the peak
(5)
Control Current pin. The control current drives a unity with the oscillator capacitor by transistor Q1, as
gain Current Mirror which pulls an identical current shown in Figure 2. The One-Shot period begins when
from the CosC capacitor. As lose increases, CosC dis- the oscillator comparator turns off Q1 allowing Cj to ,
charges faster thus decreasing the Oscillator period and discharge. The period ends when resistor Rj dis-
increasing the frequency. The maximum frequency charges Cj to the threshold of the One-Shot compar-
ator. Discharging Cj from an initial voltage of 5.1 V
occurs when the Error Amplifier output is at the upper
clamp level, nominally 2.5 V above the voltage at the to a threshold voltage of 3.6 V results in the One-Shot
Osc Control Current pin. The minimum discharge time period given by Equation 6.
COSC
3.6 V
l dchg
- tdchg
N\NN
|
AOUT
toff *ton
Bout
run
R DT = 1.0 k
3.6 V
fr'Pchgl-* l
dchg tchg|tdchg|
5.1 V
r^r^r^r^
|-*-tos*-|
AOUT
bout
Output Section
tOS = RT C T In
1 1^ I
= 0.348 R T C T (6)
The pulse, 't on generated by the Oscillator and One-
,'
Shot period. To guarantee accuracy, the output pulse sitions of on toggle the Flip-Flop, which causes the
't '
comparator or the One-Shot comparator can terminate and sinking 1.5 Amps. Rise and fall times are typically
20 ns when driving a 1 .0 nF load. High source/sink capa-
the pulse. When the oscillator discharge time exceeds
bility in a totem-pole driver normally increases the risk
the one-shot period, the complete one-shot period is
of high cross conduction current during output transi-
delivered to the output section. If the oscillator dis-
tions. The MC34066 utilizes a unique design that vir-
charge time is less than the one-shot period, then the
tually eliminates cross conduction, thus controlling the
oscillator comparator terminates the pulse prematurely
and retriggers the One-Shot. The waveforms on the left chip power A separate
dissipation at high frequencies.
A
fully accessible high performance Error Amplifier
is provided for feedback control of the power supply Steering
Drivers
-O
Drive
Output B
Drive
ages below 1.5 V, the Error Amplifier output is forced 1
Gnd
low providing minimum oscillator frequency.
The Oscillator Control Current pin is biased by the
Error Amplifier output voltage through R\/FO as illus_
trated in Figure 4. The output swing of the Error Ampli-
PERIPHERAL SUPPORT FUNCTIONS
The MC34066 Resonant Controller provides a number
by a clamp circuit to limit the maximum
fier is restricted
of support and protection functions including a preci-
oscillator frequency. The clamp circuit limits the voltage
sion voltage reference, undervoltage lockout compar-
across R\/FO t0 2 5 - v thus
limiting IqsC t0 2 5 V/R\/FO-
- -
Osc Control |
the input Vcc voltage and the regulated reference volt-
Current age as illustrated in Figure 6. When Vcc increases to
the upper threshold voltage, the Vcc UVLO comparator
enables the Reference Regulator. After the V re f output
of the Reference Regulator rises to 4.2 V, the V re f UVLO
lose
'
<VFO |
comparator switches the 'UVLO' signal to a logic zero
Error Amp
state enabling the primary control path. Reducing Vcc
Error
Output
Amp
>i Output Clamp
to the lower threshold voltage causes the Vcc UVLO
comparator to disable the Reference Regulator. The V re f
UVLO comparator then switches the 'UVLO' output to
Noninverting Input a logicone state disabling the controller.
Error Amp
Inverting Input 8
y
q_
3fe^ Error
Amplifier
The Enable/UVLO Adjust terminal allows the power
supply designer to select the Vcc UVLO threshold volt-
ages. When this pin is open, the comparator switches
the controller on at 16 V and off at 9.0 V. If this pin is
connected to the Vcc terminal, the upper and lower
thresholds are reduced to 9.0 V and 8.6 V, respectively.
3-251
MC34066, MC33066
vcco- H
Enable/ q.
UVLO Adjust 9
trrr Reference
-OV re f
i - n
50 k
-=- ft
8.0n
^
*^ Vrr
v --
V
uvlo
l 1
Regulator
V ref UVLO
J ft"
^ 4.2 V/4.0 V
Forcing the Enable/UVLO Adjust pin low will pull the X
Vcc UVLO comparator input low (through an internal
diode) turning off the controller.
The Reference Regulator provides a precise 5.1 V ref- frequency and ramp upward until regulated by the feed-
erence to internal circuitry and can deliver up to 10 mA back control loop. The external capacitor at the Cg ft-
to external loads. The reference is trimmed to better Start terminal initially discharged by the
is
than 2% initial accuracy and includes active short circuit 'UVLO + The low voltage on the capacitor
Fault' signal.
protection. passes through the Soft-Start Buffer to hold the Error
Amplifier output low. After 'UVLO + Fault' switches to a
Fault Detector logic zero, the soft-start capacitoris charged by a 9.0 /u,A
The high-speed Comparator and Latch illus-
Fault current source. The buffer allows the Error Amplifier
trated in Figure 7 can protect a power supply from output to follow the soft-start capacitor until it is reg-
destruction under fault conditions. The Fault Input pin ulated by the Error Amplifier inputs (or reaches the 2.5 V
connects to the input of the Fault Comparator. If this clamp). The soft-start function is generally applicable to
input exceeds the 1.0 V threshold of the comparator, controllers operating below resonance and can be dis-
the Fault Latch is set and two logic signals simultane- abled by simply opening the Csoft-Start terminal.
ously disable the primary control path. The signal
labeled 'Fault' at the output of the Fault Comparator is APPLICATIONS
connected directly to the output drivers. This direct path The MC34066 can be used for the control of series,
reduces the propagation delay from the Fault Input to resonant con-
parallel or higher order half/full bridge
the A and B outputs to typically 70 ns. The Fault Latch verters. The designed to provide control in dis-
IC is
output is OR'd with the 'UVLO' output from the V re f continuous conduction mode (DCM) or continuous con-
UVLO comparator to produce the logic output labeled duction mode (CCM) or a combination of the two. For
'UVLO + Fault.' This signal disables the Oscillator and example, in a parallel resonant converter (PRC) oper-
One-Shot by forcing both the CosC and ^T capacitors ating in the DCM, the IC is programmed to operate in
to be continually charged. fixed on-time, variable frequency mode of operation.
For a PRC operating in the CCM, the IC can be pro-
FIGURE 7 FAULT DETECTOR AND SOFT-START grammed to operate in the variable frequency mode
with a fixed off-time.
'UVLO + Fault' 'UVLO'
When operating with a wide input voltage range, such
as a universal input power supply, a PRC can operate
in the DCM for high input voltage and in the CCM for
Fault
Input
low input voltage. In this particular case, on-time is pro-
grammed corresponding to DCM. The deadtime of the
chip is programmed to provide the desired off-time in
the CCM. The frequency range ischosen to cover the
complete frequency range from the DCM to the CCM.
When programmed as such, the controller will operate
in the fixed on-time, variable frequency mode at low
The Fault Latch is reset during start-up by a logic frequencies. At the frequency which causes the Oscil-
one at the 'UVLO' output of the V re f UVLO comparator. lator to retrigger the One-Shot, the control law changes
The latch can also be reset after start-up by pulling to variable frequency with fixed off-time. At higher fre-
the Enable/UVLO Adjust pin momentarily low to dis- quencies the supply will operate in the CCM with this
able the Reference Regulator. control law.
Although the IC is designed and optimized for double
Soft-Start Circuit ended push-pull type converters, it can also be used for
The Soft-Start circuit shown in Figure 7 forces the single ended applications, such as forward and flyback
variable frequency Oscillator to start at the minimum resonant converters.
HIGH PERFORMANCE
CURRENT MODE CONTROLLER
HIGH PERFORMANCE CURRENT MODE CONTROLLER SILICON MONOLITHIC
INTEGRATED CIRCUIT
The MC341 29 series are high performance current mode switch-
ing regulators specifically designed for use in low power digital
a high current totem pole driver ideally suited for driving a power 1 1I
11
"
MOSFET.
Also included are protective features consisting of soft-start,
undervoltage lockout, cycle-by-cycle current limiting, adjustable
dead time, and a latch for single pulse metering.
Although these devices are primarily intended for use in digital
many D SUFFIX
telephone systems, they can be used cost effectively in
PLASTIC PACKAGE
other applications.
CASE 751
Current Mode Operation to 300 kHz 1 (SO-14)
Automatic Feed Forward Compensation
Latching PWM for Cycle-By-Cycle Current Limiting
Continuous Retry after Fault Timeout
Soft-Start with Maximum Peak Switch Current Clamp
Internally Trimmed 2% Bandgap Reference
High Current Totem Pole Driver
Input Undervoltage Lockout PIN CONNECTIONS
Low Start-Up and Operating Current
Direct Interface with Motorola SENSEFET Products Drive Output [T T4jV CC
^PWM Input
Tq| Error Amp
r t ;c t [E Inverting Input
>
Error Amp
c Soft-Start Vref2.5V[e[ gl'Non-Inverting Input
(Top View)
9__ Non-Inverting
Input
]0 Inverting
Input
ORDERING INFORMATION
o Feedback/ Temperature
PWM Input Device Range Package
Drive Out
MC34129D Oto + 70C SO-14 Plastic DIP
O Drive Gnd MC34129P to +70C Plastic DIP
MAXIMUM RATING
Rating Symbol Value Unit
Vqc Zener Current 'Z(Vcc) 50 mA
Start/Run Output Zener Current
^(Start/Run) 50 mA
Analog Inputs (Pins 3, 5, 9, 10, 11, 12) -0.3 to 5.5 V
Sync Input Voltage -0.3 to V
Vsvnc Vqc
Drive Output Current, Source or Sink
'DRV 1.0 A
Current, Reference Outputs (Pins 6, 8)
'ref 20 mA
Power Dissipation and Thermal Characteristics
D Suffix Package SO-14 Case 751A-01
Maximum Power Dissipation @ TA = 70C PD 552 mW
Thermal Resistance Junction to Air R 0JA 145 C/W
P Suffix Package Case 646-06
Maximum Power Dissipation @ TA = 70C PD 800 mW
Thermal Resistance Junction to Air R 0JA 100 C/W
Operating Junction Temperature Tj + 150 C
Operating Ambient Temperature T"A C
MC34129 Oto +70
MC33129 -40 to +85
Storage Temperature Range T stg -65 to +150 C
ELECTRICAL CHARACTERISTICS (V cc = 10 V, TA 25C [Note 1] unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
REFERENCE SECTIONS
Reference Output Voltage, TA = 25C
Vref V
1.25 V Ref., I
L = mA 1.225 1.250 1.275
2.50 V Ref., Il = 1.0mA 2.375 2.500 2.625
Reference Output Voltage, T =
A T| ow to T niah Vref V
1.25V Ref., I
L = mA 1.200 - 1.300
2.50 V Ref., Il = 1.0 mA
2.250 2.750
Line Regulation (Vcc = 4.0 V to 12 V) R eg|ine mV
1.25V Ref., I
L = mA - 2.0 12
2.50 V Ref., Il = 1.0 mA
10 50
Load Regulation Re 9load mV
1.25 V Ref., Il = - 1to + 500 fnA - 1.0 12
2.50 V Ref., I
L = -0.1 to + 1.0 mA 3.0 25
0.1 0.15
Note 1 . T| ovv OX for MC34129 T high = +70C for MC34129
= -40Cfor MC33129 = +85CforMC33129
3-254
MC34129, MC33129
PWM COMPARATOR
Input Offset Voltage (Vj n = 1.25 V) VlO 275 400 mV
-250 ji.A
Input Bias Current >IB
SOFT-START
1.50 /iA
Capacitor Charge Current (Pin 12 = V) 'chg
FAULT TIMER
tDLY 600
Restart Delay Time
OSCILLATOR
120
Frequency (Rj = 25.5 kO, Or = 390 pF) f OSC
Capacitor Cj Discharge Current (Pin 5 - 1.2 V) *dischg
MA
/u.A
Sync Input Current
125
High State (V in = 2.0 V) l|H
35
Low State (Vj n = 0.8 V) lL
12.5 32 50
Sync Input Resistance
V
Output Voltage
High State dsource = 200 mA VOH 8.3 8.9
>
1.4 1.8
Low State dsink = 200 mA) VOL
Low State Holding Current lH
- 225 /j.A
Hysteresis vH 5.0 10 15 %
TOTAL DEVICE
Power Supply Current ice
R-r = 25.5 kO, Cj = 390 pF, C|_ 500 pF
3-255
MC34129, MC33129
500K
FREQUENCY
/
-
"a
CC
I
-
=
I
25C
10 v^
I
"~
i 100
-=
"
i
Cj -
Mil/"
/ !
m
5.0 nF
'
OSCILLATOR FREQUENCY
-
'0
nF7
'
1
i
--
.1.0
\A
'"/
^
l\ ~r/~ 210 T100
1
F
pi
-+-
t-
i
!
s\
200K
I
^ 20
1
/A
i .
100K
z V-- M
? 50K 1
20K 2.0
/
cc
= 10 v_
c r== 5.1 nr\ 2 On h\ 1 On M b 00 p F\ 200 ph VIOOpt-l fA - 25T
1 1 \ I
\ I III I 1 10 1
_I
10 20 50 100 200 10 20 50 100
f
osc OSCILLATOR
, FREQUENCY (kHz) U,, OSCILLATOR FREQUENCY (kHz)
FIGURE 3 OSCILLATOR FREQUENCY CHANGE FIGURE 4 ERROR AMP OPEN-LOOP GAIN AND
versus TEMPERATURE PHASE versus FREQUENCY
i Mil
V CC -10 V
= vcc = 10 V |
8.0
RT = 25.5 k
= 1.25 V
"~CT = 390 pF Ri
TA = 25C
4.0
Phas
hs I
4.0
8.0
II
1.0 V
0.95 V
FIGURE 7 ERROR AMP OPEN-LOOP DC GAIN FIGURE 8 ERROR AMP OUTPUT SATURATION
versus LOAD RESISTANCE versus SINK CURRENT
90
1.0
Pins 8 to 9, 6 to 10
0.8
1 80 Pins 2, 5, 7 to Gnd
<
o o 0.6
t 70 5
o
o
S 0.4
o 60 vcc = 10 V
f~v = 1.25 V
o
> R| o 1.25 V re f
Ta = 25C
50
I
FIGURE 9 SOFT-START BUFFER OUTPUT SATURATION FIGURE 10 REFERENCE OUTPUT VOLTAGE versus
versus SINK CURRENT SUPPLY VOLTAGE
Ta = 25C
1
Vcc -10 V
Pins 8 to 9
Vref 2 .5 V, R|. = 2.5 k
Pins 2, 5, 7, 10, 12 to Unci
Ta = 25C
/
/ Vref 1.25 V, R
/
'/
FIGURE 11 1.25 V REFERENCE OUTPUT VOLTAGE FIGURE 12 2.5 V REFERENCE OUTPUT VOLTAGE
CHANGE versus SOURCE CURRENT CHANGE versus SOURCE CURRENT
1
v cc -= 10V.
o
1-4.0
o
S 8.0
S^2bX
= (H.A ~ 12