Documentos de Académico
Documentos de Profesional
Documentos de Cultura
so seek
i IC
iC
www.soiseek.cn IC
IC
atmel 8 bit
IC - Soiseek -
Soiseek
SoiseekICDatasheet
Soiseek
SoiseekICDatasheetPDF
SoiseekDatasheet
http://www.soiseek.cn/tellus
Soiseek.cn
FAN7384
Half-Bridge Gate-Drive IC
Features Description
Floating Channel for Bootstrap Operation to +600V The FAN7384 is a monolithic half-bridge gate-drive IC
Typically 250mA/500mA Sourcing/Sinking Current designed for high voltage, high speed driving MOSFETs
Driving Capability for Both Channels and IGBTs operating up to +600V.
Extended Allowable Negative VS Swing to -9.8V for Fairchilds high-voltage process and common-mode
Signal Propagation at VDD=VBS=15V noise canceling technique provide stable operation of
Matched Propagation Delay Below 50ns high-side drivers under high-dv/dt noise circumstances.
Output In-Phase with Input Signal An advanced level-shift circuit allows high-side gate
3.3V and 5V Input Logic Compatible driver operation up to VS = -9.8V (typical) for VBS =15V.
Built-in Shoot-Through Prevention Logic The UVLO circuits prevent malfunction when VDD and
Built-in Common Mode dv/dt Noise Canceling Circuit VBS are lower than the specified threshold voltage.
Built-in UVLO Functions for Both Channels Output drivers typically source/sink 250mA/500mA,
Built-in Cycle-by-Cycle Shutdown Function respectively, which is suitable for half-bridge and full-
Built-in Soft-Off Function bridge applications in motor drive systems.
Built-in Bi-Directional Fault Function
Built-in Short-Circuit Protection Function
14-SOP
Applications
Motor Inverter Driver
Normal Half-Bridge and Full-Bridge Driver 1
Switching Mode Power Supply
Ordering Information
Operating Temperature
Part Number Package Pb-Free Range Packing Method
FAN7384M(1) Tube
(1)
14-SOP Yes -40C ~ 125C
FAN7384MX Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
VDC
VCC
VDD VDD VDD
VB
HO HO HO
VS
U
UU HIN U VB
FAN7384
FAN7384
FAN7384
UL LIN
3-Phase VS V
VU HIN V
Motor UL LIN VB W
Controller WU HIN
W
WL LIN VS
FO FO FO
SD SD SD
LO LO LO
CSC CSC CSC
GND GND GND
VSL VSL VSL
FAN7384 Rev.02
VDC
VCC
VDD VB VDD VB
HO HO
PHA LIN VS
Forward
FAN7384
HIN VS
FAN7384
PHB LIN
FO HIN M
FAULT FO
SHUTDOWN SD
SD
Reverse
LO LO
DC Motor
VSL CSC VSL CSC
Controller
FAN7384 Rev.01
14 VB
UVLO
DRIVER
GENERATOR
13 HO
PULSE
NOISE R R
HS(ON/OFF)
Q
CANCELLER S
12 VS
LIN 1 SCHMITT
TRIGGER INPUT
DRIVER
LS(ON/OFF) GND/VSL DELAY
LEVEL SHIFTER 9 LO
SD 2 CONTROL LOGIC
8 VSL
FAULT
SOFT-OFF
LOGIC
ISOFT
CSC 6
ONE-SHOT ONE-SHOT
TRIGGER TRIGGER
0.5V 5 FO
VDD_UVLO
GND 7
FAN7384 Rev.03
LIN 1 14 VB
SD 2 13 HO
HIN 3 12 VS
FAN7384
VDD 4 11 NC
FO 5 10 NC
CSC 6 9 LO
GND 7 8 VSL
FAN7384 Rev.00
Pin Definitions
Pin # Name Description
1 LIN Logic Input for low-side gate driver
2 SD Shutdown control input with active low
3 HIN Logic Input for high-side gate driver
4 VDD Low-side power supply voltage
5 FO Bi-direction fault pin with open drain
6 CSC Short-circuit current detection input
7 GND Ground
8 VSL Low-side supply offset voltage
9 LO Low-side gate driver output
10 NC No connection
11 NC No connection
12 VS High-side floating supply offset voltage
13 HO High-side gate driver output
14 VB High-side floating supply voltage
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Note:
5. These parameters, although guaranteed, not 100% tested in production.
Note:
6. These parameters, although guaranteed, not 100% tested in production.
13.5 13.0
13.0 12.5
VDDUV+ [V]
12.5 12.0
VDDUV- [V]
12.0 11.5
11.5 11.0
11.0 10.5
10.5 10.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 5. VDD UVLO (+) vs. Temperature Figure 6. VDD UVLO (-) vs. Temperature
1.0 13.0
12.5
0.8
12.0
VDDHYS [V]
VBSUV+ [V]
0.6
11.5
0.4
11.0
0.2
10.5
0.0 10.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 7. VDD UVLO Hysteresis vs. Temperature Figure 8. VBS UVLO (+) vs. Temperature
12.5 1.0
12.0
0.8
11.5
VBSHYS [V]
VBSUV- [V]
0.6
11.0
0.4
10.5
0.2
10.0
9.5 0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 9. VBS UVLO (-) vs. Temperature Figure 10. VBS UVLO Hysteresis vs. Temperature
1000 100
800 80
IQDD [A]
IQBS [A]
600 60
400 40
200 20
0 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 11. VDD Quiescent Current vs. Temperature Figure 12. VBS Quiescent Current vs. Temperature
1600 1000
1400 800
1200
IPDD [A]
IPBS [A]
600
1000
400
800
200
600
400 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 13. VDD Operating Current vs. Temperature Figure 14. VBS Operating Current vs. Temperature
30 20
25
16
20
ICSCIN [A]
IIN+ [A]
12
15
8
10
5 4
0 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 15. Logic Input Current vs. Temperature Figure 16. ICSCIN vs. Temperature
20 120
100
15
80
ISOFT [mA]
tr [nsec]
10 60
40
5
20
0 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 17. ISOFT vs. Temperature Figure 18. Turn-on Rising Time vs. Temperature
100 300
250
80
200
ton [nsec]
tf [nsec]
60
150
40
100
20
50
0 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 19. Turn-off Falling Time vs. Temperature Figure 20. Turn-on Delay Time vs. Temperature
300 3.0
250 2.5
200 2.0
toff [nsec]
VIH [V]
150 1.5
100 1.0
50 0.5
0 0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 21. Turn-off Delay Time vs. Temperature Figure 22. Logic Input High Voltage vs. Temperature
3.0 1.0
2.5
0.8
2.0
VINHYS [V]
0.6
VIL [V]
1.5
0.4
1.0
0.2
0.5
0.0 0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 23. Logic Input Low Voltage vs. Temperature Figure 24. Logic Input Hysteresis vs. Temperature
3.0 3.0
2.5 2.5
2.0
SDBAR+ [V]
2.0
SDBAR- [V]
1.5 1.5
1.0 1.0
0.5 0.5
0.0 0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 25. SD Positive Threshold vs. Temperature Figure 26. SD Negative Threshold vs. Temperature
0.60 2.4
2.0
0.55
VCSCREF [V]
1.6
VFINH [V]
0.50 1.2
0.8
0.45
0.4
0.40 0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 27. VCSCREF vs. Temperature Figure 28. Fault Input High Voltage vs. Temperature
6.0 1.0
0.8
5.6
VFOH [V]
VFOL [V]
0.6
5.2 0.4
0.2
4.8
0.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 29. Fault Output High Voltage vs. Figure 30. Fault Output Low Voltage vs. Temperature
Temperature
-7 200
-8
160
-9
DT [nsec]
VS [V]
120
-10
80
-11
-12 40
-13 0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Temperature [C] Temperature [C]
Figure 31. Allowable Negative VS Voltage for Signal Figure 32. Dead Time vs. Temperature
Propagation to High Side vs. Temperature
The overall switching timing waveforms definition of FAN7384 as shown Figure 33.
LIN
SD
Low-Side Output Shutdown Low-Side Output
Disable Disable Skip Disable
VDD UVLO-
tUVFLT
0.5V
VCSC
tCSCFO tCSCFO
tFO tFO
FO
tCSCLO
LO
tCSCLO Soft-Off Soft-Off
Operating Operating
FAN7384 Rev.01
LIN
Figure 36. Waveforms for Shoot-Through Prevention
UVLO+
VDD
UVLO- 1.3 Over-Current Protection Function
tUVFLT The FAN7384 has over-current detection circuitry that
monitors the current-by-current sensing resistor con-
tFO
FO tCSCFO nected from the low-side switch source (VSL) to ground.
It is a built-in time-filler from the over-current event to
prevent malfunction from a noise source, such as lead-
90%
LO tCSCLO ing-edge pulse in inductive load application, as shown
Figure 37.
FAN7384 Rev.01 t1 t2 t3
The sensing current is calculated as follows:
Figure 34. Waveforms for Under-Voltage Lockout
VCSCREF
ICS = [ A] (1)
RCS
1.2 Shoot-Through Prevention Function
The FAN7384 has a shoot-through prevention circuitry where,
that monitors the high- and low-side inputs. It can be VCSCREF: Reference voltage of current sense
designed to prevent outputs of high- and low-side turning comparator
on at same time, as shown Figure 35 and 36.
RCS: Current sensing resistor
HIN/LIN
LIN
Low-Side Output
LIN/HIN Disable
0.5V
Shoot-Through Prevent VCSC
tCSCFO
tFO
HO/LO FO
After DT
tCSCLO
LO
Soft-Off
LO/HO
After DT Short-Circuit Operating
FAN7384 Rev.00
Detection Point FAN7384 Rev.03
Figure 35. Waveforms for Shoot-Through Prevention Figure 37. Waveforms for Short-Circuit Protection
0.05
MIN
0.002
1.55 0.10
)
0.061 0.004
0.019
0.47
(
#1 #14
MAX
0.337 0.008
+0.004
8.56 0.20
+0.10
0.016 -0.002
0.406 -0.05
0.343
8.70
#7 #8
0.050
1.27
6.00 0.30 1.80
0.236 0.012 MAX
0.071
+0.004
+0.10
0.008 -0.002
0.20 -0.05
MAX0.004
MAX0.10
3.95 0.20
0.156 0.008
5.72
8
0.225
0~
0.60 0.20
0.024 0.008 January 2001, Rev. A
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended
to be an exhaustive list of all such trademarks.
ACEx FACT Quiet Series OCX SILENT SWITCHER UniFET
ActiveArray GlobalOptoisolator OCXPro SMART START VCX
Bottomless GTO OPTOLOGIC SPM Wire
Build it Now HiSeC OPTOPLANAR Stealth
CoolFET I2C PACMAN SuperFET
CROSSVOLT i-Lo POP SuperSOT-3
DOME ImpliedDisconnect Power247 SuperSOT-6
EcoSPARK IntelliMAX PowerEdge SuperSOT-8
E2CMOS ISOPLANAR PowerSaver SyncFET
EnSigna LittleFET PowerTrench TCM
FACT MICROCOUPLER QFET TinyBoost
FAST MicroFET QS TinyBuck
FASTr MicroPak QT Optoelectronics TinyPWM
FPS MICROWIRE Quiet Series TinyPower
FRFET MSX RapidConfigure TinyLogic
MSXPro RapidConnect TINYOPTO
Across the board. Around the world. SerDes TruTranslation
The Power Franchise ScalarPump UHC
Programmable Active Droop
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE
OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE
RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILDS WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are 2. A critical component is any component of a life support device or
intended for surgical implant into the body, or (b) support or sustain life, system whose failure to perform can be reasonably expected to cause the
or (c) whose failure to perform when properly used in accordance with failure of the life support device or system, or to affect its safety or
instructions for use provided in the labeling, can be reasonably expected effectiveness.
to result in significant injury to the user.
Preliminary First Production This datasheet contains preliminary data, and supplementary data will
be published at a later date. Fairchild Semiconductor reserves the right
to make changes at any time without notice to improve design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to
improve design.
Obsolete Not In Production This datasheet contains specifications on a product that has been
discontinued by Fairchild semiconductor. The datasheet is printed for
reference information only.
Rev. I22