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EFFECTIVE ORDERING AND APPLICATION

OF SCAN PATTERNS FOR COST, QUALITY,


AND DIAGNOSIS DATA COLLECTION
JAY JAHANGIRI, MENTOR GRAPHICS
WU YANG, MENTOR GRAPHICS

C O

&

L Y

W H I T E P A P E R

SEPTEMBER 2016

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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection

INTRODUCTION
Production test is expensive. A common method of controlling cost is to utilize the most efficient sequence of
creating and applying test patterns that also detects the most defects in silicon. This presents a great
challenge in scan test: how to determine the ideal order in which to create multiple pattern types and the
most effective order to apply scan patterns on the tester. Finding the right balance among test cost, test
quality, and data collection for running diagnosis requires consideration of several competing factors.
Applying a very large number of patterns and pattern types, such as gate-exhaustive patterns, can improve
defect detection in silicon and overall test quality but it isnt a cost-effective strategy. Therefore, the pattern
creation process must be optimized to target the types of fault models that detect the most silicon defects
without over-testing, which drives up test cost with little benefit.
Equally important for reducing costly tester time is the efficient application of patterns on the tester in order
to identify defective parts quickly. This means applying patterns that have the highest probability of defect
detection early, even if those were not the first patterns that were created.
This paper summarizes the best practices for creating cost-effective pattern sets in the most efficient manner
and the best order to apply them on the tester for effective and efficient detection and diagnosis of defective
parts.

PATTERN CREATION FOR TEST COST CONTROL


A well-known principle of controlling test cost is to create a patterns sequence so that each pattern set can be
fault simulated against other fault types before additional top-up patterns are created to target the
remaining undetected faults. The alternative method of creating unique patterns for each fault type is not
practical and will significantly increase the overall pattern count. For example, a typical pattern generation
process may use the sequence illustrated in Figure 1.

Figure 1: A typical pattern creation process.

Because cross-fault simulation is an essential technique for test cost reduction, the key challenge to creating
patterns that target several different fault types is determining the order in which patterns should be created.
In the most general sense, the principle for deciding which pattern type to create next is to give priority to
creating patterns that have the most strict detection requirements. Typically, patterns that have strict
detection requirements have complex capture sequences, require large number of patterns, or are types of
patterns that must be applied to meet the devices test requirements, regardless of number of patterns.

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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection

For example, path delay patterns target very specific paths in the design and typically focus on a small
number (a few hundred) of paths that must be tested. Creating path delay patterns first and fault simulating
them for other fault models ensures that the required path delay patterns are part of the test suite while
reducing the pattern count for other fault types.

Give priority to creating patterns that have


the most strict detection requirements.

The list of all test patterns can be grouped into three main categories:
Chain test patterns
At-speed patterns, which include transition, path delay, timing-aware, delay cell-aware, delay bridge, and
delay functional UDFM patterns.
Static patterns, which include stuck-at, toggle, static cell-aware, static bridge, and static functional UDFM.
Functional UDFM patterns, which may be static or delay, are the designs functional patterns described using
User Defined Fault Modeling (UDFM) so that they can be applied easily through scan.
The ordered list of scan pattern types in Figure 2 can be used as a guideline for creating and fault simulating
each pattern type in order to achieve the smallest pattern set. At-speed patterns are shown in a darker shade.
Before creating new patterns, all previously-created patterns are simulated for the target fault type so that
only top-up patterns that target the remaining undetected faults need to be created.

Figure 2: Pattern creation and fault simulation sequence for the smallest pattern set.

Iddq patterns can be created in parallel to this flow since the number of patterns is generally very small and
the observation process does not contribute to detection of the fault models in Figure 2. Additional pattern
set optimization can be achieved by determining the effectiveness of each pattern type by examining field
return and manufacturing yield data. By focusing the pattern creation process on pattern types that provide
higher quality test, a more effective pattern set can be created. The goal is to create a set of patterns that is
efficient to apply and detects the most defects in silicon.
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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection

SAVING PATTERNS FOR FLEXIBILITY IN TESTER APPLICATION


The most efficient sequence for creating the smallest pattern set is typically different than the ideal order for
tester application. It is therefore important to save all pattern sets separately so that they can be applied on
the tester according to the appropriate test phase and desired defect detection.
Additionally, chain test patterns must be saved separately to provide flexibility on how theyre sequenced on
the tester. This also avoids duplicate application of chain test patterns created during different phases of
pattern creation.

DETERMINING THE ORDER OF PATTERNS DURING TESTER APPLICATION


During the tester application, the order in which different types of patterns are applied can vary depending
on whether it is a go/no go production test, which stops testing at the first failure, or datalogging of some or
all failures is needed for diagnosis.
If the goal is to quickly determine which devices failed without any failure datalog, its best to apply chain
patterns first, followed by the at-speed patterns at functional (at spec) speed and static patterns. The relatively
small chain test pattern set is applied first to make sure that the chains work before any other types of
patterns can function. The at-speed patterns running at functional speed can efficiently detect both speed
related defects and static defects, and hence are applied before the static patterns. Static defects are usually
manufacturing defects which are not very sensitive to the timing or design marginalities.
Within the at-speed pattern set, we recommend applying patterns in the following order:
delay bridge > delay cell-aware > timing-aware > transition > path delay > delay functional UDFM
The reason to put path delay and transition functional UDFM patterns towards the end is that they are usually
created to target the localized areas and may not have broader high test coverage.
Similarly, we recommend the order for applying the static patterns as following:
static bridge > static cell-aware > stuck-at > static functional UDFM > toggle

Pattern ordering at tester application aims to provide efficient


failure data for diagnosis to effectively isolate the defects.
The test flow in Figure 3 shows a typical pattern application ordering at the yield ramp-up stage where failing
data are logged for volume diagnosis. The same flow also applies to detecting excursions at the mature yield
stage.
The goal of the test pattern ordering shown in Figure 3 is to make sure that diagnosis can have staged failure
data for isolating different types of defects. Different types of defects require different diagnosis setting and
yield analysis methods. For example, if chain test fails, the following test patterns would fail and the diagnosis
for chain failures has the higher priority. Static patterns applied right after chain patterns serve two purposes.
Chain diagnosis needs both chain failure and scan failure data. Static pattern test can provide efficient chain
propagation failures used for chain diagnosis. If the chain test passes, the static pattern test can capture the
static failures that are used for running static diagnosis.

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Effective Ordering and Application of Scan Patterns for Cost, Quality, and Diagnosis Data Collection

Figure 3: Pattern application order


at the yield ramp up stage.

Applying the at-speed patterns at the low speed (at static) next has two benefits. One is to assure enough
coverage for testing the static defects since the static patterns are top-ups to the at-speed patterns and may
not offer enough test coverage. The other benefit is that if the at-speed patterns fail at low speed, they have
detected static defects (not timing-related ones) and so static diagnosis (not at-speed diagnosis) is needed.
If the patterns for static defects pass, it is the right time to datalog the failures from the at-speed patterns
applied at functional frequency. This makes sure that the failures are speed or path delay related and the
datalog is then used for at-speed diagnosis.

SUMMARY
Determining the ordering of test pattern types has different requirements during the pattern creation and the
tester application. Considering test coverage, pattern size, and efforts in pattern creation, the best practice is
to create the most restrictive patterns first, fault simulate the remaining faults and create top-up patterns if
needed. During tester application, go/no go test needs to have the most easily failed patterns tested first,
while testing to datalog for diagnosis needs to stage the tests so that diagnosis can use them to isolate root
causes among chain defect, static defect, and path-related defect.

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