Chapter 16

PSK Demodulator

16-1: Curriculum Objectives

1. To understand the operation theory of PSK demodulation.
2. To design the PSK demodulator by using MC 1496.
3. To understand the methods of measuring and adjusting the PSK demodulation circuit.

16-2: Curriculum Theory

In chapter 15, we have discussed the operation theory of PSK modulator. In this chapter, we will
discuss how to design a PSK demodulator. Figure 16-1 shows the operation theory diagram of
the PSK demodulation.

PSK
Carrier
Input

Data
Output

Figure 16-1 Signal waveforms of demodulated PSK signal.

Figure 16-2 Basic circuit of PSK demodulator.

Figure 16-2 is the basic diagram of PSK demodulator. This circuit is similar to the PSK
modulator. The only different is there is a low-pass filter at the output port. The objective is to
remove the unwanted signals. Assume that the phase and magnitude of (pc and PSK signals are
similar to each other, then the output is 5 V. IF the phase and magnitude of c and PSK
signals are opposite to each other, then all the diodes will be OFF and there is no current pass
through the low-pass filter, therefore, the output of the low-pass filter is 0 V.
In this section, we utilize the theory of mathematic to solve the FSK modulation as shown in
equation (16-1). Assume that XPSK(t) be the modulated PSK signal, then the expression is shown
as follow

Xpsk(t) = A cos [
(16-1)

N
M: 2

M
c t + 2m M ] ; m = 1,2,

N: Numbers of bit during transmission.

Where amplitude, A = 1 , carrier angular velocity ( c) is constant. When we input this

signal to signal squarer of balanced modulator, then the output signal of the balanced modulator
can be expressed as

Where k is the gain of the balanced modulator. The first term is the DC signal. Second term is the
2nd harmonic output (2w) of the carrier signal. The output signal of the balanced modulator will
pass through a filter to block the DC signal. Then by using PLL, the double-frequency signal is
converted to square wave. After that the frequency divider will reduce the frequency of this
square wave, which is similar to the frequency of the carrier signal ( c). Then this square
wave will be sent to the phase shifter to adjust the phase in order to control the analog switch.
Finally, the output signal from the analog switch will be sent to the rectifier and the comparator
for data signal recovery.
In this experiment, we utilize the squaring loop detector to implement the PSK demodulator.
Figure 16-3 is the block diagram of squaring loop detector of PSK demodulator. In this structure,

the signal squarer can be designed andimplemented by the balanced modulator of MC1496.
Figure 16-4 is the internal circuit diagram of the balanced modulator of MC1496 (you may refer
to chapter 15 for the circuit explanation).

Figure 16-3 Blok diagram of PSK demodulator.

Figure 14-6 Internal structure diagram of MC1496 balanced modulator.

Figure 16-5 is the circuit diagram of PSK detector. VR 1 is used to control the input
magnitude of PSK signal. The output signal at pin 12 of MC 1496 is expressed by the
equation (16-3). RA741, C 8 , R 22 , R 25 and R 27 to comprise a filter, which is used to
remove the first term of equation (16-3), i.e. the DC signal of the PSK signal. The
2 ' 1 harmonic of the carrier signal can be converted to the square wave output by the PLL
circuit, which is comprised by 74HC4046, R 2 , R 3 , R 5 , C 1 , C 2 and VR 2 . The frequency of
this signal will be divided by 2 by the frequency divider (74HC393). The 74HC6538,
R 12 ,R 18 , C 5 , C 7 and VR 3 comprise a phase shifter to adjust the phase of the square wave
and then control the analog switch (4053). Finally the signal will pass through the
rectifier (D 1 , R 26 and C 10 )and the comparator ( A741, R 28 and R 29 ) to recover the
original data signal.

PSK I/P

Figure 16-4 Circuit diagram of PSK detector.

16-3: Experiment Items

Experiment 1: PSK demodulator

1.

Refer to the circuit in figure 15-6 or refer to figure DCT15-1 on GOTT

DCT-6000-08 module to produce the modulated PSK signal as the signal
source of this experiment.

1.

At the input terminal of modulation signal (Data I/P), input 5 V amplitude

and 100 Hz TTL signal with 50 % duty cycle, i.e. data signal streams with
"10". At the input terminal of carrier signal (Carrier I/P), input 600 mV
amplitude and 20 kHz sine wave frequency.

2.

By using oscilloscope, observe on the output signal waveforms of the

modulated PSK signal (PSK O/P). Adjust VR 1 of PSK modulator so that
the waveform does not occur distortion. Slightly adjust VR 2 to avoid the
asymmetry of the waveform, so that we can obtain the optimum output
waveform modulated PSK signal.

2.

Adjust VR1 of PSK modulator of figure 16-5 or figure DCT16-1 on GOTTDCT6000-08 module, so that the output terminal of PLL (TP6) outputs a 40
kHz free-running frequency (f0).

1.

Connect the modulated PSK signal (PSK O/P) of figure DCT15-1 to the
input terminal (PSK I/P) of figure DCT 16-1. Adjust VR 2 so that the output
signal of signal squarer (TP4) is the double of the carrier frequency, which is
40 kHz.

6. By using oscilloscope, observe on the output signal waveforms of digital

signal input terminal (Data I/P). Slightly adjust VR 3 to obtain the exact
demodulated PSK signal. Then observe on the PSK input signal, the
output signals of the buffer (TP1), signal squarer (TP2), amplifier (TP3),
PLL input port (TP4), the charge and discharge test point (TP5), PLL
output port (TP6), frequency divider (TP7), phase shifter (TP8), analog
switch (TP9) and the data signal output port (Data). Finally, record the
measured results in table 16-1.

7. According to the input signal in table 16-1, repeat step 3 to step 6 and
record the measured results in table 16-1.

8. According to the input signal in table 16-1, change the frequency of the
data signal to 100 Hz, as well as the duty cycle to 50 %, 33 % and 66 %, i.e.
data signal streams with "10", "100" and "110", respectively. The others
remain the same, then repeat step 3 to step 6 and record the measured
results in table 16-2.

16.4: Measured Results

Table 16-1 Observe on the output signal of PSK demodulator by changing the
frequency of data signal.( Vc = 600 mV, fc = 20 kHz )

Data Signal
Frequencie
s
PSK I/P

TP1

TP2

TP3

TP4

TP5

500 Hz

1kHz

Table 16-1 Observe on the output signal of PSK demodulator by changing the frequency of data
signal. (Continue) (Vc= 600 mV , fc = 20 kHz)
Data Signal
Frequencies
TP6

TP7

500 kHz

1kHz

TP6

TP9

Data O/P

16-2 Observe on the output signal of PSK demodulator by changing the duty cycle of data
signal. ( Vc = 600 mV , fc = 20 kHz , fData = 100 Hz )
Data Signal
Frequencies
PSK I/P

TP1

33%

66%

TP2

TP3

TP4

TP5

Data Signal
Frequencies
TP6

TP7

33%

66%

TP8

TP9

Data O/P

Table 16-2 Observe on the output signal of PSK demodulator by changing the duty cycle of data
signal. (Continue) (Vc = 600 mV , fc = 20 kHz , fData = 100 kHz)

Table 16-2 Observe on the output signal of PSK demodulator by changing the duty cycle of
data signal. (Continue) (Vc= 600 mV , fc = 20 kHz , fData= 100 Hz )
Data Signal
Frequencie
s
PSK I/P

50%

33%

66%

TP1

TP2

TP3

TP4

TP5

Table 16-2 Observe on the output signal of PSK demodulator by changing the duty cycle of
data signal. (Continue) (Vc= 600 mV , fc = 20 kHz , fData = 100 Hz )
Data Signal
Frequencies
TP6

50%

33%

66%

TP7

TP8

TP9

Data O/P

16-5: Problems Discussion

1.

What is the basic circuit structure of PSK demodulator?

2.
Try to state out the signal squarer in figure 16-5, then explain what is the operation theory
of this circuit?
3.
Try to state out the phase locked loop and the frequency divider in figure 16-5, then
explain what are their functions in the PSK demodulator?
4.
Try to state out the PSK modulator in figure 16-5, then explain the operation theory of the
circuit and what are the functions in the PSK demodulator?