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library ieee;

use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity conexion is
port ( clk: in std_logic;
rx: in std_logic;
tx: out std_logic;
rst: in std_logic;---- Borra el dato( reset)
sw: in std_logic_vector(0 to 7);
leds_rx: out std_logic_vector (7 downto 0):="11111111");
end conexion;

architecture behavioral of conexion is


signal dato : std_logic_vector (7 downto 0):="11111111"; --- Almacena los
bits recibidos por rx del fpga
signal enable: std_logic:='0';
signal start: std_logic:='0';
signal stop: std_logic:='0';
signal contador: integer range 0 to 300:=0;
signal mit_contador: integer range 0 to 300;
signal conta_med: integer range 0 to 200:=0;
signal baud_rate: integer := 9600;
-----------------------------------------------------------signal contador_tx: integer range 0 to 300:=0;
signal mit_contador_tx: integer range 0 to 300:=0;
signal contador_tx: integer range 0 to 300:=0;
signal conta_med_tx: integer range 0 to 200:=0;
signal dato_tx: std_logic_vector( 0 to 7):="00000000";
signal enable_tx: std_logic:='0';
signal contador1: integer range 0 to 10000:=0;

signal contador2: integer range 0 to 10000:=0;


-------------------------------------------------------------begin
rx0: process(clk)
begin
case baud_rate is
when 4800 =>mit_contador<=521;
when 9600 =>mit_contador<=261;
when 19200 =>mit_contador<=130;
when 38400 =>mit_contador<=66;
when 57600 =>mit_contador<=44;
when 115200 =>mit_contador<=22;
when others =>mit_contador<=0;
end case;
end process rx0;
-----------------------------------------------------------------rx1: process(clk,rst,rx,conta_med)
begin
if rst='0' then
enable<='0';
elsif rising_edge(clk) and rx='0' then
enable<='1';
end if;
if conta_med=190 then
enable<='0';
end if;
end process rx1;
---------------------------------------------------------------------rx2: process(clk,rst,enable)
begin
if rst='0' then
contador<=0;

conta_med<=0;
elsif rising_edge(clk) and enable='1' then
contador<=contador+1;
if contador=mit_contador then
conta_med<=conta_med+1;
contador<=0;
end if;
end if;
if conta_med=190 then
conta_med<=0;
end if;
end process rx2;
---------------------------------------------------------------------------rx3: process(clk,rst)
begin
if rst='0' then
start<='1';
stop<='0';
dato<="11111111";
elsif rising_edge(clk) then
if conta_med=10 then
start<=rx;
elsif conta_med=30 then
dato(0)<=not rx;
elsif conta_med=50 then
dato(1)<=not rx;
elsif conta_med=70 then
dato(2)<=not rx;
elsif conta_med=90 then
dato(3)<=not rx;
elsif conta_med=110 then
dato(4)<=not rx;

elsif conta_med=130 then


dato(5)<=not rx;
elsif conta_med=150 then
dato(6)<=not rx;
elsif conta_med=170 then
dato(7)<=not rx;
elsif conta_med=190 then
stop<=rx;
end if;
end if;
end process rx3;
----------------------------------------------------rx4: process(clk,rst)
begin
if rst='0' then
leds_rx<="11111111";
elsif rising_edge(clk) then
-- if stop='1' then
leds_rx<=dato;
---end if;
end if;
end process rx4;
---------------------------------------------------- Transmision serial TX----------------tx0: process(clk,rst)
begin
if rst='0' then
dato_tx<="00000000";
elsif rising_edge (clk) then
dato_tx<= not sw;
end if;
end process tx0;

-----------------------------------------------tx1: process(clk,rst)
begin
if rst='0' then
enable_tx<='0' then
elsif rising_edge(clk) and contador2=10000 then
enable_tx<='1';
end if;
if conta_med_tx=200 then
enable_tx<='0';
end if;
end process tx1;
------------------------------------------------tx2: process (clk,rst)
begin
if rst='0' then
conta_med_tx<=0;
elsif rising edge(clk) and enable_tx='1' then
contador_tx<=contador_tx+1;
if contador_tx=mit_contador then
conta_med_tx<=conta_med_tx+1;
contador_tx<=0;
end if;
end if;
if conta_med_tx=200 then
conta_med_tx<=0;
end if;
end process tx2;
---------------------------------------------------tx3: process(clk,rst)
begin
if rst='0' then

contador1<=0;
contador2<=0;
elsif rising_edge(clk) and enable_tx='0' then
if contador1=10000 then
contador2<=contador2+1;
contador1<=0;
if contador2=10000 then
contador2<=0;
end if;
else
contador1<=contador1+1;
end if;
end if;
end process tx3;
---------------------------------------tx4: process (clk,rst)
begin
if rst='0' then
tx<='1';
elsif rising_edge(clk) then
if enable_tx='1' then
if conta_med_tx<=20 then
tx<='0'; ---- START
elsif conta_med_tx<=40 then
tx<=dato_tx(0);
elsif conta_med_tx<=60 then
tx<=dato_tx(1);
elsif conta_med_tx<=80 then
tx<=dato_tx(2);
elsif conta_med_tx<=100 then
tx<=dato_tx(3);
elsif conta_med_tx<=120 then

tx<=dato_tx(4);
elsif conta_med_tx<=140 then
tx<=dato_tx(5);
elsif conta_med_tx<=160then
tx<=dato_tx(6);
elsif conta_med_tx<=180 then
tx<=dato_tx(7);
elsif conta_med_tx<=200 then
tx<='1' ; --- STOP
end if;
else
tx<='1';
end if;
end if;
end process tx4;
-------------------------------end behavioral;
------------------------------