Al-Ameen Faris

Q1/
Instruction Execution Cycle :

a sequence of individual operations

That divide by The execution of a single machine instruction!

Q2/
What happend before the instruction been executing ?
1- a program is loaded into memory
2-The instruction pointer contains the address of the next instruction
3-The instruction queue holds a group of instructions about to be
executed
Q3/
What is Instruction Execution Cycle Steps ?
or
Executing a machine instruction Steps ?
Ans/
Fetch: decode, and execute.
!
Q4/

program counter. Or program counter. Or (IP) : Contains

address of the next instruction

the

Q5/ Instructions Address mode

Two types of information
1 - op-code :
2- Address field. :
Q6/
Instructions(Instructions Address mode) can be classified based on the
number of operands as:
1- Three - address instruction : Add R1,R2,R3
2- Two - address instruction : ADD R1,R2
3- One - address instruction: ADD R1
4 - One and half - address instruction:ADD B, R1
5- Zero - address instruction : instructions that use stack operation.

Q7/ What is the Addressing modes ?

1- I :ddmm em demm
eom eim om

ddmm emami u a dam

o eom eom u avm et

, oae v e eo eamat
2- Indirect

mode:

The operand of instruction ( a register or a memory location) holds

the (effective) address of the operand .

 Direct mode: the operand of instruction represent address of the

memory location that holds the operand.

3- index mode:
the

address

of

the

operand

is

obtained

by

adding

constant to the content of a register, called the index register.

4- Relative mode:
is the same as indexed addressing except that the program counter
(PC) replaces the index register.
5- Autoincrement mode:
uses a register to hold the address of the operand.

Q/ How the cash memory work ?

the cache memory acts as a high-speed buffer in between the
processor and main memory, shuffling data into the processor as it
needs it, or requests it. As a result, the processor takes advantage of
the high-speed cache memory and therefore works faster, which, in
turn, makes the computer that the processor drives, operate faster

Q/
Cache ::

is a special form of high-speed memory that stores

instructions and data the processor has recently used. Thanks to its
proximity to the main computing engine inside the processor

Q/why they made the cash memory

What the reson that made people cash memory ?
How the data was in old time
Because

of

the

way

most

tend to spend a lot of their

time

software

works,

processors

either performing the same

operations over and over or performing several different operations

on the same set of data

What is the idea of cash memory ?

The idea was (and is) that once the processor finishes what it is
working on, it can "fetch" what it needs next from this nearby area
instead of getting it from regular memory, which is further away and
takes longer to get to.

What use cash further the processor ?

Many software programs, such as Web browsers, also use a cache.
shile a processors
Q/
e eor both components, a cache speees up access to recently use
.information
seb browsers
The thinsini is that you probably will want to use the files youee
accessee recently aiain. If theyre storee either in aga, or on eiss, the
browser will be able to iet to them much more quicsly than if it hae to
.the Internet aiain io out to

eor eeample, when you hit the uacs button on your browser, the seb
paie loaes almost instantly because the files the browser neees are
nearby

If their is no cash or empty cash in browsers?????

it going back to the previous page would take just as long as when you
called it up in the first place.

Cash in processer !///

if the information the processor needs is close by in the cache, the
processor operates quickly without waiting, but if the information
isnt close by, the processor has it to request it from main
The main memory isnt as slow as the Internet, of course, but it is a lot
slower than getting it from the cache

What is The two most common types of cash ?

1- L1, or Level 1,
2- L2, or Level 2
3- Level 3 caches, but they are not very common.

Where the L1 and L2 build ?

into the processor chip or processor card itself

L1 AND L2 IS :
E o amuma et

om a

ami

em

ovok et dmde m om a e m emm

ommimommoeam dm eom i e maae . Tom ewe amumaa mtm ee oew aeam eom

om a ioma

aam ae emm ee eom d o ovddm - vo o og am e eo et eom

i e maae

L2

2MB (

L2 IIS

IIIs 512KB .

What is the interrupt ?

Interrupt: is the method of processing the microprocessor by peripheral
device. An interrupt is used to cause a temporary halt in the execution of
program
Q/ WHAT IS THE TYPES OF INTERRUPT ?
1- Maskable : an interrupt that the microprocessor can ignore depending

upon some predetermined condition defined by status register.

2- Non-maskable :requires an immediate response by microprocessor, it
usually used for serious circumstances like power failure.

Q/Interrupt can divide to five groups or what is the group that the
interrupt can divide to ?
1.hardware interrupt
2.Non-maskable interrupt
3.Software interrupt
4.Internal interrupt
5.Reset

Q/what is 80x86 do when interrupt occurs ?

When an interrupt occurs, regardless of source, the 80x86 does the
following:
1.The CPU pushes the flags register onto the stack.
2.The CPU pushes a far return address (segment: offset) onto the stack,
segment value first.
3.The CPU determines the cause of the interrupt (i.e., the interrupt
number) and fetches the four byte interrupt vector from address 0:
vector*4.

4.The CPU transfers control to the routine specified by the interrupt

vector table entry.

!
Hardware interrupt : The primary sources of interrup
The 8259A programmable interrupt: controller chip accepts interrupts
from up to eight different devices. If any one of the devices requests
service,

There are instructions in 8086 which cause an interrupt. They are

3, Break Point Interrupt instruction.

Q/WHAT INTO results ?

1-. Flag register values are pushed on to the Stack.
2.CS value of the return address and IP value of the return address and IP
value of the return address are pushed on to the stack.
3.IP is loaded from the contents of word location 4x4 = 00010H.
4.CS is loaded from the contents of next word location.

5.Interrupt flag and Trap flag are reset to 0.