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EXPERIMENT NO.

7
Precision Circuits
Date: _________________
ID No. ________________

PS No.:__________

Batch No.________

Name: __________________________________________

Aim: To study the various precision circuits using op-amps .


Equipment & Components: Analog Electronics Trainer kit, DSO & Function Generator (Analog Discovery
kit), Digital Multi Meter, 741 ICs, Diodes, Zener diodes, Resistors, Capacitors and Connecting wires.

Theory:
Introduction:
The use of op-amps can improve the performance of a wide variety of signal processing circuits. In rectifier
circuits, the cut-in voltage drop that occurs with an ordinary semiconductor diode can be eliminated to give
precision rectification. Waveforms can be limited and clamped at precise levels when op-amps are employed in
clipping and clamping circuits. The error with peak detectors can also be minimized by the use of op-amps.

Precision Half-wave and Full-wave Rectifiers


Figure 7.1 shows the circuit of a fast precision rectifier which uses an inverting amplifier. When the input is
negative, the op-amp output is positive.

D 1 is reverse biased and

D2 is forward biased. v 0

v i (

R 2 / R1 .

Figure 7.1 Fast precision rectifier and its transfer characteristics.


During the positive half-cycle of the input, the op-amp output goes negative, causing
Without

D1

D 2 to be reverse biased.

in the circuit, the op-amp output would be saturated to the negative saturation voltage,

V SAT . However, the negative voltage at the op-amp output forward biases

D1 . This tends to pull the op-

amp inverting input terminal in a negative direction which may cause the output to go positive. So, the output
Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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settles at a voltage which keeps the input voltage close to ground level. In this case, that voltage is the forward
voltage drop below the ground, say

0.7 V.

Precision full-wave rectifier


The left-side of the circuit in Figure 7.2 is a precision half-wave rectifier as shown in Figure 7.1. but with the
diodes reversed. The right-side is an inverting summing amplifier. The input voltage is applied to terminal A of
the summing amplifier and to the input of the precision rectifier. Note that
voltage applied to the terminal B of the summing amplifier is
During the positive half-cycle of the input, the voltage at A is

from the summing circuit with

R5=R 4

During the negative half-cycle of the input,

vo =

is

R2

=2

R1

and so the rectified

2 v i .
vi

v o =( v i2 vi )

and that at B is

2 v i . The output

R6
R
=v i 6 .
R4
R4

v A =v i and v B=0 V . Consequently, the output is

R6
R6
v
+
o
=
v
i
R4 (
R4 i

It is seen that the output is full-wave rectified version of the input. With

R6=R 4 , voltage gain of the circuit is

1. A precision full-wave rectifier is also known as the absolute value circuit. The transfer characteristic of the
rectifier is shown in figure 7.2(b).

(a)

(b)

Figure 7.2 (a) Precision full-wave rectifier circuit and (b) its transfer characteristics

Positive and Negative Clippers


A positive clipper , a circuit that removes the positive parts of the input signal, can be formed by an op-amp with a
rectifier diode as shown in the Fig. 7.3(a). In this circuit, the op-amp is basically used as a voltage follower with a
diode in the feedback path. The clipping level is determined by the reference voltage V ref.

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Figure 7.3 (a) Positive clipper circuit and (b) input and output waveforms and transfer characteristics (V ref=1 V)
During the positive half cycle of the input, the diode conducts unly until V in=Vref. This happens because when
Vin<Vref ,the voltage Vref at the inverting input is higher than that at the non-inverting input. Hence the output
voltage V0 of the op-amp becomes sufficiently negative to drive D into conduction. When D conducts, the op-amp
operates as a voltage follower. The output V 0 follows the input Vin until V0=Vref. However, when Vin is slightly
higher than Vref, the output V0 of the op-amp becomes sufficiently positive to drive D into cut off. This opens the
feedback loop and the op-amp operates in open loop and the output voltage V o=Vref. When Vin drops below Vref,
the output of the op-amp V0 again becomes sufficiently negative to drive D into conduction. This closes the
feedback loop and hence the output follows the input. The input and output waveforms and the transfer
characteristics are shown in Fig. 7.3(b). The positive clipper of Fig. 7.3(a) is converted to a negative clipper by
simply reversing the diode D and changing the polarity of Vref.

Positive and Negative Clamping Circuits


In clamper circuits, a predetermined dc level is added to the input voltage. In other words, the output is clamped
to a defined dc level. If the clamped dc level is positive, the clamper is called a positive clamper. On the other
hand, if the clamped dc level is negative, it is called a negative clamper. The other equivalent terms for clamper
are dc inserter or dc restorer.
A positive clamper circuit is shown in Figure 7.4(a). Here the input waveform is clamped at +

V ref

and hence

the circuit is called a positive clamper.

Figure 7.4 (a) Positive clamper circuit and (b) input and output waveforms with

V ref

for positive clamping.

The output voltage of the clamper is a net result of ac and dc input voltages applied to the inverting and noninverting input terminals respectively. Therefore, to understand the circuit operation, each input must be
Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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V ref

considered separately. First consider the input voltage


positive,

vo

at the non-inverting input. Since this voltage is

D 1 . This closes the feedback loop and the op-amp

is positive, which forward biases diode

operates as a voltage follower. This is possible because C is an open circuit for dc voltage. Therefore

V ref . As far as voltage the

v at the inverting input is concerned, during its negative half-cycle, D 1


V p . However, during the positive half-cycle of

conducts, charging C to the negative peak value of the

D1

diode

V ref
(100

Vp

is reverse biased and hence the voltage

half-cycle is retained. Since this voltage

. For precision clamping C

Rd

v ,

across the capacitor acquired during the negative

V p is in series with the positive peak voltage V P , the output peak

v o = 2 V p . Thus the net output is

voltage

vo =

V ref

plus 2

V p , so the negative peak of 2 V p

Rd

is the forward resistance of the diode

T/2, where

typically) and T is the time period of

is at

D1

v . The input and output waveforms with positive clamping

are shown in Figure 7.4(b). Resistor R is used to protect the op-amp against excessive discharge currents from
capacitor C especially when the dc supply voltages are switched off. Negative clamping at a negative voltage is
accomplished by reversing diode

D1 and using the negative reference voltage V ref

Peak Detector Circuits:


Figure 7.5(a) shows a peak detector that measures the positive peak values of the input. During the positive halfcycle of

Vp

v , the output of the op-amp drives

of the input voltage

V . Thus, when

D1

ON, charging capacitor C to the positive peak value

D 1 is forward biased, the op-amp acts as a voltage follower.

On the other hand, during the negative half-cycle of the

v '

across C is retained. The only discharge path for C is through

diode

forward resistance of the diode,

is reverse biased, and the voltage

R L since the input bias current is negligible. For

proper operation of the circuit, the charging current time constant (C

R L must satisfy the conditions C Rd


constant (C

D1

T
10

Rd ) and the discharging current time

and C

RL

10T, where

Rd

R L is the load resistor and T is the time period of the input waveform

The waveform for a square wave input is shown in Figure 7.5(b). For very small
connected between C and

R L . The diode

D2

R L,

v .

a voltage follower is

conducts during the negative half-cycle of

preventing the op-amp from going into saturation.


Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

is the

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thus

Figure 7.5 (a) Peak detector circuit and (b) input and output waveforms for peak detector circuit.

Observations:
Use A 741 Op-amp with

15 V dc power supply.

Run1: Fast precision half-wave rectifier


R2
A
=

v
1.1 Design: Design a fast precision half-wave rectifier as shown in Figure 7.1 for a gain (
R1
3.9. Choose the appropriate resistor values of

R1

R2 . Use 1N4007 diodes ( D 1D2 .

R1

and

R2 . Consider

R1 = ______1k_____,

R L = 10 k and

3.9 K

R2=

of

R3

and

R3

v i (p p )

= 400

=_____0.7959K______.
1.2 Assemble the circuit (Fig. 7.1) using the designed values. Feed sinusoidal input of amplitude

mV and frequency 100 Hz. Observe the input and output voltages on a DSO. Plot the Input and Output voltage

V o (peak )
A
=
v
waveforms on the same reference level. Practical gain (
V i (peak)

=____4.134_____.

Input and Output voltage waveforms for precision half-wave rectifier:

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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Increase the frequency of the input signal (

vi

till distortion appears in the output (

v o . Record this

f
(
i)=
frequency.
_________.

1.3 Repeat the previous step (1.2) by reversing the polarity of diodes and plot the input and output waveforms.

V o (peak )
A
=
v
Practical gain (
V i (peak )

=_________.

Input and Output voltage waveforms for precision half-wave rectifier (diode polarity reversed):

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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Run2: Precision full-wave rectifier

R6

2.1 Design a precision full-wave rectifier as shown in Figure 7.2 for a gain ( A v = R 4
appropriate resistor values of

R2

for

A1

___________,

and

R3

R4
=

and

R6 . Consider

R4 R5 R 6

for

R1 =1 k,

R5

R4

of +3.9. Choose the


and

R3

A 2 . Use 1N4007 diodes ( D 1D2 .

R1
R4 =

,
R6 =

2.2 Assemble the circuit (Fig. 7.2) using designed values. Feed sinusoidal input of amplitude

v i (p p )

= 2 V and

frequency 100 Hz. Observe the input and output voltages on a DSO. Plot the Input and Output voltage waveforms

V o (peak )
A
=
v
on the same reference level. Practical gain (
V i (peak )

=_________.

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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Input and Output voltage waveforms for precision full-wave rectifier:

Increase the frequency of the input (

vi

signal till distortion appears in the output (

v o . Record this

frequency.

f
( i)= _________.

2.3 Repeat the previous step (2.2) by reversing the polarity of diodes and plot the input and output waveforms.

V o (peak )
A
=
v
Practical gain (
V i (peak )

=_________.

Input and Output voltage waveforms for precision full-wave rectifier (diode polarity reversed):

Run3: Precision clipping circuit


Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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3.1 Assemble the precision clipping circuit as shown in Figure 7.6 with

R1

R2 = 1.8 k, and

R3 . =

470 . Use 1N750 (4.7 V) zener diodes.

Figure 7.6 Precision clipping circuit


3.2 Feed

v i (p p )

= 14 V, 1 kHz sinusoidal input. Observe the input and output voltages on a DSO. Plot the

input and output voltages on the same reference level. Measure the clipping levels of the output voltage. Clipping
level= ________.
Input and Output voltage waveforms of the clipper:

3.3 Change

R1 to 470 and repeat the observations of step 3.2.

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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Input and Output voltage waveforms of the clipper (when R=470 ):

3.4 Explain the changes in the output in steps 3.2 and 3.3.

Run4: Positive clamping circuit


4.1 Assemble a positive clamping circuit (Fig. 7.4) with clamping at zero level. Note that
V ref

by a resistor

4.2 Feed

v i (p p )

R1 . Consider R =

V ref

= 0 V. Replace

R1 = 22 k and C = 0.5 F. Use 1N4007 Diode.

= 10 V, 10 kHz sinusoidal input. Observe the input and output voltages on a DSO. Plot the

input and output voltages on the same reference level. Measure the peak
voltage of the output.

v o ( peak )

=__________,

v o ( p p)

, v o ( peak )

and peak-to-peak,

v o ( p p)

=_____________.

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Input and Output voltage waveforms of positive clamping circuit:

4.3 Repeat step 4.2 by reversing the polarity of diode and the capacitor.

v o ( peak )

=__________,

v o ( p p)

=_____________.

Input and Output voltage waveforms of positive clamper (diode and capacitor polarity reversed)

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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Run5: Peak detector


5.1 Assemble the peak detector circuit as shown in Figure 7.5. Assume diode forward resistance
load

R L =10 k and sinusoidal signal frequency = 1 kHz. Choose R =

Rs

Rd =10 ,

=1 k and C = 1 F. Use

1N4007 diodes.
5.2 Feed

v i (p p )

= 10 V, 1 kHz sinusoidal input. Observe the input and output voltages on a DSO. Plot the

input and output voltages on the same reference level.


Input and Output voltage waveforms of peak detector:

Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus

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5.3 Repeat step 5.2 by reversing the polarity of diodes and the capacitor.
Input and Output voltage waveforms of peak detector (diode and capacitor polarity reversed)

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Conclusion:

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