Vikant

PCMCIA 2.1 Compliant Low Power SRAM Memory Cards

512 K through 4 Megabyte Cards with Lithium Battery

Description
These Vikant products offer a high performance nonvolatile storage solution for code and data
storage, disk caching, and various mobile embedded solutions. Packaged in a PCMCIA Type I
housing and PCMCIA 2.1 compliant, the cards offer densities from 512 Kilobytes to 4
Megabytes. Operating at 5V, this proven SRAM technology is backed up by a lithium battery
that assures long life data retention, even when system power is removed.
These cards feature a fully buffered interface to ensure excellent signal integrity. Control signals
are also isolated from the Host socket and forced to an inactive state when the card is removed
from the socket. In addition, data may be handled in either 8 bit or 16 bit bus modes.

Features

PCMCIA 2.1 compliant

Single 5.0 Volt Power Supply
Standard SRAM Read/Write Timing
Fast Access Time: 150nS
x8/x16 data access
TTL compatible inputs and outputs
Buffered I/O Address and Data lines
Hardware Write Protect Switch
Optional Features

256 Byte EEPROM attribute memory containing CIS

CARD PIN DESCRIPTION

Signal

Name

Function

A[25:0]
D[15:0]
/OE
/WE
/CE1
/CE2
/REG
WP
/BVD1,/BVD2
/CD1,/CD2
VCC
GND (VSS)

Address Bus
Data Bus
Output Enable
Write Enable
Card Enable Low Byte
Card Enable High Byte
Register Select
Write Protect
Battery Voltage Detects
Card Detects
Power Supply
Ground

Address Inputs, A25-A0

Data Input/Outputs
Active Low for Read
Active Low for Write
Active Low for Read/ Write Even Byte
Active Low for Read/ Write Odd Byte
Active Low enables Attribute Memory
Output Signal indicates the WP switch state
Indicate to the Battery Status
Tied to GND
Power Supply Voltage, 5.0V 5%
System Ground

CARD PIN ASSIGNMENTS

Pin #

Signal

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

GND
DQ3
DQ4
DQ5
DQ6
DQ7
CE1#
A10
OE#
A11
A9
A8
A13
A14
WE#
RDY/BSY#
VCC
Vpp1
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
WP
GND

I/O

I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
I
O

I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
O

Function
Ground
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Card Enable1
Address Bit 10
Output Enable
Address Bit 11
Address Bit 9
Address Bit 8
Address Bit 13
Address Bit 14
Write Enable
Ready/Busy
Power Supply
Prog. Voltage
Address Bit 16
Address Bit 15
Address Bit 12
Address Bit 7
Address Bit 6
Address Bit 5
Address Bit 4
Address Bit 3
Address Bit 2
Address Bit 1
Address Bit 0
Data Bit 0
Data Bit 1
Data Bit 2
Write Protect
Ground

State

PL
PL
PL
PL
PL
PH
PH

PH
NC
NC

PL
PL
PL
PL

Pin #

Signal

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68

GND
CD1#
DQ11
DQ12
DQ13
DQ14
DQ15
CE2#
VS1
NC
NC
A17
A18
A19
A20
A21
VCC
Vpp2
A22
A23
A24
A25
VS2
RESET
WAIT
NC
REG#
BVD2
BVD1
DQ8
DQ9
DQ10
CD2#
GND

I/O

O
I/O
I/O
I/O
I/O
I/O
I

I
I
I
I
I

I
I
I
I
I
O
I
O
O
I/O
I/O
I/O
O

Function
Ground
Card Detect 1
Data Bit 11
Data Bit 12
Data Bit 13
Data Bit 14
Data Bit 15
Card Enable 2
Voltage Sense 1

Address Bit 17
Address Bit 18 (Note 1)
Address Bit 19 (Note 2)
Address Bit 20 (Note 3)
Address Bit 21 (Note 4)
Power Supply
Prog. Voltage
Address Bit 22 (Note 5)
Address Bit 23
Address Bit 24
Address Bit 25
Voltage Sense 2
Hardware RESET
Wait State Control
Attribute Memory Select
Battery Voltage Detect 2
Battery Voltage Detect 1
Data Bit 8
Data Bit 9
Data Bit 10
Card Detect 2
Ground

Notes:
1. Not Connected for cards of 256 Kilobyte capacity or lower.
2. Not Connected for cards of 512 Kilobyte capacity or lower.
3. Not Connected for cards of 1 Megabyte capacity or lower.
4. Not Connected for cards of 2 Megabyte capacity or lower.
5. Not Connected for cards of 4 Megabyte capacity or lower.
6. No wait states generated by these cards. This signal must be pulled high by the Host
socket
Legend:
I
=
Input to Card
PH
=
Pulled High
O
=
Output from Card
PL
=
Pulled Low
I/O
=
Bi-directional Signal
NC
=
Not Connected

State

PL
PL
PL
PL
PL
PH
NC
NC
NC

PL
PL
PL
NC
PL
NC
NC
NC
NC
NC
NC
PH
PH
PH
PL
PL
PL

CARD SIGNAL DESCRIPTION

Symbol
A0 - A25

INPUT

Type

DQ0 - DQ15

INPUT/OUTPUT

CE1#, CE2#

INPUT

OE#

INPUT

Name and Function

ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of
memory on the card. Signal A0 is not used in word access mode. A25 is the most
significant bit. (Address pins used are based on card density, see pinout for highest used
address pin)
DATA INPUT/OUTPUT: DQ0 - DQ15 constitute the bi-directional data bus. DQ0 DQ7 constitute the lower (even) byte and DQ8 - DQ15 the upper (odd) byte. DQ15 is
the MSBit.
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte
accesses. Multiplexing A0, CE1# and CE2# allows 8-bit hosts to access all data on DQ0
- DQ7.
OUTPUT ENABLE: Active low signal enabling read data from the memory card.

WE#

INPUT

W RITE ENABLE: Active low signal gating write data to the memory card.

RDY/BSY#
CD1#, C D2#

OUTPUT
OUTPUT

WP

OUTPUT

VPP1, VPP2
VCC
GND
REG#

N.C.

RST
WAIT#

INPUT
OUTPUT

BVD1, BVD2

OUTPUT

VS1, VS2

OUTPUT

READY/BUSY OUTPUT: Not used for SRAM cards without Attribute Memory.
CARD DETECT 1 and 2: Provide card insertion detection. These signals are
connected to ground internally on the memory card. The host socket interface circuitry
shall supply 10K-ohm or larger pull-up resistors on these signal pins.
WRITE PROTECT: Follows hardware Write Protect Switch. When Switch is placed
in on position, signal is pulled high (10K ohm). When switch is off signal is pulled low.
PROGRAM/ERASE POWER SUPPLY: Not used for SRAM cards.
CARD POWER SUPPLY: 5.0V for all internal circuitry.
GROUND: for all internal circuitry.
ATTRIBUTE MEMORY SELECT: only used with cards built with optional attribute
memory.
RESET: Not used for SRAM cards
WAIT: This signal is pulled high internally for compatibility. No wait states are
generated.
BATTERY VOLTAGE DETECT: Provides status of Battery voltage.
BVD2 = BVD1 = Voh (battery voltage is guaranteed to retain data)
BVD2 = Vol, BVD1 = Voh (data is valid, battery recharge required)
BVD2 = BVD1 = Vol (data may no longer be valid, battery requires extended recharge)
VOLTAGE SENSE: Notifies the host socket of the card's VCC requirements. VS1 is
grounded and VS2 is open to indicate a 5V 16-bit card, with a 5V key, has been
inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CA RD: pin may be driven or left floating

INPUT

RFU
NC

CARD FUNCTIONAL TRUTH TABLE

Read Function
Function mode
Standby Mode
Byte Access (8-bits)
Word Access (16-bits)
Odd-Byte Access
Write Function
Standby mode
Byte Access (8-bits)
Word Access (16-bits)

CE2#
H
H
H
L
L

CE1#
H
L
L
L
H

A0
X
L
H
X
X

OE#
X
L
L
L
L

WE#
X
H
H
H
H

H
H
H
L

H
L
L
L

X
L
H
X

X
H
H
H

X
L
L
L

Common Memory
REG# D15-D8
X
High-Z
H
High-Z
H
High-Z
H
Odd-Byte
H
Odd-Byte

X
H
H
H

X
X
X
Odd-Byte

D7-D0
High-Z
Even-Byte
Odd-Byte
Even-Byte
High-Z

X
Even-Byte
Odd-Byte
Even-Byte

Attribute Memory
REG# D15-D8
X
High-Z
L
High-Z
L
High-Z
L
Not Valid
L
Not Valid

X
L
L
L

X
X
X
X

D7-D0
High-Z
Even-Byte
Not Valid
Even-Byte
High-Z

X
Even-Byte
X
Even-Byte

CARD DC CHARACTERISTICS
Parameter
Symbol
VIH

Parameter Description
Input High Voltage

Test Conditions

Minimum
0.7VCC

Maximum
VCC + 0.3

Unit
V

0.3VCC

VIL

Input Low voltage

VOH

Output High Voltage

IOH = -4.0mA, VCC=4.5V

2.4

VOL

Output Low Voltage

IOL = 4.0mA, VCC=4.5V

0.45

ILI

Input Leakage Current (Note 1)

VIN = 0V to VCC

-10

10

ILIP

Input Leakage Current (Note 2)

VIN = VIL or VIH

-150

+150

ILO

Output Leakage Current

VIN = 0V to VCC

-10

10

ICCA

VCC Active Current

X16 mode, RMS value

190

mA

ISB

VCC Standby Current

VCC =5.25V
Control Signals = VCC

100

Notes:
1. Values specified are per interface pin with no pull up or pull down resistor.
2. Value specified is per interface pin with pull up or pull down resistor.

CARD AC CHARACTERISTICS
(Timing applies to Common and Attribute Memory unless otherwise noted)

Read Cycle Timing (WE# = VIH)

Parameter

Symbol

Read Cycle Time

Address Access Time
Card Enable Access Time
Output Enable Access Time
Address Setup Time
Card Enable Setup Time
Address Hold Time
Card Enable Hold Time
Output Hold from Address
Output Disable from CE#
Output Disable from OE#
Output Enable from CE#
Output Enable from OE#

tRC
ta(A)
ta(CE)
ta(OE)
tsu(A)
tsu(CE)
th(A)
th(CE)
tv(A)
tdis(CE)
tdis(OE)
ten(CE)
ten(OE)

Min
150

Max
150
150
75

20
0
20
20
0
75
75
5
5

Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Write Cycle Timing (OE# = VIH)

Parameter

Symbol

Write Cycle Time

Write Pulse Width
Address Setup Time
Address Setup Time WE#
Card Enable Setup WE#
Data Setup WE#
Data Hold Time
Write Recovery Time
Data Output Disable Time from WE#
Data Output Disable Time from OE#
Data Output Enable Time from WE#
Data Output Enable Time from OE#
Output Enable Setup from WE#
Output Enable Hold from WE#
Card Enable Setup Time from OE#
Card Enable Hold Time

tWC
tw(WE)
tsu(A)
tsu(AWEH)
tsu(CEWEH)
tsu(DWEH)
th(D)
trec(WE)
tdis(WE)
tdis(OE)
ten(WE)
ten(OE)
tsu(OEWE)
th(OEWE)
tsu(CE)
th(CE)

Min
150
80
20
100
100
50
20
20

Max

75
75
5
5
10
10
0
20

Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

CARD AC CHARACTERISTICS contd

Read Cycle Timing (WE# = VIH)
tRC
ta(A)

A[25:0], REG#
ta(CE)
tv(A)

tsu(CE)

CE#
th(A)

tsu(A)

th(CE)
ta(OE)

OE#
ten(OE)

tdis(CE)
tdis(OE)

Data Valid

DQ[15:0]

Write Cycle Timing (OE# = VIH)

tWC
A[25:0], REG#
trec(WE)
tsu(CEWEH)
tsu(CE)

CE#
th(CE)

tsu(AWEH)

OE#
tsu(A)

tth(OEWE)
tw(WE)

WE#
tsu(OEWE)

tsu(DWEH)

DQ[15:0]
(Din)

th(D)

Input Data
tdis(WE)
tdis(OE)

ten(OE)
ten(WE)

DQ[15:0]
(Dout)

POWER SUPPLY SEQUENCE CHARACTERISTICS

Parameter
Detection Rising Voltage
Detection Falling Voltage
CE# Setup Time
Protection Time
Battery Backup Setup Time
CE# Recovery Time

Symbol

Min.

Typ.

Max

Units

Vinh
Vinl
tsu(CE)
tp(CE)
tbs
trec

4.2
4.1

4.3
4.2

4.4
4.3
10

V
V
ms
ms
s
ns

0.5
10
100

Power-On Timing
Vinh(Min.)

Vinh(Max.)

VCC
tp(CE)

CE1#
CE2#
tsu(CE)
Insertion/Removal is not
allowed after this time

Power-Off Timing
VinL(Min.)

VCC

VinL(Max.)

trec

tbs

CE1#
CE2#

Insertion/Removal is not
allowed until after this time

CARD INFORMATION STRUCTURE(CIS)

The CIS is data that describes the PCMCIA card and is described by the PCMCIA standard.

Physical Logical Data

Address Address Value(s)

Tuple Description

00h
02h
04h
06h

00h
01h
02h
03h

01h
03h
63h
1Ch/3Ch/0Ch/0Eh

08h
0Ah
0Ch
0Eh
10h

04h
05h
06h
07h
08h

FFh
1Eh
07h
02h
11h

12h
14h
16h
18h
1Ah

09h
0Ah
0Bh
0Ch
0Dh

01h
01h
01h
01h
FFh

Device Info Tuple

Link to Next Tuple
Device = SRAM, Speed = 150ns
Device Size = # of units [bits 7:3] time unit size
[bits 2:0] - 512Kbyte=1Ch, 1Mbyte=3Ch,
2Mbyte=0Ch, 4Mbyte=0Eh
End of Tuple
CISTPL_DEVICEGEO
CISTPL_LINK
DGTPL_BUS - Bus Width - 2 Bytes
DGTPL_EBS - Erase Block Size 2^10h = 64K
Bytes or Words
DGTPL_RBS - Byte Accessible
DGTPL_WBS - Byte Accessible
DGTPL_PART - One Partition
DGTPL_HWIL - No Interleave
CISTPL_END - End of Tuple

1Ch

0Eh

15h

CISTPL_VERS1

1Eh

0Fh

72h

CISTPL_LINK

20h

10h

04h

TPLLV1_MAJOR (PCMCIA 1.1/JEIDA 4.2)

22h
24h...3Ah

11h
12h...1Dh

3Ch
3Eh...50h

1Eh
1Fh28h

01h
TPLLV1_MINOR
56 69 6B 61 6E 74 2C ASCII Text is : Vikant, Inc. {12 Characters total}
20 49 6E 63 2E
00
NULL String Delimiter (String 1)
ASCII Text is : (Note 2) VT-SRA-004 {10
56 54 2D 53 52 41
Characters total}
2D 30 30 34

52h
54h6Eh

29h
2Ah...37h

00
34 4D 42 20 53 52
41 4D 20 31 35 30
6E 53

ASCII Text is : (Note 3) 4MB SRAM 150nS {14

Characters total}

70h

38h

00

NULL String Delimiter (String 3)

72h

39h

00

NULL String Delimiter (String 4)

74h

3Ah

FF

CISTPL_END - End of Tuple

76h

3Bh

FF

CISTPL_END - End of Chain Tuple

NULL String Delimiter (String 2)

PART NUMBERING
Part Number
VT-SR-512
VT-SR-001
VT-SR-002
VT-SR-004
VT-SRA-512
VT-SRA-001
VT-SRA-002
VT-SRA-004

Common Memory
512 KBytes
1 Megabyte
2 Megabyte
4 Megabyte
512 KBytes
1 Megabyte
2 Megabyte
4 Megabyte

Copyright 2004, Vikant, Inc. All Rights Reserved

Attribute Memory
None
None
None
None
256 Bytes
256 Bytes
256 Bytes
256 Bytes

Data value
1C
3C
0C
0E
1C
3C
0C
0E