University of KwaZulu-Natal Analogue Electronics 2 ENEL3AE

H Jay Page 1 2013

Assignment AN1 2013 - Solutions

1.1 Neglecting base currents for dc analysis:
mode) active V 0,3 ( V 13 , 2 V 3 , 2 43 , 4 V V V
V 43 , 4 ) k 7 , 4 mA 333 , 0 ( V 6 R I V V
mode) active V 3 , 0 ( V 0 , 1 3 , 1 3 , 2 V V V
V 3 , 2 7 , 0 0 , 3 V V V ; V 0 , 3 V 6
k 66
k 33
V
R
R R
V
mA 3 33 , 0 k 9 , 3 V 3 , 1 I I I I
V 3 , 1 7 , 0 0 , 2 V V V ; V 0 , 2 V 6
k 66
k 22
V
R
R
V
2 E 2 C 2 CE
C 2 C CC 2 C
1 E 1 C 1 CE
BE 2 B 2 E 1 C CC
total B
2 B 3 B
2 B
2 C 2 E 1 C 1 E
BE 1 B 1 E CC
total B
3 B
1 B
> = = =
= = =
> = = =
= = = = =
+
=
= = = = =
= = = = = =
=


Mid-band small-signal equiv. circuit, using -model for CE stage Q
1
and T-model for CB stage Q
2
:








BJT mid-band model values: (both BJTs biased to same dc current)
( ) 58 k 7 75 101 r 1 r ; 75
mA 333 , 0
mV 25
I
V
r ; V / mA 3 , 13
mV 25
mA 333 , 0
V
I
g
e
E
T
e
T
C
m
= = + | = O = = = = = =
t


At mid-band frequencies:
( )
V / V 6 , 33 6 , 42
k 1 73 k 3
73 k 3
A
R R
R
v
v
A
V / V 6 , 42 A A
v
v
A r 1 g since 1 r g
v
r v g
v
v
A
V / V 6 , 42 2 k 3 V / mA 3 , 13 R g v v A ; 73 k 3 59 k 7 // 33 k 7 r // R R
33 k 7 k 22 // k 11 R // R R ; 2 k 3 k 10 // 7 k 4 R // R R
v
sig in
in
sig
o
sig V
1 v 2 v
in
o
v e m e m
1 be
e 1 be m
in
1 c
1 v
L m 1 c o 2 v B in
3 B 2 B B L C L
=
+
=
+
=
~ = = ~ ~ =

= =
= = ' = = = = =
= = = = = = '
t


1.2 BJT model capacitance values:
pF 58 , 8 F 10 2
10 200 2
10 3 , 13
C
f 2
g
C ; pF 2 C C
12
6
3
T
m
ob
=
t

=
t
= = =

t


Using hybrid- models for the BJTs, the small-signal high-frequency equivalent circuit is:









Applying Miller theorem to C

of Q
1
where 1 A
1 v
= , C

is replaced by C
M1
& C
M2
where:
v
o
R'
L
g
m
.v
be1
b
1
c
1
e
1
R
B
r
t
v
in
=
v
be1
g
m
.v
be2
e
2
r
e
b
2
c
2
R
C
R
L
Q
1
Q
2
R
sig
v
sig
R
B
= R
B2
// R
B3
C
t
C

C
t C

v
c1
= -v
be2 C
M1
C
M2
v
o
R'
L
g
m
.v
be1
b
1
c
1
e
1
v
be1
R
B r
t
v
in v
c1
g
m
.v
be2
e
2
r
e
b
2
c
2
R
C
R
L
Q
1
Q
2
v
be2
R
sig
v
sig
R
B
= R
B2
// R
B3
University of KwaZulu-Natal Analogue Electronics 2 ENEL3AE
H Jay Page 2 2013
v
O
R
D2
Q
3
R
1
R
L
Q
1
Q
2
R
F
R
A
v
s
R
s
R
in
R
out
I
T
(dc)
R
1
R
F
I
3
(dc)
v
f
R'
L
R
i
R
o
( ) ( ) ( ) ( )

= + = = = + = = C 2 1 1 C A 1 1 C C and C 2 1 1 C A 1 C C
1 v 2 M 1 v 1 M
giving a
simplified equivalent circuit with 3 RC time-constants at input, middle, and output as follows:









( ) ( ) ( ) ( ) ns 94 , 9 ps 6 , 12 789 p 2 2 p 58 , 8 73 k 3 // k 1 C 2 C R // R
in sig p / i
= = + = + = t
t

( ) ns 945 , 0 p 6 , 12 75 C 2 C r
e m
= = + = t
t

ns 4 , 6 p 2 2 k 3 C R
L p / o
= = ' = t

Thus ns 3 , 17 4 , 6 945 , 0 94 , 9
total
= + + = t
Hence using OCTC method, MHz 2 , 9 Hz
10 3 . 17 2
1
2
1
f
9
total
H
~
t
=
t t
~

.

1.3 The dc bias chain connecting the BJT bases has multiple outputs (each base). Thvenins
theorem only applies to a circuit with a single output (at a time) and is thus not applicable here.

2. 1 Identifying the topology:

i/p: Input loop = source (V
s
, R
s
) in series with diff. i/p and 3
rd
component (R
1
) with R
1
connected to
o/p. series or voltage applied feedback. (V
f
is across R
1
; use Thevenin source)

o/p: If R
L
= 0 (short cct.) V
f
is killed shunt or voltage derived feedback.

Hence circuit is a voltage amplifier, and
s o f V f
v v A A = is stabilized by ve feedback.

2.2 Determining the loaded A network without feedback:

At i/p: Short V
o
(R
L
= 0) to kill feedback at o/p ( )
F 1
R // R appears in the gate circuit of Q
2
.

At o/p: o/c at gate of Q
2
to kill feedback at i/p ( )
F 1
R R + appears across o/p to ground.

Hence, loaded A network:













(ideally)
R
R
1
R
R R 1
A : large is A assuming
R R
R
v
v
1
F
1
F 1
f v
F 1
1
o
f
+ =
+
=
|
~ | =
+
= |

v
o
R'
L
g
m
.v
be1
b
1
c
1
e
1
R
B
// r
t
g
m
.v
be2
e
2
r
e
b
2
c
2
R
C
R
L
R
sig
v
sig
C
t
+2C

C
t
+2C

v
in
=
v
be1
t
i/p
t
o/p
t
m
v
c1
=
-v
be2